1 /*- 2 * Copyright (c) 2018 Microsemi Corporation. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* $FreeBSD$ */ 28 29 #ifndef _PQI_STRUCTURES_H 30 #define _PQI_STRUCTURES_H 31 32 33 34 35 struct bmic_host_wellness_driver_version { 36 uint8_t start_tag[4]; 37 uint8_t driver_version_tag[2]; 38 uint16_t driver_version_length; 39 char driver_version[32]; 40 uint8_t end_tag[2]; 41 42 }OS_ATTRIBUTE_PACKED; 43 44 45 struct bmic_host_wellness_time { 46 uint8_t start_tag[4]; 47 uint8_t time_tag[2]; 48 uint16_t time_length; 49 uint8_t hour; 50 uint8_t min; 51 uint8_t sec; 52 uint8_t reserved; 53 uint8_t month; 54 uint8_t day; 55 uint8_t century; 56 uint8_t year; 57 uint8_t dont_write_tag[2]; 58 uint8_t end_tag[2]; 59 60 }OS_ATTRIBUTE_PACKED; 61 62 63 /* As per PQI Spec pqi-2r00a , 6.2.2. */ 64 65 /* device capability register , for admin q table 24 */ 66 struct pqi_dev_adminq_cap { 67 uint8_t max_admin_ibq_elem; 68 uint8_t max_admin_obq_elem; 69 uint8_t admin_ibq_elem_len; 70 uint8_t admin_obq_elem_len; 71 uint16_t max_pqi_dev_reset_tmo; 72 uint8_t res[2]; 73 }OS_ATTRIBUTE_PACKED; 74 75 /* admin q parameter reg , table 36 */ 76 struct admin_q_param { 77 uint8_t num_iq_elements; 78 uint8_t num_oq_elements; 79 uint8_t intr_msg_num; 80 uint8_t msix_disable; 81 }OS_ATTRIBUTE_PACKED; 82 83 struct pqi_registers { 84 uint64_t signature; 85 uint64_t admin_q_config; 86 uint64_t pqi_dev_adminq_cap; 87 uint32_t legacy_intr_status; 88 uint32_t legacy_intr_mask_set; 89 uint32_t legacy_intr_mask_clr; 90 uint8_t res1[28]; 91 uint32_t pqi_dev_status; 92 uint8_t res2[4]; 93 uint64_t admin_ibq_pi_offset; 94 uint64_t admin_obq_ci_offset; 95 uint64_t admin_ibq_elem_array_addr; 96 uint64_t admin_obq_elem_array_addr; 97 uint64_t admin_ibq_ci_addr; 98 uint64_t admin_obq_pi_addr; 99 uint32_t admin_q_param; 100 uint8_t res3[4]; 101 uint32_t pqi_dev_err; 102 uint8_t res4[4]; 103 uint64_t error_details; 104 uint32_t dev_reset; 105 uint32_t power_action; 106 uint8_t res5[104]; 107 }OS_ATTRIBUTE_PACKED; 108 109 /* 110 * IOA controller registers 111 * Mapped in PCIe BAR 0. 112 */ 113 114 struct ioa_registers { 115 uint8_t res1[0x18]; 116 uint32_t host_to_ioa_db_mask_clr; /* 18h */ 117 uint8_t res2[4]; 118 uint32_t host_to_ioa_db; /* 20h */ 119 uint8_t res3[4]; 120 uint32_t host_to_ioa_db_clr; /* 28h */ 121 uint8_t res4[8]; 122 uint32_t ioa_to_host_glob_int_mask; /* 34h */ 123 uint8_t res5[0x64]; 124 uint32_t ioa_to_host_db; /* 9Ch */ 125 uint32_t ioa_to_host_db_clr; /* A0h */ 126 uint8_t res6[4]; 127 uint32_t ioa_to_host_db_mask; /* A8h */ 128 uint32_t ioa_to_host_db_mask_clr; /* ACh */ 129 uint32_t scratchpad0; /* B0h */ 130 uint32_t scratchpad1; /* B4h */ 131 uint32_t scratchpad2; /* B8h */ 132 uint32_t scratchpad3_fw_status; /* BCh */ 133 uint8_t res7[8]; 134 uint32_t scratchpad4; /* C8h */ 135 uint8_t res8[0xf34]; /* 0xC8 + 4 + 0xf34 = 1000h */ 136 uint32_t mb[8]; /* 1000h */ 137 }OS_ATTRIBUTE_PACKED; 138 139 140 /* PQI Preferred settings */ 141 struct pqi_pref_settings { 142 uint16_t max_cmd_size; 143 uint16_t max_fib_size; 144 }OS_ATTRIBUTE_PACKED; 145 146 /* pqi capability by sis interface */ 147 struct pqi_cap { 148 uint32_t max_sg_elem; 149 uint32_t max_transfer_size; 150 uint32_t max_outstanding_io; 151 uint32_t conf_tab_off; 152 uint32_t conf_tab_sz; 153 }OS_ATTRIBUTE_PACKED; 154 155 struct pqi_conf_table { 156 uint8_t sign[8]; /* "CFGTABLE" */ 157 uint32_t first_section_off; 158 }; 159 160 struct pqi_conf_table_section_header { 161 uint16_t section_id; 162 uint16_t next_section_off; 163 }; 164 165 struct pqi_conf_table_general_info { 166 struct pqi_conf_table_section_header header; 167 uint32_t section_len; 168 uint32_t max_outstanding_req; 169 uint32_t max_sg_size; 170 uint32_t max_sg_per_req; 171 }; 172 173 struct pqi_conf_table_debug { 174 struct pqi_conf_table_section_header header; 175 uint32_t scratchpad; 176 }; 177 178 struct pqi_conf_table_heartbeat { 179 struct pqi_conf_table_section_header header; 180 uint32_t heartbeat_counter; 181 }; 182 183 typedef union pqi_reset_reg { 184 struct { 185 uint32_t reset_type : 3; 186 uint32_t reserved : 2; 187 uint32_t reset_action : 3; 188 uint32_t hold_in_pd1 : 1; 189 uint32_t reserved2 : 23; 190 } bits; 191 uint32_t all_bits; 192 }pqi_reset_reg_t; 193 194 /* Memory descriptor for DMA memory allocation */ 195 typedef struct dma_mem { 196 void *virt_addr; 197 dma_addr_t dma_addr; 198 uint32_t size; 199 uint32_t align; 200 char *tag; 201 bus_dma_tag_t dma_tag; 202 bus_dmamap_t dma_map; 203 }dma_mem_t; 204 205 /* Lock should be 8 byte aligned */ 206 207 #ifndef LOCKFREE_STACK 208 209 typedef struct pqi_taglist { 210 uint32_t max_elem; 211 uint32_t num_elem; 212 uint32_t head; 213 uint32_t tail; 214 uint32_t *elem_array; 215 boolean_t lockcreated; 216 char lockname[LOCKNAME_SIZE]; 217 OS_LOCK_T lock OS_ATTRIBUTE_ALIGNED(8); 218 }pqi_taglist_t; 219 220 #else /* LOCKFREE_STACK */ 221 222 union head_list { 223 struct { 224 uint32_t seq_no; /* To avoid aba problem */ 225 uint32_t index; /* Index at the top of the stack */ 226 }top; 227 uint64_t data; 228 }; 229 /* lock-free stack used to push and pop the tag used for IO request */ 230 typedef struct lockless_stack { 231 uint32_t *next_index_array; 232 uint32_t num_elements; 233 volatile union head_list head OS_ATTRIBUTE_ALIGNED(8); 234 }lockless_stack_t; 235 236 #endif /* LOCKFREE_STACK */ 237 238 /* 239 * PQI SGL descriptor layouts. 240 */ 241 /* 242 * SGL (Scatter Gather List) descriptor Codes 243 */ 244 245 #define SGL_DESCRIPTOR_CODE_DATA_BLOCK 0x0 246 #define SGL_DESCRIPTOR_CODE_BIT_BUCKET 0x1 247 #define SGL_DESCRIPTOR_CODE_STANDARD_SEGMENT 0x2 248 #define SGL_DESCRIPTOR_CODE_LAST_STANDARD_SEGMENT 0x3 249 #define SGL_DESCRIPTOR_CODE_LAST_ALTERNATIVE_SGL_SEGMENT 0x4 250 #define SGL_DESCRIPTOR_CODE_VENDOR_SPECIFIC 0xF 251 252 typedef struct sgl_descriptor 253 { 254 uint64_t addr; /* !< Bytes 0-7. The starting 64-bit memory byte address of the data block. */ 255 uint32_t length; /* !< Bytes 8-11. The length in bytes of the data block. Set to 0x00000000 specifies that no data be transferred. */ 256 uint8_t res[3]; /* !< Bytes 12-14. */ 257 uint8_t zero : 4; /* !< Byte 15, Bits 0-3. */ 258 uint8_t type : 4; /* !< Byte 15, Bits 4-7. sgl descriptor type */ 259 } sg_desc_t; 260 261 /* PQI IUs */ 262 typedef struct iu_header 263 { 264 uint8_t iu_type; 265 uint8_t comp_feature; 266 uint16_t iu_length; 267 }OS_ATTRIBUTE_PACKED iu_header_t; 268 269 270 typedef struct general_admin_request /* REPORT_PQI_DEVICE_CAPABILITY, REPORT_MANUFACTURER_INFO, REPORT_OPERATIONAL_IQ, REPORT_OPERATIONAL_OQ all same layout. */ 271 { 272 iu_header_t header; /* !< Bytes 0-3. */ 273 uint16_t res1; 274 uint16_t work; 275 uint16_t req_id; /* !< Bytes 8-9. request identifier */ 276 uint8_t fn_code; /* !< Byte 10. which administrator function */ 277 union { 278 struct { 279 uint8_t res2[33]; /* !< Bytes 11-43. function specific */ 280 uint32_t buf_size; /* !< Bytes 44-47. size in bytes of the Data-In/Out Buffer */ 281 sg_desc_t sg_desc; /* !< Bytes 48-63. SGL */ 282 } OS_ATTRIBUTE_PACKED general_func; 283 284 struct { 285 uint8_t res1; 286 uint16_t qid; 287 uint8_t res2[2]; 288 uint64_t elem_arr_addr; 289 uint64_t iq_ci_addr; 290 uint16_t num_elem; 291 uint16_t elem_len; 292 uint8_t queue_proto; 293 uint8_t arb_prio; 294 uint8_t res3[22]; 295 uint32_t vend_specific; 296 } OS_ATTRIBUTE_PACKED create_op_iq; 297 298 struct { 299 uint8_t res1; 300 uint16_t qid; 301 uint8_t res2[2]; 302 uint64_t elem_arr_addr; 303 uint64_t ob_pi_addr; 304 uint16_t num_elem; 305 uint16_t elem_len; 306 uint8_t queue_proto; 307 uint8_t res3[3]; 308 uint16_t intr_msg_num; 309 uint16_t coales_count; 310 uint32_t min_coales_time; 311 uint32_t max_coales_time; 312 uint8_t res4[8]; 313 uint32_t vend_specific; 314 } OS_ATTRIBUTE_PACKED create_op_oq; 315 316 struct { 317 uint8_t res1; 318 uint16_t qid; 319 uint8_t res2[50]; 320 } OS_ATTRIBUTE_PACKED delete_op_queue; 321 322 struct { 323 uint8_t res1; 324 uint16_t qid; 325 uint8_t res2[46]; 326 uint32_t vend_specific; 327 } OS_ATTRIBUTE_PACKED change_op_iq_prop; 328 329 } OS_ATTRIBUTE_PACKED req_type; 330 331 }OS_ATTRIBUTE_PACKED gen_adm_req_iu_t; 332 333 334 typedef struct general_admin_response { 335 iu_header_t header; 336 uint16_t res1; 337 uint16_t work; 338 uint16_t req_id; 339 uint8_t fn_code; 340 uint8_t status; 341 union { 342 struct { 343 uint8_t status_desc[4]; 344 uint64_t pi_offset; 345 uint8_t res[40]; 346 } OS_ATTRIBUTE_PACKED create_op_iq; 347 348 struct { 349 uint8_t status_desc[4]; 350 uint64_t ci_offset; 351 uint8_t res[40]; 352 } OS_ATTRIBUTE_PACKED create_op_oq; 353 } OS_ATTRIBUTE_PACKED resp_type; 354 } OS_ATTRIBUTE_PACKED gen_adm_resp_iu_t ; 355 356 /*report and set Event config IU*/ 357 358 typedef struct pqi_event_config_request { 359 iu_header_t header; 360 uint16_t response_queue_id; /* specifies the OQ where the response 361 IU is to be delivered */ 362 uint8_t work_area[2]; /* reserved for driver use */ 363 uint16_t request_id; 364 union { 365 uint16_t reserved; /* Report event config iu */ 366 uint16_t global_event_oq_id; /* Set event config iu */ 367 }iu_specific; 368 uint32_t buffer_length; 369 sg_desc_t sg_desc; 370 }pqi_event_config_request_t; 371 #if 0 372 typedef struct pqi_set_event_config_request { 373 iu_header_t header; 374 uint16_t response_queue_id; /* specifies the OQ where the response 375 IU is to be delivered */ 376 uint8_t work_area[2]; /* reserved for driver use */ 377 uint16_t request_id; 378 uint16_t global_event_oq_id; 379 uint32_t buffer_length; 380 sg_desc_t sg_desc; 381 }pqi_set_event_config_request_t; 382 #endif 383 384 /* Report/Set event config data-in/data-out buffer structure */ 385 386 #define PQI_MAX_EVENT_DESCRIPTORS 255 387 388 struct pqi_event_descriptor { 389 uint8_t event_type; 390 uint8_t reserved; 391 uint16_t oq_id; 392 }; 393 394 typedef struct pqi_event_config { 395 uint8_t reserved[2]; 396 uint8_t num_event_descriptors; 397 uint8_t reserved1; 398 struct pqi_event_descriptor descriptors[PQI_MAX_EVENT_DESCRIPTORS]; 399 }pqi_event_config_t; 400 401 /*management response IUs */ 402 typedef struct pqi_management_response{ 403 iu_header_t header; 404 uint16_t reserved1; 405 uint8_t work_area[2]; 406 uint16_t req_id; 407 uint8_t result; 408 uint8_t reserved[5]; 409 uint64_t result_data; 410 }pqi_management_response_t; 411 /*Event response IU*/ 412 typedef struct pqi_event_response { 413 iu_header_t header; 414 uint16_t reserved1; 415 uint8_t work_area[2]; 416 uint8_t event_type; 417 uint8_t reserved2 : 7; 418 uint8_t request_acknowledge : 1; 419 uint16_t event_id; 420 uint32_t additional_event_id; 421 uint8_t data[16]; 422 }pqi_event_response_t; 423 424 /*event acknowledge IU*/ 425 typedef struct pqi_event_acknowledge_request { 426 iu_header_t header; 427 uint16_t reserved1; 428 uint8_t work_area[2]; 429 uint8_t event_type; 430 uint8_t reserved2; 431 uint16_t event_id; 432 uint32_t additional_event_id; 433 }pqi_event_acknowledge_request_t; 434 435 struct pqi_event { 436 boolean_t pending; 437 uint8_t event_type; 438 uint16_t event_id; 439 uint32_t additional_event_id; 440 }; 441 442 443 typedef struct op_q_params 444 { 445 uint8_t fn_code; 446 uint16_t qid; 447 uint16_t num_elem; 448 uint16_t elem_len; 449 uint16_t int_msg_num; 450 451 } OS_ATTRIBUTE_PACKED op_q_params; 452 453 454 /* Driver will use this structure to interpret the error 455 info element returned from a failed requests */ 456 typedef struct raid_path_error_info_elem { 457 uint8_t data_in_result; /* !< Byte 0. See SOP spec Table 77. */ 458 uint8_t data_out_result; /* !< Byte 1. See SOP spec Table 78. */ 459 uint8_t reserved[3]; /* !< Bytes 2-4. */ 460 uint8_t status; /* !< Byte 5. See SAM-5 specification "Status" codes Table 40. Defined in Storport.h */ 461 uint16_t status_qual; /* !< Bytes 6-7. See SAM-5 specification Table 43. */ 462 uint16_t sense_data_len; /* !< Bytes 8-9. See SOP specification table 79. */ 463 uint16_t resp_data_len; /* !< Bytes 10-11. See SOP specification table 79. */ 464 uint32_t data_in_transferred; /* !< Bytes 12-15. If "dada_in_result = 0x01 (DATA_IN BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-In buffer else Ignored. */ 465 uint32_t data_out_transferred; /* !< Bytes 16-19. If "data_out_result = 0x01 (DATA_OUT BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-Out buffer else Ignored. */ 466 uint8_t data[256]; /* !< Bytes 20-275. Response Data buffer or Sense Data buffer but not both. */ 467 }OS_ATTRIBUTE_PACKED raid_path_error_info_elem_t; 468 469 #define PQI_ERROR_BUFFER_ELEMENT_LENGTH sizeof(raid_path_error_info_elem_t) 470 471 typedef enum error_data_present 472 { 473 DATA_PRESENT_NO_DATA = 0, /* !< No data present in Data buffer. */ 474 DATA_PRESENT_RESPONSE_DATA = 1, /* !< Response data is present in Data buffer. */ 475 DATA_PRESENT_SENSE_DATA = 2 /* !< Sense data is present in Data buffer. */ 476 } error_data_present_t; 477 478 typedef struct aio_path_error_info_elem 479 { 480 uint8_t status; /* !< Byte 0. See SAM-5 specification "SCSI Status" codes Table 40. Defined in Storport.h */ 481 uint8_t service_resp; /* !< Byte 1. SCSI Service Response. */ 482 uint8_t data_pres; /* !< Byte 2. Bits [7:2] reserved. Bits [1:0] - 0=No data, 1=Response data, 2=Sense data. */ 483 uint8_t reserved1; /* !< Byte 3. Reserved. */ 484 uint32_t resd_count; /* !< Bytes 4-7. The residual data length in bytes. Need the original transfer size and if Status is OverRun or UnderRun. */ 485 uint16_t data_len; /* !< Bytes 8-9. The amount of Sense data or Response data returned in Response/Sense Data buffer. */ 486 uint16_t reserved2; /* !< Bytes 10. Reserved. */ 487 uint8_t data[256]; /* !< Bytes 11-267. Response data buffer or Sense data buffer but not both. */ 488 uint8_t padding[8]; /* !< Bytes 268-275. Padding to make AIO_PATH_ERROR_INFO_ELEMENT = RAID_PATH_ERROR_INFO_ELEMENT */ 489 }OS_ATTRIBUTE_PACKED aio_path_error_info_elem_t; 490 491 struct init_base_struct { 492 uint32_t revision; /* revision of init structure */ 493 uint32_t flags; /* reserved */ 494 uint32_t err_buf_paddr_l; /* lower 32 bits of physical address of error buffer */ 495 uint32_t err_buf_paddr_h; /* upper 32 bits of physical address of error buffer */ 496 uint32_t err_buf_elem_len; /* length of each element in error buffer (in bytes) */ 497 uint32_t err_buf_num_elem; /* number of elements in error buffer */ 498 }OS_ATTRIBUTE_PACKED; 499 500 /* Queue details */ 501 typedef struct ib_queue { 502 uint32_t q_id; 503 uint32_t num_elem; 504 uint32_t elem_size; 505 char *array_virt_addr; 506 dma_addr_t array_dma_addr; 507 uint32_t pi_local; 508 uint32_t pi_register_offset; 509 uint32_t *pi_register_abs; 510 uint32_t *ci_virt_addr; 511 dma_addr_t ci_dma_addr; 512 boolean_t created; 513 boolean_t lockcreated; 514 char lockname[LOCKNAME_SIZE]; 515 OS_PQILOCK_T lock OS_ATTRIBUTE_ALIGNED(8); 516 }ib_queue_t; 517 518 typedef struct ob_queue { 519 uint32_t q_id; 520 uint32_t num_elem; 521 uint32_t elem_size; 522 uint32_t intr_msg_num; 523 char *array_virt_addr; 524 dma_addr_t array_dma_addr; 525 uint32_t ci_local; 526 uint32_t ci_register_offset; 527 uint32_t *ci_register_abs; 528 uint32_t *pi_virt_addr; 529 dma_addr_t pi_dma_addr; 530 boolean_t created; 531 }ob_queue_t; 532 533 typedef struct pqisrc_sg_desc{ 534 uint64_t addr; 535 uint32_t len; 536 uint32_t flags; 537 }sgt_t; 538 539 540 typedef struct pqi_iu_layer_desc { 541 uint8_t ib_spanning_supported : 1; 542 uint8_t res1 : 7; 543 uint8_t res2[5]; 544 uint16_t max_ib_iu_len; 545 uint8_t ob_spanning_supported : 1; 546 uint8_t res3 : 7; 547 uint8_t res4[5]; 548 uint16_t max_ob_iu_len; 549 }OS_ATTRIBUTE_PACKED pqi_iu_layer_desc_t; 550 551 552 /* Response IU data */ 553 typedef struct pqi_device_capabilities { 554 uint16_t length; 555 uint8_t res1[6]; 556 uint8_t ibq_arb_priority_support_bitmask; 557 uint8_t max_aw_a; 558 uint8_t max_aw_b; 559 uint8_t max_aw_c; 560 uint8_t max_arb_burst : 3; 561 uint8_t res2 : 4; 562 uint8_t iqa : 1; 563 uint8_t res3[2]; 564 uint8_t iq_freeze : 1; 565 uint8_t res4 : 7; 566 uint16_t max_iqs; 567 uint16_t max_iq_elements; 568 uint8_t res5[4]; 569 uint16_t max_iq_elem_len; 570 uint16_t min_iq_elem_len; 571 uint8_t res6[2]; 572 uint16_t max_oqs; 573 uint16_t max_oq_elements; 574 uint16_t intr_coales_time_granularity; 575 uint16_t max_oq_elem_len; 576 uint16_t min_oq_elem_len; 577 uint8_t res7[24]; 578 pqi_iu_layer_desc_t iu_layer_desc[32]; 579 }OS_ATTRIBUTE_PACKED pqi_dev_cap_t; 580 581 /* IO path */ 582 583 typedef struct pqi_aio_req { 584 iu_header_t header; 585 uint16_t response_queue_id; 586 uint8_t work_area[2]; 587 uint16_t req_id; 588 uint8_t res1[2]; 589 uint32_t nexus; 590 uint32_t buf_len; 591 uint8_t data_dir : 2; 592 uint8_t partial : 1; 593 uint8_t mem_type : 1; 594 uint8_t fence : 1; 595 uint8_t encrypt_enable : 1; 596 uint8_t res2 : 2; 597 uint8_t task_attr : 3; 598 uint8_t cmd_prio : 4; 599 uint8_t res3 : 1; 600 uint16_t encrypt_key_index; 601 uint32_t encrypt_twk_low; 602 uint32_t encrypt_twk_high; 603 uint8_t cdb[16]; 604 uint16_t err_idx; 605 uint8_t num_sg; 606 uint8_t cdb_len; 607 uint8_t lun[8]; 608 uint8_t res4[4]; 609 sgt_t sg_desc[4]; 610 }OS_ATTRIBUTE_PACKED pqi_aio_req_t; 611 612 613 typedef struct pqisrc_raid_request { 614 iu_header_t header; 615 uint16_t response_queue_id; /* specifies the OQ where the response 616 IU is to be delivered */ 617 uint8_t work_area[2]; /* reserved for driver use */ 618 uint16_t request_id; 619 uint16_t nexus_id; 620 uint32_t buffer_length; 621 uint8_t lun_number[8]; 622 uint16_t protocol_spec; 623 uint8_t data_direction : 2; 624 uint8_t partial : 1; 625 uint8_t reserved1 : 4; 626 uint8_t fence : 1; 627 uint16_t error_index; 628 uint8_t reserved2; 629 uint8_t task_attribute : 3; 630 uint8_t command_priority : 4; 631 uint8_t reserved3 : 1; 632 uint8_t reserved4 : 2; 633 uint8_t additional_cdb_bytes_usage : 3; 634 uint8_t reserved5 : 3; 635 uint8_t cdb[16]; 636 uint8_t additional_cdb_bytes[16]; 637 sgt_t sg_descriptors[4]; 638 }OS_ATTRIBUTE_PACKED pqisrc_raid_req_t; 639 640 641 typedef struct pqi_tmf_req { 642 iu_header_t header; 643 uint16_t resp_qid; 644 uint8_t work_area[2]; 645 uint16_t req_id; 646 uint16_t nexus; 647 uint8_t res1[4]; 648 uint8_t lun[8]; 649 uint16_t protocol_spec; 650 uint16_t obq_id_to_manage; 651 uint16_t req_id_to_manage; 652 uint8_t tmf; 653 uint8_t res2 : 7; 654 uint8_t fence : 1; 655 }OS_ATTRIBUTE_PACKED pqi_tmf_req_t; 656 657 658 typedef struct pqi_tmf_resp { 659 iu_header_t header; 660 uint16_t resp_qid; 661 uint8_t work_area[2]; 662 uint16_t req_id; 663 uint16_t nexus; 664 uint8_t add_resp_info[3]; 665 uint8_t resp_code; 666 }pqi_tmf_resp_t; 667 668 669 struct pqi_io_response { 670 iu_header_t header; 671 uint16_t queue_id; 672 uint8_t work_area[2]; 673 uint16_t request_id; 674 uint16_t error_index; 675 uint8_t reserved[4]; 676 }OS_ATTRIBUTE_PACKED; 677 678 679 struct pqi_enc_info { 680 uint16_t data_enc_key_index; 681 uint32_t encrypt_tweak_lower; 682 uint32_t encrypt_tweak_upper; 683 }; 684 685 686 typedef struct pqi_scsi_device { 687 device_type_t devtype; /* as reported by INQUIRY commmand */ 688 uint8_t device_type; /* as reported by 689 BMIC_IDENTIFY_PHYSICAL_DEVICE - only 690 valid for devtype = TYPE_DISK */ 691 int bus; 692 int target; 693 int lun; 694 uint8_t flags; 695 uint8_t scsi3addr[8]; 696 uint64_t wwid; 697 uint8_t is_physical_device : 1; 698 uint8_t is_external_raid_device : 1; 699 uint8_t target_lun_valid : 1; 700 uint8_t expose_device : 1; 701 uint8_t no_uld_attach : 1; 702 uint8_t is_obdr_device : 1; 703 uint8_t aio_enabled : 1; 704 uint8_t device_gone : 1; 705 uint8_t new_device : 1; 706 uint8_t volume_offline : 1; 707 uint8_t vendor[8]; /* bytes 8-15 of inquiry data */ 708 uint8_t model[16]; /* bytes 16-31 of inquiry data */ 709 uint64_t sas_address; 710 uint8_t raid_level; 711 uint16_t queue_depth; /* max. queue_depth for this device */ 712 uint16_t advertised_queue_depth; 713 uint32_t ioaccel_handle; 714 uint8_t volume_status; 715 uint8_t active_path_index; 716 uint8_t path_map; 717 uint8_t bay; 718 uint8_t box[8]; 719 uint16_t phys_connector[8]; 720 int offload_config; /* I/O accel RAID offload configured */ 721 int offload_enabled; /* I/O accel RAID offload enabled */ 722 int offload_enabled_pending; 723 int offload_to_mirror; /* Send next I/O accelerator RAID 724 offload request to mirror drive. */ 725 struct raid_map *raid_map; /* I/O accelerator RAID map */ 726 int reset_in_progress; 727 os_dev_info_t *dip; /*os specific scsi device information*/ 728 boolean_t invalid; 729 }pqi_scsi_dev_t; 730 731 732 struct sense_header_scsi { /* See SPC-3 section 4.5 */ 733 uint8_t response_code; /* permit: 0x0, 0x70, 0x71, 0x72, 0x73 */ 734 uint8_t sense_key; 735 uint8_t asc; 736 uint8_t ascq; 737 uint8_t byte4; 738 uint8_t byte5; 739 uint8_t byte6; 740 uint8_t additional_length; /* always 0 for fixed sense format */ 741 }OS_ATTRIBUTE_PACKED; 742 743 744 745 typedef struct report_lun_header { 746 uint32_t list_length; 747 uint8_t extended_response; 748 uint8_t reserved[3]; 749 }OS_ATTRIBUTE_PACKED reportlun_header_t; 750 751 752 typedef struct report_lun_ext_entry { 753 uint8_t lunid[8]; 754 uint64_t wwid; 755 uint8_t device_type; 756 uint8_t device_flags; 757 uint8_t lun_count; /* number of LUNs in a multi-LUN device */ 758 uint8_t redundant_paths; 759 uint32_t ioaccel_handle; 760 }OS_ATTRIBUTE_PACKED reportlun_ext_entry_t; 761 762 763 typedef struct report_lun_data_ext { 764 reportlun_header_t header; 765 reportlun_ext_entry_t lun_entries[1]; 766 }OS_ATTRIBUTE_PACKED reportlun_data_ext_t; 767 768 typedef struct raidmap_data { 769 uint32_t ioaccel_handle; 770 uint8_t xor_mult[2]; 771 uint8_t reserved[2]; 772 }OS_ATTRIBUTE_PACKED raidmap_data_t; 773 774 typedef struct raid_map { 775 uint32_t structure_size; /* size of entire structure in bytes */ 776 uint32_t volume_blk_size; /* bytes / block in the volume */ 777 uint64_t volume_blk_cnt; /* logical blocks on the volume */ 778 uint8_t phys_blk_shift; /* shift factor to convert between 779 units of logical blocks and physical 780 disk blocks */ 781 uint8_t parity_rotation_shift; /* shift factor to convert between units 782 of logical stripes and physical 783 stripes */ 784 uint16_t strip_size; /* blocks used on each disk / stripe */ 785 uint64_t disk_starting_blk; /* first disk block used in volume */ 786 uint64_t disk_blk_cnt; /* disk blocks used by volume / disk */ 787 uint16_t data_disks_per_row; /* data disk entries / row in the map */ 788 uint16_t metadata_disks_per_row; /* mirror/parity disk entries / row 789 in the map */ 790 uint16_t row_cnt; /* rows in each layout map */ 791 uint16_t layout_map_count; /* layout maps (1 map per mirror/parity 792 group) */ 793 uint16_t flags; 794 uint16_t data_encryption_key_index; 795 uint8_t reserved[16]; 796 raidmap_data_t dev_data[RAID_MAP_MAX_ENTRIES]; 797 }OS_ATTRIBUTE_PACKED pqisrc_raid_map_t; 798 799 800 typedef struct bmic_ident_ctrl { 801 uint8_t conf_ld_count; 802 uint32_t conf_sign; 803 uint8_t fw_version[4]; 804 uint8_t rom_fw_rev[4]; 805 uint8_t hw_rev; 806 uint8_t reserved[140]; 807 uint16_t extended_lun_count; 808 uint8_t reserved1[34]; 809 uint16_t fw_build_number; 810 uint8_t reserved2[100]; 811 uint8_t ctrl_mode; 812 uint8_t reserved3[32]; 813 }OS_ATTRIBUTE_PACKED bmic_ident_ctrl_t; 814 815 typedef struct bmic_identify_physical_device { 816 uint8_t scsi_bus; /* SCSI Bus number on controller */ 817 uint8_t scsi_id; /* SCSI ID on this bus */ 818 uint16_t block_size; /* sector size in bytes */ 819 uint32_t total_blocks; /* number for sectors on drive */ 820 uint32_t reserved_blocks; /* controller reserved (RIS) */ 821 uint8_t model[40]; /* Physical Drive Model */ 822 uint8_t serial_number[40]; /* Drive Serial Number */ 823 uint8_t firmware_revision[8]; /* drive firmware revision */ 824 uint8_t scsi_inquiry_bits; /* inquiry byte 7 bits */ 825 uint8_t compaq_drive_stamp; /* 0 means drive not stamped */ 826 uint8_t last_failure_reason; 827 uint8_t flags; 828 uint8_t more_flags; 829 uint8_t scsi_lun; /* SCSI LUN for phys drive */ 830 uint8_t yet_more_flags; 831 uint8_t even_more_flags; 832 uint32_t spi_speed_rules; 833 uint8_t phys_connector[2]; /* connector number on controller */ 834 uint8_t phys_box_on_bus; /* phys enclosure this drive resides */ 835 uint8_t phys_bay_in_box; /* phys drv bay this drive resides */ 836 uint32_t rpm; /* drive rotational speed in RPM */ 837 uint8_t device_type; /* type of drive */ 838 uint8_t sata_version; /* only valid when device_type = 839 BMIC_DEVICE_TYPE_SATA */ 840 uint64_t big_total_block_count; 841 uint64_t ris_starting_lba; 842 uint32_t ris_size; 843 uint8_t wwid[20]; 844 uint8_t controller_phy_map[32]; 845 uint16_t phy_count; 846 uint8_t phy_connected_dev_type[256]; 847 uint8_t phy_to_drive_bay_num[256]; 848 uint16_t phy_to_attached_dev_index[256]; 849 uint8_t box_index; 850 uint8_t reserved; 851 uint16_t extra_physical_drive_flags; 852 uint8_t negotiated_link_rate[256]; 853 uint8_t phy_to_phy_map[256]; 854 uint8_t redundant_path_present_map; 855 uint8_t redundant_path_failure_map; 856 uint8_t active_path_number; 857 uint16_t alternate_paths_phys_connector[8]; 858 uint8_t alternate_paths_phys_box_on_port[8]; 859 uint8_t multi_lun_device_lun_count; 860 uint8_t minimum_good_fw_revision[8]; 861 uint8_t unique_inquiry_bytes[20]; 862 uint8_t current_temperature_degreesC; 863 uint8_t temperature_threshold_degreesC; 864 uint8_t max_temperature_degreesC; 865 uint8_t logical_blocks_per_phys_block_exp; 866 uint16_t current_queue_depth_limit; 867 uint8_t switch_name[10]; 868 uint16_t switch_port; 869 uint8_t alternate_paths_switch_name[40]; 870 uint8_t alternate_paths_switch_port[8]; 871 uint16_t power_on_hours; 872 uint16_t percent_endurance_used; 873 uint8_t drive_authentication; 874 uint8_t smart_carrier_authentication; 875 uint8_t smart_carrier_app_fw_version; 876 uint8_t smart_carrier_bootloader_fw_version; 877 uint8_t encryption_key_name[64]; 878 uint32_t misc_drive_flags; 879 uint16_t dek_index; 880 uint8_t padding[112]; 881 }OS_ATTRIBUTE_PACKED bmic_ident_physdev_t; 882 883 typedef struct pqisrc_bmic_flush_cache { 884 uint8_t disable_cache; 885 uint8_t power_action; 886 uint8_t ndu_flush_cache; 887 uint8_t halt_event; 888 uint8_t reserved[28]; 889 } OS_ATTRIBUTE_PACKED pqisrc_bmic_flush_cache_t; 890 891 /* for halt_event member of pqisrc_bmic_flush_cache_t */ 892 enum pqisrc_flush_cache_event_type { 893 PQISRC_NONE_CACHE_FLUSH_ONLY = 0, 894 PQISRC_SHUTDOWN = 1, 895 PQISRC_HIBERNATE = 2, 896 PQISRC_SUSPEND = 3, 897 PQISRC_RESTART = 4 898 }; 899 900 struct pqisrc_softstate; 901 struct request_container_block; 902 typedef void (*success_callback)(struct pqisrc_softstate *, struct request_container_block *); 903 typedef void (*error_callback)(struct pqisrc_softstate *, struct request_container_block *, uint16_t); 904 905 /* Request container block */ 906 typedef struct request_container_block { 907 void *req; 908 void *error_info; 909 REQUEST_STATUS_T status; 910 uint32_t tag; 911 sgt_t *sg_chain_virt; 912 dma_addr_t sg_chain_dma; 913 uint32_t data_dir; 914 pqi_scsi_dev_t *dvp; 915 struct pqisrc_softstate *softs; 916 success_callback success_cmp_callback; 917 error_callback error_cmp_callback; 918 uint8_t *cdbp; 919 int cmdlen; 920 uint32_t bcount; /* buffer size in byte */ 921 uint32_t ioaccel_handle; 922 boolean_t encrypt_enable; 923 struct pqi_enc_info enc_info; 924 int cm_flags; 925 void *cm_data; /* pointer to data in kernel space */ 926 bus_dmamap_t cm_datamap; 927 uint32_t nseg; 928 union ccb *cm_ccb; 929 sgt_t *sgt; /* sg table */ 930 int resp_qid; 931 boolean_t req_pending; 932 }rcb_t; 933 934 typedef struct tid_pool { 935 int tid[PQI_MAX_PHYSICALS]; 936 int index; 937 }tid_pool_t; 938 939 typedef struct pqisrc_softstate { 940 OS_SPECIFIC_T os_specific; 941 struct ioa_registers *ioa_reg; 942 struct pqi_registers *pqi_reg; 943 char *pci_mem_base_vaddr; 944 PCI_ACC_HANDLE_T pci_mem_handle; 945 struct pqi_cap pqi_cap; 946 struct pqi_pref_settings pref_settings; 947 char fw_version[11]; 948 uint16_t fw_build_number; 949 uint32_t card; /* index to aac_cards */ 950 uint16_t vendid; /* vendor id */ 951 uint16_t subvendid; /* sub vendor id */ 952 uint16_t devid; /* device id */ 953 uint16_t subsysid; /* sub system id */ 954 controller_state_t ctlr_state; 955 struct dma_mem err_buf_dma_mem; 956 struct dma_mem admin_queue_dma_mem; 957 struct dma_mem op_ibq_dma_mem; 958 struct dma_mem op_obq_dma_mem; 959 struct dma_mem event_q_dma_mem; 960 struct dma_mem sg_dma_desc[PQISRC_MAX_OUTSTANDING_REQ]; 961 ib_queue_t admin_ib_queue; 962 ob_queue_t admin_ob_queue; 963 ob_queue_t event_q; 964 ob_queue_t op_ob_q[PQISRC_MAX_SUPPORTED_OP_OB_Q - 1];/* 1 event queue */ 965 ib_queue_t op_raid_ib_q[PQISRC_MAX_SUPPORTED_OP_RAID_IB_Q]; 966 ib_queue_t op_aio_ib_q[PQISRC_MAX_SUPPORTED_OP_AIO_IB_Q]; 967 uint32_t max_outstanding_io; 968 uint32_t max_io_for_scsi_ml; 969 uint32_t num_op_raid_ibq; 970 uint32_t num_op_aio_ibq; 971 uint32_t num_op_obq; 972 uint32_t num_elem_per_op_ibq; 973 uint32_t num_elem_per_op_obq; 974 uint32_t ibq_elem_size; 975 uint32_t obq_elem_size; 976 pqi_dev_cap_t pqi_dev_cap; 977 uint16_t max_ib_iu_length_per_fw; 978 uint16_t max_ib_iu_length; 979 unsigned max_sg_per_iu; 980 uint8_t ib_spanning_supported : 1; 981 uint8_t ob_spanning_supported : 1; 982 pqi_event_config_t event_config; 983 struct pqi_event pending_events[PQI_NUM_SUPPORTED_EVENTS]; 984 int intr_type; 985 int intr_count; 986 int num_cpus_online; 987 boolean_t share_opq_and_eventq; 988 rcb_t *rcb; 989 #ifndef LOCKFREE_STACK 990 pqi_taglist_t taglist; 991 #else 992 lockless_stack_t taglist; 993 #endif /* LOCKFREE_STACK */ 994 boolean_t devlist_lockcreated; 995 OS_LOCK_T devlist_lock OS_ATTRIBUTE_ALIGNED(8); 996 char devlist_lock_name[LOCKNAME_SIZE]; 997 pqi_scsi_dev_t *device_list[PQI_MAX_DEVICES][PQI_MAX_MULTILUN]; 998 OS_SEMA_LOCK_T scan_lock; 999 uint8_t lun_count[PQI_MAX_DEVICES]; 1000 uint64_t target_sas_addr[PQI_MAX_EXT_TARGETS]; 1001 OS_ATOMIC64_T num_intrs; 1002 uint64_t prev_num_intrs; 1003 uint64_t prev_heartbeat_count; 1004 uint64_t *heartbeat_counter_abs_addr; 1005 uint64_t heartbeat_counter_off; 1006 uint64_t num_heartbeats_requested; 1007 uint32_t bus_id; 1008 uint32_t device_id; 1009 uint32_t func_id; 1010 char *os_name; 1011 boolean_t ctrl_online; 1012 uint8_t pqi_reset_quiesce_allowed : 1; 1013 boolean_t ctrl_in_pqi_mode; 1014 tid_pool_t tid_pool; 1015 }pqisrc_softstate_t; 1016 1017 #endif 1018