1 /*- 2 * Copyright (c) 2018 Microsemi Corporation. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* $FreeBSD$ */ 28 29 #ifndef _PQI_STRUCTURES_H 30 #define _PQI_STRUCTURES_H 31 32 struct bmic_host_wellness_driver_version { 33 uint8_t start_tag[4]; 34 uint8_t driver_version_tag[2]; 35 uint16_t driver_version_length; 36 char driver_version[32]; 37 uint8_t end_tag[2]; 38 39 }OS_ATTRIBUTE_PACKED; 40 41 struct bmic_host_wellness_time { 42 uint8_t start_tag[4]; 43 uint8_t time_tag[2]; 44 uint16_t time_length; 45 uint8_t hour; 46 uint8_t min; 47 uint8_t sec; 48 uint8_t reserved; 49 uint8_t month; 50 uint8_t day; 51 uint8_t century; 52 uint8_t year; 53 uint8_t dont_write_tag[2]; 54 uint8_t end_tag[2]; 55 56 }OS_ATTRIBUTE_PACKED; 57 58 /* As per PQI Spec pqi-2r00a , 6.2.2. */ 59 60 /* device capability register , for admin q table 24 */ 61 struct pqi_dev_adminq_cap { 62 uint8_t max_admin_ibq_elem; 63 uint8_t max_admin_obq_elem; 64 uint8_t admin_ibq_elem_len; 65 uint8_t admin_obq_elem_len; 66 uint16_t max_pqi_dev_reset_tmo; 67 uint8_t res[2]; 68 }OS_ATTRIBUTE_PACKED; 69 70 /* admin q parameter reg , table 36 */ 71 struct admin_q_param { 72 uint8_t num_iq_elements; 73 uint8_t num_oq_elements; 74 uint8_t intr_msg_num; 75 uint8_t msix_disable; 76 }OS_ATTRIBUTE_PACKED; 77 78 struct pqi_registers { 79 uint64_t signature; 80 uint64_t admin_q_config; 81 uint64_t pqi_dev_adminq_cap; 82 uint32_t legacy_intr_status; 83 uint32_t legacy_intr_mask_set; 84 uint32_t legacy_intr_mask_clr; 85 uint8_t res1[28]; 86 uint32_t pqi_dev_status; 87 uint8_t res2[4]; 88 uint64_t admin_ibq_pi_offset; 89 uint64_t admin_obq_ci_offset; 90 uint64_t admin_ibq_elem_array_addr; 91 uint64_t admin_obq_elem_array_addr; 92 uint64_t admin_ibq_ci_addr; 93 uint64_t admin_obq_pi_addr; 94 uint32_t admin_q_param; 95 uint8_t res3[4]; 96 uint32_t pqi_dev_err; 97 uint8_t res4[4]; 98 uint64_t error_details; 99 uint32_t dev_reset; 100 uint32_t power_action; 101 uint8_t res5[104]; 102 }OS_ATTRIBUTE_PACKED; 103 104 /* 105 * IOA controller registers 106 * Mapped in PCIe BAR 0. 107 */ 108 109 struct ioa_registers { 110 uint8_t res1[0x18]; 111 uint32_t host_to_ioa_db_mask_clr; /* 18h */ 112 uint8_t res2[4]; 113 uint32_t host_to_ioa_db; /* 20h */ 114 uint8_t res3[4]; 115 uint32_t host_to_ioa_db_clr; /* 28h */ 116 uint8_t res4[8]; 117 uint32_t ioa_to_host_glob_int_mask; /* 34h */ 118 uint8_t res5[0x64]; 119 uint32_t ioa_to_host_db; /* 9Ch */ 120 uint32_t ioa_to_host_db_clr; /* A0h */ 121 uint8_t res6[4]; 122 uint32_t ioa_to_host_db_mask; /* A8h */ 123 uint32_t ioa_to_host_db_mask_clr; /* ACh */ 124 uint32_t scratchpad0; /* B0h */ 125 uint32_t scratchpad1; /* B4h */ 126 uint32_t scratchpad2; /* B8h */ 127 uint32_t scratchpad3_fw_status; /* BCh */ 128 uint8_t res7[8]; 129 uint32_t scratchpad4; /* C8h */ 130 uint8_t res8[0xf34]; /* 0xC8 + 4 + 0xf34 = 1000h */ 131 uint32_t mb[8]; /* 1000h */ 132 }OS_ATTRIBUTE_PACKED; 133 134 /* PQI Preferred settings */ 135 struct pqi_pref_settings { 136 uint16_t max_cmd_size; 137 uint16_t max_fib_size; 138 }OS_ATTRIBUTE_PACKED; 139 140 /* pqi capability by sis interface */ 141 struct pqi_cap { 142 uint32_t max_sg_elem; 143 uint32_t max_transfer_size; 144 uint32_t max_outstanding_io; 145 uint32_t conf_tab_off; 146 uint32_t conf_tab_sz; 147 }OS_ATTRIBUTE_PACKED; 148 149 struct pqi_conf_table { 150 uint8_t sign[8]; /* "CFGTABLE" */ 151 uint32_t first_section_off; 152 }; 153 154 struct pqi_conf_table_section_header { 155 uint16_t section_id; 156 uint16_t next_section_off; 157 }; 158 159 struct pqi_conf_table_general_info { 160 struct pqi_conf_table_section_header header; 161 uint32_t section_len; 162 uint32_t max_outstanding_req; 163 uint32_t max_sg_size; 164 uint32_t max_sg_per_req; 165 }; 166 167 struct pqi_conf_table_debug { 168 struct pqi_conf_table_section_header header; 169 uint32_t scratchpad; 170 }; 171 172 struct pqi_conf_table_heartbeat { 173 struct pqi_conf_table_section_header header; 174 uint32_t heartbeat_counter; 175 }; 176 177 typedef union pqi_reset_reg { 178 struct { 179 uint32_t reset_type : 3; 180 uint32_t reserved : 2; 181 uint32_t reset_action : 3; 182 uint32_t hold_in_pd1 : 1; 183 uint32_t reserved2 : 23; 184 } bits; 185 uint32_t all_bits; 186 }pqi_reset_reg_t; 187 188 /* Memory descriptor for DMA memory allocation */ 189 typedef struct dma_mem { 190 void *virt_addr; 191 dma_addr_t dma_addr; 192 uint32_t size; 193 uint32_t align; 194 char *tag; 195 bus_dma_tag_t dma_tag; 196 bus_dmamap_t dma_map; 197 }dma_mem_t; 198 199 /* Lock should be 8 byte aligned */ 200 201 #ifndef LOCKFREE_STACK 202 203 typedef struct pqi_taglist { 204 uint32_t max_elem; 205 uint32_t num_elem; 206 uint32_t head; 207 uint32_t tail; 208 uint32_t *elem_array; 209 boolean_t lockcreated; 210 char lockname[LOCKNAME_SIZE]; 211 OS_LOCK_T lock OS_ATTRIBUTE_ALIGNED(8); 212 }pqi_taglist_t; 213 214 #else /* LOCKFREE_STACK */ 215 216 union head_list { 217 struct { 218 uint32_t seq_no; /* To avoid aba problem */ 219 uint32_t index; /* Index at the top of the stack */ 220 }top; 221 uint64_t data; 222 }; 223 /* lock-free stack used to push and pop the tag used for IO request */ 224 typedef struct lockless_stack { 225 uint32_t *next_index_array; 226 uint32_t num_elements; 227 volatile union head_list head OS_ATTRIBUTE_ALIGNED(8); 228 }lockless_stack_t; 229 230 #endif /* LOCKFREE_STACK */ 231 232 /* 233 * PQI SGL descriptor layouts. 234 */ 235 /* 236 * SGL (Scatter Gather List) descriptor Codes 237 */ 238 239 #define SGL_DESCRIPTOR_CODE_DATA_BLOCK 0x0 240 #define SGL_DESCRIPTOR_CODE_BIT_BUCKET 0x1 241 #define SGL_DESCRIPTOR_CODE_STANDARD_SEGMENT 0x2 242 #define SGL_DESCRIPTOR_CODE_LAST_STANDARD_SEGMENT 0x3 243 #define SGL_DESCRIPTOR_CODE_LAST_ALTERNATIVE_SGL_SEGMENT 0x4 244 #define SGL_DESCRIPTOR_CODE_VENDOR_SPECIFIC 0xF 245 246 typedef struct sgl_descriptor 247 { 248 uint64_t addr; /* !< Bytes 0-7. The starting 64-bit memory byte address of the data block. */ 249 uint32_t length; /* !< Bytes 8-11. The length in bytes of the data block. Set to 0x00000000 specifies that no data be transferred. */ 250 uint8_t res[3]; /* !< Bytes 12-14. */ 251 uint8_t zero : 4; /* !< Byte 15, Bits 0-3. */ 252 uint8_t type : 4; /* !< Byte 15, Bits 4-7. sgl descriptor type */ 253 } sg_desc_t; 254 255 /* PQI IUs */ 256 typedef struct iu_header 257 { 258 uint8_t iu_type; 259 uint8_t comp_feature; 260 uint16_t iu_length; 261 }OS_ATTRIBUTE_PACKED iu_header_t; 262 263 typedef struct general_admin_request /* REPORT_PQI_DEVICE_CAPABILITY, REPORT_MANUFACTURER_INFO, REPORT_OPERATIONAL_IQ, REPORT_OPERATIONAL_OQ all same layout. */ 264 { 265 iu_header_t header; /* !< Bytes 0-3. */ 266 uint16_t res1; 267 uint16_t work; 268 uint16_t req_id; /* !< Bytes 8-9. request identifier */ 269 uint8_t fn_code; /* !< Byte 10. which administrator function */ 270 union { 271 struct { 272 uint8_t res2[33]; /* !< Bytes 11-43. function specific */ 273 uint32_t buf_size; /* !< Bytes 44-47. size in bytes of the Data-In/Out Buffer */ 274 sg_desc_t sg_desc; /* !< Bytes 48-63. SGL */ 275 } OS_ATTRIBUTE_PACKED general_func; 276 277 struct { 278 uint8_t res1; 279 uint16_t qid; 280 uint8_t res2[2]; 281 uint64_t elem_arr_addr; 282 uint64_t iq_ci_addr; 283 uint16_t num_elem; 284 uint16_t elem_len; 285 uint8_t queue_proto; 286 uint8_t arb_prio; 287 uint8_t res3[22]; 288 uint32_t vend_specific; 289 } OS_ATTRIBUTE_PACKED create_op_iq; 290 291 struct { 292 uint8_t res1; 293 uint16_t qid; 294 uint8_t res2[2]; 295 uint64_t elem_arr_addr; 296 uint64_t ob_pi_addr; 297 uint16_t num_elem; 298 uint16_t elem_len; 299 uint8_t queue_proto; 300 uint8_t res3[3]; 301 uint16_t intr_msg_num; 302 uint16_t coales_count; 303 uint32_t min_coales_time; 304 uint32_t max_coales_time; 305 uint8_t res4[8]; 306 uint32_t vend_specific; 307 } OS_ATTRIBUTE_PACKED create_op_oq; 308 309 struct { 310 uint8_t res1; 311 uint16_t qid; 312 uint8_t res2[50]; 313 } OS_ATTRIBUTE_PACKED delete_op_queue; 314 315 struct { 316 uint8_t res1; 317 uint16_t qid; 318 uint8_t res2[46]; 319 uint32_t vend_specific; 320 } OS_ATTRIBUTE_PACKED change_op_iq_prop; 321 322 } OS_ATTRIBUTE_PACKED req_type; 323 324 }OS_ATTRIBUTE_PACKED gen_adm_req_iu_t; 325 326 typedef struct general_admin_response { 327 iu_header_t header; 328 uint16_t res1; 329 uint16_t work; 330 uint16_t req_id; 331 uint8_t fn_code; 332 uint8_t status; 333 union { 334 struct { 335 uint8_t status_desc[4]; 336 uint64_t pi_offset; 337 uint8_t res[40]; 338 } OS_ATTRIBUTE_PACKED create_op_iq; 339 340 struct { 341 uint8_t status_desc[4]; 342 uint64_t ci_offset; 343 uint8_t res[40]; 344 } OS_ATTRIBUTE_PACKED create_op_oq; 345 } OS_ATTRIBUTE_PACKED resp_type; 346 } OS_ATTRIBUTE_PACKED gen_adm_resp_iu_t ; 347 348 /*report and set Event config IU*/ 349 350 typedef struct pqi_event_config_request { 351 iu_header_t header; 352 uint16_t response_queue_id; /* specifies the OQ where the response 353 IU is to be delivered */ 354 uint8_t work_area[2]; /* reserved for driver use */ 355 uint16_t request_id; 356 union { 357 uint16_t reserved; /* Report event config iu */ 358 uint16_t global_event_oq_id; /* Set event config iu */ 359 }iu_specific; 360 uint32_t buffer_length; 361 sg_desc_t sg_desc; 362 }pqi_event_config_request_t; 363 #if 0 364 typedef struct pqi_set_event_config_request { 365 iu_header_t header; 366 uint16_t response_queue_id; /* specifies the OQ where the response 367 IU is to be delivered */ 368 uint8_t work_area[2]; /* reserved for driver use */ 369 uint16_t request_id; 370 uint16_t global_event_oq_id; 371 uint32_t buffer_length; 372 sg_desc_t sg_desc; 373 }pqi_set_event_config_request_t; 374 #endif 375 376 /* Report/Set event config data-in/data-out buffer structure */ 377 378 #define PQI_MAX_EVENT_DESCRIPTORS 255 379 380 struct pqi_event_descriptor { 381 uint8_t event_type; 382 uint8_t reserved; 383 uint16_t oq_id; 384 }; 385 386 typedef struct pqi_event_config { 387 uint8_t reserved[2]; 388 uint8_t num_event_descriptors; 389 uint8_t reserved1; 390 struct pqi_event_descriptor descriptors[PQI_MAX_EVENT_DESCRIPTORS]; 391 }pqi_event_config_t; 392 393 /*management response IUs */ 394 typedef struct pqi_management_response{ 395 iu_header_t header; 396 uint16_t reserved1; 397 uint8_t work_area[2]; 398 uint16_t req_id; 399 uint8_t result; 400 uint8_t reserved[5]; 401 uint64_t result_data; 402 }pqi_management_response_t; 403 /*Event response IU*/ 404 typedef struct pqi_event_response { 405 iu_header_t header; 406 uint16_t reserved1; 407 uint8_t work_area[2]; 408 uint8_t event_type; 409 uint8_t reserved2 : 7; 410 uint8_t request_acknowledge : 1; 411 uint16_t event_id; 412 uint32_t additional_event_id; 413 uint8_t data[16]; 414 }pqi_event_response_t; 415 416 /*event acknowledge IU*/ 417 typedef struct pqi_event_acknowledge_request { 418 iu_header_t header; 419 uint16_t reserved1; 420 uint8_t work_area[2]; 421 uint8_t event_type; 422 uint8_t reserved2; 423 uint16_t event_id; 424 uint32_t additional_event_id; 425 }pqi_event_acknowledge_request_t; 426 427 struct pqi_event { 428 boolean_t pending; 429 uint8_t event_type; 430 uint16_t event_id; 431 uint32_t additional_event_id; 432 }; 433 434 typedef struct op_q_params 435 { 436 uint8_t fn_code; 437 uint16_t qid; 438 uint16_t num_elem; 439 uint16_t elem_len; 440 uint16_t int_msg_num; 441 442 } OS_ATTRIBUTE_PACKED op_q_params; 443 444 /* Driver will use this structure to interpret the error 445 info element returned from a failed requests */ 446 typedef struct raid_path_error_info_elem { 447 uint8_t data_in_result; /* !< Byte 0. See SOP spec Table 77. */ 448 uint8_t data_out_result; /* !< Byte 1. See SOP spec Table 78. */ 449 uint8_t reserved[3]; /* !< Bytes 2-4. */ 450 uint8_t status; /* !< Byte 5. See SAM-5 specification "Status" codes Table 40. Defined in Storport.h */ 451 uint16_t status_qual; /* !< Bytes 6-7. See SAM-5 specification Table 43. */ 452 uint16_t sense_data_len; /* !< Bytes 8-9. See SOP specification table 79. */ 453 uint16_t resp_data_len; /* !< Bytes 10-11. See SOP specification table 79. */ 454 uint32_t data_in_transferred; /* !< Bytes 12-15. If "dada_in_result = 0x01 (DATA_IN BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-In buffer else Ignored. */ 455 uint32_t data_out_transferred; /* !< Bytes 16-19. If "data_out_result = 0x01 (DATA_OUT BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-Out buffer else Ignored. */ 456 uint8_t data[256]; /* !< Bytes 20-275. Response Data buffer or Sense Data buffer but not both. */ 457 }OS_ATTRIBUTE_PACKED raid_path_error_info_elem_t; 458 459 #define PQI_ERROR_BUFFER_ELEMENT_LENGTH sizeof(raid_path_error_info_elem_t) 460 461 typedef enum error_data_present 462 { 463 DATA_PRESENT_NO_DATA = 0, /* !< No data present in Data buffer. */ 464 DATA_PRESENT_RESPONSE_DATA = 1, /* !< Response data is present in Data buffer. */ 465 DATA_PRESENT_SENSE_DATA = 2 /* !< Sense data is present in Data buffer. */ 466 } error_data_present_t; 467 468 typedef struct aio_path_error_info_elem 469 { 470 uint8_t status; /* !< Byte 0. See SAM-5 specification "SCSI Status" codes Table 40. Defined in Storport.h */ 471 uint8_t service_resp; /* !< Byte 1. SCSI Service Response. */ 472 uint8_t data_pres; /* !< Byte 2. Bits [7:2] reserved. Bits [1:0] - 0=No data, 1=Response data, 2=Sense data. */ 473 uint8_t reserved1; /* !< Byte 3. Reserved. */ 474 uint32_t resd_count; /* !< Bytes 4-7. The residual data length in bytes. Need the original transfer size and if Status is OverRun or UnderRun. */ 475 uint16_t data_len; /* !< Bytes 8-9. The amount of Sense data or Response data returned in Response/Sense Data buffer. */ 476 uint16_t reserved2; /* !< Bytes 10. Reserved. */ 477 uint8_t data[256]; /* !< Bytes 11-267. Response data buffer or Sense data buffer but not both. */ 478 uint8_t padding[8]; /* !< Bytes 268-275. Padding to make AIO_PATH_ERROR_INFO_ELEMENT = RAID_PATH_ERROR_INFO_ELEMENT */ 479 }OS_ATTRIBUTE_PACKED aio_path_error_info_elem_t; 480 481 struct init_base_struct { 482 uint32_t revision; /* revision of init structure */ 483 uint32_t flags; /* reserved */ 484 uint32_t err_buf_paddr_l; /* lower 32 bits of physical address of error buffer */ 485 uint32_t err_buf_paddr_h; /* upper 32 bits of physical address of error buffer */ 486 uint32_t err_buf_elem_len; /* length of each element in error buffer (in bytes) */ 487 uint32_t err_buf_num_elem; /* number of elements in error buffer */ 488 }OS_ATTRIBUTE_PACKED; 489 490 /* Queue details */ 491 typedef struct ib_queue { 492 uint32_t q_id; 493 uint32_t num_elem; 494 uint32_t elem_size; 495 char *array_virt_addr; 496 dma_addr_t array_dma_addr; 497 uint32_t pi_local; 498 uint32_t pi_register_offset; 499 uint32_t *pi_register_abs; 500 uint32_t *ci_virt_addr; 501 dma_addr_t ci_dma_addr; 502 boolean_t created; 503 boolean_t lockcreated; 504 char lockname[LOCKNAME_SIZE]; 505 OS_PQILOCK_T lock OS_ATTRIBUTE_ALIGNED(8); 506 }ib_queue_t; 507 508 typedef struct ob_queue { 509 uint32_t q_id; 510 uint32_t num_elem; 511 uint32_t elem_size; 512 uint32_t intr_msg_num; 513 char *array_virt_addr; 514 dma_addr_t array_dma_addr; 515 uint32_t ci_local; 516 uint32_t ci_register_offset; 517 uint32_t *ci_register_abs; 518 uint32_t *pi_virt_addr; 519 dma_addr_t pi_dma_addr; 520 boolean_t created; 521 }ob_queue_t; 522 523 typedef struct pqisrc_sg_desc{ 524 uint64_t addr; 525 uint32_t len; 526 uint32_t flags; 527 }sgt_t; 528 529 typedef struct pqi_iu_layer_desc { 530 uint8_t ib_spanning_supported : 1; 531 uint8_t res1 : 7; 532 uint8_t res2[5]; 533 uint16_t max_ib_iu_len; 534 uint8_t ob_spanning_supported : 1; 535 uint8_t res3 : 7; 536 uint8_t res4[5]; 537 uint16_t max_ob_iu_len; 538 }OS_ATTRIBUTE_PACKED pqi_iu_layer_desc_t; 539 540 /* Response IU data */ 541 typedef struct pqi_device_capabilities { 542 uint16_t length; 543 uint8_t res1[6]; 544 uint8_t ibq_arb_priority_support_bitmask; 545 uint8_t max_aw_a; 546 uint8_t max_aw_b; 547 uint8_t max_aw_c; 548 uint8_t max_arb_burst : 3; 549 uint8_t res2 : 4; 550 uint8_t iqa : 1; 551 uint8_t res3[2]; 552 uint8_t iq_freeze : 1; 553 uint8_t res4 : 7; 554 uint16_t max_iqs; 555 uint16_t max_iq_elements; 556 uint8_t res5[4]; 557 uint16_t max_iq_elem_len; 558 uint16_t min_iq_elem_len; 559 uint8_t res6[2]; 560 uint16_t max_oqs; 561 uint16_t max_oq_elements; 562 uint16_t intr_coales_time_granularity; 563 uint16_t max_oq_elem_len; 564 uint16_t min_oq_elem_len; 565 uint8_t res7[24]; 566 pqi_iu_layer_desc_t iu_layer_desc[32]; 567 }OS_ATTRIBUTE_PACKED pqi_dev_cap_t; 568 569 /* IO path */ 570 571 typedef struct pqi_aio_req { 572 iu_header_t header; 573 uint16_t response_queue_id; 574 uint8_t work_area[2]; 575 uint16_t req_id; 576 uint8_t res1[2]; 577 uint32_t nexus; 578 uint32_t buf_len; 579 uint8_t data_dir : 2; 580 uint8_t partial : 1; 581 uint8_t mem_type : 1; 582 uint8_t fence : 1; 583 uint8_t encrypt_enable : 1; 584 uint8_t res2 : 2; 585 uint8_t task_attr : 3; 586 uint8_t cmd_prio : 4; 587 uint8_t res3 : 1; 588 uint16_t encrypt_key_index; 589 uint32_t encrypt_twk_low; 590 uint32_t encrypt_twk_high; 591 uint8_t cdb[16]; 592 uint16_t err_idx; 593 uint8_t num_sg; 594 uint8_t cdb_len; 595 uint8_t lun[8]; 596 uint8_t res4[4]; 597 sgt_t sg_desc[4]; 598 }OS_ATTRIBUTE_PACKED pqi_aio_req_t; 599 600 typedef struct pqisrc_raid_request { 601 iu_header_t header; 602 uint16_t response_queue_id; /* specifies the OQ where the response 603 IU is to be delivered */ 604 uint8_t work_area[2]; /* reserved for driver use */ 605 uint16_t request_id; 606 uint16_t nexus_id; 607 uint32_t buffer_length; 608 uint8_t lun_number[8]; 609 uint16_t protocol_spec; 610 uint8_t data_direction : 2; 611 uint8_t partial : 1; 612 uint8_t reserved1 : 4; 613 uint8_t fence : 1; 614 uint16_t error_index; 615 uint8_t reserved2; 616 uint8_t task_attribute : 3; 617 uint8_t command_priority : 4; 618 uint8_t reserved3 : 1; 619 uint8_t reserved4 : 2; 620 uint8_t additional_cdb_bytes_usage : 3; 621 uint8_t reserved5 : 3; 622 uint8_t cdb[16]; 623 uint8_t additional_cdb_bytes[16]; 624 sgt_t sg_descriptors[4]; 625 }OS_ATTRIBUTE_PACKED pqisrc_raid_req_t; 626 627 typedef struct pqi_tmf_req { 628 iu_header_t header; 629 uint16_t resp_qid; 630 uint8_t work_area[2]; 631 uint16_t req_id; 632 uint16_t nexus; 633 uint8_t res1[4]; 634 uint8_t lun[8]; 635 uint16_t protocol_spec; 636 uint16_t obq_id_to_manage; 637 uint16_t req_id_to_manage; 638 uint8_t tmf; 639 uint8_t res2 : 7; 640 uint8_t fence : 1; 641 }OS_ATTRIBUTE_PACKED pqi_tmf_req_t; 642 643 typedef struct pqi_tmf_resp { 644 iu_header_t header; 645 uint16_t resp_qid; 646 uint8_t work_area[2]; 647 uint16_t req_id; 648 uint16_t nexus; 649 uint8_t add_resp_info[3]; 650 uint8_t resp_code; 651 }pqi_tmf_resp_t; 652 653 struct pqi_io_response { 654 iu_header_t header; 655 uint16_t queue_id; 656 uint8_t work_area[2]; 657 uint16_t request_id; 658 uint16_t error_index; 659 uint8_t reserved[4]; 660 }OS_ATTRIBUTE_PACKED; 661 662 struct pqi_enc_info { 663 uint16_t data_enc_key_index; 664 uint32_t encrypt_tweak_lower; 665 uint32_t encrypt_tweak_upper; 666 }; 667 668 typedef struct pqi_scsi_device { 669 device_type_t devtype; /* as reported by INQUIRY commmand */ 670 uint8_t device_type; /* as reported by 671 BMIC_IDENTIFY_PHYSICAL_DEVICE - only 672 valid for devtype = TYPE_DISK */ 673 int bus; 674 int target; 675 int lun; 676 uint8_t flags; 677 uint8_t scsi3addr[8]; 678 uint64_t wwid; 679 uint8_t is_physical_device : 1; 680 uint8_t is_external_raid_device : 1; 681 uint8_t target_lun_valid : 1; 682 uint8_t expose_device : 1; 683 uint8_t no_uld_attach : 1; 684 uint8_t is_obdr_device : 1; 685 uint8_t aio_enabled : 1; 686 uint8_t device_gone : 1; 687 uint8_t new_device : 1; 688 uint8_t volume_offline : 1; 689 uint8_t vendor[8]; /* bytes 8-15 of inquiry data */ 690 uint8_t model[16]; /* bytes 16-31 of inquiry data */ 691 uint64_t sas_address; 692 uint8_t raid_level; 693 uint16_t queue_depth; /* max. queue_depth for this device */ 694 uint16_t advertised_queue_depth; 695 uint32_t ioaccel_handle; 696 uint8_t volume_status; 697 uint8_t active_path_index; 698 uint8_t path_map; 699 uint8_t bay; 700 uint8_t box[8]; 701 uint16_t phys_connector[8]; 702 int offload_config; /* I/O accel RAID offload configured */ 703 int offload_enabled; /* I/O accel RAID offload enabled */ 704 int offload_enabled_pending; 705 int offload_to_mirror; /* Send next I/O accelerator RAID 706 offload request to mirror drive. */ 707 struct raid_map *raid_map; /* I/O accelerator RAID map */ 708 int reset_in_progress; 709 os_dev_info_t *dip; /*os specific scsi device information*/ 710 boolean_t invalid; 711 }pqi_scsi_dev_t; 712 713 struct sense_header_scsi { /* See SPC-3 section 4.5 */ 714 uint8_t response_code; /* permit: 0x0, 0x70, 0x71, 0x72, 0x73 */ 715 uint8_t sense_key; 716 uint8_t asc; 717 uint8_t ascq; 718 uint8_t byte4; 719 uint8_t byte5; 720 uint8_t byte6; 721 uint8_t additional_length; /* always 0 for fixed sense format */ 722 }OS_ATTRIBUTE_PACKED; 723 724 typedef struct report_lun_header { 725 uint32_t list_length; 726 uint8_t extended_response; 727 uint8_t reserved[3]; 728 }OS_ATTRIBUTE_PACKED reportlun_header_t; 729 730 typedef struct report_lun_ext_entry { 731 uint8_t lunid[8]; 732 uint64_t wwid; 733 uint8_t device_type; 734 uint8_t device_flags; 735 uint8_t lun_count; /* number of LUNs in a multi-LUN device */ 736 uint8_t redundant_paths; 737 uint32_t ioaccel_handle; 738 }OS_ATTRIBUTE_PACKED reportlun_ext_entry_t; 739 740 typedef struct report_lun_data_ext { 741 reportlun_header_t header; 742 reportlun_ext_entry_t lun_entries[1]; 743 }OS_ATTRIBUTE_PACKED reportlun_data_ext_t; 744 745 typedef struct raidmap_data { 746 uint32_t ioaccel_handle; 747 uint8_t xor_mult[2]; 748 uint8_t reserved[2]; 749 }OS_ATTRIBUTE_PACKED raidmap_data_t; 750 751 typedef struct raid_map { 752 uint32_t structure_size; /* size of entire structure in bytes */ 753 uint32_t volume_blk_size; /* bytes / block in the volume */ 754 uint64_t volume_blk_cnt; /* logical blocks on the volume */ 755 uint8_t phys_blk_shift; /* shift factor to convert between 756 units of logical blocks and physical 757 disk blocks */ 758 uint8_t parity_rotation_shift; /* shift factor to convert between units 759 of logical stripes and physical 760 stripes */ 761 uint16_t strip_size; /* blocks used on each disk / stripe */ 762 uint64_t disk_starting_blk; /* first disk block used in volume */ 763 uint64_t disk_blk_cnt; /* disk blocks used by volume / disk */ 764 uint16_t data_disks_per_row; /* data disk entries / row in the map */ 765 uint16_t metadata_disks_per_row; /* mirror/parity disk entries / row 766 in the map */ 767 uint16_t row_cnt; /* rows in each layout map */ 768 uint16_t layout_map_count; /* layout maps (1 map per mirror/parity 769 group) */ 770 uint16_t flags; 771 uint16_t data_encryption_key_index; 772 uint8_t reserved[16]; 773 raidmap_data_t dev_data[RAID_MAP_MAX_ENTRIES]; 774 }OS_ATTRIBUTE_PACKED pqisrc_raid_map_t; 775 776 typedef struct bmic_ident_ctrl { 777 uint8_t conf_ld_count; 778 uint32_t conf_sign; 779 uint8_t fw_version[4]; 780 uint8_t rom_fw_rev[4]; 781 uint8_t hw_rev; 782 uint8_t reserved[140]; 783 uint16_t extended_lun_count; 784 uint8_t reserved1[34]; 785 uint16_t fw_build_number; 786 uint8_t reserved2[100]; 787 uint8_t ctrl_mode; 788 uint8_t reserved3[32]; 789 }OS_ATTRIBUTE_PACKED bmic_ident_ctrl_t; 790 791 typedef struct bmic_identify_physical_device { 792 uint8_t scsi_bus; /* SCSI Bus number on controller */ 793 uint8_t scsi_id; /* SCSI ID on this bus */ 794 uint16_t block_size; /* sector size in bytes */ 795 uint32_t total_blocks; /* number for sectors on drive */ 796 uint32_t reserved_blocks; /* controller reserved (RIS) */ 797 uint8_t model[40]; /* Physical Drive Model */ 798 uint8_t serial_number[40]; /* Drive Serial Number */ 799 uint8_t firmware_revision[8]; /* drive firmware revision */ 800 uint8_t scsi_inquiry_bits; /* inquiry byte 7 bits */ 801 uint8_t compaq_drive_stamp; /* 0 means drive not stamped */ 802 uint8_t last_failure_reason; 803 uint8_t flags; 804 uint8_t more_flags; 805 uint8_t scsi_lun; /* SCSI LUN for phys drive */ 806 uint8_t yet_more_flags; 807 uint8_t even_more_flags; 808 uint32_t spi_speed_rules; 809 uint8_t phys_connector[2]; /* connector number on controller */ 810 uint8_t phys_box_on_bus; /* phys enclosure this drive resides */ 811 uint8_t phys_bay_in_box; /* phys drv bay this drive resides */ 812 uint32_t rpm; /* drive rotational speed in RPM */ 813 uint8_t device_type; /* type of drive */ 814 uint8_t sata_version; /* only valid when device_type = 815 BMIC_DEVICE_TYPE_SATA */ 816 uint64_t big_total_block_count; 817 uint64_t ris_starting_lba; 818 uint32_t ris_size; 819 uint8_t wwid[20]; 820 uint8_t controller_phy_map[32]; 821 uint16_t phy_count; 822 uint8_t phy_connected_dev_type[256]; 823 uint8_t phy_to_drive_bay_num[256]; 824 uint16_t phy_to_attached_dev_index[256]; 825 uint8_t box_index; 826 uint8_t reserved; 827 uint16_t extra_physical_drive_flags; 828 uint8_t negotiated_link_rate[256]; 829 uint8_t phy_to_phy_map[256]; 830 uint8_t redundant_path_present_map; 831 uint8_t redundant_path_failure_map; 832 uint8_t active_path_number; 833 uint16_t alternate_paths_phys_connector[8]; 834 uint8_t alternate_paths_phys_box_on_port[8]; 835 uint8_t multi_lun_device_lun_count; 836 uint8_t minimum_good_fw_revision[8]; 837 uint8_t unique_inquiry_bytes[20]; 838 uint8_t current_temperature_degreesC; 839 uint8_t temperature_threshold_degreesC; 840 uint8_t max_temperature_degreesC; 841 uint8_t logical_blocks_per_phys_block_exp; 842 uint16_t current_queue_depth_limit; 843 uint8_t switch_name[10]; 844 uint16_t switch_port; 845 uint8_t alternate_paths_switch_name[40]; 846 uint8_t alternate_paths_switch_port[8]; 847 uint16_t power_on_hours; 848 uint16_t percent_endurance_used; 849 uint8_t drive_authentication; 850 uint8_t smart_carrier_authentication; 851 uint8_t smart_carrier_app_fw_version; 852 uint8_t smart_carrier_bootloader_fw_version; 853 uint8_t encryption_key_name[64]; 854 uint32_t misc_drive_flags; 855 uint16_t dek_index; 856 uint8_t padding[112]; 857 }OS_ATTRIBUTE_PACKED bmic_ident_physdev_t; 858 859 typedef struct pqisrc_bmic_flush_cache { 860 uint8_t disable_cache; 861 uint8_t power_action; 862 uint8_t ndu_flush_cache; 863 uint8_t halt_event; 864 uint8_t reserved[28]; 865 } OS_ATTRIBUTE_PACKED pqisrc_bmic_flush_cache_t; 866 867 /* for halt_event member of pqisrc_bmic_flush_cache_t */ 868 enum pqisrc_flush_cache_event_type { 869 PQISRC_NONE_CACHE_FLUSH_ONLY = 0, 870 PQISRC_SHUTDOWN = 1, 871 PQISRC_HIBERNATE = 2, 872 PQISRC_SUSPEND = 3, 873 PQISRC_RESTART = 4 874 }; 875 876 struct pqisrc_softstate; 877 struct request_container_block; 878 typedef void (*success_callback)(struct pqisrc_softstate *, struct request_container_block *); 879 typedef void (*error_callback)(struct pqisrc_softstate *, struct request_container_block *, uint16_t); 880 881 /* Request container block */ 882 typedef struct request_container_block { 883 void *req; 884 void *error_info; 885 REQUEST_STATUS_T status; 886 uint32_t tag; 887 sgt_t *sg_chain_virt; 888 dma_addr_t sg_chain_dma; 889 uint32_t data_dir; 890 pqi_scsi_dev_t *dvp; 891 struct pqisrc_softstate *softs; 892 success_callback success_cmp_callback; 893 error_callback error_cmp_callback; 894 uint8_t *cdbp; 895 int cmdlen; 896 uint32_t bcount; /* buffer size in byte */ 897 uint32_t ioaccel_handle; 898 boolean_t encrypt_enable; 899 struct pqi_enc_info enc_info; 900 int cm_flags; 901 void *cm_data; /* pointer to data in kernel space */ 902 bus_dmamap_t cm_datamap; 903 uint32_t nseg; 904 union ccb *cm_ccb; 905 sgt_t *sgt; /* sg table */ 906 int resp_qid; 907 boolean_t req_pending; 908 }rcb_t; 909 910 typedef struct tid_pool { 911 int tid[PQI_MAX_PHYSICALS]; 912 int index; 913 }tid_pool_t; 914 915 typedef struct pqisrc_softstate { 916 OS_SPECIFIC_T os_specific; 917 struct ioa_registers *ioa_reg; 918 struct pqi_registers *pqi_reg; 919 char *pci_mem_base_vaddr; 920 PCI_ACC_HANDLE_T pci_mem_handle; 921 struct pqi_cap pqi_cap; 922 struct pqi_pref_settings pref_settings; 923 char fw_version[11]; 924 uint16_t fw_build_number; 925 uint32_t card; /* index to aac_cards */ 926 uint16_t vendid; /* vendor id */ 927 uint16_t subvendid; /* sub vendor id */ 928 uint16_t devid; /* device id */ 929 uint16_t subsysid; /* sub system id */ 930 controller_state_t ctlr_state; 931 struct dma_mem err_buf_dma_mem; 932 struct dma_mem admin_queue_dma_mem; 933 struct dma_mem op_ibq_dma_mem; 934 struct dma_mem op_obq_dma_mem; 935 struct dma_mem event_q_dma_mem; 936 struct dma_mem sg_dma_desc[PQISRC_MAX_OUTSTANDING_REQ]; 937 ib_queue_t admin_ib_queue; 938 ob_queue_t admin_ob_queue; 939 ob_queue_t event_q; 940 ob_queue_t op_ob_q[PQISRC_MAX_SUPPORTED_OP_OB_Q - 1];/* 1 event queue */ 941 ib_queue_t op_raid_ib_q[PQISRC_MAX_SUPPORTED_OP_RAID_IB_Q]; 942 ib_queue_t op_aio_ib_q[PQISRC_MAX_SUPPORTED_OP_AIO_IB_Q]; 943 uint32_t max_outstanding_io; 944 uint32_t max_io_for_scsi_ml; 945 uint32_t num_op_raid_ibq; 946 uint32_t num_op_aio_ibq; 947 uint32_t num_op_obq; 948 uint32_t num_elem_per_op_ibq; 949 uint32_t num_elem_per_op_obq; 950 uint32_t ibq_elem_size; 951 uint32_t obq_elem_size; 952 pqi_dev_cap_t pqi_dev_cap; 953 uint16_t max_ib_iu_length_per_fw; 954 uint16_t max_ib_iu_length; 955 unsigned max_sg_per_iu; 956 uint8_t ib_spanning_supported : 1; 957 uint8_t ob_spanning_supported : 1; 958 pqi_event_config_t event_config; 959 struct pqi_event pending_events[PQI_NUM_SUPPORTED_EVENTS]; 960 int intr_type; 961 int intr_count; 962 int num_cpus_online; 963 boolean_t share_opq_and_eventq; 964 rcb_t *rcb; 965 #ifndef LOCKFREE_STACK 966 pqi_taglist_t taglist; 967 #else 968 lockless_stack_t taglist; 969 #endif /* LOCKFREE_STACK */ 970 boolean_t devlist_lockcreated; 971 OS_LOCK_T devlist_lock OS_ATTRIBUTE_ALIGNED(8); 972 char devlist_lock_name[LOCKNAME_SIZE]; 973 pqi_scsi_dev_t *device_list[PQI_MAX_DEVICES][PQI_MAX_MULTILUN]; 974 OS_SEMA_LOCK_T scan_lock; 975 uint8_t lun_count[PQI_MAX_DEVICES]; 976 uint64_t target_sas_addr[PQI_MAX_EXT_TARGETS]; 977 OS_ATOMIC64_T num_intrs; 978 uint64_t prev_num_intrs; 979 uint64_t prev_heartbeat_count; 980 uint64_t *heartbeat_counter_abs_addr; 981 uint64_t heartbeat_counter_off; 982 uint64_t num_heartbeats_requested; 983 uint32_t bus_id; 984 uint32_t device_id; 985 uint32_t func_id; 986 char *os_name; 987 boolean_t ctrl_online; 988 uint8_t pqi_reset_quiesce_allowed : 1; 989 boolean_t ctrl_in_pqi_mode; 990 tid_pool_t tid_pool; 991 }pqisrc_softstate_t; 992 993 #endif 994