1 /*- 2 * Copyright 2016-2021 Microchip Technology, Inc. and/or its subsidiaries. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 27 /* 28 * Driver for the Microsemi Smart storage controllers 29 */ 30 31 #include "smartpqi_includes.h" 32 #include "smartpqi_prototypes.h" 33 34 CTASSERT(BSD_SUCCESS == PQI_STATUS_SUCCESS); 35 36 /* 37 * Supported devices 38 */ 39 struct pqi_ident 40 { 41 u_int16_t vendor; 42 u_int16_t device; 43 u_int16_t subvendor; 44 u_int16_t subdevice; 45 int hwif; 46 char *desc; 47 } pqi_identifiers[] = { 48 /* (MSCC PM8205 8x12G based) */ 49 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, 50 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, 51 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, 52 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, 53 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, 54 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, 55 {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, 56 57 /* (MSCC PM8225 8x12G based) */ 58 {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, 59 {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, 60 {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, 61 {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"}, 62 {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"}, 63 64 /* (MSCC PM8221 8x12G based) */ 65 {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"}, 66 {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"}, 67 {0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"}, 68 {0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"}, 69 {0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"}, 70 71 72 /* (MSCC PM8204 8x12G based) */ 73 {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"}, 74 {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"}, 75 {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"}, 76 {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"}, 77 {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"}, 78 {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"}, 79 {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"}, 80 {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"}, 81 {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"}, 82 {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"}, 83 {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"}, 84 {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR PM8204-2GB"}, 85 {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR PM8204-4GB"}, 86 {0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"}, 87 {0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"}, 88 {0x9005, 0x028f, 0x1d8d, 0x800, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"}, 89 {0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV, "SmartRAID 3101E-4i"}, 90 {0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"}, 91 {0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"}, 92 93 /* (MSCC PM8222 8x12G based) */ 94 {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"}, 95 {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"}, 96 {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"}, 97 {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"}, 98 {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"}, 99 {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"}, 100 {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"}, 101 {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"}, 102 {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"}, 103 {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"}, 104 {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"}, 105 {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"}, 106 {0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"}, 107 {0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"}, 108 {0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR PM8222-SHBA"}, 109 {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"}, 110 {0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "INSPUR PM8222-HBA"}, 111 {0x9005, 0x028f, 0x1d8d, 0x908, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"}, 112 {0x9005, 0x028f, 0x1bd4, 0x006C, PQI_HWIF_SRCV, "INSPUR RS0800M5E8i"}, 113 {0x9005, 0x028f, 0x1bd4, 0x006D, PQI_HWIF_SRCV, "INSPUR RS0800M5H8i"}, 114 115 /* (SRCx MSCC FVB 24x12G based) */ 116 {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"}, 117 118 /* (MSCC PM8241 24x12G based) */ 119 120 /* (MSCC PM8242 24x12G based) */ 121 {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"}, 122 {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"}, 123 {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"}, 124 {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"}, 125 {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"}, 126 {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"}, 127 {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"}, 128 129 /* (MSCC PM8236 16x12G based) */ 130 {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"}, 131 {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"}, 132 {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"}, 133 {0x9005, 0x028f, 0x1d8d, 0x806, PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"}, 134 {0x9005, 0x028f, 0x1cf2, 0x5449, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS241-18i 2G"}, 135 {0x9005, 0x028f, 0x1cf2, 0x544A, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS242-18i 4G"}, 136 {0x9005, 0x028f, 0x1cf2, 0x544D, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241B-18i 2G"}, 137 {0x9005, 0x028f, 0x1cf2, 0x544E, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242B-18i 4G"}, 138 139 /* (MSCC PM8237 24x12G based) */ 140 {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"}, 141 {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"}, 142 143 /* (MSCC PM8238 16x12G based) */ 144 {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"}, 145 {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"}, 146 {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"}, 147 {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"}, 148 {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"}, 149 {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"}, 150 {0x9005, 0x028f, 0x1d8d, 0x916, PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"}, 151 {0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"}, 152 {0x9005, 0x028f, 0x1cf2, 0x544F, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243B-18i"}, 153 154 /* (MSCC PM8240 24x12G based) */ 155 {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"}, 156 {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"}, 157 {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"}, 158 {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"}, 159 {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"}, 160 {0x9005, 0x028f, 0x1F0C, 0x3161, PQI_HWIF_SRCV, "NT RAID 3100-24i"}, 161 162 /* Huawei ID's */ 163 {0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"}, 164 {0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"}, 165 {0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"}, 166 {0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"}, 167 {0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"}, 168 {0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"}, 169 /* (MSCC PM8254 32x12G based) */ 170 {0x9005, 0x028f, 0x9005, 0x14a2, PQI_HWIF_SRCV, "SmartRAID 3252-8i"}, 171 {0x9005, 0x028f, 0x9005, 0x14a4, PQI_HWIF_SRCV, "SmartRAID 3254-8i /e"}, 172 {0x9005, 0x028f, 0x9005, 0x14a5, PQI_HWIF_SRCV, "SmartRAID 3252-8i /e"}, 173 {0x9005, 0x028f, 0x9005, 0x14a6, PQI_HWIF_SRCV, "SmartRAID 3204-8i /e"}, 174 /* (MSCC PM8265 16x12G based) */ 175 {0x9005, 0x028f, 0x9005, 0x1474, PQI_HWIF_SRCV, "SmartRAID 3254-16io /e"}, 176 /* (MSCC PM8270 16x12G based) */ 177 {0x9005, 0x028f, 0x9005, 0x1463, PQI_HWIF_SRCV, "SmartHBA 2200-8io /e"}, 178 {0x9005, 0x028f, 0x9005, 0x14c2, PQI_HWIF_SRCV, "SmartHBA 2200-16io /e"}, 179 /* (MSCC PM8279 32x12G based) */ 180 {0x9005, 0x028f, 0x1590, 0x0381, PQI_HWIF_SRCV, "SR932i-p Gen11"}, 181 {0x9005, 0x028f, 0x1590, 0x0382, PQI_HWIF_SRCV, "SR308i-p Gen11"}, 182 {0x9005, 0x028f, 0x1590, 0x0383, PQI_HWIF_SRCV, "SR308i-o Gen11"}, 183 {0x9005, 0x028f, 0x1590, 0x02db, PQI_HWIF_SRCV, "SR416ie-m Gen11"}, 184 {0x9005, 0x028f, 0x1590, 0x032e, PQI_HWIF_SRCV, "SR416i-o Gen11"}, 185 186 {0, 0, 0, 0, 0, 0} 187 }; 188 189 struct pqi_ident 190 pqi_family_identifiers[] = { 191 {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"}, 192 {0, 0, 0, 0, 0, 0} 193 }; 194 195 /* 196 * Function to identify the installed adapter. 197 */ 198 static struct 199 pqi_ident *pqi_find_ident(device_t dev) 200 { 201 struct pqi_ident *m; 202 u_int16_t vendid, devid, sub_vendid, sub_devid; 203 204 vendid = pci_get_vendor(dev); 205 devid = pci_get_device(dev); 206 sub_vendid = pci_get_subvendor(dev); 207 sub_devid = pci_get_subdevice(dev); 208 209 for (m = pqi_identifiers; m->vendor != 0; m++) { 210 if ((m->vendor == vendid) && (m->device == devid) && 211 (m->subvendor == sub_vendid) && 212 (m->subdevice == sub_devid)) { 213 return (m); 214 } 215 } 216 217 for (m = pqi_family_identifiers; m->vendor != 0; m++) { 218 if ((m->vendor == vendid) && (m->device == devid)) { 219 return (m); 220 } 221 } 222 223 return (NULL); 224 } 225 226 /* 227 * Determine whether this is one of our supported adapters. 228 */ 229 static int 230 smartpqi_probe(device_t dev) 231 { 232 struct pqi_ident *id; 233 234 if ((id = pqi_find_ident(dev)) != NULL) { 235 device_set_desc(dev, id->desc); 236 return(BUS_PROBE_VENDOR); 237 } 238 239 return(ENXIO); 240 } 241 242 /* 243 * Store Bus/Device/Function in softs 244 */ 245 void 246 pqisrc_save_controller_info(struct pqisrc_softstate *softs) 247 { 248 device_t dev = softs->os_specific.pqi_dev; 249 250 softs->bus_id = (uint32_t)pci_get_bus(dev); 251 softs->device_id = (uint32_t)pci_get_device(dev); 252 softs->func_id = (uint32_t)pci_get_function(dev); 253 } 254 255 256 /* 257 * Allocate resources for our device, set up the bus interface. 258 * Initialize the PQI related functionality, scan devices, register sim to 259 * upper layer, create management interface device node etc. 260 */ 261 static int 262 smartpqi_attach(device_t dev) 263 { 264 struct pqisrc_softstate *softs = NULL; 265 struct pqi_ident *id = NULL; 266 int error = BSD_SUCCESS; 267 u_int32_t command = 0, i = 0; 268 int card_index = device_get_unit(dev); 269 rcb_t *rcbp = NULL; 270 271 /* 272 * Initialise softc. 273 */ 274 softs = device_get_softc(dev); 275 276 if (!softs) { 277 printf("Could not get softc\n"); 278 error = EINVAL; 279 goto out; 280 } 281 memset(softs, 0, sizeof(*softs)); 282 softs->os_specific.pqi_dev = dev; 283 284 DBG_FUNC("IN\n"); 285 286 /* assume failure is 'not configured' */ 287 error = ENXIO; 288 289 /* 290 * Verify that the adapter is correctly set up in PCI space. 291 */ 292 pci_enable_busmaster(softs->os_specific.pqi_dev); 293 command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2); 294 if ((command & PCIM_CMD_MEMEN) == 0) { 295 DBG_ERR("memory window not available command = %d\n", command); 296 error = ENXIO; 297 goto out; 298 } 299 300 /* 301 * Detect the hardware interface version, set up the bus interface 302 * indirection. 303 */ 304 id = pqi_find_ident(dev); 305 if (!id) { 306 DBG_ERR("NULL return value from pqi_find_ident\n"); 307 goto out; 308 } 309 310 softs->os_specific.pqi_hwif = id->hwif; 311 312 switch(softs->os_specific.pqi_hwif) { 313 case PQI_HWIF_SRCV: 314 DBG_INFO("set hardware up for PMC SRCv for %p\n", softs); 315 break; 316 default: 317 softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN; 318 DBG_ERR("unknown hardware type\n"); 319 error = ENXIO; 320 goto out; 321 } 322 323 pqisrc_save_controller_info(softs); 324 325 /* 326 * Allocate the PCI register window. 327 */ 328 softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0); 329 if ((softs->os_specific.pqi_regs_res0 = 330 bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 331 &softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) { 332 DBG_ERR("couldn't allocate register window 0\n"); 333 /* assume failure is 'out of memory' */ 334 error = ENOMEM; 335 goto out; 336 } 337 338 bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 339 softs->os_specific.pqi_regs_rid0); 340 341 softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0); 342 softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0); 343 /* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */ 344 softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0); 345 346 /* 347 * Allocate the parent bus DMA tag appropriate for our PCI interface. 348 * 349 * Note that some of these controllers are 64-bit capable. 350 */ 351 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 352 PAGE_SIZE, 0, /* algnmnt, boundary */ 353 BUS_SPACE_MAXADDR,/* lowaddr */ 354 BUS_SPACE_MAXADDR, /* highaddr */ 355 NULL, NULL, /* filter, filterarg */ 356 BUS_SPACE_MAXSIZE, /* maxsize */ 357 BUS_SPACE_UNRESTRICTED, /* nsegments */ 358 BUS_SPACE_MAXSIZE, /* maxsegsize */ 359 0, /* flags */ 360 NULL, NULL, /* No locking needed */ 361 &softs->os_specific.pqi_parent_dmat)) { 362 DBG_ERR("can't allocate parent DMA tag\n"); 363 /* assume failure is 'out of memory' */ 364 error = ENOMEM; 365 goto dma_out; 366 } 367 368 softs->os_specific.sim_registered = FALSE; 369 softs->os_name = "FreeBSD "; 370 371 /* Initialize the PQI library */ 372 error = pqisrc_init(softs); 373 if (error != PQI_STATUS_SUCCESS) { 374 DBG_ERR("Failed to initialize pqi lib error = %d\n", error); 375 error = ENXIO; 376 goto out; 377 } 378 else { 379 error = BSD_SUCCESS; 380 } 381 382 mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF); 383 softs->os_specific.mtx_init = TRUE; 384 mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF); 385 386 callout_init(&softs->os_specific.wellness_periodic, 1); 387 callout_init(&softs->os_specific.heartbeat_timeout_id, 1); 388 389 /* 390 * Create DMA tag for mapping buffers into controller-addressable space. 391 */ 392 if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */ 393 PAGE_SIZE, 0, /* algnmnt, boundary */ 394 BUS_SPACE_MAXADDR,/* lowaddr */ 395 BUS_SPACE_MAXADDR, /* highaddr */ 396 NULL, NULL, /* filter, filterarg */ 397 (bus_size_t)softs->pqi_cap.max_sg_elem*PAGE_SIZE,/* maxsize */ 398 softs->pqi_cap.max_sg_elem, /* nsegments */ 399 BUS_SPACE_MAXSIZE, /* maxsegsize */ 400 BUS_DMA_ALLOCNOW, /* flags */ 401 busdma_lock_mutex, /* lockfunc */ 402 &softs->os_specific.map_lock, /* lockfuncarg*/ 403 &softs->os_specific.pqi_buffer_dmat)) { 404 DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n"); 405 return (ENOMEM); 406 } 407 408 rcbp = &softs->rcb[1]; 409 for( i = 1; i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) { 410 if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) { 411 DBG_ERR("Cant create datamap for buf @" 412 "rcbp = %p maxio = %d error = %d\n", 413 rcbp, softs->pqi_cap.max_outstanding_io, error); 414 goto dma_out; 415 } 416 } 417 418 os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */ 419 callout_reset(&softs->os_specific.wellness_periodic, 120 * hz, 420 os_wellness_periodic, softs); 421 422 error = pqisrc_scan_devices(softs); 423 if (error != PQI_STATUS_SUCCESS) { 424 DBG_ERR("Failed to scan lib error = %d\n", error); 425 error = ENXIO; 426 goto out; 427 } 428 429 error = register_sim(softs, card_index); 430 if (error) { 431 DBG_ERR("Failed to register sim index = %d error = %d\n", 432 card_index, error); 433 goto out; 434 } 435 436 smartpqi_target_rescan(softs); 437 438 TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs); 439 440 error = create_char_dev(softs, card_index); 441 if (error) { 442 DBG_ERR("Failed to register character device index=%d r=%d\n", 443 card_index, error); 444 goto out; 445 } 446 goto out; 447 448 dma_out: 449 if (softs->os_specific.pqi_regs_res0 != NULL) 450 bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY, 451 softs->os_specific.pqi_regs_rid0, 452 softs->os_specific.pqi_regs_res0); 453 out: 454 DBG_FUNC("OUT error = %d\n", error); 455 return(error); 456 } 457 458 /* 459 * Deallocate resources for our device. 460 */ 461 static int 462 smartpqi_detach(device_t dev) 463 { 464 struct pqisrc_softstate *softs = device_get_softc(dev); 465 int rval = BSD_SUCCESS; 466 467 DBG_FUNC("IN\n"); 468 469 if (softs == NULL) 470 return ENXIO; 471 472 /* kill the periodic event */ 473 callout_drain(&softs->os_specific.wellness_periodic); 474 /* Kill the heart beat event */ 475 callout_drain(&softs->os_specific.heartbeat_timeout_id); 476 477 if (!pqisrc_ctrl_offline(softs)) { 478 rval = pqisrc_flush_cache(softs, PQISRC_NONE_CACHE_FLUSH_ONLY); 479 if (rval != PQI_STATUS_SUCCESS) { 480 DBG_ERR("Unable to flush adapter cache! rval = %d\n", rval); 481 rval = EIO; 482 } 483 } 484 485 destroy_char_dev(softs); 486 pqisrc_uninit(softs); 487 deregister_sim(softs); 488 pci_release_msi(dev); 489 490 DBG_FUNC("OUT\n"); 491 492 return rval; 493 } 494 495 /* 496 * Bring the controller to a quiescent state, ready for system suspend. 497 */ 498 static int 499 smartpqi_suspend(device_t dev) 500 { 501 struct pqisrc_softstate *softs = device_get_softc(dev); 502 503 DBG_FUNC("IN\n"); 504 505 if (softs == NULL) 506 return ENXIO; 507 508 DBG_INFO("Suspending the device %p\n", softs); 509 softs->os_specific.pqi_state |= SMART_STATE_SUSPEND; 510 511 DBG_FUNC("OUT\n"); 512 513 return BSD_SUCCESS; 514 } 515 516 /* 517 * Bring the controller back to a state ready for operation. 518 */ 519 static int 520 smartpqi_resume(device_t dev) 521 { 522 struct pqisrc_softstate *softs = device_get_softc(dev); 523 524 DBG_FUNC("IN\n"); 525 526 if (softs == NULL) 527 return ENXIO; 528 529 softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND; 530 531 DBG_FUNC("OUT\n"); 532 533 return BSD_SUCCESS; 534 } 535 536 /* 537 * Do whatever is needed during a system shutdown. 538 */ 539 static int 540 smartpqi_shutdown(device_t dev) 541 { 542 struct pqisrc_softstate *softs = device_get_softc(dev); 543 int bsd_status = BSD_SUCCESS; 544 int pqi_status; 545 546 DBG_FUNC("IN\n"); 547 548 if (softs == NULL) 549 return ENXIO; 550 551 if (pqisrc_ctrl_offline(softs)) 552 return BSD_SUCCESS; 553 554 pqi_status = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN); 555 if (pqi_status != PQI_STATUS_SUCCESS) { 556 DBG_ERR("Unable to flush adapter cache! rval = %d\n", pqi_status); 557 bsd_status = EIO; 558 } 559 560 DBG_FUNC("OUT\n"); 561 562 return bsd_status; 563 } 564 565 /* 566 * PCI bus interface. 567 */ 568 static device_method_t pqi_methods[] = { 569 /* Device interface */ 570 DEVMETHOD(device_probe, smartpqi_probe), 571 DEVMETHOD(device_attach, smartpqi_attach), 572 DEVMETHOD(device_detach, smartpqi_detach), 573 DEVMETHOD(device_suspend, smartpqi_suspend), 574 DEVMETHOD(device_resume, smartpqi_resume), 575 DEVMETHOD(device_shutdown, smartpqi_shutdown), 576 { 0, 0 } 577 }; 578 579 static driver_t smartpqi_pci_driver = { 580 "smartpqi", 581 pqi_methods, 582 sizeof(struct pqisrc_softstate) 583 }; 584 585 DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, 0, 0); 586 MODULE_DEPEND(smartpqi, pci, 1, 1, 1); 587