xref: /freebsd/sys/dev/smartpqi/smartpqi_main.c (revision 29fc4075e69fd27de0cded313ac6000165d99f8b)
1 /*-
2  * Copyright 2016-2021 Microchip Technology, Inc. and/or its subsidiaries.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 /* $FreeBSD$ */
27 
28 /*
29  * Driver for the Microsemi Smart storage controllers
30  */
31 
32 #include "smartpqi_includes.h"
33 #include "smartpqi_prototypes.h"
34 
35 CTASSERT(BSD_SUCCESS == PQI_STATUS_SUCCESS);
36 
37 /*
38  * Supported devices
39  */
40 struct pqi_ident
41 {
42 	u_int16_t		vendor;
43 	u_int16_t		device;
44 	u_int16_t		subvendor;
45 	u_int16_t		subdevice;
46 	int			hwif;
47 	char			*desc;
48 } pqi_identifiers[] = {
49 	/* (MSCC PM8205 8x12G based) */
50 	{0x9005, 0x028f, 0x103c, 0x600,  PQI_HWIF_SRCV, "P408i-p SR Gen10"},
51 	{0x9005, 0x028f, 0x103c, 0x601,  PQI_HWIF_SRCV, "P408e-p SR Gen10"},
52 	{0x9005, 0x028f, 0x103c, 0x602,  PQI_HWIF_SRCV, "P408i-a SR Gen10"},
53 	{0x9005, 0x028f, 0x103c, 0x603,  PQI_HWIF_SRCV, "P408i-c SR Gen10"},
54 	{0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
55 	{0x9005, 0x028f, 0x9005, 0x608,  PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
56 	{0x9005, 0x028f, 0x103c, 0x609,  PQI_HWIF_SRCV, "P408i-sb SR G10"},
57 
58 	/* (MSCC PM8225 8x12G based) */
59 	{0x9005, 0x028f, 0x103c, 0x650,  PQI_HWIF_SRCV, "E208i-p SR Gen10"},
60 	{0x9005, 0x028f, 0x103c, 0x651,  PQI_HWIF_SRCV, "E208e-p SR Gen10"},
61 	{0x9005, 0x028f, 0x103c, 0x652,  PQI_HWIF_SRCV, "E208i-c SR Gen10"},
62 	{0x9005, 0x028f, 0x103c, 0x654,  PQI_HWIF_SRCV, "E208i-a SR Gen10"},
63 	{0x9005, 0x028f, 0x103c, 0x655,  PQI_HWIF_SRCV, "P408e-m SR Gen10"},
64 
65 	/* (MSCC PM8221 8x12G based) */
66 	{0x9005, 0x028f, 0x103c, 0x700,  PQI_HWIF_SRCV, "P204i-c SR Gen10"},
67 	{0x9005, 0x028f, 0x103c, 0x701,  PQI_HWIF_SRCV, "P204i-b SR Gen10"},
68 	{0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"},
69 	{0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"},
70 	{0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"},
71 
72 
73 	/* (MSCC PM8204 8x12G based) */
74 	{0x9005, 0x028f, 0x9005, 0x800,  PQI_HWIF_SRCV, "SmartRAID 3154-8i"},
75 	{0x9005, 0x028f, 0x9005, 0x801,  PQI_HWIF_SRCV, "SmartRAID 3152-8i"},
76 	{0x9005, 0x028f, 0x9005, 0x802,  PQI_HWIF_SRCV, "SmartRAID 3151-4i"},
77 	{0x9005, 0x028f, 0x9005, 0x803,  PQI_HWIF_SRCV, "SmartRAID 3101-4i"},
78 	{0x9005, 0x028f, 0x9005, 0x804,  PQI_HWIF_SRCV, "SmartRAID 3154-8e"},
79 	{0x9005, 0x028f, 0x9005, 0x805,  PQI_HWIF_SRCV, "SmartRAID 3102-8i"},
80 	{0x9005, 0x028f, 0x9005, 0x806,  PQI_HWIF_SRCV, "SmartRAID 3100"},
81 	{0x9005, 0x028f, 0x9005, 0x807,  PQI_HWIF_SRCV, "SmartRAID 3162-8i"},
82 	{0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"},
83 	{0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"},
84 	{0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"},
85 	{0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR PM8204-2GB"},
86 	{0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR PM8204-4GB"},
87 	{0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"},
88 	{0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"},
89 	{0x9005, 0x028f, 0x1d8d, 0x800,	 PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"},
90 	{0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV,	"SmartRAID 3101E-4i"},
91 	{0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"},
92 	{0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"},
93 
94 	/* (MSCC PM8222 8x12G based) */
95 	{0x9005, 0x028f, 0x9005, 0x900,  PQI_HWIF_SRCV, "SmartHBA 2100-8i"},
96 	{0x9005, 0x028f, 0x9005, 0x901,  PQI_HWIF_SRCV, "SmartHBA 2100-4i"},
97 	{0x9005, 0x028f, 0x9005, 0x902,  PQI_HWIF_SRCV, "HBA 1100-8i"},
98 	{0x9005, 0x028f, 0x9005, 0x903,  PQI_HWIF_SRCV, "HBA 1100-4i"},
99 	{0x9005, 0x028f, 0x9005, 0x904,  PQI_HWIF_SRCV, "SmartHBA 2100-8e"},
100 	{0x9005, 0x028f, 0x9005, 0x905,  PQI_HWIF_SRCV, "HBA 1100-8e"},
101 	{0x9005, 0x028f, 0x9005, 0x906,  PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"},
102 	{0x9005, 0x028f, 0x9005, 0x907,  PQI_HWIF_SRCV, "HBA 1100"},
103 	{0x9005, 0x028f, 0x9005, 0x908,  PQI_HWIF_SRCV, "SmartHBA 2100"},
104 	{0x9005, 0x028f, 0x9005, 0x90a,  PQI_HWIF_SRCV, "SmartHBA 2100A-8i"},
105 	{0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"},
106 	{0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"},
107 	{0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"},
108 	{0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"},
109 	{0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR PM8222-SHBA"},
110 	{0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"},
111 	{0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "INSPUR PM8222-HBA"},
112 	{0x9005, 0x028f, 0x1d8d, 0x908,	 PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"},
113 	{0x9005, 0x028f, 0x1bd4, 0x006C, PQI_HWIF_SRCV, "INSPUR RS0800M5E8i"},
114 	{0x9005, 0x028f, 0x1bd4, 0x006D, PQI_HWIF_SRCV, "INSPUR RS0800M5H8i"},
115 
116 	/* (SRCx MSCC FVB 24x12G based) */
117 	{0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"},
118 
119 	/* (MSCC PM8241 24x12G based) */
120 
121 	/* (MSCC PM8242 24x12G based) */
122 	{0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"},
123 	{0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"},
124 	{0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"},
125 	{0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"},
126 	{0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"},
127 	{0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"},
128 	{0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"},
129 
130 	/* (MSCC PM8236 16x12G based) */
131 	{0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"},
132 	{0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"},
133 	{0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"},
134 	{0x9005, 0x028f, 0x1d8d, 0x806,  PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"},
135 	{0x9005, 0x028f, 0x1cf2, 0x5449, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS241-18i 2G"},
136 	{0x9005, 0x028f, 0x1cf2, 0x544A, PQI_HWIF_SRCV, "ZTE SmartROC3100 RS242-18i 4G"},
137 	{0x9005, 0x028f, 0x1cf2, 0x544D, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM241B-18i 2G"},
138 	{0x9005, 0x028f, 0x1cf2, 0x544E, PQI_HWIF_SRCV, "ZTE SmartROC3100 RM242B-18i 4G"},
139 
140 	/* (MSCC PM8237 24x12G based) */
141 	{0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"},
142 	{0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"},
143 
144 	/* (MSCC PM8238 16x12G based) */
145 	{0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"},
146 	{0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"},
147 	{0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"},
148 	{0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"},
149 	{0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"},
150 	{0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"},
151 	{0x9005, 0x028f, 0x1d8d, 0x916,  PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"},
152 	{0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"},
153 	{0x9005, 0x028f, 0x1cf2, 0x544F, PQI_HWIF_SRCV, "ZTE SmartIOC2100 RM243B-18i"},
154 
155 	/* (MSCC PM8240 24x12G based) */
156 	{0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"},
157 	{0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"},
158 	{0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"},
159 	{0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"},
160 	{0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"},
161 	{0x9005, 0x028f, 0x1F0C, 0x3161, PQI_HWIF_SRCV, "NT RAID 3100-24i"},
162 
163 	/* Huawei ID's */
164 	{0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"},
165 	{0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"},
166 	{0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"},
167 	{0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"},
168 	{0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"},
169 	{0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"},
170 	/* (MSCC PM8254 32x12G based) */
171 	{0x9005, 0x028f, 0x9005, 0x14a2, PQI_HWIF_SRCV, "SmartRAID 3252-8i"},
172 	{0x9005, 0x028f, 0x9005, 0x14a4, PQI_HWIF_SRCV, "SmartRAID 3254-8i /e"},
173 	{0x9005, 0x028f, 0x9005, 0x14a5, PQI_HWIF_SRCV, "SmartRAID 3252-8i /e"},
174 	{0x9005, 0x028f, 0x9005, 0x14a6, PQI_HWIF_SRCV, "SmartRAID 3204-8i /e"},
175 /* (MSCC PM8265 16x12G based) */
176 	{0x9005, 0x028f, 0x9005, 0x1474, PQI_HWIF_SRCV, "SmartRAID 3254-16io /e"},
177 /* (MSCC PM8270 16x12G based) */
178 	{0x9005, 0x028f, 0x9005, 0x1463, PQI_HWIF_SRCV, "SmartHBA 2200-8io /e"},
179 	{0x9005, 0x028f, 0x9005, 0x14c2, PQI_HWIF_SRCV, "SmartHBA 2200-16io /e"},
180 	/* (MSCC PM8279 32x12G based) */
181 	{0x9005, 0x028f, 0x1590, 0x0381, PQI_HWIF_SRCV, "SR932i-p Gen11"},
182 	{0x9005, 0x028f, 0x1590, 0x0382, PQI_HWIF_SRCV, "SR308i-p Gen11"},
183 	{0x9005, 0x028f, 0x1590, 0x0383, PQI_HWIF_SRCV, "SR308i-o Gen11"},
184 	{0x9005, 0x028f, 0x1590, 0x02db, PQI_HWIF_SRCV, "SR416ie-m Gen11"},
185 	{0x9005, 0x028f, 0x1590, 0x032e, PQI_HWIF_SRCV, "SR416i-o Gen11"},
186 
187 	{0, 0, 0, 0, 0, 0}
188 };
189 
190 struct pqi_ident
191 pqi_family_identifiers[] = {
192 	{0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"},
193 	{0, 0, 0, 0, 0, 0}
194 };
195 
196 /*
197  * Function to identify the installed adapter.
198  */
199 static struct
200 pqi_ident *pqi_find_ident(device_t dev)
201 {
202 	struct pqi_ident *m;
203 	u_int16_t vendid, devid, sub_vendid, sub_devid;
204 
205 	vendid = pci_get_vendor(dev);
206 	devid = pci_get_device(dev);
207 	sub_vendid = pci_get_subvendor(dev);
208 	sub_devid = pci_get_subdevice(dev);
209 
210 	for (m = pqi_identifiers; m->vendor != 0; m++) {
211 		if ((m->vendor == vendid) && (m->device == devid) &&
212 			(m->subvendor == sub_vendid) &&
213 			(m->subdevice == sub_devid)) {
214 			return (m);
215 		}
216 	}
217 
218 	for (m = pqi_family_identifiers; m->vendor != 0; m++) {
219 		if ((m->vendor == vendid) && (m->device == devid)) {
220 			return (m);
221 		}
222 	}
223 
224 	return (NULL);
225 }
226 
227 /*
228  * Determine whether this is one of our supported adapters.
229  */
230 static int
231 smartpqi_probe(device_t dev)
232 {
233 	struct pqi_ident *id;
234 
235 	if ((id = pqi_find_ident(dev)) != NULL) {
236 		device_set_desc(dev, id->desc);
237 		return(BUS_PROBE_VENDOR);
238 	}
239 
240 	return(ENXIO);
241 }
242 
243 /*
244  * Store Bus/Device/Function in softs
245  */
246 void
247 pqisrc_save_controller_info(struct pqisrc_softstate *softs)
248 {
249 	device_t dev = softs->os_specific.pqi_dev;
250 
251 	softs->bus_id = (uint32_t)pci_get_bus(dev);
252 	softs->device_id = (uint32_t)pci_get_device(dev);
253 	softs->func_id = (uint32_t)pci_get_function(dev);
254 }
255 
256 
257 /*
258  * Allocate resources for our device, set up the bus interface.
259  * Initialize the PQI related functionality, scan devices, register sim to
260  * upper layer, create management interface device node etc.
261  */
262 static int
263 smartpqi_attach(device_t dev)
264 {
265 	struct pqisrc_softstate *softs = NULL;
266 	struct pqi_ident *id = NULL;
267 	int error = BSD_SUCCESS;
268 	u_int32_t command = 0, i = 0;
269 	int card_index = device_get_unit(dev);
270 	rcb_t *rcbp = NULL;
271 
272 	/*
273 	 * Initialise softc.
274 	 */
275 	softs = device_get_softc(dev);
276 
277 	if (!softs) {
278 		printf("Could not get softc\n");
279 		error = EINVAL;
280 		goto out;
281 	}
282 	memset(softs, 0, sizeof(*softs));
283 	softs->os_specific.pqi_dev = dev;
284 
285 	DBG_FUNC("IN\n");
286 
287 	/* assume failure is 'not configured' */
288 	error = ENXIO;
289 
290 	/*
291 	 * Verify that the adapter is correctly set up in PCI space.
292 	 */
293 	pci_enable_busmaster(softs->os_specific.pqi_dev);
294 	command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2);
295 	if ((command & PCIM_CMD_MEMEN) == 0) {
296 		DBG_ERR("memory window not available command = %d\n", command);
297 		error = ENXIO;
298 		goto out;
299 	}
300 
301 	/*
302 	 * Detect the hardware interface version, set up the bus interface
303 	 * indirection.
304 	 */
305 	id = pqi_find_ident(dev);
306 	if (!id) {
307 		DBG_ERR("NULL return value from pqi_find_ident\n");
308 		goto out;
309 	}
310 
311 	softs->os_specific.pqi_hwif = id->hwif;
312 
313 	switch(softs->os_specific.pqi_hwif) {
314 		case PQI_HWIF_SRCV:
315 			DBG_INFO("set hardware up for PMC SRCv for %p\n", softs);
316 			break;
317 		default:
318 			softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN;
319 			DBG_ERR("unknown hardware type\n");
320 			error = ENXIO;
321 			goto out;
322 	}
323 
324 	pqisrc_save_controller_info(softs);
325 
326 	/*
327 	 * Allocate the PCI register window.
328 	 */
329 	softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0);
330 	if ((softs->os_specific.pqi_regs_res0 =
331 		bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
332 		&softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) {
333 		DBG_ERR("couldn't allocate register window 0\n");
334 		/* assume failure is 'out of memory' */
335 		error = ENOMEM;
336 		goto out;
337 	}
338 
339 	bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
340 		softs->os_specific.pqi_regs_rid0);
341 
342 	softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0);
343 	softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0);
344 	/* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */
345 	softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0);
346 
347 	/*
348 	 * Allocate the parent bus DMA tag appropriate for our PCI interface.
349 	 *
350 	 * Note that some of these controllers are 64-bit capable.
351 	 */
352 	if (bus_dma_tag_create(bus_get_dma_tag(dev), 	/* parent */
353 				PAGE_SIZE, 0,		/* algnmnt, boundary */
354 				BUS_SPACE_MAXADDR,/* lowaddr */
355 				BUS_SPACE_MAXADDR, 	/* highaddr */
356 				NULL, NULL, 		/* filter, filterarg */
357 				BUS_SPACE_MAXSIZE,	/* maxsize */
358 				BUS_SPACE_UNRESTRICTED,	/* nsegments */
359 				BUS_SPACE_MAXSIZE,	/* maxsegsize */
360 				0,			/* flags */
361 				NULL, NULL,		/* No locking needed */
362 				&softs->os_specific.pqi_parent_dmat)) {
363 		DBG_ERR("can't allocate parent DMA tag\n");
364 		/* assume failure is 'out of memory' */
365 		error = ENOMEM;
366 		goto dma_out;
367 	}
368 
369 	softs->os_specific.sim_registered = FALSE;
370 	softs->os_name = "FreeBSD ";
371 
372 	/* Initialize the PQI library */
373 	error = pqisrc_init(softs);
374 	if (error != PQI_STATUS_SUCCESS) {
375 		DBG_ERR("Failed to initialize pqi lib error = %d\n", error);
376 		error = ENXIO;
377 		goto out;
378 	}
379 	else {
380 		error = BSD_SUCCESS;
381 	}
382 
383     mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF);
384     softs->os_specific.mtx_init = TRUE;
385     mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF);
386 
387     callout_init(&softs->os_specific.wellness_periodic, 1);
388     callout_init(&softs->os_specific.heartbeat_timeout_id, 1);
389 
390     /*
391      * Create DMA tag for mapping buffers into controller-addressable space.
392      */
393     if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */
394 				PAGE_SIZE, 0,		/* algnmnt, boundary */
395 				BUS_SPACE_MAXADDR,/* lowaddr */
396 				BUS_SPACE_MAXADDR,	/* highaddr */
397 				NULL, NULL,		/* filter, filterarg */
398 				(bus_size_t)softs->pqi_cap.max_sg_elem*PAGE_SIZE,/* maxsize */
399 				softs->pqi_cap.max_sg_elem,	/* nsegments */
400 				BUS_SPACE_MAXSIZE,	/* maxsegsize */
401 				BUS_DMA_ALLOCNOW,		/* flags */
402 				busdma_lock_mutex,		/* lockfunc */
403 				&softs->os_specific.map_lock,	/* lockfuncarg*/
404 				&softs->os_specific.pqi_buffer_dmat)) {
405 		DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n");
406 		return (ENOMEM);
407         }
408 
409 	rcbp = &softs->rcb[1];
410 	for( i = 1;  i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) {
411 		if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) {
412 			DBG_ERR("Cant create datamap for buf @"
413 			"rcbp = %p maxio = %d error = %d\n",
414 			rcbp, softs->pqi_cap.max_outstanding_io, error);
415 			goto dma_out;
416 		}
417 	}
418 
419 	os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */
420 	callout_reset(&softs->os_specific.wellness_periodic, 120 * hz,
421 			os_wellness_periodic, softs);
422 
423 	error = pqisrc_scan_devices(softs);
424 	if (error != PQI_STATUS_SUCCESS) {
425 		DBG_ERR("Failed to scan lib error = %d\n", error);
426 		error = ENXIO;
427 		goto out;
428 	}
429 
430 	error = register_sim(softs, card_index);
431 	if (error) {
432 		DBG_ERR("Failed to register sim index = %d error = %d\n",
433 			card_index, error);
434 		goto out;
435 	}
436 
437 	smartpqi_target_rescan(softs);
438 
439 	TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs);
440 
441 	error = create_char_dev(softs, card_index);
442 	if (error) {
443 		DBG_ERR("Failed to register character device index=%d r=%d\n",
444 			card_index, error);
445 		goto out;
446 	}
447 	goto out;
448 
449 dma_out:
450 	if (softs->os_specific.pqi_regs_res0 != NULL)
451 		bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
452 			softs->os_specific.pqi_regs_rid0,
453 			softs->os_specific.pqi_regs_res0);
454 out:
455 	DBG_FUNC("OUT error = %d\n", error);
456 	return(error);
457 }
458 
459 /*
460  * Deallocate resources for our device.
461  */
462 static int
463 smartpqi_detach(device_t dev)
464 {
465 	struct pqisrc_softstate *softs = device_get_softc(dev);
466 	int rval = BSD_SUCCESS;
467 
468 	DBG_FUNC("IN\n");
469 
470 	if (softs == NULL)
471 		return ENXIO;
472 
473 	/* kill the periodic event */
474 	callout_drain(&softs->os_specific.wellness_periodic);
475 	/* Kill the heart beat event */
476 	callout_drain(&softs->os_specific.heartbeat_timeout_id);
477 
478 	if (!pqisrc_ctrl_offline(softs)) {
479 		rval = pqisrc_flush_cache(softs, PQISRC_NONE_CACHE_FLUSH_ONLY);
480 		if (rval != PQI_STATUS_SUCCESS) {
481 			DBG_ERR("Unable to flush adapter cache! rval = %d\n", rval);
482 			rval = EIO;
483 		}
484 	}
485 
486 	destroy_char_dev(softs);
487 	pqisrc_uninit(softs);
488 	deregister_sim(softs);
489 	pci_release_msi(dev);
490 
491 	DBG_FUNC("OUT\n");
492 
493 	return rval;
494 }
495 
496 /*
497  * Bring the controller to a quiescent state, ready for system suspend.
498  */
499 static int
500 smartpqi_suspend(device_t dev)
501 {
502 	struct pqisrc_softstate *softs = device_get_softc(dev);
503 
504 	DBG_FUNC("IN\n");
505 
506 	if (softs == NULL)
507 		return ENXIO;
508 
509 	DBG_INFO("Suspending the device %p\n", softs);
510 	softs->os_specific.pqi_state |= SMART_STATE_SUSPEND;
511 
512 	DBG_FUNC("OUT\n");
513 
514 	return BSD_SUCCESS;
515 }
516 
517 /*
518  * Bring the controller back to a state ready for operation.
519  */
520 static int
521 smartpqi_resume(device_t dev)
522 {
523 	struct pqisrc_softstate *softs = device_get_softc(dev);
524 
525 	DBG_FUNC("IN\n");
526 
527 	if (softs == NULL)
528 		return ENXIO;
529 
530 	softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND;
531 
532 	DBG_FUNC("OUT\n");
533 
534 	return BSD_SUCCESS;
535 }
536 
537 /*
538  * Do whatever is needed during a system shutdown.
539  */
540 static int
541 smartpqi_shutdown(device_t dev)
542 {
543 	struct pqisrc_softstate *softs = device_get_softc(dev);
544 	int bsd_status = BSD_SUCCESS;
545 	int pqi_status;
546 
547 	DBG_FUNC("IN\n");
548 
549 	if (softs == NULL)
550 		return ENXIO;
551 
552 	if (pqisrc_ctrl_offline(softs))
553 		return BSD_SUCCESS;
554 
555 	pqi_status = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN);
556 	if (pqi_status != PQI_STATUS_SUCCESS) {
557 		DBG_ERR("Unable to flush adapter cache! rval = %d\n", pqi_status);
558 		bsd_status = EIO;
559 	}
560 
561 	DBG_FUNC("OUT\n");
562 
563 	return bsd_status;
564 }
565 
566 /*
567  * PCI bus interface.
568  */
569 static device_method_t pqi_methods[] = {
570 	/* Device interface */
571 	DEVMETHOD(device_probe,		smartpqi_probe),
572 	DEVMETHOD(device_attach,	smartpqi_attach),
573 	DEVMETHOD(device_detach,	smartpqi_detach),
574 	DEVMETHOD(device_suspend,	smartpqi_suspend),
575 	DEVMETHOD(device_resume,	smartpqi_resume),
576 	DEVMETHOD(device_shutdown,	smartpqi_shutdown),
577 	{ 0, 0 }
578 };
579 
580 static driver_t smartpqi_pci_driver = {
581 	"smartpqi",
582 	pqi_methods,
583 	sizeof(struct pqisrc_softstate)
584 };
585 
586 DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, 0, 0);
587 MODULE_DEPEND(smartpqi, pci, 1, 1, 1);
588