1 /*- 2 * Copyright 2016-2021 Microchip Technology, Inc. and/or its subsidiaries. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 /* $FreeBSD$ */ 27 28 #ifndef _PQI_IOCTL_H_ 29 #define _PQI_IOCTL_H_ 30 31 /* IOCTL passthrough macros and structures */ 32 33 #define SENSEINFOBYTES 32 /* note that this value may vary 34 between host implementations */ 35 36 /* transfer direction */ 37 #define PQIIOCTL_NONE 0x00 38 #define PQIIOCTL_WRITE 0x01 39 #define PQIIOCTL_READ 0x02 40 #define PQIIOCTL_BIDIRECTIONAL (PQIIOCTL_READ | PQIIOCTL_WRITE) 41 42 43 /* Type defs used in the following structs */ 44 #define BYTE uint8_t 45 #define WORD uint16_t 46 #define HWORD uint16_t 47 #define DWORD uint32_t 48 49 50 /* Command List Structure */ 51 typedef union _SCSI3Addr_struct { 52 struct { 53 BYTE Dev; 54 BYTE Bus:6; 55 BYTE Mode:2; /* b00 */ 56 } PeripDev; 57 struct { 58 BYTE DevLSB; 59 BYTE DevMSB:6; 60 BYTE Mode:2; /* b01 */ 61 } LogDev; 62 struct { 63 BYTE Dev:5; 64 BYTE Bus:3; 65 BYTE Targ:6; 66 BYTE Mode:2; /* b10 */ 67 } LogUnit; 68 69 }OS_ATTRIBUTE_PACKED SCSI3Addr_struct; 70 71 typedef struct _PhysDevAddr_struct { 72 DWORD TargetId:24; 73 DWORD Bus:6; 74 DWORD Mode:2; 75 SCSI3Addr_struct Target[2]; /* 2 level target device addr */ 76 77 }OS_ATTRIBUTE_PACKED PhysDevAddr_struct; 78 79 typedef struct _LogDevAddr_struct { 80 DWORD VolId:30; 81 DWORD Mode:2; 82 BYTE reserved[4]; 83 84 }OS_ATTRIBUTE_PACKED LogDevAddr_struct; 85 86 typedef union _LUNAddr_struct { 87 BYTE LunAddrBytes[8]; 88 SCSI3Addr_struct SCSI3Lun[4]; 89 PhysDevAddr_struct PhysDev; 90 LogDevAddr_struct LogDev; 91 92 }OS_ATTRIBUTE_PACKED LUNAddr_struct; 93 94 typedef struct _RequestBlock_struct { 95 BYTE CDBLen; 96 struct { 97 BYTE Type:3; 98 BYTE Attribute:3; 99 BYTE Direction:2; 100 } Type; 101 HWORD Timeout; 102 BYTE CDB[16]; 103 104 }OS_ATTRIBUTE_PACKED RequestBlock_struct; 105 106 typedef union _MoreErrInfo_struct{ 107 struct { 108 BYTE Reserved[3]; 109 BYTE Type; 110 DWORD ErrorInfo; 111 } Common_Info; 112 struct{ 113 BYTE Reserved[2]; 114 BYTE offense_size; /* size of offending entry */ 115 BYTE offense_num; /* byte # of offense 0-base */ 116 DWORD offense_value; 117 } Invalid_Cmd; 118 119 }OS_ATTRIBUTE_PACKED MoreErrInfo_struct; 120 121 typedef struct _ErrorInfo_struct { 122 BYTE ScsiStatus; 123 BYTE SenseLen; 124 HWORD CommandStatus; 125 DWORD ResidualCnt; 126 MoreErrInfo_struct MoreErrInfo; 127 BYTE SenseInfo[SENSEINFOBYTES]; 128 129 }OS_ATTRIBUTE_PACKED ErrorInfo_struct; 130 131 132 typedef struct pqi_ioctl_passthruCmd_struct { 133 LUNAddr_struct LUN_info; 134 RequestBlock_struct Request; 135 ErrorInfo_struct error_info; 136 WORD buf_size; /* size in bytes of the buf */ 137 passthru_buf_type_t buf; 138 139 }OS_ATTRIBUTE_PACKED IOCTL_Command_struct; 140 141 142 #endif /* _PQI_IOCTL_H_ */ 143