1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/module.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/ata.h> 34 #include <sys/bus.h> 35 #include <sys/endian.h> 36 #include <sys/malloc.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 #include <sys/sbuf.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/led/led.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include "siis.h" 51 52 #include <cam/cam.h> 53 #include <cam/cam_ccb.h> 54 #include <cam/cam_sim.h> 55 #include <cam/cam_xpt_sim.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_init(device_t dev); 64 static int siis_ch_deinit(device_t dev); 65 static int siis_ch_suspend(device_t dev); 66 static int siis_ch_resume(device_t dev); 67 static void siis_ch_intr_locked(void *data); 68 static void siis_ch_intr(void *data); 69 static void siis_ch_led(void *priv, int onoff); 70 static void siis_begin_transaction(device_t dev, union ccb *ccb); 71 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 72 static void siis_execute_transaction(struct siis_slot *slot); 73 static void siis_timeout(void *arg); 74 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 75 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 76 static void siis_dmainit(device_t dev); 77 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 78 static void siis_dmafini(device_t dev); 79 static void siis_slotsalloc(device_t dev); 80 static void siis_slotsfree(device_t dev); 81 static void siis_reset(device_t dev); 82 static void siis_portinit(device_t dev); 83 static int siis_wait_ready(device_t dev, int t); 84 85 static int siis_sata_connect(struct siis_channel *ch); 86 87 static void siis_issue_recovery(device_t dev); 88 static void siis_process_read_log(device_t dev, union ccb *ccb); 89 static void siis_process_request_sense(device_t dev, union ccb *ccb); 90 91 static void siisaction(struct cam_sim *sim, union ccb *ccb); 92 static void siispoll(struct cam_sim *sim); 93 94 static MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 95 96 static struct { 97 uint32_t id; 98 const char *name; 99 int ports; 100 int quirks; 101 #define SIIS_Q_SNTF 1 102 #define SIIS_Q_NOMSI 2 103 } siis_ids[] = { 104 {0x31241095, "SiI3124", 4, 0}, 105 {0x31248086, "SiI3124", 4, 0}, 106 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 109 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 110 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 111 {0, NULL, 0, 0} 112 }; 113 114 #define recovery_type spriv_field0 115 #define RECOVERY_NONE 0 116 #define RECOVERY_READ_LOG 1 117 #define RECOVERY_REQUEST_SENSE 2 118 #define recovery_slot spriv_field1 119 120 static int 121 siis_probe(device_t dev) 122 { 123 int i; 124 uint32_t devid = pci_get_devid(dev); 125 126 for (i = 0; siis_ids[i].id != 0; i++) { 127 if (siis_ids[i].id == devid) { 128 device_set_descf(dev, "%s SATA controller", 129 siis_ids[i].name); 130 return (BUS_PROBE_DEFAULT); 131 } 132 } 133 return (ENXIO); 134 } 135 136 static int 137 siis_attach(device_t dev) 138 { 139 struct siis_controller *ctlr = device_get_softc(dev); 140 uint32_t devid = pci_get_devid(dev); 141 device_t child; 142 int error, i, unit; 143 144 ctlr->dev = dev; 145 for (i = 0; siis_ids[i].id != 0; i++) { 146 if (siis_ids[i].id == devid) 147 break; 148 } 149 ctlr->quirks = siis_ids[i].quirks; 150 /* Global memory */ 151 ctlr->r_grid = PCIR_BAR(0); 152 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 153 &ctlr->r_grid, RF_ACTIVE))) 154 return (ENXIO); 155 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 156 /* Channels memory */ 157 ctlr->r_rid = PCIR_BAR(2); 158 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 159 &ctlr->r_rid, RF_ACTIVE))) 160 return (ENXIO); 161 /* Setup our own memory management for channels. */ 162 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 163 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 164 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 165 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 166 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 167 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 168 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 169 return (error); 170 } 171 if ((error = rman_manage_region(&ctlr->sc_iomem, 172 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 173 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 174 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 175 rman_fini(&ctlr->sc_iomem); 176 return (error); 177 } 178 pci_enable_busmaster(dev); 179 /* Reset controller */ 180 siis_resume(dev); 181 /* Number of HW channels */ 182 ctlr->channels = siis_ids[i].ports; 183 /* Setup interrupts. */ 184 if (siis_setup_interrupt(dev)) { 185 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 186 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 187 rman_fini(&ctlr->sc_iomem); 188 return ENXIO; 189 } 190 /* Attach all channels on this controller */ 191 for (unit = 0; unit < ctlr->channels; unit++) { 192 child = device_add_child(dev, "siisch", -1); 193 if (child == NULL) 194 device_printf(dev, "failed to add channel device\n"); 195 else 196 device_set_ivars(child, (void *)(intptr_t)unit); 197 } 198 bus_generic_attach(dev); 199 return 0; 200 } 201 202 static int 203 siis_detach(device_t dev) 204 { 205 struct siis_controller *ctlr = device_get_softc(dev); 206 207 /* Detach & delete all children */ 208 device_delete_children(dev); 209 210 /* Free interrupts. */ 211 if (ctlr->irq.r_irq) { 212 bus_teardown_intr(dev, ctlr->irq.r_irq, 213 ctlr->irq.handle); 214 bus_release_resource(dev, SYS_RES_IRQ, 215 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 216 } 217 pci_release_msi(dev); 218 /* Free memory. */ 219 rman_fini(&ctlr->sc_iomem); 220 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 221 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 222 return (0); 223 } 224 225 static int 226 siis_suspend(device_t dev) 227 { 228 struct siis_controller *ctlr = device_get_softc(dev); 229 230 bus_generic_suspend(dev); 231 /* Put controller into reset state. */ 232 ctlr->gctl |= SIIS_GCTL_GRESET; 233 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 234 return 0; 235 } 236 237 static int 238 siis_resume(device_t dev) 239 { 240 struct siis_controller *ctlr = device_get_softc(dev); 241 242 /* Set PCIe max read request size to at least 1024 bytes */ 243 if (pci_get_max_read_req(dev) < 1024) 244 pci_set_max_read_req(dev, 1024); 245 /* Put controller into reset state. */ 246 ctlr->gctl |= SIIS_GCTL_GRESET; 247 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 248 DELAY(10000); 249 /* Get controller out of reset state and enable port interrupts. */ 250 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 251 ctlr->gctl |= 0x0000000f; 252 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 253 return (bus_generic_resume(dev)); 254 } 255 256 static int 257 siis_setup_interrupt(device_t dev) 258 { 259 struct siis_controller *ctlr = device_get_softc(dev); 260 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 261 262 /* Process hints. */ 263 resource_int_value(device_get_name(dev), 264 device_get_unit(dev), "msi", &msi); 265 if (msi < 0) 266 msi = 0; 267 else if (msi > 0) 268 msi = min(1, pci_msi_count(dev)); 269 /* Allocate MSI if needed/present. */ 270 if (msi && pci_alloc_msi(dev, &msi) != 0) 271 msi = 0; 272 /* Allocate all IRQs. */ 273 ctlr->irq.r_irq_rid = msi ? 1 : 0; 274 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 275 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 276 device_printf(dev, "unable to map interrupt\n"); 277 return ENXIO; 278 } 279 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 280 siis_intr, ctlr, &ctlr->irq.handle))) { 281 /* SOS XXX release r_irq */ 282 device_printf(dev, "unable to setup interrupt\n"); 283 return ENXIO; 284 } 285 return (0); 286 } 287 288 /* 289 * Common case interrupt handler. 290 */ 291 static void 292 siis_intr(void *data) 293 { 294 struct siis_controller *ctlr = (struct siis_controller *)data; 295 u_int32_t is; 296 void *arg; 297 int unit; 298 299 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 300 for (unit = 0; unit < ctlr->channels; unit++) { 301 if ((is & SIIS_IS_PORT(unit)) != 0 && 302 (arg = ctlr->interrupt[unit].argument)) { 303 ctlr->interrupt[unit].function(arg); 304 } 305 } 306 /* Acknowledge interrupt, if MSI enabled. */ 307 if (ctlr->irq.r_irq_rid) { 308 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 309 ctlr->gctl | SIIS_GCTL_MSIACK); 310 } 311 } 312 313 static struct resource * 314 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 315 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 316 { 317 struct siis_controller *ctlr = device_get_softc(dev); 318 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 319 struct resource *res = NULL; 320 int offset = unit << 13; 321 rman_res_t st; 322 323 switch (type) { 324 case SYS_RES_MEMORY: 325 st = rman_get_start(ctlr->r_mem); 326 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 327 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 328 if (res) { 329 bus_space_handle_t bsh; 330 bus_space_tag_t bst; 331 bsh = rman_get_bushandle(ctlr->r_mem); 332 bst = rman_get_bustag(ctlr->r_mem); 333 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 334 rman_set_bushandle(res, bsh); 335 rman_set_bustag(res, bst); 336 } 337 break; 338 case SYS_RES_IRQ: 339 if (*rid == ATA_IRQ_RID) 340 res = ctlr->irq.r_irq; 341 break; 342 } 343 return (res); 344 } 345 346 static int 347 siis_release_resource(device_t dev, device_t child, struct resource *r) 348 { 349 350 switch (rman_get_type(r)) { 351 case SYS_RES_MEMORY: 352 rman_release_resource(r); 353 return (0); 354 case SYS_RES_IRQ: 355 if (rman_get_rid(r) != ATA_IRQ_RID) 356 return ENOENT; 357 return (0); 358 } 359 return (EINVAL); 360 } 361 362 static int 363 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 364 int flags, driver_filter_t *filter, driver_intr_t *function, 365 void *argument, void **cookiep) 366 { 367 struct siis_controller *ctlr = device_get_softc(dev); 368 int unit = (intptr_t)device_get_ivars(child); 369 370 if (filter != NULL) { 371 printf("siis.c: we cannot use a filter here\n"); 372 return (EINVAL); 373 } 374 ctlr->interrupt[unit].function = function; 375 ctlr->interrupt[unit].argument = argument; 376 return (0); 377 } 378 379 static int 380 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 381 void *cookie) 382 { 383 struct siis_controller *ctlr = device_get_softc(dev); 384 int unit = (intptr_t)device_get_ivars(child); 385 386 ctlr->interrupt[unit].function = NULL; 387 ctlr->interrupt[unit].argument = NULL; 388 return (0); 389 } 390 391 static int 392 siis_print_child(device_t dev, device_t child) 393 { 394 int retval; 395 396 retval = bus_print_child_header(dev, child); 397 retval += printf(" at channel %d", 398 (int)(intptr_t)device_get_ivars(child)); 399 retval += bus_print_child_footer(dev, child); 400 401 return (retval); 402 } 403 404 static int 405 siis_child_location(device_t dev, device_t child, struct sbuf *sb) 406 { 407 408 sbuf_printf(sb, "channel=%d", 409 (int)(intptr_t)device_get_ivars(child)); 410 return (0); 411 } 412 413 static bus_dma_tag_t 414 siis_get_dma_tag(device_t bus, device_t child) 415 { 416 417 return (bus_get_dma_tag(bus)); 418 } 419 420 static device_method_t siis_methods[] = { 421 DEVMETHOD(device_probe, siis_probe), 422 DEVMETHOD(device_attach, siis_attach), 423 DEVMETHOD(device_detach, siis_detach), 424 DEVMETHOD(device_suspend, siis_suspend), 425 DEVMETHOD(device_resume, siis_resume), 426 DEVMETHOD(bus_print_child, siis_print_child), 427 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 428 DEVMETHOD(bus_release_resource, siis_release_resource), 429 DEVMETHOD(bus_setup_intr, siis_setup_intr), 430 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 431 DEVMETHOD(bus_child_location, siis_child_location), 432 DEVMETHOD(bus_get_dma_tag, siis_get_dma_tag), 433 { 0, 0 } 434 }; 435 436 static driver_t siis_driver = { 437 "siis", 438 siis_methods, 439 sizeof(struct siis_controller) 440 }; 441 442 DRIVER_MODULE(siis, pci, siis_driver, 0, 0); 443 MODULE_VERSION(siis, 1); 444 MODULE_DEPEND(siis, cam, 1, 1, 1); 445 446 static int 447 siis_ch_probe(device_t dev) 448 { 449 450 device_set_desc(dev, "SIIS channel"); 451 return (BUS_PROBE_DEFAULT); 452 } 453 454 static int 455 siis_ch_attach(device_t dev) 456 { 457 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 458 struct siis_channel *ch = device_get_softc(dev); 459 struct cam_devq *devq; 460 int rid, error, i, sata_rev = 0; 461 462 ch->dev = dev; 463 ch->unit = (intptr_t)device_get_ivars(dev); 464 ch->quirks = ctlr->quirks; 465 ch->pm_level = 0; 466 resource_int_value(device_get_name(dev), 467 device_get_unit(dev), "pm_level", &ch->pm_level); 468 resource_int_value(device_get_name(dev), 469 device_get_unit(dev), "sata_rev", &sata_rev); 470 for (i = 0; i < 16; i++) { 471 ch->user[i].revision = sata_rev; 472 ch->user[i].mode = 0; 473 ch->user[i].bytecount = 8192; 474 ch->user[i].tags = SIIS_MAX_SLOTS; 475 ch->curr[i] = ch->user[i]; 476 if (ch->pm_level) 477 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 478 ch->user[i].caps |= CTS_SATA_CAPS_H_AN; 479 } 480 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 481 rid = ch->unit; 482 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 483 &rid, RF_ACTIVE))) 484 return (ENXIO); 485 siis_dmainit(dev); 486 siis_slotsalloc(dev); 487 siis_ch_init(dev); 488 mtx_lock(&ch->mtx); 489 rid = ATA_IRQ_RID; 490 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 491 &rid, RF_SHAREABLE | RF_ACTIVE))) { 492 device_printf(dev, "Unable to map interrupt\n"); 493 error = ENXIO; 494 goto err0; 495 } 496 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 497 siis_ch_intr_locked, dev, &ch->ih))) { 498 device_printf(dev, "Unable to setup interrupt\n"); 499 error = ENXIO; 500 goto err1; 501 } 502 /* Create the device queue for our SIM. */ 503 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 504 if (devq == NULL) { 505 device_printf(dev, "Unable to allocate simq\n"); 506 error = ENOMEM; 507 goto err1; 508 } 509 /* Construct SIM entry */ 510 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 511 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 512 if (ch->sim == NULL) { 513 cam_simq_free(devq); 514 device_printf(dev, "unable to allocate sim\n"); 515 error = ENOMEM; 516 goto err1; 517 } 518 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 519 device_printf(dev, "unable to register xpt bus\n"); 520 error = ENXIO; 521 goto err2; 522 } 523 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 524 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 525 device_printf(dev, "unable to create path\n"); 526 error = ENXIO; 527 goto err3; 528 } 529 mtx_unlock(&ch->mtx); 530 ch->led = led_create(siis_ch_led, dev, device_get_nameunit(dev)); 531 return (0); 532 533 err3: 534 xpt_bus_deregister(cam_sim_path(ch->sim)); 535 err2: 536 cam_sim_free(ch->sim, /*free_devq*/TRUE); 537 err1: 538 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 539 err0: 540 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 541 mtx_unlock(&ch->mtx); 542 mtx_destroy(&ch->mtx); 543 return (error); 544 } 545 546 static int 547 siis_ch_detach(device_t dev) 548 { 549 struct siis_channel *ch = device_get_softc(dev); 550 551 led_destroy(ch->led); 552 mtx_lock(&ch->mtx); 553 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 554 xpt_free_path(ch->path); 555 xpt_bus_deregister(cam_sim_path(ch->sim)); 556 cam_sim_free(ch->sim, /*free_devq*/TRUE); 557 mtx_unlock(&ch->mtx); 558 559 bus_teardown_intr(dev, ch->r_irq, ch->ih); 560 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 561 562 siis_ch_deinit(dev); 563 siis_slotsfree(dev); 564 siis_dmafini(dev); 565 566 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 567 mtx_destroy(&ch->mtx); 568 return (0); 569 } 570 571 static int 572 siis_ch_init(device_t dev) 573 { 574 struct siis_channel *ch = device_get_softc(dev); 575 576 /* Get port out of reset state. */ 577 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 578 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 579 if (ch->pm_present) 580 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 581 else 582 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 583 /* Enable port interrupts */ 584 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 585 return (0); 586 } 587 588 static int 589 siis_ch_deinit(device_t dev) 590 { 591 struct siis_channel *ch = device_get_softc(dev); 592 593 /* Put port into reset state. */ 594 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 595 return (0); 596 } 597 598 static int 599 siis_ch_suspend(device_t dev) 600 { 601 struct siis_channel *ch = device_get_softc(dev); 602 603 mtx_lock(&ch->mtx); 604 xpt_freeze_simq(ch->sim, 1); 605 while (ch->oslots) 606 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 607 siis_ch_deinit(dev); 608 mtx_unlock(&ch->mtx); 609 return (0); 610 } 611 612 static int 613 siis_ch_resume(device_t dev) 614 { 615 struct siis_channel *ch = device_get_softc(dev); 616 617 mtx_lock(&ch->mtx); 618 siis_ch_init(dev); 619 siis_reset(dev); 620 xpt_release_simq(ch->sim, TRUE); 621 mtx_unlock(&ch->mtx); 622 return (0); 623 } 624 625 static device_method_t siisch_methods[] = { 626 DEVMETHOD(device_probe, siis_ch_probe), 627 DEVMETHOD(device_attach, siis_ch_attach), 628 DEVMETHOD(device_detach, siis_ch_detach), 629 DEVMETHOD(device_suspend, siis_ch_suspend), 630 DEVMETHOD(device_resume, siis_ch_resume), 631 { 0, 0 } 632 }; 633 634 static driver_t siisch_driver = { 635 "siisch", 636 siisch_methods, 637 sizeof(struct siis_channel) 638 }; 639 640 DRIVER_MODULE(siisch, siis, siisch_driver, 0, 0); 641 642 static void 643 siis_ch_led(void *priv, int onoff) 644 { 645 device_t dev; 646 struct siis_channel *ch; 647 648 dev = (device_t)priv; 649 ch = device_get_softc(dev); 650 651 if (onoff == 0) 652 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_LED_ON); 653 else 654 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_LED_ON); 655 } 656 657 struct siis_dc_cb_args { 658 bus_addr_t maddr; 659 int error; 660 }; 661 662 static void 663 siis_dmainit(device_t dev) 664 { 665 struct siis_channel *ch = device_get_softc(dev); 666 struct siis_dc_cb_args dcba; 667 668 /* Command area. */ 669 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 670 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 671 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 672 0, NULL, NULL, &ch->dma.work_tag)) 673 goto error; 674 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 675 &ch->dma.work_map)) 676 goto error; 677 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 678 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 679 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 680 goto error; 681 } 682 ch->dma.work_bus = dcba.maddr; 683 /* Data area. */ 684 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 685 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 686 NULL, NULL, 687 SIIS_SG_ENTRIES * PAGE_SIZE, SIIS_SG_ENTRIES, 0xFFFFFFFF, 688 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 689 goto error; 690 } 691 return; 692 693 error: 694 device_printf(dev, "WARNING - DMA initialization failed\n"); 695 siis_dmafini(dev); 696 } 697 698 static void 699 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 700 { 701 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 702 703 if (!(dcba->error = error)) 704 dcba->maddr = segs[0].ds_addr; 705 } 706 707 static void 708 siis_dmafini(device_t dev) 709 { 710 struct siis_channel *ch = device_get_softc(dev); 711 712 if (ch->dma.data_tag) { 713 bus_dma_tag_destroy(ch->dma.data_tag); 714 ch->dma.data_tag = NULL; 715 } 716 if (ch->dma.work_bus) { 717 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 718 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 719 ch->dma.work_bus = 0; 720 ch->dma.work_map = NULL; 721 ch->dma.work = NULL; 722 } 723 if (ch->dma.work_tag) { 724 bus_dma_tag_destroy(ch->dma.work_tag); 725 ch->dma.work_tag = NULL; 726 } 727 } 728 729 static void 730 siis_slotsalloc(device_t dev) 731 { 732 struct siis_channel *ch = device_get_softc(dev); 733 int i; 734 735 /* Alloc and setup command/dma slots */ 736 bzero(ch->slot, sizeof(ch->slot)); 737 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 738 struct siis_slot *slot = &ch->slot[i]; 739 740 slot->dev = dev; 741 slot->slot = i; 742 slot->state = SIIS_SLOT_EMPTY; 743 slot->prb_offset = SIIS_PRB_SIZE * i; 744 slot->ccb = NULL; 745 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 746 747 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 748 device_printf(ch->dev, "FAILURE - create data_map\n"); 749 } 750 } 751 752 static void 753 siis_slotsfree(device_t dev) 754 { 755 struct siis_channel *ch = device_get_softc(dev); 756 int i; 757 758 /* Free all dma slots */ 759 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 760 struct siis_slot *slot = &ch->slot[i]; 761 762 callout_drain(&slot->timeout); 763 if (slot->dma.data_map) { 764 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 765 slot->dma.data_map = NULL; 766 } 767 } 768 } 769 770 static void 771 siis_notify_events(device_t dev) 772 { 773 struct siis_channel *ch = device_get_softc(dev); 774 struct cam_path *dpath; 775 u_int32_t status; 776 int i; 777 778 if (ch->quirks & SIIS_Q_SNTF) { 779 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 780 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 781 } else { 782 /* 783 * Without SNTF we have no idea which device sent notification. 784 * If PMP is connected, assume it, else - device. 785 */ 786 status = (ch->pm_present) ? 0x8000 : 0x0001; 787 } 788 if (bootverbose) 789 device_printf(dev, "SNTF 0x%04x\n", status); 790 for (i = 0; i < 16; i++) { 791 if ((status & (1 << i)) == 0) 792 continue; 793 if (xpt_create_path(&dpath, NULL, 794 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 795 xpt_async(AC_SCSI_AEN, dpath, NULL); 796 xpt_free_path(dpath); 797 } 798 } 799 800 } 801 802 static void 803 siis_phy_check_events(device_t dev) 804 { 805 struct siis_channel *ch = device_get_softc(dev); 806 807 /* If we have a connection event, deal with it */ 808 if (ch->pm_level == 0) { 809 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 810 union ccb *ccb; 811 812 if (bootverbose) { 813 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 814 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 815 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 816 device_printf(dev, "CONNECT requested\n"); 817 } else 818 device_printf(dev, "DISCONNECT requested\n"); 819 } 820 siis_reset(dev); 821 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 822 return; 823 if (xpt_create_path(&ccb->ccb_h.path, NULL, 824 cam_sim_path(ch->sim), 825 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 826 xpt_free_ccb(ccb); 827 return; 828 } 829 xpt_rescan(ccb); 830 } 831 } 832 833 static void 834 siis_ch_intr_locked(void *data) 835 { 836 device_t dev = (device_t)data; 837 struct siis_channel *ch = device_get_softc(dev); 838 839 mtx_lock(&ch->mtx); 840 siis_ch_intr(data); 841 mtx_unlock(&ch->mtx); 842 } 843 844 static void 845 siis_ch_intr(void *data) 846 { 847 device_t dev = (device_t)data; 848 struct siis_channel *ch = device_get_softc(dev); 849 uint32_t istatus, sstatus, ctx, estatus, ok; 850 enum siis_err_type et; 851 int i, ccs, port, tslots; 852 853 mtx_assert(&ch->mtx, MA_OWNED); 854 /* Read command statuses. */ 855 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 856 ok = ch->rslots & ~sstatus; 857 /* Complete all successful commands. */ 858 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 859 if ((ok >> i) & 1) 860 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 861 } 862 /* Do we have any other events? */ 863 if ((sstatus & SIIS_P_SS_ATTN) == 0) 864 return; 865 /* Read and clear interrupt statuses. */ 866 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 867 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 868 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 869 /* Process PHY events */ 870 if (istatus & SIIS_P_IX_PHYRDYCHG) 871 siis_phy_check_events(dev); 872 /* Process NOTIFY events */ 873 if (istatus & SIIS_P_IX_SDBN) 874 siis_notify_events(dev); 875 /* Process command errors */ 876 if (istatus & SIIS_P_IX_COMMERR) { 877 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 878 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 879 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 880 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 881 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 882 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 883 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 884 885 if (!ch->recoverycmd && !ch->recovery) { 886 xpt_freeze_simq(ch->sim, ch->numrslots); 887 ch->recovery = 1; 888 } 889 if (ch->frozen) { 890 union ccb *fccb = ch->frozen; 891 ch->frozen = NULL; 892 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 893 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 894 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 895 xpt_freeze_devq(fccb->ccb_h.path, 1); 896 fccb->ccb_h.status |= CAM_DEV_QFRZN; 897 } 898 xpt_done(fccb); 899 } 900 if (estatus == SIIS_P_CMDERR_DEV || 901 estatus == SIIS_P_CMDERR_SDB || 902 estatus == SIIS_P_CMDERR_DATAFIS) { 903 tslots = ch->numtslots[port]; 904 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 905 /* XXX: requests in loading state. */ 906 if (((ch->rslots >> i) & 1) == 0) 907 continue; 908 if (ch->slot[i].ccb->ccb_h.target_id != port) 909 continue; 910 if (tslots == 0) { 911 /* Untagged operation. */ 912 if (i == ccs) 913 et = SIIS_ERR_TFE; 914 else 915 et = SIIS_ERR_INNOCENT; 916 } else { 917 /* Tagged operation. */ 918 et = SIIS_ERR_NCQ; 919 } 920 siis_end_transaction(&ch->slot[i], et); 921 } 922 /* 923 * We can't reinit port if there are some other 924 * commands active, use resume to complete them. 925 */ 926 if (ch->rslots != 0 && !ch->recoverycmd) 927 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 928 } else { 929 if (estatus == SIIS_P_CMDERR_SENDFIS || 930 estatus == SIIS_P_CMDERR_INCSTATE || 931 estatus == SIIS_P_CMDERR_PPE || 932 estatus == SIIS_P_CMDERR_SERVICE) { 933 et = SIIS_ERR_SATA; 934 } else 935 et = SIIS_ERR_INVALID; 936 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 937 /* XXX: requests in loading state. */ 938 if (((ch->rslots >> i) & 1) == 0) 939 continue; 940 siis_end_transaction(&ch->slot[i], et); 941 } 942 } 943 } 944 } 945 946 /* Must be called with channel locked. */ 947 static int 948 siis_check_collision(device_t dev, union ccb *ccb) 949 { 950 struct siis_channel *ch = device_get_softc(dev); 951 952 mtx_assert(&ch->mtx, MA_OWNED); 953 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 954 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 955 /* Tagged command while we have no supported tag free. */ 956 if (((~ch->oslots) & (0x7fffffff >> (31 - 957 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 958 return (1); 959 } 960 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 961 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 962 /* Atomic command while anything active. */ 963 if (ch->numrslots != 0) 964 return (1); 965 } 966 /* We have some atomic command running. */ 967 if (ch->aslots != 0) 968 return (1); 969 return (0); 970 } 971 972 /* Must be called with channel locked. */ 973 static void 974 siis_begin_transaction(device_t dev, union ccb *ccb) 975 { 976 struct siis_channel *ch = device_get_softc(dev); 977 struct siis_slot *slot; 978 int tag, tags; 979 980 mtx_assert(&ch->mtx, MA_OWNED); 981 /* Choose empty slot. */ 982 tags = SIIS_MAX_SLOTS; 983 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 984 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 985 tags = ch->curr[ccb->ccb_h.target_id].tags; 986 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 987 /* Occupy chosen slot. */ 988 slot = &ch->slot[tag]; 989 slot->ccb = ccb; 990 /* Update channel stats. */ 991 ch->oslots |= (1 << slot->slot); 992 ch->numrslots++; 993 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 994 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 995 ch->numtslots[ccb->ccb_h.target_id]++; 996 } 997 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 998 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 999 ch->aslots |= (1 << slot->slot); 1000 slot->dma.nsegs = 0; 1001 /* If request moves data, setup and load SG list */ 1002 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1003 slot->state = SIIS_SLOT_LOADING; 1004 bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, 1005 ccb, siis_dmasetprd, slot, 0); 1006 } else 1007 siis_execute_transaction(slot); 1008 } 1009 1010 /* Locked by busdma engine. */ 1011 static void 1012 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1013 { 1014 struct siis_slot *slot = arg; 1015 struct siis_channel *ch = device_get_softc(slot->dev); 1016 struct siis_cmd *ctp; 1017 struct siis_dma_prd *prd; 1018 int i; 1019 1020 mtx_assert(&ch->mtx, MA_OWNED); 1021 if (error) { 1022 device_printf(slot->dev, "DMA load error\n"); 1023 if (!ch->recoverycmd) 1024 xpt_freeze_simq(ch->sim, 1); 1025 siis_end_transaction(slot, SIIS_ERR_INVALID); 1026 return; 1027 } 1028 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 1029 slot->dma.nsegs = nsegs; 1030 if (nsegs != 0) { 1031 /* Get a piece of the workspace for this request */ 1032 ctp = (struct siis_cmd *)(ch->dma.work + slot->prb_offset); 1033 /* Fill S/G table */ 1034 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1035 prd = &ctp->u.ata.prd[0]; 1036 else 1037 prd = &ctp->u.atapi.prd[0]; 1038 for (i = 0; i < nsegs; i++) { 1039 prd[i].dba = htole64(segs[i].ds_addr); 1040 prd[i].dbc = htole32(segs[i].ds_len); 1041 prd[i].control = 0; 1042 } 1043 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1044 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1045 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1046 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1047 } 1048 siis_execute_transaction(slot); 1049 } 1050 1051 /* Must be called with channel locked. */ 1052 static void 1053 siis_execute_transaction(struct siis_slot *slot) 1054 { 1055 device_t dev = slot->dev; 1056 struct siis_channel *ch = device_get_softc(dev); 1057 struct siis_cmd *ctp; 1058 union ccb *ccb = slot->ccb; 1059 u_int64_t prb_bus; 1060 1061 mtx_assert(&ch->mtx, MA_OWNED); 1062 /* Get a piece of the workspace for this request */ 1063 ctp = (struct siis_cmd *)(ch->dma.work + slot->prb_offset); 1064 ctp->control = 0; 1065 ctp->protocol_override = 0; 1066 ctp->transfer_count = 0; 1067 /* Special handling for Soft Reset command. */ 1068 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1069 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1070 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1071 } else { 1072 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1073 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1074 ctp->protocol_override |= 1075 htole16(SIIS_PRB_PROTO_NCQ); 1076 } 1077 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1078 ctp->protocol_override |= 1079 htole16(SIIS_PRB_PROTO_READ); 1080 } else 1081 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1082 ctp->protocol_override |= 1083 htole16(SIIS_PRB_PROTO_WRITE); 1084 } 1085 } 1086 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1087 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1088 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1089 else 1090 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1091 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1092 } 1093 /* Special handling for Soft Reset command. */ 1094 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1095 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1096 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1097 /* Kick controller into sane state */ 1098 siis_portinit(dev); 1099 } 1100 /* Setup the FIS for this request */ 1101 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1102 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1103 if (!ch->recoverycmd) 1104 xpt_freeze_simq(ch->sim, 1); 1105 siis_end_transaction(slot, SIIS_ERR_INVALID); 1106 return; 1107 } 1108 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1109 BUS_DMASYNC_PREWRITE); 1110 /* Issue command to the controller. */ 1111 slot->state = SIIS_SLOT_RUNNING; 1112 ch->rslots |= (1 << slot->slot); 1113 prb_bus = ch->dma.work_bus + slot->prb_offset; 1114 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1115 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1116 /* Start command execution timeout */ 1117 callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0, 1118 siis_timeout, slot, 0); 1119 return; 1120 } 1121 1122 /* Must be called with channel locked. */ 1123 static void 1124 siis_process_timeout(device_t dev) 1125 { 1126 struct siis_channel *ch = device_get_softc(dev); 1127 int i; 1128 1129 mtx_assert(&ch->mtx, MA_OWNED); 1130 if (!ch->recoverycmd && !ch->recovery) { 1131 xpt_freeze_simq(ch->sim, ch->numrslots); 1132 ch->recovery = 1; 1133 } 1134 /* Handle the rest of commands. */ 1135 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1136 /* Do we have a running request on slot? */ 1137 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1138 continue; 1139 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1140 } 1141 } 1142 1143 /* Must be called with channel locked. */ 1144 static void 1145 siis_rearm_timeout(device_t dev) 1146 { 1147 struct siis_channel *ch = device_get_softc(dev); 1148 int i; 1149 1150 mtx_assert(&ch->mtx, MA_OWNED); 1151 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1152 struct siis_slot *slot = &ch->slot[i]; 1153 1154 /* Do we have a running request on slot? */ 1155 if (slot->state < SIIS_SLOT_RUNNING) 1156 continue; 1157 if ((ch->toslots & (1 << i)) == 0) 1158 continue; 1159 callout_reset_sbt(&slot->timeout, 1160 SBT_1MS * slot->ccb->ccb_h.timeout, 0, 1161 siis_timeout, slot, 0); 1162 } 1163 } 1164 1165 /* Locked by callout mechanism. */ 1166 static void 1167 siis_timeout(void *arg) 1168 { 1169 struct siis_slot *slot = arg; 1170 device_t dev = slot->dev; 1171 struct siis_channel *ch = device_get_softc(dev); 1172 union ccb *ccb = slot->ccb; 1173 1174 mtx_assert(&ch->mtx, MA_OWNED); 1175 /* Check for stale timeout. */ 1176 if (slot->state < SIIS_SLOT_RUNNING) 1177 return; 1178 1179 /* Handle soft-reset timeouts without doing hard-reset. */ 1180 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1181 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1182 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1183 xpt_freeze_simq(ch->sim, ch->numrslots); 1184 siis_end_transaction(slot, SIIS_ERR_TFE); 1185 return; 1186 } 1187 1188 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1189 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1190 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1191 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1192 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1193 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1194 1195 if (ch->toslots == 0) 1196 xpt_freeze_simq(ch->sim, 1); 1197 ch->toslots |= (1 << slot->slot); 1198 if ((ch->rslots & ~ch->toslots) == 0) 1199 siis_process_timeout(dev); 1200 else 1201 device_printf(dev, " ... waiting for slots %08x\n", 1202 ch->rslots & ~ch->toslots); 1203 } 1204 1205 /* Must be called with channel locked. */ 1206 static void 1207 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1208 { 1209 device_t dev = slot->dev; 1210 struct siis_channel *ch = device_get_softc(dev); 1211 union ccb *ccb = slot->ccb; 1212 int lastto; 1213 1214 mtx_assert(&ch->mtx, MA_OWNED); 1215 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1216 BUS_DMASYNC_POSTWRITE); 1217 /* Read result registers to the result struct 1218 * May be incorrect if several commands finished same time, 1219 * so read only when sure or have to. 1220 */ 1221 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1222 struct ata_res *res = &ccb->ataio.res; 1223 if ((et == SIIS_ERR_TFE) || 1224 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1225 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1226 1227 res->status = ATA_INB(ch->r_mem, offs + 2); 1228 res->error = ATA_INB(ch->r_mem, offs + 3); 1229 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1230 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1231 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1232 res->device = ATA_INB(ch->r_mem, offs + 7); 1233 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1234 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1235 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1236 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1237 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1238 } else 1239 bzero(res, sizeof(*res)); 1240 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1241 ch->numrslots == 1) { 1242 ccb->ataio.resid = ccb->ataio.dxfer_len - 1243 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1244 } 1245 } else { 1246 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1247 ch->numrslots == 1) { 1248 ccb->csio.resid = ccb->csio.dxfer_len - 1249 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1250 } 1251 } 1252 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1253 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1254 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1255 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1256 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1257 } 1258 /* Set proper result status. */ 1259 if (et != SIIS_ERR_NONE || ch->recovery) { 1260 ch->eslots |= (1 << slot->slot); 1261 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1262 } 1263 /* In case of error, freeze device for proper recovery. */ 1264 if (et != SIIS_ERR_NONE && (!ch->recoverycmd) && 1265 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1266 xpt_freeze_devq(ccb->ccb_h.path, 1); 1267 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1268 } 1269 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1270 switch (et) { 1271 case SIIS_ERR_NONE: 1272 ccb->ccb_h.status |= CAM_REQ_CMP; 1273 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1274 ccb->csio.scsi_status = SCSI_STATUS_OK; 1275 break; 1276 case SIIS_ERR_INVALID: 1277 ch->fatalerr = 1; 1278 ccb->ccb_h.status |= CAM_REQ_INVALID; 1279 break; 1280 case SIIS_ERR_INNOCENT: 1281 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1282 break; 1283 case SIIS_ERR_TFE: 1284 case SIIS_ERR_NCQ: 1285 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1286 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1287 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1288 } else { 1289 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1290 } 1291 break; 1292 case SIIS_ERR_SATA: 1293 ch->fatalerr = 1; 1294 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1295 break; 1296 case SIIS_ERR_TIMEOUT: 1297 ch->fatalerr = 1; 1298 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1299 break; 1300 default: 1301 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1302 } 1303 /* Free slot. */ 1304 ch->oslots &= ~(1 << slot->slot); 1305 ch->rslots &= ~(1 << slot->slot); 1306 ch->aslots &= ~(1 << slot->slot); 1307 slot->state = SIIS_SLOT_EMPTY; 1308 slot->ccb = NULL; 1309 /* Update channel stats. */ 1310 ch->numrslots--; 1311 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1312 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1313 ch->numtslots[ccb->ccb_h.target_id]--; 1314 } 1315 /* Cancel timeout state if request completed normally. */ 1316 if (et != SIIS_ERR_TIMEOUT) { 1317 lastto = (ch->toslots == (1 << slot->slot)); 1318 ch->toslots &= ~(1 << slot->slot); 1319 if (lastto) 1320 xpt_release_simq(ch->sim, TRUE); 1321 } 1322 /* If it was our READ LOG command - process it. */ 1323 if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 1324 siis_process_read_log(dev, ccb); 1325 /* If it was our REQUEST SENSE command - process it. */ 1326 } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 1327 siis_process_request_sense(dev, ccb); 1328 /* If it was NCQ or ATAPI command error, put result on hold. */ 1329 } else if (et == SIIS_ERR_NCQ || 1330 ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 1331 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 1332 ch->hold[slot->slot] = ccb; 1333 ch->numhslots++; 1334 } else 1335 xpt_done(ccb); 1336 /* If we have no other active commands, ... */ 1337 if (ch->rslots == 0) { 1338 /* if there were timeouts or fatal error - reset port. */ 1339 if (ch->toslots != 0 || ch->fatalerr) { 1340 siis_reset(dev); 1341 } else { 1342 /* if we have slots in error, we can reinit port. */ 1343 if (ch->eslots != 0) 1344 siis_portinit(dev); 1345 /* if there commands on hold, we can do recovery. */ 1346 if (!ch->recoverycmd && ch->numhslots) 1347 siis_issue_recovery(dev); 1348 } 1349 /* If all the reset of commands are in timeout - abort them. */ 1350 } else if ((ch->rslots & ~ch->toslots) == 0 && 1351 et != SIIS_ERR_TIMEOUT) 1352 siis_rearm_timeout(dev); 1353 /* Unfreeze frozen command. */ 1354 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1355 union ccb *fccb = ch->frozen; 1356 ch->frozen = NULL; 1357 siis_begin_transaction(dev, fccb); 1358 xpt_release_simq(ch->sim, TRUE); 1359 } 1360 } 1361 1362 static void 1363 siis_issue_recovery(device_t dev) 1364 { 1365 struct siis_channel *ch = device_get_softc(dev); 1366 union ccb *ccb; 1367 struct ccb_ataio *ataio; 1368 struct ccb_scsiio *csio; 1369 int i; 1370 1371 /* Find some held command. */ 1372 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1373 if (ch->hold[i]) 1374 break; 1375 } 1376 if (i == SIIS_MAX_SLOTS) 1377 return; 1378 ccb = xpt_alloc_ccb_nowait(); 1379 if (ccb == NULL) { 1380 device_printf(dev, "Unable to allocate recovery command\n"); 1381 completeall: 1382 /* We can't do anything -- complete held commands. */ 1383 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1384 if (ch->hold[i] == NULL) 1385 continue; 1386 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1387 ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 1388 xpt_done(ch->hold[i]); 1389 ch->hold[i] = NULL; 1390 ch->numhslots--; 1391 } 1392 siis_reset(dev); 1393 return; 1394 } 1395 xpt_setup_ccb(&ccb->ccb_h, ch->hold[i]->ccb_h.path, 1396 ch->hold[i]->ccb_h.pinfo.priority); 1397 if (ch->hold[i]->ccb_h.func_code == XPT_ATA_IO) { 1398 /* READ LOG */ 1399 ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 1400 ccb->ccb_h.func_code = XPT_ATA_IO; 1401 ccb->ccb_h.flags = CAM_DIR_IN; 1402 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1403 ataio = &ccb->ataio; 1404 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1405 if (ataio->data_ptr == NULL) { 1406 xpt_free_ccb(ccb); 1407 device_printf(dev, 1408 "Unable to allocate memory for READ LOG command\n"); 1409 goto completeall; 1410 } 1411 ataio->dxfer_len = 512; 1412 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1413 ataio->cmd.flags = CAM_ATAIO_48BIT; 1414 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1415 ataio->cmd.sector_count = 1; 1416 ataio->cmd.sector_count_exp = 0; 1417 ataio->cmd.lba_low = 0x10; 1418 ataio->cmd.lba_mid = 0; 1419 ataio->cmd.lba_mid_exp = 0; 1420 } else { 1421 /* REQUEST SENSE */ 1422 ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 1423 ccb->ccb_h.recovery_slot = i; 1424 ccb->ccb_h.func_code = XPT_SCSI_IO; 1425 ccb->ccb_h.flags = CAM_DIR_IN; 1426 ccb->ccb_h.status = 0; 1427 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1428 csio = &ccb->csio; 1429 csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 1430 csio->dxfer_len = ch->hold[i]->csio.sense_len; 1431 csio->cdb_len = 6; 1432 bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 1433 csio->cdb_io.cdb_bytes[0] = 0x03; 1434 csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 1435 } 1436 ch->recoverycmd = 1; 1437 siis_begin_transaction(dev, ccb); 1438 } 1439 1440 static void 1441 siis_process_read_log(device_t dev, union ccb *ccb) 1442 { 1443 struct siis_channel *ch = device_get_softc(dev); 1444 uint8_t *data; 1445 struct ata_res *res; 1446 int i; 1447 1448 ch->recoverycmd = 0; 1449 data = ccb->ataio.data_ptr; 1450 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1451 (data[0] & 0x80) == 0) { 1452 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1453 if (!ch->hold[i]) 1454 continue; 1455 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1456 continue; 1457 if ((data[0] & 0x1F) == i) { 1458 res = &ch->hold[i]->ataio.res; 1459 res->status = data[2]; 1460 res->error = data[3]; 1461 res->lba_low = data[4]; 1462 res->lba_mid = data[5]; 1463 res->lba_high = data[6]; 1464 res->device = data[7]; 1465 res->lba_low_exp = data[8]; 1466 res->lba_mid_exp = data[9]; 1467 res->lba_high_exp = data[10]; 1468 res->sector_count = data[12]; 1469 res->sector_count_exp = data[13]; 1470 } else { 1471 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1472 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1473 } 1474 xpt_done(ch->hold[i]); 1475 ch->hold[i] = NULL; 1476 ch->numhslots--; 1477 } 1478 } else { 1479 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1480 device_printf(dev, "Error while READ LOG EXT\n"); 1481 else if ((data[0] & 0x80) == 0) { 1482 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1483 } 1484 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1485 if (!ch->hold[i]) 1486 continue; 1487 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1488 continue; 1489 xpt_done(ch->hold[i]); 1490 ch->hold[i] = NULL; 1491 ch->numhslots--; 1492 } 1493 } 1494 free(ccb->ataio.data_ptr, M_SIIS); 1495 xpt_free_ccb(ccb); 1496 } 1497 1498 static void 1499 siis_process_request_sense(device_t dev, union ccb *ccb) 1500 { 1501 struct siis_channel *ch = device_get_softc(dev); 1502 int i; 1503 1504 ch->recoverycmd = 0; 1505 1506 i = ccb->ccb_h.recovery_slot; 1507 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 1508 ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 1509 } else { 1510 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1511 ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 1512 } 1513 xpt_done(ch->hold[i]); 1514 ch->hold[i] = NULL; 1515 ch->numhslots--; 1516 xpt_free_ccb(ccb); 1517 } 1518 1519 static void 1520 siis_portinit(device_t dev) 1521 { 1522 struct siis_channel *ch = device_get_softc(dev); 1523 int i; 1524 1525 ch->eslots = 0; 1526 ch->recovery = 0; 1527 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1528 for (i = 0; i < 16; i++) { 1529 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1530 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1531 } 1532 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1533 siis_wait_ready(dev, 1000); 1534 } 1535 1536 static int 1537 siis_devreset(device_t dev) 1538 { 1539 struct siis_channel *ch = device_get_softc(dev); 1540 int timeout = 0; 1541 uint32_t val; 1542 1543 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1544 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1545 SIIS_P_CTL_DEV_RESET) != 0) { 1546 DELAY(100); 1547 if (timeout++ > 1000) { 1548 device_printf(dev, "device reset stuck " 1549 "(timeout 100ms) status = %08x\n", val); 1550 return (EBUSY); 1551 } 1552 } 1553 return (0); 1554 } 1555 1556 static int 1557 siis_wait_ready(device_t dev, int t) 1558 { 1559 struct siis_channel *ch = device_get_softc(dev); 1560 int timeout = 0; 1561 uint32_t val; 1562 1563 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1564 SIIS_P_CTL_READY) == 0) { 1565 DELAY(1000); 1566 if (timeout++ > t) { 1567 device_printf(dev, "port is not ready (timeout %dms) " 1568 "status = %08x\n", t, val); 1569 return (EBUSY); 1570 } 1571 } 1572 return (0); 1573 } 1574 1575 static void 1576 siis_reset(device_t dev) 1577 { 1578 struct siis_channel *ch = device_get_softc(dev); 1579 int i, retry = 0, sata_rev; 1580 uint32_t val; 1581 1582 xpt_freeze_simq(ch->sim, 1); 1583 if (bootverbose) 1584 device_printf(dev, "SIIS reset...\n"); 1585 if (!ch->recoverycmd && !ch->recovery) 1586 xpt_freeze_simq(ch->sim, ch->numrslots); 1587 /* Requeue frozen command. */ 1588 if (ch->frozen) { 1589 union ccb *fccb = ch->frozen; 1590 ch->frozen = NULL; 1591 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1592 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1593 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1594 xpt_freeze_devq(fccb->ccb_h.path, 1); 1595 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1596 } 1597 xpt_done(fccb); 1598 } 1599 /* Requeue all running commands. */ 1600 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1601 /* Do we have a running request on slot? */ 1602 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1603 continue; 1604 /* XXX; Commands in loading state. */ 1605 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1606 } 1607 /* Finish all held commands as-is. */ 1608 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1609 if (!ch->hold[i]) 1610 continue; 1611 xpt_done(ch->hold[i]); 1612 ch->hold[i] = NULL; 1613 ch->numhslots--; 1614 } 1615 if (ch->toslots != 0) 1616 xpt_release_simq(ch->sim, TRUE); 1617 ch->eslots = 0; 1618 ch->recovery = 0; 1619 ch->toslots = 0; 1620 ch->fatalerr = 0; 1621 /* Disable port interrupts */ 1622 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1623 /* Set speed limit. */ 1624 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1625 if (sata_rev == 1) 1626 val = ATA_SC_SPD_SPEED_GEN1; 1627 else if (sata_rev == 2) 1628 val = ATA_SC_SPD_SPEED_GEN2; 1629 else if (sata_rev == 3) 1630 val = ATA_SC_SPD_SPEED_GEN3; 1631 else 1632 val = 0; 1633 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1634 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1635 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1636 retry: 1637 siis_devreset(dev); 1638 /* Reset and reconnect PHY, */ 1639 if (!siis_sata_connect(ch)) { 1640 ch->devices = 0; 1641 /* Enable port interrupts */ 1642 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1643 if (bootverbose) 1644 device_printf(dev, 1645 "SIIS reset done: phy reset found no device\n"); 1646 /* Tell the XPT about the event */ 1647 xpt_async(AC_BUS_RESET, ch->path, NULL); 1648 xpt_release_simq(ch->sim, TRUE); 1649 return; 1650 } 1651 /* Wait for port ready status. */ 1652 if (siis_wait_ready(dev, 1000)) { 1653 device_printf(dev, "port ready timeout\n"); 1654 if (!retry) { 1655 device_printf(dev, "trying full port reset ...\n"); 1656 /* Get port to the reset state. */ 1657 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1658 DELAY(10000); 1659 /* Get port out of reset state. */ 1660 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1661 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1662 if (ch->pm_present) 1663 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1664 else 1665 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1666 siis_wait_ready(dev, 5000); 1667 retry = 1; 1668 goto retry; 1669 } 1670 } 1671 ch->devices = 1; 1672 /* Enable port interrupts */ 1673 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1674 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1675 if (bootverbose) 1676 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1677 /* Tell the XPT about the event */ 1678 xpt_async(AC_BUS_RESET, ch->path, NULL); 1679 xpt_release_simq(ch->sim, TRUE); 1680 } 1681 1682 static int 1683 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1684 { 1685 struct siis_channel *ch = device_get_softc(dev); 1686 u_int8_t *fis = &ctp->fis[0]; 1687 1688 bzero(fis, 24); 1689 fis[0] = 0x27; /* host to device */ 1690 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1691 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1692 fis[1] |= 0x80; 1693 fis[2] = ATA_PACKET_CMD; 1694 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1695 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1696 fis[3] = ATA_F_DMA; 1697 else { 1698 fis[5] = ccb->csio.dxfer_len; 1699 fis[6] = ccb->csio.dxfer_len >> 8; 1700 } 1701 fis[7] = ATA_D_LBA; 1702 fis[15] = ATA_A_4BIT; 1703 bzero(ctp->u.atapi.ccb, 16); 1704 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1705 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1706 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1707 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1708 fis[1] |= 0x80; 1709 fis[2] = ccb->ataio.cmd.command; 1710 fis[3] = ccb->ataio.cmd.features; 1711 fis[4] = ccb->ataio.cmd.lba_low; 1712 fis[5] = ccb->ataio.cmd.lba_mid; 1713 fis[6] = ccb->ataio.cmd.lba_high; 1714 fis[7] = ccb->ataio.cmd.device; 1715 fis[8] = ccb->ataio.cmd.lba_low_exp; 1716 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1717 fis[10] = ccb->ataio.cmd.lba_high_exp; 1718 fis[11] = ccb->ataio.cmd.features_exp; 1719 fis[12] = ccb->ataio.cmd.sector_count; 1720 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1721 fis[12] &= 0x07; 1722 fis[12] |= tag << 3; 1723 } 1724 fis[13] = ccb->ataio.cmd.sector_count_exp; 1725 if (ccb->ataio.ata_flags & ATA_FLAG_ICC) 1726 fis[14] = ccb->ataio.icc; 1727 fis[15] = ATA_A_4BIT; 1728 if (ccb->ataio.ata_flags & ATA_FLAG_AUX) { 1729 fis[16] = ccb->ataio.aux & 0xff; 1730 fis[17] = (ccb->ataio.aux >> 8) & 0xff; 1731 fis[18] = (ccb->ataio.aux >> 16) & 0xff; 1732 fis[19] = (ccb->ataio.aux >> 24) & 0xff; 1733 } 1734 } else { 1735 /* Soft reset. */ 1736 } 1737 return (20); 1738 } 1739 1740 static int 1741 siis_sata_connect(struct siis_channel *ch) 1742 { 1743 u_int32_t status; 1744 int timeout, found = 0; 1745 1746 /* Wait up to 100ms for "connect well" */ 1747 for (timeout = 0; timeout < 1000 ; timeout++) { 1748 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1749 if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1750 found = 1; 1751 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1752 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1753 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1754 break; 1755 if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 1756 if (bootverbose) { 1757 device_printf(ch->dev, "SATA offline status=%08x\n", 1758 status); 1759 } 1760 return (0); 1761 } 1762 if (found == 0 && timeout >= 100) 1763 break; 1764 DELAY(100); 1765 } 1766 if (timeout >= 1000 || !found) { 1767 if (bootverbose) { 1768 device_printf(ch->dev, 1769 "SATA connect timeout time=%dus status=%08x\n", 1770 timeout * 100, status); 1771 } 1772 return (0); 1773 } 1774 if (bootverbose) { 1775 device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 1776 timeout * 100, status); 1777 } 1778 /* Clear SATA error register */ 1779 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1780 return (1); 1781 } 1782 1783 static int 1784 siis_check_ids(device_t dev, union ccb *ccb) 1785 { 1786 1787 if (ccb->ccb_h.target_id > 15) { 1788 ccb->ccb_h.status = CAM_TID_INVALID; 1789 xpt_done(ccb); 1790 return (-1); 1791 } 1792 if (ccb->ccb_h.target_lun != 0) { 1793 ccb->ccb_h.status = CAM_LUN_INVALID; 1794 xpt_done(ccb); 1795 return (-1); 1796 } 1797 return (0); 1798 } 1799 1800 static void 1801 siisaction(struct cam_sim *sim, union ccb *ccb) 1802 { 1803 device_t dev, parent; 1804 struct siis_channel *ch; 1805 1806 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1807 ccb->ccb_h.func_code)); 1808 1809 ch = (struct siis_channel *)cam_sim_softc(sim); 1810 dev = ch->dev; 1811 mtx_assert(&ch->mtx, MA_OWNED); 1812 switch (ccb->ccb_h.func_code) { 1813 /* Common cases first */ 1814 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1815 case XPT_SCSI_IO: 1816 if (siis_check_ids(dev, ccb)) 1817 return; 1818 if (ch->devices == 0 || 1819 (ch->pm_present == 0 && 1820 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1821 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1822 break; 1823 } 1824 ccb->ccb_h.recovery_type = RECOVERY_NONE; 1825 /* Check for command collision. */ 1826 if (siis_check_collision(dev, ccb)) { 1827 /* Freeze command. */ 1828 ch->frozen = ccb; 1829 /* We have only one frozen slot, so freeze simq also. */ 1830 xpt_freeze_simq(ch->sim, 1); 1831 return; 1832 } 1833 siis_begin_transaction(dev, ccb); 1834 return; 1835 case XPT_ABORT: /* Abort the specified CCB */ 1836 /* XXX Implement */ 1837 ccb->ccb_h.status = CAM_REQ_INVALID; 1838 break; 1839 case XPT_SET_TRAN_SETTINGS: 1840 { 1841 struct ccb_trans_settings *cts = &ccb->cts; 1842 struct siis_device *d; 1843 1844 if (siis_check_ids(dev, ccb)) 1845 return; 1846 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1847 d = &ch->curr[ccb->ccb_h.target_id]; 1848 else 1849 d = &ch->user[ccb->ccb_h.target_id]; 1850 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1851 d->revision = cts->xport_specific.sata.revision; 1852 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1853 d->mode = cts->xport_specific.sata.mode; 1854 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1855 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1856 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1857 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1858 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1859 ch->pm_present = cts->xport_specific.sata.pm_present; 1860 if (ch->pm_present) 1861 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1862 else 1863 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1864 } 1865 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1866 d->atapi = cts->xport_specific.sata.atapi; 1867 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1868 d->caps = cts->xport_specific.sata.caps; 1869 ccb->ccb_h.status = CAM_REQ_CMP; 1870 break; 1871 } 1872 case XPT_GET_TRAN_SETTINGS: 1873 /* Get default/user set transfer settings for the target */ 1874 { 1875 struct ccb_trans_settings *cts = &ccb->cts; 1876 struct siis_device *d; 1877 uint32_t status; 1878 1879 if (siis_check_ids(dev, ccb)) 1880 return; 1881 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1882 d = &ch->curr[ccb->ccb_h.target_id]; 1883 else 1884 d = &ch->user[ccb->ccb_h.target_id]; 1885 cts->protocol = PROTO_UNSPECIFIED; 1886 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1887 cts->transport = XPORT_SATA; 1888 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1889 cts->proto_specific.valid = 0; 1890 cts->xport_specific.sata.valid = 0; 1891 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1892 (ccb->ccb_h.target_id == 15 || 1893 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1894 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1895 if (status & 0x0f0) { 1896 cts->xport_specific.sata.revision = 1897 (status & 0x0f0) >> 4; 1898 cts->xport_specific.sata.valid |= 1899 CTS_SATA_VALID_REVISION; 1900 } 1901 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1902 if (ch->pm_level) 1903 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1904 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 1905 cts->xport_specific.sata.caps &= 1906 ch->user[ccb->ccb_h.target_id].caps; 1907 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1908 } else { 1909 cts->xport_specific.sata.revision = d->revision; 1910 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1911 cts->xport_specific.sata.caps = d->caps; 1912 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1913 (ch->quirks & SIIS_Q_SNTF) == 0) 1914 cts->xport_specific.sata.caps &= ~CTS_SATA_CAPS_H_AN; 1915 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1916 } 1917 cts->xport_specific.sata.mode = d->mode; 1918 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1919 cts->xport_specific.sata.bytecount = d->bytecount; 1920 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1921 cts->xport_specific.sata.pm_present = ch->pm_present; 1922 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1923 cts->xport_specific.sata.tags = d->tags; 1924 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1925 cts->xport_specific.sata.atapi = d->atapi; 1926 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1927 ccb->ccb_h.status = CAM_REQ_CMP; 1928 break; 1929 } 1930 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1931 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1932 siis_reset(dev); 1933 ccb->ccb_h.status = CAM_REQ_CMP; 1934 break; 1935 case XPT_TERM_IO: /* Terminate the I/O process */ 1936 /* XXX Implement */ 1937 ccb->ccb_h.status = CAM_REQ_INVALID; 1938 break; 1939 case XPT_PATH_INQ: /* Path routing inquiry */ 1940 { 1941 struct ccb_pathinq *cpi = &ccb->cpi; 1942 1943 parent = device_get_parent(dev); 1944 cpi->version_num = 1; /* XXX??? */ 1945 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1946 cpi->hba_inquiry |= PI_SATAPM; 1947 cpi->target_sprt = 0; 1948 cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED | PIM_ATA_EXT; 1949 cpi->hba_eng_cnt = 0; 1950 cpi->max_target = 15; 1951 cpi->max_lun = 0; 1952 cpi->initiator_id = 0; 1953 cpi->bus_id = cam_sim_bus(sim); 1954 cpi->base_transfer_speed = 150000; 1955 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1956 strlcpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1957 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1958 cpi->unit_number = cam_sim_unit(sim); 1959 cpi->transport = XPORT_SATA; 1960 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1961 cpi->protocol = PROTO_ATA; 1962 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1963 cpi->maxio = maxphys; 1964 cpi->hba_vendor = pci_get_vendor(parent); 1965 cpi->hba_device = pci_get_device(parent); 1966 cpi->hba_subvendor = pci_get_subvendor(parent); 1967 cpi->hba_subdevice = pci_get_subdevice(parent); 1968 cpi->ccb_h.status = CAM_REQ_CMP; 1969 break; 1970 } 1971 default: 1972 ccb->ccb_h.status = CAM_REQ_INVALID; 1973 break; 1974 } 1975 xpt_done(ccb); 1976 } 1977 1978 static void 1979 siispoll(struct cam_sim *sim) 1980 { 1981 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1982 1983 siis_ch_intr(ch->dev); 1984 } 1985