1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_debug.h> 56 57 /* local prototypes */ 58 static int siis_setup_interrupt(device_t dev); 59 static void siis_intr(void *data); 60 static int siis_suspend(device_t dev); 61 static int siis_resume(device_t dev); 62 static int siis_ch_suspend(device_t dev); 63 static int siis_ch_resume(device_t dev); 64 static void siis_ch_intr_locked(void *data); 65 static void siis_ch_intr(void *data); 66 static void siis_begin_transaction(device_t dev, union ccb *ccb); 67 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 68 static void siis_execute_transaction(struct siis_slot *slot); 69 static void siis_timeout(struct siis_slot *slot); 70 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 71 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 72 static void siis_dmainit(device_t dev); 73 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 74 static void siis_dmafini(device_t dev); 75 static void siis_slotsalloc(device_t dev); 76 static void siis_slotsfree(device_t dev); 77 static void siis_reset(device_t dev); 78 static void siis_portinit(device_t dev); 79 static int siis_wait_ready(device_t dev, int t); 80 81 static int siis_sata_connect(struct siis_channel *ch); 82 83 static void siis_issue_read_log(device_t dev); 84 static void siis_process_read_log(device_t dev, union ccb *ccb); 85 86 static void siisaction(struct cam_sim *sim, union ccb *ccb); 87 static void siispoll(struct cam_sim *sim); 88 89 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 90 91 static struct { 92 uint32_t id; 93 const char *name; 94 int ports; 95 int quirks; 96 #define SIIS_Q_SNTF 1 97 #define SIIS_Q_NOMSI 2 98 } siis_ids[] = { 99 {0x31241095, "SiI3124", 4, 0}, 100 {0x31248086, "SiI3124", 4, 0}, 101 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 102 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 103 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0, NULL, 0, 0} 107 }; 108 109 static int 110 siis_probe(device_t dev) 111 { 112 char buf[64]; 113 int i; 114 uint32_t devid = pci_get_devid(dev); 115 116 for (i = 0; siis_ids[i].id != 0; i++) { 117 if (siis_ids[i].id == devid) { 118 snprintf(buf, sizeof(buf), "%s SATA controller", 119 siis_ids[i].name); 120 device_set_desc_copy(dev, buf); 121 return (BUS_PROBE_VENDOR); 122 } 123 } 124 return (ENXIO); 125 } 126 127 static int 128 siis_attach(device_t dev) 129 { 130 struct siis_controller *ctlr = device_get_softc(dev); 131 uint32_t devid = pci_get_devid(dev); 132 device_t child; 133 int error, i, unit; 134 135 ctlr->dev = dev; 136 for (i = 0; siis_ids[i].id != 0; i++) { 137 if (siis_ids[i].id == devid) 138 break; 139 } 140 ctlr->quirks = siis_ids[i].quirks; 141 /* Global memory */ 142 ctlr->r_grid = PCIR_BAR(0); 143 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 144 &ctlr->r_grid, RF_ACTIVE))) 145 return (ENXIO); 146 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 147 /* Channels memory */ 148 ctlr->r_rid = PCIR_BAR(2); 149 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 150 &ctlr->r_rid, RF_ACTIVE))) 151 return (ENXIO); 152 /* Setup our own memory management for channels. */ 153 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 154 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 155 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 157 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 158 return (error); 159 } 160 if ((error = rman_manage_region(&ctlr->sc_iomem, 161 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 162 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 163 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 164 rman_fini(&ctlr->sc_iomem); 165 return (error); 166 } 167 pci_enable_busmaster(dev); 168 /* Reset controller */ 169 siis_resume(dev); 170 /* Number of HW channels */ 171 ctlr->channels = siis_ids[i].ports; 172 /* Setup interrupts. */ 173 if (siis_setup_interrupt(dev)) { 174 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 175 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 176 rman_fini(&ctlr->sc_iomem); 177 return ENXIO; 178 } 179 /* Attach all channels on this controller */ 180 for (unit = 0; unit < ctlr->channels; unit++) { 181 child = device_add_child(dev, "siisch", -1); 182 if (child == NULL) 183 device_printf(dev, "failed to add channel device\n"); 184 else 185 device_set_ivars(child, (void *)(intptr_t)unit); 186 } 187 bus_generic_attach(dev); 188 return 0; 189 } 190 191 static int 192 siis_detach(device_t dev) 193 { 194 struct siis_controller *ctlr = device_get_softc(dev); 195 device_t *children; 196 int nchildren, i; 197 198 /* Detach & delete all children */ 199 if (!device_get_children(dev, &children, &nchildren)) { 200 for (i = 0; i < nchildren; i++) 201 device_delete_child(dev, children[i]); 202 free(children, M_TEMP); 203 } 204 /* Free interrupts. */ 205 if (ctlr->irq.r_irq) { 206 bus_teardown_intr(dev, ctlr->irq.r_irq, 207 ctlr->irq.handle); 208 bus_release_resource(dev, SYS_RES_IRQ, 209 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 210 } 211 pci_release_msi(dev); 212 /* Free memory. */ 213 rman_fini(&ctlr->sc_iomem); 214 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 215 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 216 return (0); 217 } 218 219 static int 220 siis_suspend(device_t dev) 221 { 222 struct siis_controller *ctlr = device_get_softc(dev); 223 224 bus_generic_suspend(dev); 225 /* Put controller into reset state. */ 226 ctlr->gctl |= SIIS_GCTL_GRESET; 227 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 228 return 0; 229 } 230 231 static int 232 siis_resume(device_t dev) 233 { 234 struct siis_controller *ctlr = device_get_softc(dev); 235 236 /* Set PCIe max read request size to at least 1024 bytes */ 237 if (pci_get_max_read_req(dev) < 1024) 238 pci_set_max_read_req(dev, 1024); 239 /* Put controller into reset state. */ 240 ctlr->gctl |= SIIS_GCTL_GRESET; 241 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 242 DELAY(10000); 243 /* Get controller out of reset state and enable port interrupts. */ 244 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 245 ctlr->gctl |= 0x0000000f; 246 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 247 return (bus_generic_resume(dev)); 248 } 249 250 static int 251 siis_setup_interrupt(device_t dev) 252 { 253 struct siis_controller *ctlr = device_get_softc(dev); 254 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 255 256 /* Process hints. */ 257 resource_int_value(device_get_name(dev), 258 device_get_unit(dev), "msi", &msi); 259 if (msi < 0) 260 msi = 0; 261 else if (msi > 0) 262 msi = min(1, pci_msi_count(dev)); 263 /* Allocate MSI if needed/present. */ 264 if (msi && pci_alloc_msi(dev, &msi) != 0) 265 msi = 0; 266 /* Allocate all IRQs. */ 267 ctlr->irq.r_irq_rid = msi ? 1 : 0; 268 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 269 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 270 device_printf(dev, "unable to map interrupt\n"); 271 return ENXIO; 272 } 273 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 274 siis_intr, ctlr, &ctlr->irq.handle))) { 275 /* SOS XXX release r_irq */ 276 device_printf(dev, "unable to setup interrupt\n"); 277 return ENXIO; 278 } 279 return (0); 280 } 281 282 /* 283 * Common case interrupt handler. 284 */ 285 static void 286 siis_intr(void *data) 287 { 288 struct siis_controller *ctlr = (struct siis_controller *)data; 289 u_int32_t is; 290 void *arg; 291 int unit; 292 293 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 294 for (unit = 0; unit < ctlr->channels; unit++) { 295 if ((is & SIIS_IS_PORT(unit)) != 0 && 296 (arg = ctlr->interrupt[unit].argument)) { 297 ctlr->interrupt[unit].function(arg); 298 } 299 } 300 /* Acknowledge interrupt, if MSI enabled. */ 301 if (ctlr->irq.r_irq_rid) { 302 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 303 ctlr->gctl | SIIS_GCTL_MSIACK); 304 } 305 } 306 307 static struct resource * 308 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 309 u_long start, u_long end, u_long count, u_int flags) 310 { 311 struct siis_controller *ctlr = device_get_softc(dev); 312 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 313 struct resource *res = NULL; 314 int offset = unit << 13; 315 long st; 316 317 switch (type) { 318 case SYS_RES_MEMORY: 319 st = rman_get_start(ctlr->r_mem); 320 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 321 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 322 if (res) { 323 bus_space_handle_t bsh; 324 bus_space_tag_t bst; 325 bsh = rman_get_bushandle(ctlr->r_mem); 326 bst = rman_get_bustag(ctlr->r_mem); 327 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 328 rman_set_bushandle(res, bsh); 329 rman_set_bustag(res, bst); 330 } 331 break; 332 case SYS_RES_IRQ: 333 if (*rid == ATA_IRQ_RID) 334 res = ctlr->irq.r_irq; 335 break; 336 } 337 return (res); 338 } 339 340 static int 341 siis_release_resource(device_t dev, device_t child, int type, int rid, 342 struct resource *r) 343 { 344 345 switch (type) { 346 case SYS_RES_MEMORY: 347 rman_release_resource(r); 348 return (0); 349 case SYS_RES_IRQ: 350 if (rid != ATA_IRQ_RID) 351 return ENOENT; 352 return (0); 353 } 354 return (EINVAL); 355 } 356 357 static int 358 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 359 int flags, driver_filter_t *filter, driver_intr_t *function, 360 void *argument, void **cookiep) 361 { 362 struct siis_controller *ctlr = device_get_softc(dev); 363 int unit = (intptr_t)device_get_ivars(child); 364 365 if (filter != NULL) { 366 printf("siis.c: we cannot use a filter here\n"); 367 return (EINVAL); 368 } 369 ctlr->interrupt[unit].function = function; 370 ctlr->interrupt[unit].argument = argument; 371 return (0); 372 } 373 374 static int 375 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 376 void *cookie) 377 { 378 struct siis_controller *ctlr = device_get_softc(dev); 379 int unit = (intptr_t)device_get_ivars(child); 380 381 ctlr->interrupt[unit].function = NULL; 382 ctlr->interrupt[unit].argument = NULL; 383 return (0); 384 } 385 386 static int 387 siis_print_child(device_t dev, device_t child) 388 { 389 int retval; 390 391 retval = bus_print_child_header(dev, child); 392 retval += printf(" at channel %d", 393 (int)(intptr_t)device_get_ivars(child)); 394 retval += bus_print_child_footer(dev, child); 395 396 return (retval); 397 } 398 399 devclass_t siis_devclass; 400 static device_method_t siis_methods[] = { 401 DEVMETHOD(device_probe, siis_probe), 402 DEVMETHOD(device_attach, siis_attach), 403 DEVMETHOD(device_detach, siis_detach), 404 DEVMETHOD(device_suspend, siis_suspend), 405 DEVMETHOD(device_resume, siis_resume), 406 DEVMETHOD(bus_print_child, siis_print_child), 407 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 408 DEVMETHOD(bus_release_resource, siis_release_resource), 409 DEVMETHOD(bus_setup_intr, siis_setup_intr), 410 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 411 { 0, 0 } 412 }; 413 static driver_t siis_driver = { 414 "siis", 415 siis_methods, 416 sizeof(struct siis_controller) 417 }; 418 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 419 MODULE_VERSION(siis, 1); 420 MODULE_DEPEND(siis, cam, 1, 1, 1); 421 422 static int 423 siis_ch_probe(device_t dev) 424 { 425 426 device_set_desc_copy(dev, "SIIS channel"); 427 return (0); 428 } 429 430 static int 431 siis_ch_attach(device_t dev) 432 { 433 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 434 struct siis_channel *ch = device_get_softc(dev); 435 struct cam_devq *devq; 436 int rid, error, i, sata_rev = 0; 437 438 ch->dev = dev; 439 ch->unit = (intptr_t)device_get_ivars(dev); 440 ch->quirks = ctlr->quirks; 441 resource_int_value(device_get_name(dev), 442 device_get_unit(dev), "pm_level", &ch->pm_level); 443 resource_int_value(device_get_name(dev), 444 device_get_unit(dev), "sata_rev", &sata_rev); 445 for (i = 0; i < 16; i++) { 446 ch->user[i].revision = sata_rev; 447 ch->user[i].mode = 0; 448 ch->user[i].bytecount = 8192; 449 ch->user[i].tags = SIIS_MAX_SLOTS; 450 ch->curr[i] = ch->user[i]; 451 if (ch->pm_level) 452 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 453 } 454 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 455 rid = ch->unit; 456 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 457 &rid, RF_ACTIVE))) 458 return (ENXIO); 459 siis_dmainit(dev); 460 siis_slotsalloc(dev); 461 siis_ch_resume(dev); 462 mtx_lock(&ch->mtx); 463 rid = ATA_IRQ_RID; 464 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 465 &rid, RF_SHAREABLE | RF_ACTIVE))) { 466 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 467 device_printf(dev, "Unable to map interrupt\n"); 468 return (ENXIO); 469 } 470 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 471 siis_ch_intr_locked, dev, &ch->ih))) { 472 device_printf(dev, "Unable to setup interrupt\n"); 473 error = ENXIO; 474 goto err1; 475 } 476 /* Create the device queue for our SIM. */ 477 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 478 if (devq == NULL) { 479 device_printf(dev, "Unable to allocate simq\n"); 480 error = ENOMEM; 481 goto err1; 482 } 483 /* Construct SIM entry */ 484 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 485 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 486 if (ch->sim == NULL) { 487 device_printf(dev, "unable to allocate sim\n"); 488 error = ENOMEM; 489 goto err2; 490 } 491 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 492 device_printf(dev, "unable to register xpt bus\n"); 493 error = ENXIO; 494 goto err2; 495 } 496 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 497 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 498 device_printf(dev, "unable to create path\n"); 499 error = ENXIO; 500 goto err3; 501 } 502 mtx_unlock(&ch->mtx); 503 return (0); 504 505 err3: 506 xpt_bus_deregister(cam_sim_path(ch->sim)); 507 err2: 508 cam_sim_free(ch->sim, /*free_devq*/TRUE); 509 err1: 510 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 511 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 512 mtx_unlock(&ch->mtx); 513 return (error); 514 } 515 516 static int 517 siis_ch_detach(device_t dev) 518 { 519 struct siis_channel *ch = device_get_softc(dev); 520 521 mtx_lock(&ch->mtx); 522 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 523 xpt_free_path(ch->path); 524 xpt_bus_deregister(cam_sim_path(ch->sim)); 525 cam_sim_free(ch->sim, /*free_devq*/TRUE); 526 mtx_unlock(&ch->mtx); 527 528 bus_teardown_intr(dev, ch->r_irq, ch->ih); 529 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 530 531 siis_ch_suspend(dev); 532 siis_slotsfree(dev); 533 siis_dmafini(dev); 534 535 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 536 mtx_destroy(&ch->mtx); 537 return (0); 538 } 539 540 static int 541 siis_ch_suspend(device_t dev) 542 { 543 struct siis_channel *ch = device_get_softc(dev); 544 545 /* Put port into reset state. */ 546 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 547 return (0); 548 } 549 550 static int 551 siis_ch_resume(device_t dev) 552 { 553 struct siis_channel *ch = device_get_softc(dev); 554 555 /* Get port out of reset state. */ 556 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 557 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 558 if (ch->pm_present) 559 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 560 else 561 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 562 /* Enable port interrupts */ 563 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 564 return (0); 565 } 566 567 devclass_t siisch_devclass; 568 static device_method_t siisch_methods[] = { 569 DEVMETHOD(device_probe, siis_ch_probe), 570 DEVMETHOD(device_attach, siis_ch_attach), 571 DEVMETHOD(device_detach, siis_ch_detach), 572 DEVMETHOD(device_suspend, siis_ch_suspend), 573 DEVMETHOD(device_resume, siis_ch_resume), 574 { 0, 0 } 575 }; 576 static driver_t siisch_driver = { 577 "siisch", 578 siisch_methods, 579 sizeof(struct siis_channel) 580 }; 581 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 582 583 struct siis_dc_cb_args { 584 bus_addr_t maddr; 585 int error; 586 }; 587 588 static void 589 siis_dmainit(device_t dev) 590 { 591 struct siis_channel *ch = device_get_softc(dev); 592 struct siis_dc_cb_args dcba; 593 594 /* Command area. */ 595 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 596 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 597 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 598 0, NULL, NULL, &ch->dma.work_tag)) 599 goto error; 600 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 601 &ch->dma.work_map)) 602 goto error; 603 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 604 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 605 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 606 goto error; 607 } 608 ch->dma.work_bus = dcba.maddr; 609 /* Data area. */ 610 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 611 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 612 NULL, NULL, 613 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 614 SIIS_SG_ENTRIES, 0xFFFFFFFF, 615 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 616 goto error; 617 } 618 return; 619 620 error: 621 device_printf(dev, "WARNING - DMA initialization failed\n"); 622 siis_dmafini(dev); 623 } 624 625 static void 626 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 627 { 628 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 629 630 if (!(dcba->error = error)) 631 dcba->maddr = segs[0].ds_addr; 632 } 633 634 static void 635 siis_dmafini(device_t dev) 636 { 637 struct siis_channel *ch = device_get_softc(dev); 638 639 if (ch->dma.data_tag) { 640 bus_dma_tag_destroy(ch->dma.data_tag); 641 ch->dma.data_tag = NULL; 642 } 643 if (ch->dma.work_bus) { 644 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 645 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 646 ch->dma.work_bus = 0; 647 ch->dma.work_map = NULL; 648 ch->dma.work = NULL; 649 } 650 if (ch->dma.work_tag) { 651 bus_dma_tag_destroy(ch->dma.work_tag); 652 ch->dma.work_tag = NULL; 653 } 654 } 655 656 static void 657 siis_slotsalloc(device_t dev) 658 { 659 struct siis_channel *ch = device_get_softc(dev); 660 int i; 661 662 /* Alloc and setup command/dma slots */ 663 bzero(ch->slot, sizeof(ch->slot)); 664 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 665 struct siis_slot *slot = &ch->slot[i]; 666 667 slot->dev = dev; 668 slot->slot = i; 669 slot->state = SIIS_SLOT_EMPTY; 670 slot->ccb = NULL; 671 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 672 673 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 674 device_printf(ch->dev, "FAILURE - create data_map\n"); 675 } 676 } 677 678 static void 679 siis_slotsfree(device_t dev) 680 { 681 struct siis_channel *ch = device_get_softc(dev); 682 int i; 683 684 /* Free all dma slots */ 685 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 686 struct siis_slot *slot = &ch->slot[i]; 687 688 callout_drain(&slot->timeout); 689 if (slot->dma.data_map) { 690 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 691 slot->dma.data_map = NULL; 692 } 693 } 694 } 695 696 static void 697 siis_notify_events(device_t dev) 698 { 699 struct siis_channel *ch = device_get_softc(dev); 700 struct cam_path *dpath; 701 u_int32_t status; 702 int i; 703 704 if (ch->quirks & SIIS_Q_SNTF) { 705 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 706 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 707 } else { 708 /* 709 * Without SNTF we have no idea which device sent notification. 710 * If PMP is connected, assume it, else - device. 711 */ 712 status = (ch->pm_present) ? 0x8000 : 0x0001; 713 } 714 if (bootverbose) 715 device_printf(dev, "SNTF 0x%04x\n", status); 716 for (i = 0; i < 16; i++) { 717 if ((status & (1 << i)) == 0) 718 continue; 719 if (xpt_create_path(&dpath, NULL, 720 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 721 xpt_async(AC_SCSI_AEN, dpath, NULL); 722 xpt_free_path(dpath); 723 } 724 } 725 726 } 727 728 static void 729 siis_phy_check_events(device_t dev) 730 { 731 struct siis_channel *ch = device_get_softc(dev); 732 733 /* If we have a connection event, deal with it */ 734 if (ch->pm_level == 0) { 735 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 736 union ccb *ccb; 737 738 if (bootverbose) { 739 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 740 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 741 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 742 device_printf(dev, "CONNECT requested\n"); 743 } else 744 device_printf(dev, "DISCONNECT requested\n"); 745 } 746 siis_reset(dev); 747 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 748 return; 749 if (xpt_create_path(&ccb->ccb_h.path, NULL, 750 cam_sim_path(ch->sim), 751 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 752 xpt_free_ccb(ccb); 753 return; 754 } 755 xpt_rescan(ccb); 756 } 757 } 758 759 static void 760 siis_ch_intr_locked(void *data) 761 { 762 device_t dev = (device_t)data; 763 struct siis_channel *ch = device_get_softc(dev); 764 765 mtx_lock(&ch->mtx); 766 siis_ch_intr(data); 767 mtx_unlock(&ch->mtx); 768 } 769 770 static void 771 siis_ch_intr(void *data) 772 { 773 device_t dev = (device_t)data; 774 struct siis_channel *ch = device_get_softc(dev); 775 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 776 enum siis_err_type et; 777 int i, ccs, port, tslots; 778 779 mtx_assert(&ch->mtx, MA_OWNED); 780 /* Read command statuses. */ 781 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 782 ok = ch->rslots & ~sstatus; 783 /* Complete all successfull commands. */ 784 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 785 if ((ok >> i) & 1) 786 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 787 } 788 /* Do we have any other events? */ 789 if ((sstatus & SIIS_P_SS_ATTN) == 0) 790 return; 791 /* Read and clear interrupt statuses. */ 792 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 793 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 794 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 795 /* Process PHY events */ 796 if (istatus & SIIS_P_IX_PHYRDYCHG) 797 siis_phy_check_events(dev); 798 /* Process NOTIFY events */ 799 if (istatus & SIIS_P_IX_SDBN) 800 siis_notify_events(dev); 801 /* Process command errors */ 802 if (istatus & SIIS_P_IX_COMMERR) { 803 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 804 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 805 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 806 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 807 err = ch->rslots & sstatus; 808 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 809 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 810 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 811 812 if (!ch->readlog && !ch->recovery) { 813 xpt_freeze_simq(ch->sim, ch->numrslots); 814 ch->recovery = 1; 815 } 816 if (ch->frozen) { 817 union ccb *fccb = ch->frozen; 818 ch->frozen = NULL; 819 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 820 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 821 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 822 xpt_freeze_devq(fccb->ccb_h.path, 1); 823 fccb->ccb_h.status |= CAM_DEV_QFRZN; 824 } 825 xpt_done(fccb); 826 } 827 if (estatus == SIIS_P_CMDERR_DEV || 828 estatus == SIIS_P_CMDERR_SDB || 829 estatus == SIIS_P_CMDERR_DATAFIS) { 830 tslots = ch->numtslots[port]; 831 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 832 /* XXX: requests in loading state. */ 833 if (((ch->rslots >> i) & 1) == 0) 834 continue; 835 if (ch->slot[i].ccb->ccb_h.target_id != port) 836 continue; 837 if (tslots == 0) { 838 /* Untagged operation. */ 839 if (i == ccs) 840 et = SIIS_ERR_TFE; 841 else 842 et = SIIS_ERR_INNOCENT; 843 } else { 844 /* Tagged operation. */ 845 et = SIIS_ERR_NCQ; 846 } 847 siis_end_transaction(&ch->slot[i], et); 848 } 849 /* 850 * We can't reinit port if there are some other 851 * commands active, use resume to complete them. 852 */ 853 if (ch->rslots != 0) 854 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 855 } else { 856 if (estatus == SIIS_P_CMDERR_SENDFIS || 857 estatus == SIIS_P_CMDERR_INCSTATE || 858 estatus == SIIS_P_CMDERR_PPE || 859 estatus == SIIS_P_CMDERR_SERVICE) { 860 et = SIIS_ERR_SATA; 861 } else 862 et = SIIS_ERR_INVALID; 863 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 864 /* XXX: requests in loading state. */ 865 if (((ch->rslots >> i) & 1) == 0) 866 continue; 867 siis_end_transaction(&ch->slot[i], et); 868 } 869 } 870 } 871 } 872 873 /* Must be called with channel locked. */ 874 static int 875 siis_check_collision(device_t dev, union ccb *ccb) 876 { 877 struct siis_channel *ch = device_get_softc(dev); 878 879 mtx_assert(&ch->mtx, MA_OWNED); 880 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 881 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 882 /* Tagged command while we have no supported tag free. */ 883 if (((~ch->oslots) & (0x7fffffff >> (31 - 884 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 885 return (1); 886 } 887 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 888 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 889 /* Atomic command while anything active. */ 890 if (ch->numrslots != 0) 891 return (1); 892 } 893 /* We have some atomic command running. */ 894 if (ch->aslots != 0) 895 return (1); 896 return (0); 897 } 898 899 /* Must be called with channel locked. */ 900 static void 901 siis_begin_transaction(device_t dev, union ccb *ccb) 902 { 903 struct siis_channel *ch = device_get_softc(dev); 904 struct siis_slot *slot; 905 int tag, tags; 906 907 mtx_assert(&ch->mtx, MA_OWNED); 908 /* Choose empty slot. */ 909 tags = SIIS_MAX_SLOTS; 910 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 911 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 912 tags = ch->curr[ccb->ccb_h.target_id].tags; 913 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 914 /* Occupy chosen slot. */ 915 slot = &ch->slot[tag]; 916 slot->ccb = ccb; 917 /* Update channel stats. */ 918 ch->oslots |= (1 << slot->slot); 919 ch->numrslots++; 920 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 921 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 922 ch->numtslots[ccb->ccb_h.target_id]++; 923 } 924 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 925 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 926 ch->aslots |= (1 << slot->slot); 927 slot->dma.nsegs = 0; 928 /* If request moves data, setup and load SG list */ 929 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 930 void *buf; 931 bus_size_t size; 932 933 slot->state = SIIS_SLOT_LOADING; 934 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 935 buf = ccb->ataio.data_ptr; 936 size = ccb->ataio.dxfer_len; 937 } else { 938 buf = ccb->csio.data_ptr; 939 size = ccb->csio.dxfer_len; 940 } 941 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 942 buf, size, siis_dmasetprd, slot, 0); 943 } else 944 siis_execute_transaction(slot); 945 } 946 947 /* Locked by busdma engine. */ 948 static void 949 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 950 { 951 struct siis_slot *slot = arg; 952 struct siis_channel *ch = device_get_softc(slot->dev); 953 struct siis_cmd *ctp; 954 struct siis_dma_prd *prd; 955 int i; 956 957 mtx_assert(&ch->mtx, MA_OWNED); 958 if (error) { 959 device_printf(slot->dev, "DMA load error\n"); 960 if (!ch->readlog) 961 xpt_freeze_simq(ch->sim, 1); 962 siis_end_transaction(slot, SIIS_ERR_INVALID); 963 return; 964 } 965 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 966 /* Get a piece of the workspace for this request */ 967 ctp = (struct siis_cmd *) 968 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 969 /* Fill S/G table */ 970 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 971 prd = &ctp->u.ata.prd[0]; 972 else 973 prd = &ctp->u.atapi.prd[0]; 974 for (i = 0; i < nsegs; i++) { 975 prd[i].dba = htole64(segs[i].ds_addr); 976 prd[i].dbc = htole32(segs[i].ds_len); 977 prd[i].control = 0; 978 } 979 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 980 slot->dma.nsegs = nsegs; 981 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 982 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 983 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 984 siis_execute_transaction(slot); 985 } 986 987 /* Must be called with channel locked. */ 988 static void 989 siis_execute_transaction(struct siis_slot *slot) 990 { 991 device_t dev = slot->dev; 992 struct siis_channel *ch = device_get_softc(dev); 993 struct siis_cmd *ctp; 994 union ccb *ccb = slot->ccb; 995 u_int64_t prb_bus; 996 997 mtx_assert(&ch->mtx, MA_OWNED); 998 /* Get a piece of the workspace for this request */ 999 ctp = (struct siis_cmd *) 1000 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1001 ctp->control = 0; 1002 ctp->protocol_override = 0; 1003 ctp->transfer_count = 0; 1004 /* Special handling for Soft Reset command. */ 1005 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1006 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1007 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1008 } else { 1009 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1010 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1011 ctp->protocol_override |= 1012 htole16(SIIS_PRB_PROTO_NCQ); 1013 } 1014 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1015 ctp->protocol_override |= 1016 htole16(SIIS_PRB_PROTO_READ); 1017 } else 1018 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1019 ctp->protocol_override |= 1020 htole16(SIIS_PRB_PROTO_WRITE); 1021 } 1022 } 1023 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1024 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1025 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1026 else 1027 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1028 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1029 } 1030 /* Special handling for Soft Reset command. */ 1031 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1032 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1033 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1034 /* Kick controller into sane state */ 1035 siis_portinit(dev); 1036 } 1037 /* Setup the FIS for this request */ 1038 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1039 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1040 if (!ch->readlog) 1041 xpt_freeze_simq(ch->sim, 1); 1042 siis_end_transaction(slot, SIIS_ERR_INVALID); 1043 return; 1044 } 1045 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1046 BUS_DMASYNC_PREWRITE); 1047 /* Issue command to the controller. */ 1048 slot->state = SIIS_SLOT_RUNNING; 1049 ch->rslots |= (1 << slot->slot); 1050 prb_bus = ch->dma.work_bus + 1051 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1052 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1053 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1054 /* Start command execution timeout */ 1055 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1056 (timeout_t*)siis_timeout, slot); 1057 return; 1058 } 1059 1060 /* Must be called with channel locked. */ 1061 static void 1062 siis_process_timeout(device_t dev) 1063 { 1064 struct siis_channel *ch = device_get_softc(dev); 1065 int i; 1066 1067 mtx_assert(&ch->mtx, MA_OWNED); 1068 if (!ch->readlog && !ch->recovery) { 1069 xpt_freeze_simq(ch->sim, ch->numrslots); 1070 ch->recovery = 1; 1071 } 1072 /* Handle the rest of commands. */ 1073 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1074 /* Do we have a running request on slot? */ 1075 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1076 continue; 1077 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1078 } 1079 } 1080 1081 /* Must be called with channel locked. */ 1082 static void 1083 siis_rearm_timeout(device_t dev) 1084 { 1085 struct siis_channel *ch = device_get_softc(dev); 1086 int i; 1087 1088 mtx_assert(&ch->mtx, MA_OWNED); 1089 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1090 struct siis_slot *slot = &ch->slot[i]; 1091 1092 /* Do we have a running request on slot? */ 1093 if (slot->state < SIIS_SLOT_RUNNING) 1094 continue; 1095 if ((ch->toslots & (1 << i)) == 0) 1096 continue; 1097 callout_reset(&slot->timeout, 1098 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1099 (timeout_t*)siis_timeout, slot); 1100 } 1101 } 1102 1103 /* Locked by callout mechanism. */ 1104 static void 1105 siis_timeout(struct siis_slot *slot) 1106 { 1107 device_t dev = slot->dev; 1108 struct siis_channel *ch = device_get_softc(dev); 1109 1110 mtx_assert(&ch->mtx, MA_OWNED); 1111 /* Check for stale timeout. */ 1112 if (slot->state < SIIS_SLOT_RUNNING) 1113 return; 1114 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1115 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1116 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1117 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1118 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1119 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1120 1121 if (ch->toslots == 0) 1122 xpt_freeze_simq(ch->sim, 1); 1123 ch->toslots |= (1 << slot->slot); 1124 if ((ch->rslots & ~ch->toslots) == 0) 1125 siis_process_timeout(dev); 1126 else 1127 device_printf(dev, " ... waiting for slots %08x\n", 1128 ch->rslots & ~ch->toslots); 1129 } 1130 1131 /* Must be called with channel locked. */ 1132 static void 1133 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1134 { 1135 device_t dev = slot->dev; 1136 struct siis_channel *ch = device_get_softc(dev); 1137 union ccb *ccb = slot->ccb; 1138 1139 mtx_assert(&ch->mtx, MA_OWNED); 1140 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1141 BUS_DMASYNC_POSTWRITE); 1142 /* Read result registers to the result struct 1143 * May be incorrect if several commands finished same time, 1144 * so read only when sure or have to. 1145 */ 1146 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1147 struct ata_res *res = &ccb->ataio.res; 1148 if ((et == SIIS_ERR_TFE) || 1149 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1150 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1151 1152 res->status = ATA_INB(ch->r_mem, offs + 2); 1153 res->error = ATA_INB(ch->r_mem, offs + 3); 1154 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1155 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1156 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1157 res->device = ATA_INB(ch->r_mem, offs + 7); 1158 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1159 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1160 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1161 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1162 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1163 } else 1164 bzero(res, sizeof(*res)); 1165 } 1166 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1167 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1168 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1169 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1170 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1171 } 1172 /* Set proper result status. */ 1173 if (et != SIIS_ERR_NONE || ch->recovery) { 1174 ch->eslots |= (1 << slot->slot); 1175 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1176 } 1177 /* In case of error, freeze device for proper recovery. */ 1178 if (et != SIIS_ERR_NONE && 1179 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1180 xpt_freeze_devq(ccb->ccb_h.path, 1); 1181 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1182 } 1183 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1184 switch (et) { 1185 case SIIS_ERR_NONE: 1186 ccb->ccb_h.status |= CAM_REQ_CMP; 1187 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1188 ccb->csio.scsi_status = SCSI_STATUS_OK; 1189 break; 1190 case SIIS_ERR_INVALID: 1191 ch->fatalerr = 1; 1192 ccb->ccb_h.status |= CAM_REQ_INVALID; 1193 break; 1194 case SIIS_ERR_INNOCENT: 1195 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1196 break; 1197 case SIIS_ERR_TFE: 1198 case SIIS_ERR_NCQ: 1199 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1200 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1201 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1202 } else { 1203 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1204 } 1205 break; 1206 case SIIS_ERR_SATA: 1207 ch->fatalerr = 1; 1208 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1209 break; 1210 case SIIS_ERR_TIMEOUT: 1211 ch->fatalerr = 1; 1212 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1213 break; 1214 default: 1215 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1216 } 1217 /* Free slot. */ 1218 ch->oslots &= ~(1 << slot->slot); 1219 ch->rslots &= ~(1 << slot->slot); 1220 ch->aslots &= ~(1 << slot->slot); 1221 if (et != SIIS_ERR_TIMEOUT) { 1222 if (ch->toslots == (1 << slot->slot)) 1223 xpt_release_simq(ch->sim, TRUE); 1224 ch->toslots &= ~(1 << slot->slot); 1225 } 1226 slot->state = SIIS_SLOT_EMPTY; 1227 slot->ccb = NULL; 1228 /* Update channel stats. */ 1229 ch->numrslots--; 1230 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1231 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1232 ch->numtslots[ccb->ccb_h.target_id]--; 1233 } 1234 /* If it was our READ LOG command - process it. */ 1235 if (ch->readlog) { 1236 siis_process_read_log(dev, ccb); 1237 /* If it was NCQ command error, put result on hold. */ 1238 } else if (et == SIIS_ERR_NCQ) { 1239 ch->hold[slot->slot] = ccb; 1240 ch->numhslots++; 1241 } else 1242 xpt_done(ccb); 1243 /* Unfreeze frozen command. */ 1244 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1245 union ccb *fccb = ch->frozen; 1246 ch->frozen = NULL; 1247 siis_begin_transaction(dev, fccb); 1248 xpt_release_simq(ch->sim, TRUE); 1249 } 1250 /* If we have no other active commands, ... */ 1251 if (ch->rslots == 0) { 1252 /* if there were timeouts or fatal error - reset port. */ 1253 if (ch->toslots != 0 || ch->fatalerr) { 1254 siis_reset(dev); 1255 } else { 1256 /* if we have slots in error, we can reinit port. */ 1257 if (ch->eslots != 0) 1258 siis_portinit(dev); 1259 /* if there commands on hold, we can do READ LOG. */ 1260 if (!ch->readlog && ch->numhslots) 1261 siis_issue_read_log(dev); 1262 } 1263 /* If all the reset of commands are in timeout - abort them. */ 1264 } else if ((ch->rslots & ~ch->toslots) == 0 && 1265 et != SIIS_ERR_TIMEOUT) 1266 siis_rearm_timeout(dev); 1267 } 1268 1269 static void 1270 siis_issue_read_log(device_t dev) 1271 { 1272 struct siis_channel *ch = device_get_softc(dev); 1273 union ccb *ccb; 1274 struct ccb_ataio *ataio; 1275 int i; 1276 1277 /* Find some holden command. */ 1278 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1279 if (ch->hold[i]) 1280 break; 1281 } 1282 if (i == SIIS_MAX_SLOTS) 1283 return; 1284 ch->readlog = 1; 1285 ccb = xpt_alloc_ccb_nowait(); 1286 if (ccb == NULL) { 1287 device_printf(dev, "Unable allocate READ LOG command"); 1288 return; /* XXX */ 1289 } 1290 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1291 ccb->ccb_h.func_code = XPT_ATA_IO; 1292 ccb->ccb_h.flags = CAM_DIR_IN; 1293 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1294 ataio = &ccb->ataio; 1295 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1296 if (ataio->data_ptr == NULL) { 1297 device_printf(dev, "Unable allocate memory for READ LOG command"); 1298 return; /* XXX */ 1299 } 1300 ataio->dxfer_len = 512; 1301 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1302 ataio->cmd.flags = CAM_ATAIO_48BIT; 1303 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1304 ataio->cmd.sector_count = 1; 1305 ataio->cmd.sector_count_exp = 0; 1306 ataio->cmd.lba_low = 0x10; 1307 ataio->cmd.lba_mid = 0; 1308 ataio->cmd.lba_mid_exp = 0; 1309 siis_begin_transaction(dev, ccb); 1310 } 1311 1312 static void 1313 siis_process_read_log(device_t dev, union ccb *ccb) 1314 { 1315 struct siis_channel *ch = device_get_softc(dev); 1316 uint8_t *data; 1317 struct ata_res *res; 1318 int i; 1319 1320 ch->readlog = 0; 1321 data = ccb->ataio.data_ptr; 1322 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1323 (data[0] & 0x80) == 0) { 1324 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1325 if (!ch->hold[i]) 1326 continue; 1327 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1328 continue; 1329 if ((data[0] & 0x1F) == i) { 1330 res = &ch->hold[i]->ataio.res; 1331 res->status = data[2]; 1332 res->error = data[3]; 1333 res->lba_low = data[4]; 1334 res->lba_mid = data[5]; 1335 res->lba_high = data[6]; 1336 res->device = data[7]; 1337 res->lba_low_exp = data[8]; 1338 res->lba_mid_exp = data[9]; 1339 res->lba_high_exp = data[10]; 1340 res->sector_count = data[12]; 1341 res->sector_count_exp = data[13]; 1342 } else { 1343 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1344 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1345 } 1346 xpt_done(ch->hold[i]); 1347 ch->hold[i] = NULL; 1348 ch->numhslots--; 1349 } 1350 } else { 1351 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1352 device_printf(dev, "Error while READ LOG EXT\n"); 1353 else if ((data[0] & 0x80) == 0) { 1354 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1355 } 1356 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1357 if (!ch->hold[i]) 1358 continue; 1359 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1360 continue; 1361 xpt_done(ch->hold[i]); 1362 ch->hold[i] = NULL; 1363 ch->numhslots--; 1364 } 1365 } 1366 free(ccb->ataio.data_ptr, M_SIIS); 1367 xpt_free_ccb(ccb); 1368 } 1369 1370 static void 1371 siis_portinit(device_t dev) 1372 { 1373 struct siis_channel *ch = device_get_softc(dev); 1374 int i; 1375 1376 ch->eslots = 0; 1377 ch->recovery = 0; 1378 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1379 for (i = 0; i < 16; i++) { 1380 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1381 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1382 } 1383 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1384 siis_wait_ready(dev, 1000); 1385 } 1386 1387 static int 1388 siis_devreset(device_t dev) 1389 { 1390 struct siis_channel *ch = device_get_softc(dev); 1391 int timeout = 0; 1392 uint32_t val; 1393 1394 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1395 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1396 SIIS_P_CTL_DEV_RESET) != 0) { 1397 DELAY(1000); 1398 if (timeout++ > 100) { 1399 device_printf(dev, "device reset stuck (timeout %dms) " 1400 "status = %08x\n", timeout, val); 1401 return (EBUSY); 1402 } 1403 } 1404 return (0); 1405 } 1406 1407 static int 1408 siis_wait_ready(device_t dev, int t) 1409 { 1410 struct siis_channel *ch = device_get_softc(dev); 1411 int timeout = 0; 1412 uint32_t val; 1413 1414 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1415 SIIS_P_CTL_READY) == 0) { 1416 DELAY(1000); 1417 if (timeout++ > t) { 1418 device_printf(dev, "port is not ready (timeout %dms) " 1419 "status = %08x\n", t, val); 1420 return (EBUSY); 1421 } 1422 } 1423 return (0); 1424 } 1425 1426 static void 1427 siis_reset(device_t dev) 1428 { 1429 struct siis_channel *ch = device_get_softc(dev); 1430 int i, retry = 0, sata_rev; 1431 uint32_t val; 1432 1433 xpt_freeze_simq(ch->sim, 1); 1434 if (bootverbose) 1435 device_printf(dev, "SIIS reset...\n"); 1436 if (!ch->readlog && !ch->recovery) 1437 xpt_freeze_simq(ch->sim, ch->numrslots); 1438 /* Requeue frozen command. */ 1439 if (ch->frozen) { 1440 union ccb *fccb = ch->frozen; 1441 ch->frozen = NULL; 1442 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1443 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1444 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1445 xpt_freeze_devq(fccb->ccb_h.path, 1); 1446 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1447 } 1448 xpt_done(fccb); 1449 } 1450 /* Requeue all running commands. */ 1451 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1452 /* Do we have a running request on slot? */ 1453 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1454 continue; 1455 /* XXX; Commands in loading state. */ 1456 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1457 } 1458 /* Finish all holden commands as-is. */ 1459 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1460 if (!ch->hold[i]) 1461 continue; 1462 xpt_done(ch->hold[i]); 1463 ch->hold[i] = NULL; 1464 ch->numhslots--; 1465 } 1466 if (ch->toslots != 0) 1467 xpt_release_simq(ch->sim, TRUE); 1468 ch->eslots = 0; 1469 ch->recovery = 0; 1470 ch->toslots = 0; 1471 ch->fatalerr = 0; 1472 /* Disable port interrupts */ 1473 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1474 /* Set speed limit. */ 1475 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1476 if (sata_rev == 1) 1477 val = ATA_SC_SPD_SPEED_GEN1; 1478 else if (sata_rev == 2) 1479 val = ATA_SC_SPD_SPEED_GEN2; 1480 else if (sata_rev == 3) 1481 val = ATA_SC_SPD_SPEED_GEN3; 1482 else 1483 val = 0; 1484 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1485 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1486 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1487 retry: 1488 siis_devreset(dev); 1489 /* Reset and reconnect PHY, */ 1490 if (!siis_sata_connect(ch)) { 1491 ch->devices = 0; 1492 /* Enable port interrupts */ 1493 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1494 if (bootverbose) 1495 device_printf(dev, 1496 "SIIS reset done: phy reset found no device\n"); 1497 /* Tell the XPT about the event */ 1498 xpt_async(AC_BUS_RESET, ch->path, NULL); 1499 xpt_release_simq(ch->sim, TRUE); 1500 return; 1501 } 1502 /* Wait for clearing busy status. */ 1503 if (siis_wait_ready(dev, 10000)) { 1504 device_printf(dev, "device ready timeout\n"); 1505 if (!retry) { 1506 device_printf(dev, "trying full port reset ...\n"); 1507 /* Get port to the reset state. */ 1508 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1509 DELAY(10000); 1510 /* Get port out of reset state. */ 1511 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1512 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1513 if (ch->pm_present) 1514 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1515 else 1516 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1517 siis_wait_ready(dev, 5000); 1518 retry = 1; 1519 goto retry; 1520 } 1521 } 1522 ch->devices = 1; 1523 /* Enable port interrupts */ 1524 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1525 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1526 if (bootverbose) 1527 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1528 /* Tell the XPT about the event */ 1529 xpt_async(AC_BUS_RESET, ch->path, NULL); 1530 xpt_release_simq(ch->sim, TRUE); 1531 } 1532 1533 static int 1534 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1535 { 1536 struct siis_channel *ch = device_get_softc(dev); 1537 u_int8_t *fis = &ctp->fis[0]; 1538 1539 bzero(fis, 24); 1540 fis[0] = 0x27; /* host to device */ 1541 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1542 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1543 fis[1] |= 0x80; 1544 fis[2] = ATA_PACKET_CMD; 1545 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1546 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1547 fis[3] = ATA_F_DMA; 1548 else { 1549 fis[5] = ccb->csio.dxfer_len; 1550 fis[6] = ccb->csio.dxfer_len >> 8; 1551 } 1552 fis[7] = ATA_D_LBA; 1553 fis[15] = ATA_A_4BIT; 1554 bzero(ctp->u.atapi.ccb, 16); 1555 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1556 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1557 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1558 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1559 fis[1] |= 0x80; 1560 fis[2] = ccb->ataio.cmd.command; 1561 fis[3] = ccb->ataio.cmd.features; 1562 fis[4] = ccb->ataio.cmd.lba_low; 1563 fis[5] = ccb->ataio.cmd.lba_mid; 1564 fis[6] = ccb->ataio.cmd.lba_high; 1565 fis[7] = ccb->ataio.cmd.device; 1566 fis[8] = ccb->ataio.cmd.lba_low_exp; 1567 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1568 fis[10] = ccb->ataio.cmd.lba_high_exp; 1569 fis[11] = ccb->ataio.cmd.features_exp; 1570 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1571 fis[12] = tag << 3; 1572 fis[13] = 0; 1573 } else { 1574 fis[12] = ccb->ataio.cmd.sector_count; 1575 fis[13] = ccb->ataio.cmd.sector_count_exp; 1576 } 1577 fis[15] = ATA_A_4BIT; 1578 } else { 1579 /* Soft reset. */ 1580 } 1581 return (20); 1582 } 1583 1584 static int 1585 siis_sata_connect(struct siis_channel *ch) 1586 { 1587 u_int32_t status; 1588 int timeout; 1589 1590 /* Wait up to 100ms for "connect well" */ 1591 for (timeout = 0; timeout < 100 ; timeout++) { 1592 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1593 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1594 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1595 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1596 break; 1597 DELAY(1000); 1598 } 1599 if (timeout >= 100) { 1600 if (bootverbose) { 1601 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1602 status); 1603 } 1604 return (0); 1605 } 1606 if (bootverbose) { 1607 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1608 timeout, status); 1609 } 1610 /* Clear SATA error register */ 1611 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1612 return (1); 1613 } 1614 1615 static int 1616 siis_check_ids(device_t dev, union ccb *ccb) 1617 { 1618 1619 if (ccb->ccb_h.target_id > 15) { 1620 ccb->ccb_h.status = CAM_TID_INVALID; 1621 xpt_done(ccb); 1622 return (-1); 1623 } 1624 if (ccb->ccb_h.target_lun != 0) { 1625 ccb->ccb_h.status = CAM_LUN_INVALID; 1626 xpt_done(ccb); 1627 return (-1); 1628 } 1629 return (0); 1630 } 1631 1632 static void 1633 siisaction(struct cam_sim *sim, union ccb *ccb) 1634 { 1635 device_t dev; 1636 struct siis_channel *ch; 1637 1638 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1639 ccb->ccb_h.func_code)); 1640 1641 ch = (struct siis_channel *)cam_sim_softc(sim); 1642 dev = ch->dev; 1643 mtx_assert(&ch->mtx, MA_OWNED); 1644 switch (ccb->ccb_h.func_code) { 1645 /* Common cases first */ 1646 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1647 case XPT_SCSI_IO: 1648 if (siis_check_ids(dev, ccb)) 1649 return; 1650 if (ch->devices == 0 || 1651 (ch->pm_present == 0 && 1652 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1653 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1654 break; 1655 } 1656 /* Check for command collision. */ 1657 if (siis_check_collision(dev, ccb)) { 1658 /* Freeze command. */ 1659 ch->frozen = ccb; 1660 /* We have only one frozen slot, so freeze simq also. */ 1661 xpt_freeze_simq(ch->sim, 1); 1662 return; 1663 } 1664 siis_begin_transaction(dev, ccb); 1665 return; 1666 case XPT_EN_LUN: /* Enable LUN as a target */ 1667 case XPT_TARGET_IO: /* Execute target I/O request */ 1668 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1669 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1670 case XPT_ABORT: /* Abort the specified CCB */ 1671 /* XXX Implement */ 1672 ccb->ccb_h.status = CAM_REQ_INVALID; 1673 break; 1674 case XPT_SET_TRAN_SETTINGS: 1675 { 1676 struct ccb_trans_settings *cts = &ccb->cts; 1677 struct siis_device *d; 1678 1679 if (siis_check_ids(dev, ccb)) 1680 return; 1681 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1682 d = &ch->curr[ccb->ccb_h.target_id]; 1683 else 1684 d = &ch->user[ccb->ccb_h.target_id]; 1685 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1686 d->revision = cts->xport_specific.sata.revision; 1687 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1688 d->mode = cts->xport_specific.sata.mode; 1689 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1690 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1691 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1692 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1693 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1694 ch->pm_present = cts->xport_specific.sata.pm_present; 1695 if (ch->pm_present) 1696 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1697 else 1698 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1699 } 1700 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1701 d->atapi = cts->xport_specific.sata.atapi; 1702 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1703 d->caps = cts->xport_specific.sata.caps; 1704 ccb->ccb_h.status = CAM_REQ_CMP; 1705 break; 1706 } 1707 case XPT_GET_TRAN_SETTINGS: 1708 /* Get default/user set transfer settings for the target */ 1709 { 1710 struct ccb_trans_settings *cts = &ccb->cts; 1711 struct siis_device *d; 1712 uint32_t status; 1713 1714 if (siis_check_ids(dev, ccb)) 1715 return; 1716 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1717 d = &ch->curr[ccb->ccb_h.target_id]; 1718 else 1719 d = &ch->user[ccb->ccb_h.target_id]; 1720 cts->protocol = PROTO_ATA; 1721 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1722 cts->transport = XPORT_SATA; 1723 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1724 cts->proto_specific.valid = 0; 1725 cts->xport_specific.sata.valid = 0; 1726 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1727 (ccb->ccb_h.target_id == 15 || 1728 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1729 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1730 if (status & 0x0f0) { 1731 cts->xport_specific.sata.revision = 1732 (status & 0x0f0) >> 4; 1733 cts->xport_specific.sata.valid |= 1734 CTS_SATA_VALID_REVISION; 1735 } 1736 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1737 if (ch->pm_level) 1738 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1739 cts->xport_specific.sata.caps &= 1740 ch->user[ccb->ccb_h.target_id].caps; 1741 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1742 } else { 1743 cts->xport_specific.sata.revision = d->revision; 1744 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1745 cts->xport_specific.sata.caps = d->caps; 1746 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1747 } 1748 cts->xport_specific.sata.mode = d->mode; 1749 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1750 cts->xport_specific.sata.bytecount = d->bytecount; 1751 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1752 cts->xport_specific.sata.pm_present = ch->pm_present; 1753 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1754 cts->xport_specific.sata.tags = d->tags; 1755 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1756 cts->xport_specific.sata.atapi = d->atapi; 1757 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1758 ccb->ccb_h.status = CAM_REQ_CMP; 1759 break; 1760 } 1761 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1762 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1763 siis_reset(dev); 1764 ccb->ccb_h.status = CAM_REQ_CMP; 1765 break; 1766 case XPT_TERM_IO: /* Terminate the I/O process */ 1767 /* XXX Implement */ 1768 ccb->ccb_h.status = CAM_REQ_INVALID; 1769 break; 1770 case XPT_PATH_INQ: /* Path routing inquiry */ 1771 { 1772 struct ccb_pathinq *cpi = &ccb->cpi; 1773 1774 cpi->version_num = 1; /* XXX??? */ 1775 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1776 cpi->hba_inquiry |= PI_SATAPM; 1777 cpi->target_sprt = 0; 1778 cpi->hba_misc = PIM_SEQSCAN; 1779 cpi->hba_eng_cnt = 0; 1780 cpi->max_target = 15; 1781 cpi->max_lun = 0; 1782 cpi->initiator_id = 0; 1783 cpi->bus_id = cam_sim_bus(sim); 1784 cpi->base_transfer_speed = 150000; 1785 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1786 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1787 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1788 cpi->unit_number = cam_sim_unit(sim); 1789 cpi->transport = XPORT_SATA; 1790 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1791 cpi->protocol = PROTO_ATA; 1792 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1793 cpi->ccb_h.status = CAM_REQ_CMP; 1794 cpi->maxio = MAXPHYS; 1795 break; 1796 } 1797 default: 1798 ccb->ccb_h.status = CAM_REQ_INVALID; 1799 break; 1800 } 1801 xpt_done(ccb); 1802 } 1803 1804 static void 1805 siispoll(struct cam_sim *sim) 1806 { 1807 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1808 1809 siis_ch_intr(ch->dev); 1810 } 1811