1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_xpt_periph.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_suspend(device_t dev); 64 static int siis_ch_resume(device_t dev); 65 static void siis_ch_intr_locked(void *data); 66 static void siis_ch_intr(void *data); 67 static void siis_begin_transaction(device_t dev, union ccb *ccb); 68 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 69 static void siis_execute_transaction(struct siis_slot *slot); 70 static void siis_timeout(struct siis_slot *slot); 71 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 72 static int siis_setup_fis(struct siis_cmd *ctp, union ccb *ccb, int tag); 73 static void siis_dmainit(device_t dev); 74 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 75 static void siis_dmafini(device_t dev); 76 static void siis_slotsalloc(device_t dev); 77 static void siis_slotsfree(device_t dev); 78 static void siis_reset(device_t dev); 79 static void siis_portinit(device_t dev); 80 static int siis_wait_ready(device_t dev, int t); 81 82 static int siis_sata_connect(struct siis_channel *ch); 83 static int siis_sata_phy_reset(device_t dev); 84 85 static void siis_issue_read_log(device_t dev); 86 static void siis_process_read_log(device_t dev, union ccb *ccb); 87 88 static void siisaction(struct cam_sim *sim, union ccb *ccb); 89 static void siispoll(struct cam_sim *sim); 90 91 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 92 93 static int 94 siis_probe(device_t dev) 95 { 96 uint32_t devid = pci_get_devid(dev); 97 98 if (devid == SIIS_SII3124) { 99 device_set_desc_copy(dev, "SiI3124 SATA2 controller"); 100 } else if (devid == SIIS_SII3132 || 101 devid == SIIS_SII3132_1 || 102 devid == SIIS_SII3132_2) { 103 device_set_desc_copy(dev, "SiI3132 SATA2 controller"); 104 } else if (devid == SIIS_SII3531) { 105 device_set_desc_copy(dev, "SiI3531 SATA2 controller"); 106 } else { 107 return (ENXIO); 108 } 109 110 return (BUS_PROBE_VENDOR); 111 } 112 113 static int 114 siis_attach(device_t dev) 115 { 116 struct siis_controller *ctlr = device_get_softc(dev); 117 uint32_t devid = pci_get_devid(dev); 118 device_t child; 119 int error, unit; 120 121 ctlr->dev = dev; 122 /* Global memory */ 123 ctlr->r_grid = PCIR_BAR(0); 124 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 125 &ctlr->r_grid, RF_ACTIVE))) 126 return (ENXIO); 127 /* Channels memory */ 128 ctlr->r_rid = PCIR_BAR(2); 129 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 130 &ctlr->r_rid, RF_ACTIVE))) 131 return (ENXIO); 132 /* Setup our own memory management for channels. */ 133 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 134 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 135 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 136 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 137 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 138 return (error); 139 } 140 if ((error = rman_manage_region(&ctlr->sc_iomem, 141 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 142 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 143 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 144 rman_fini(&ctlr->sc_iomem); 145 return (error); 146 } 147 /* Reset controller */ 148 siis_resume(dev); 149 /* Number of HW channels */ 150 ctlr->channels = (devid == SIIS_SII3124) ? 4 : 151 (devid == SIIS_SII3531 ? 1 : 2); 152 /* Setup interrupts. */ 153 if (siis_setup_interrupt(dev)) { 154 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 155 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 156 rman_fini(&ctlr->sc_iomem); 157 return ENXIO; 158 } 159 /* Attach all channels on this controller */ 160 for (unit = 0; unit < ctlr->channels; unit++) { 161 child = device_add_child(dev, "siisch", -1); 162 if (child == NULL) 163 device_printf(dev, "failed to add channel device\n"); 164 else 165 device_set_ivars(child, (void *)(intptr_t)unit); 166 } 167 bus_generic_attach(dev); 168 return 0; 169 } 170 171 static int 172 siis_detach(device_t dev) 173 { 174 struct siis_controller *ctlr = device_get_softc(dev); 175 device_t *children; 176 int nchildren, i; 177 178 /* Detach & delete all children */ 179 if (!device_get_children(dev, &children, &nchildren)) { 180 for (i = 0; i < nchildren; i++) 181 device_delete_child(dev, children[i]); 182 free(children, M_TEMP); 183 } 184 /* Free interrupts. */ 185 if (ctlr->irq.r_irq) { 186 bus_teardown_intr(dev, ctlr->irq.r_irq, 187 ctlr->irq.handle); 188 bus_release_resource(dev, SYS_RES_IRQ, 189 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 190 } 191 pci_release_msi(dev); 192 /* Free memory. */ 193 rman_fini(&ctlr->sc_iomem); 194 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 195 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 196 return (0); 197 } 198 199 static int 200 siis_suspend(device_t dev) 201 { 202 struct siis_controller *ctlr = device_get_softc(dev); 203 204 bus_generic_suspend(dev); 205 /* Put controller into reset state. */ 206 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 207 return 0; 208 } 209 210 static int 211 siis_resume(device_t dev) 212 { 213 struct siis_controller *ctlr = device_get_softc(dev); 214 215 /* Put controller into reset state. */ 216 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 217 DELAY(10000); 218 /* Get controller out of reset state and enable port interrupts. */ 219 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 0x0000000f); 220 return (bus_generic_resume(dev)); 221 } 222 223 static int 224 siis_setup_interrupt(device_t dev) 225 { 226 struct siis_controller *ctlr = device_get_softc(dev); 227 int msi = 0; 228 229 /* Process hints. */ 230 resource_int_value(device_get_name(dev), 231 device_get_unit(dev), "msi", &msi); 232 if (msi < 0) 233 msi = 0; 234 else if (msi > 0) 235 msi = min(1, pci_msi_count(dev)); 236 /* Allocate MSI if needed/present. */ 237 if (msi && pci_alloc_msi(dev, &msi) != 0) 238 msi = 0; 239 /* Allocate all IRQs. */ 240 ctlr->irq.r_irq_rid = msi ? 1 : 0; 241 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 242 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 243 device_printf(dev, "unable to map interrupt\n"); 244 return ENXIO; 245 } 246 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 247 siis_intr, ctlr, &ctlr->irq.handle))) { 248 /* SOS XXX release r_irq */ 249 device_printf(dev, "unable to setup interrupt\n"); 250 return ENXIO; 251 } 252 return (0); 253 } 254 255 /* 256 * Common case interrupt handler. 257 */ 258 static void 259 siis_intr(void *data) 260 { 261 struct siis_controller *ctlr = (struct siis_controller *)data; 262 u_int32_t is; 263 void *arg; 264 int unit; 265 266 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 267 for (unit = 0; unit < ctlr->channels; unit++) { 268 if ((is & SIIS_IS_PORT(unit)) != 0 && 269 (arg = ctlr->interrupt[unit].argument)) { 270 ctlr->interrupt[unit].function(arg); 271 } 272 } 273 } 274 275 static struct resource * 276 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 277 u_long start, u_long end, u_long count, u_int flags) 278 { 279 struct siis_controller *ctlr = device_get_softc(dev); 280 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 281 struct resource *res = NULL; 282 int offset = unit << 13; 283 long st; 284 285 switch (type) { 286 case SYS_RES_MEMORY: 287 st = rman_get_start(ctlr->r_mem); 288 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 289 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 290 if (res) { 291 bus_space_handle_t bsh; 292 bus_space_tag_t bst; 293 bsh = rman_get_bushandle(ctlr->r_mem); 294 bst = rman_get_bustag(ctlr->r_mem); 295 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 296 rman_set_bushandle(res, bsh); 297 rman_set_bustag(res, bst); 298 } 299 break; 300 case SYS_RES_IRQ: 301 if (*rid == ATA_IRQ_RID) 302 res = ctlr->irq.r_irq; 303 break; 304 } 305 return (res); 306 } 307 308 static int 309 siis_release_resource(device_t dev, device_t child, int type, int rid, 310 struct resource *r) 311 { 312 313 switch (type) { 314 case SYS_RES_MEMORY: 315 rman_release_resource(r); 316 return (0); 317 case SYS_RES_IRQ: 318 if (rid != ATA_IRQ_RID) 319 return ENOENT; 320 return (0); 321 } 322 return (EINVAL); 323 } 324 325 static int 326 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 327 int flags, driver_filter_t *filter, driver_intr_t *function, 328 void *argument, void **cookiep) 329 { 330 struct siis_controller *ctlr = device_get_softc(dev); 331 int unit = (intptr_t)device_get_ivars(child); 332 333 if (filter != NULL) { 334 printf("siis.c: we cannot use a filter here\n"); 335 return (EINVAL); 336 } 337 ctlr->interrupt[unit].function = function; 338 ctlr->interrupt[unit].argument = argument; 339 return (0); 340 } 341 342 static int 343 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 344 void *cookie) 345 { 346 struct siis_controller *ctlr = device_get_softc(dev); 347 int unit = (intptr_t)device_get_ivars(child); 348 349 ctlr->interrupt[unit].function = NULL; 350 ctlr->interrupt[unit].argument = NULL; 351 return (0); 352 } 353 354 static int 355 siis_print_child(device_t dev, device_t child) 356 { 357 int retval; 358 359 retval = bus_print_child_header(dev, child); 360 retval += printf(" at channel %d", 361 (int)(intptr_t)device_get_ivars(child)); 362 retval += bus_print_child_footer(dev, child); 363 364 return (retval); 365 } 366 367 devclass_t siis_devclass; 368 static device_method_t siis_methods[] = { 369 DEVMETHOD(device_probe, siis_probe), 370 DEVMETHOD(device_attach, siis_attach), 371 DEVMETHOD(device_detach, siis_detach), 372 DEVMETHOD(device_suspend, siis_suspend), 373 DEVMETHOD(device_resume, siis_resume), 374 DEVMETHOD(bus_print_child, siis_print_child), 375 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 376 DEVMETHOD(bus_release_resource, siis_release_resource), 377 DEVMETHOD(bus_setup_intr, siis_setup_intr), 378 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 379 { 0, 0 } 380 }; 381 static driver_t siis_driver = { 382 "siis", 383 siis_methods, 384 sizeof(struct siis_controller) 385 }; 386 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 387 MODULE_VERSION(siis, 1); 388 MODULE_DEPEND(siis, cam, 1, 1, 1); 389 390 static int 391 siis_ch_probe(device_t dev) 392 { 393 394 device_set_desc_copy(dev, "SIIS channel"); 395 return (0); 396 } 397 398 static int 399 siis_ch_attach(device_t dev) 400 { 401 struct siis_channel *ch = device_get_softc(dev); 402 struct cam_devq *devq; 403 int rid, error; 404 405 ch->dev = dev; 406 ch->unit = (intptr_t)device_get_ivars(dev); 407 resource_int_value(device_get_name(dev), 408 device_get_unit(dev), "pm_level", &ch->pm_level); 409 resource_int_value(device_get_name(dev), 410 device_get_unit(dev), "sata_rev", &ch->sata_rev); 411 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 412 rid = ch->unit; 413 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 414 &rid, RF_ACTIVE))) 415 return (ENXIO); 416 siis_dmainit(dev); 417 siis_slotsalloc(dev); 418 siis_ch_resume(dev); 419 mtx_lock(&ch->mtx); 420 rid = ATA_IRQ_RID; 421 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 422 &rid, RF_SHAREABLE | RF_ACTIVE))) { 423 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 424 device_printf(dev, "Unable to map interrupt\n"); 425 return (ENXIO); 426 } 427 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 428 siis_ch_intr_locked, dev, &ch->ih))) { 429 device_printf(dev, "Unable to setup interrupt\n"); 430 error = ENXIO; 431 goto err1; 432 } 433 /* Create the device queue for our SIM. */ 434 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 435 if (devq == NULL) { 436 device_printf(dev, "Unable to allocate simq\n"); 437 error = ENOMEM; 438 goto err1; 439 } 440 /* Construct SIM entry */ 441 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 442 device_get_unit(dev), &ch->mtx, SIIS_MAX_SLOTS, 0, devq); 443 if (ch->sim == NULL) { 444 device_printf(dev, "unable to allocate sim\n"); 445 error = ENOMEM; 446 goto err2; 447 } 448 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 449 device_printf(dev, "unable to register xpt bus\n"); 450 error = ENXIO; 451 goto err2; 452 } 453 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 454 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 455 device_printf(dev, "unable to create path\n"); 456 error = ENXIO; 457 goto err3; 458 } 459 mtx_unlock(&ch->mtx); 460 return (0); 461 462 err3: 463 xpt_bus_deregister(cam_sim_path(ch->sim)); 464 err2: 465 cam_sim_free(ch->sim, /*free_devq*/TRUE); 466 err1: 467 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 468 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 469 mtx_unlock(&ch->mtx); 470 return (error); 471 } 472 473 static int 474 siis_ch_detach(device_t dev) 475 { 476 struct siis_channel *ch = device_get_softc(dev); 477 478 mtx_lock(&ch->mtx); 479 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 480 xpt_free_path(ch->path); 481 xpt_bus_deregister(cam_sim_path(ch->sim)); 482 cam_sim_free(ch->sim, /*free_devq*/TRUE); 483 mtx_unlock(&ch->mtx); 484 485 bus_teardown_intr(dev, ch->r_irq, ch->ih); 486 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 487 488 siis_ch_suspend(dev); 489 siis_slotsfree(dev); 490 siis_dmafini(dev); 491 492 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 493 mtx_destroy(&ch->mtx); 494 return (0); 495 } 496 497 static int 498 siis_ch_suspend(device_t dev) 499 { 500 struct siis_channel *ch = device_get_softc(dev); 501 502 /* Put port into reset state. */ 503 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 504 return (0); 505 } 506 507 static int 508 siis_ch_resume(device_t dev) 509 { 510 struct siis_channel *ch = device_get_softc(dev); 511 512 /* Get port out of reset state. */ 513 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 514 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 515 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 516 /* Enable port interrupts */ 517 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 518 return (0); 519 } 520 521 devclass_t siisch_devclass; 522 static device_method_t siisch_methods[] = { 523 DEVMETHOD(device_probe, siis_ch_probe), 524 DEVMETHOD(device_attach, siis_ch_attach), 525 DEVMETHOD(device_detach, siis_ch_detach), 526 DEVMETHOD(device_suspend, siis_ch_suspend), 527 DEVMETHOD(device_resume, siis_ch_resume), 528 { 0, 0 } 529 }; 530 static driver_t siisch_driver = { 531 "siisch", 532 siisch_methods, 533 sizeof(struct siis_channel) 534 }; 535 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 536 537 struct siis_dc_cb_args { 538 bus_addr_t maddr; 539 int error; 540 }; 541 542 static void 543 siis_dmainit(device_t dev) 544 { 545 struct siis_channel *ch = device_get_softc(dev); 546 struct siis_dc_cb_args dcba; 547 548 /* Command area. */ 549 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 550 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 551 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 552 0, NULL, NULL, &ch->dma.work_tag)) 553 goto error; 554 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 555 &ch->dma.work_map)) 556 goto error; 557 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 558 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 559 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 560 goto error; 561 } 562 ch->dma.work_bus = dcba.maddr; 563 /* Data area. */ 564 if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 565 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 566 NULL, NULL, 567 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 568 SIIS_SG_ENTRIES, 0xFFFFFFFF, 569 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 570 goto error; 571 } 572 return; 573 574 error: 575 device_printf(dev, "WARNING - DMA initialization failed\n"); 576 siis_dmafini(dev); 577 } 578 579 static void 580 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 581 { 582 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 583 584 if (!(dcba->error = error)) 585 dcba->maddr = segs[0].ds_addr; 586 } 587 588 static void 589 siis_dmafini(device_t dev) 590 { 591 struct siis_channel *ch = device_get_softc(dev); 592 593 if (ch->dma.data_tag) { 594 bus_dma_tag_destroy(ch->dma.data_tag); 595 ch->dma.data_tag = NULL; 596 } 597 if (ch->dma.work_bus) { 598 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 599 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 600 ch->dma.work_bus = 0; 601 ch->dma.work_map = NULL; 602 ch->dma.work = NULL; 603 } 604 if (ch->dma.work_tag) { 605 bus_dma_tag_destroy(ch->dma.work_tag); 606 ch->dma.work_tag = NULL; 607 } 608 } 609 610 static void 611 siis_slotsalloc(device_t dev) 612 { 613 struct siis_channel *ch = device_get_softc(dev); 614 int i; 615 616 /* Alloc and setup command/dma slots */ 617 bzero(ch->slot, sizeof(ch->slot)); 618 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 619 struct siis_slot *slot = &ch->slot[i]; 620 621 slot->dev = dev; 622 slot->slot = i; 623 slot->state = SIIS_SLOT_EMPTY; 624 slot->ccb = NULL; 625 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 626 627 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 628 device_printf(ch->dev, "FAILURE - create data_map\n"); 629 } 630 } 631 632 static void 633 siis_slotsfree(device_t dev) 634 { 635 struct siis_channel *ch = device_get_softc(dev); 636 int i; 637 638 /* Free all dma slots */ 639 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 640 struct siis_slot *slot = &ch->slot[i]; 641 642 if (slot->dma.data_map) { 643 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 644 slot->dma.data_map = NULL; 645 } 646 } 647 } 648 649 static void 650 siis_notify_events(device_t dev) 651 { 652 struct siis_channel *ch = device_get_softc(dev); 653 struct cam_path *dpath; 654 u_int32_t status; 655 int i; 656 657 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 658 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 659 if (bootverbose) 660 device_printf(dev, "SNTF 0x%04x\n", status); 661 for (i = 0; i < 16; i++) { 662 if ((status & (1 << i)) == 0) 663 continue; 664 if (xpt_create_path(&dpath, NULL, 665 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 666 xpt_async(AC_SCSI_AEN, dpath, NULL); 667 xpt_free_path(dpath); 668 } 669 } 670 671 } 672 673 static void 674 siis_phy_check_events(device_t dev) 675 { 676 struct siis_channel *ch = device_get_softc(dev); 677 678 /* If we have a connection event, deal with it */ 679 if (ch->pm_level == 0) { 680 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 681 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 682 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 683 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 684 if (bootverbose) 685 device_printf(dev, "CONNECT requested\n"); 686 siis_reset(dev); 687 } else { 688 if (bootverbose) 689 device_printf(dev, "DISCONNECT requested\n"); 690 ch->devices = 0; 691 } 692 } 693 } 694 695 static void 696 siis_ch_intr_locked(void *data) 697 { 698 device_t dev = (device_t)data; 699 struct siis_channel *ch = device_get_softc(dev); 700 701 mtx_lock(&ch->mtx); 702 siis_ch_intr(data); 703 mtx_unlock(&ch->mtx); 704 } 705 706 static void 707 siis_ch_intr(void *data) 708 { 709 device_t dev = (device_t)data; 710 struct siis_channel *ch = device_get_softc(dev); 711 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 712 enum siis_err_type et; 713 int i, ccs, port, tslots; 714 715 mtx_assert(&ch->mtx, MA_OWNED); 716 /* Read command statuses. */ 717 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 718 ok = ch->rslots & ~sstatus; 719 /* Complete all successfull commands. */ 720 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 721 if ((ok >> i) & 1) 722 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 723 } 724 /* Do we have any other events? */ 725 if ((sstatus & SIIS_P_SS_ATTN) == 0) 726 return; 727 /* Read and clear interrupt statuses. */ 728 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 729 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 730 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 731 /* Process PHY events */ 732 if (istatus & SIIS_P_IX_PHYRDYCHG) 733 siis_phy_check_events(dev); 734 /* Process NOTIFY events */ 735 if (istatus & SIIS_P_IX_SDBN) 736 siis_notify_events(dev); 737 /* Process command errors */ 738 if (istatus & SIIS_P_IX_COMMERR) { 739 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 740 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 741 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 742 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 743 err = ch->rslots & sstatus; 744 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 745 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 746 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 747 748 if (!ch->readlog && !ch->recovery) { 749 xpt_freeze_simq(ch->sim, ch->numrslots); 750 ch->recovery = 1; 751 } 752 if (ch->frozen) { 753 union ccb *fccb = ch->frozen; 754 ch->frozen = NULL; 755 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 756 xpt_done(fccb); 757 } 758 if (estatus == SIIS_P_CMDERR_DEV || 759 estatus == SIIS_P_CMDERR_SDB || 760 estatus == SIIS_P_CMDERR_DATAFIS) { 761 tslots = ch->numtslots[port]; 762 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 763 /* XXX: reqests in loading state. */ 764 if (((ch->rslots >> i) & 1) == 0) 765 continue; 766 if (ch->slot[i].ccb->ccb_h.target_id != port) 767 continue; 768 if (tslots == 0) { 769 /* Untagged operation. */ 770 if (i == ccs) 771 et = SIIS_ERR_TFE; 772 else 773 et = SIIS_ERR_INNOCENT; 774 } else { 775 /* Tagged operation. */ 776 et = SIIS_ERR_NCQ; 777 } 778 siis_end_transaction(&ch->slot[i], et); 779 } 780 /* 781 * We can't reinit port if there are some other 782 * commands active, use resume to complete them. 783 */ 784 if (ch->rslots != 0) 785 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 786 } else { 787 if (estatus == SIIS_P_CMDERR_SENDFIS || 788 estatus == SIIS_P_CMDERR_INCSTATE || 789 estatus == SIIS_P_CMDERR_PPE || 790 estatus == SIIS_P_CMDERR_SERVICE) { 791 et = SIIS_ERR_SATA; 792 } else 793 et = SIIS_ERR_INVALID; 794 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 795 /* XXX: reqests in loading state. */ 796 if (((ch->rslots >> i) & 1) == 0) 797 continue; 798 siis_end_transaction(&ch->slot[i], et); 799 } 800 } 801 } 802 } 803 804 /* Must be called with channel locked. */ 805 static int 806 siis_check_collision(device_t dev, union ccb *ccb) 807 { 808 struct siis_channel *ch = device_get_softc(dev); 809 810 mtx_assert(&ch->mtx, MA_OWNED); 811 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 812 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 813 /* Atomic command while anything active. */ 814 if (ch->numrslots != 0) 815 return (1); 816 } 817 /* We have some atomic command running. */ 818 if (ch->aslots != 0) 819 return (1); 820 return (0); 821 } 822 823 /* Must be called with channel locked. */ 824 static void 825 siis_begin_transaction(device_t dev, union ccb *ccb) 826 { 827 struct siis_channel *ch = device_get_softc(dev); 828 struct siis_slot *slot; 829 int tag; 830 831 mtx_assert(&ch->mtx, MA_OWNED); 832 /* Choose empty slot. */ 833 tag = ch->lastslot; 834 do { 835 tag++; 836 if (tag >= SIIS_MAX_SLOTS) 837 tag = 0; 838 if (ch->slot[tag].state == SIIS_SLOT_EMPTY) 839 break; 840 } while (tag != ch->lastslot); 841 if (ch->slot[tag].state != SIIS_SLOT_EMPTY) 842 device_printf(ch->dev, "ALL SLOTS BUSY!\n"); 843 ch->lastslot = tag; 844 /* Occupy chosen slot. */ 845 slot = &ch->slot[tag]; 846 slot->ccb = ccb; 847 /* Update channel stats. */ 848 ch->numrslots++; 849 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 850 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 851 ch->numtslots[ccb->ccb_h.target_id]++; 852 } 853 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 854 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 855 ch->aslots |= (1 << slot->slot); 856 slot->dma.nsegs = 0; 857 /* If request moves data, setup and load SG list */ 858 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 859 void *buf; 860 bus_size_t size; 861 862 slot->state = SIIS_SLOT_LOADING; 863 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 864 buf = ccb->ataio.data_ptr; 865 size = ccb->ataio.dxfer_len; 866 } else { 867 buf = ccb->csio.data_ptr; 868 size = ccb->csio.dxfer_len; 869 } 870 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 871 buf, size, siis_dmasetprd, slot, 0); 872 } else 873 siis_execute_transaction(slot); 874 } 875 876 /* Locked by busdma engine. */ 877 static void 878 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 879 { 880 struct siis_slot *slot = arg; 881 struct siis_channel *ch = device_get_softc(slot->dev); 882 struct siis_cmd *ctp; 883 struct siis_dma_prd *prd; 884 int i; 885 886 mtx_assert(&ch->mtx, MA_OWNED); 887 if (error) { 888 device_printf(slot->dev, "DMA load error\n"); 889 if (!ch->readlog) 890 xpt_freeze_simq(ch->sim, 1); 891 siis_end_transaction(slot, SIIS_ERR_INVALID); 892 return; 893 } 894 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 895 /* Get a piece of the workspace for this request */ 896 ctp = (struct siis_cmd *) 897 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 898 /* Fill S/G table */ 899 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 900 prd = &ctp->u.ata.prd[0]; 901 else 902 prd = &ctp->u.atapi.prd[0]; 903 for (i = 0; i < nsegs; i++) { 904 prd[i].dba = htole64(segs[i].ds_addr); 905 prd[i].dbc = htole32(segs[i].ds_len); 906 prd[i].control = 0; 907 } 908 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 909 slot->dma.nsegs = nsegs; 910 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 911 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 912 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 913 siis_execute_transaction(slot); 914 } 915 916 /* Must be called with channel locked. */ 917 static void 918 siis_execute_transaction(struct siis_slot *slot) 919 { 920 device_t dev = slot->dev; 921 struct siis_channel *ch = device_get_softc(dev); 922 struct siis_cmd *ctp; 923 union ccb *ccb = slot->ccb; 924 u_int64_t prb_bus; 925 926 mtx_assert(&ch->mtx, MA_OWNED); 927 /* Get a piece of the workspace for this request */ 928 ctp = (struct siis_cmd *) 929 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 930 ctp->control = 0; 931 ctp->protocol_override = 0; 932 ctp->transfer_count = 0; 933 /* Special handling for Soft Reset command. */ 934 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 935 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 936 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 937 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 938 if (ccb->ccb_h.flags & CAM_DIR_IN) 939 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 940 if (ccb->ccb_h.flags & CAM_DIR_OUT) 941 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 942 } 943 /* Setup the FIS for this request */ 944 if (!siis_setup_fis(ctp, ccb, slot->slot)) { 945 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 946 if (!ch->readlog) 947 xpt_freeze_simq(ch->sim, 1); 948 siis_end_transaction(slot, SIIS_ERR_INVALID); 949 return; 950 } 951 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 952 BUS_DMASYNC_PREWRITE); 953 /* Issue command to the controller. */ 954 slot->state = SIIS_SLOT_RUNNING; 955 ch->rslots |= (1 << slot->slot); 956 prb_bus = ch->dma.work_bus + 957 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 958 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 959 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 960 /* Start command execution timeout */ 961 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 962 (timeout_t*)siis_timeout, slot); 963 return; 964 } 965 966 /* Locked by callout mechanism. */ 967 static void 968 siis_timeout(struct siis_slot *slot) 969 { 970 device_t dev = slot->dev; 971 struct siis_channel *ch = device_get_softc(dev); 972 int i; 973 974 mtx_assert(&ch->mtx, MA_OWNED); 975 device_printf(dev, "Timeout on slot %d\n", slot->slot); 976 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 977 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 978 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 979 ATA_INL(ch->r_mem, SIIS_P_SERR)); 980 /* Kick controller into sane state. */ 981 siis_portinit(ch->dev); 982 983 if (!ch->readlog) 984 xpt_freeze_simq(ch->sim, ch->numrslots); 985 /* Handle command with timeout. */ 986 siis_end_transaction(&ch->slot[slot->slot], SIIS_ERR_TIMEOUT); 987 /* Handle the rest of commands. */ 988 if (ch->frozen) { 989 union ccb *fccb = ch->frozen; 990 ch->frozen = NULL; 991 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 992 xpt_done(fccb); 993 } 994 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 995 /* Do we have a running request on slot? */ 996 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 997 continue; 998 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 999 } 1000 } 1001 1002 /* Must be called with channel locked. */ 1003 static void 1004 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1005 { 1006 device_t dev = slot->dev; 1007 struct siis_channel *ch = device_get_softc(dev); 1008 union ccb *ccb = slot->ccb; 1009 1010 mtx_assert(&ch->mtx, MA_OWNED); 1011 /* Cancel command execution timeout */ 1012 callout_stop(&slot->timeout); 1013 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1014 BUS_DMASYNC_POSTWRITE); 1015 /* Read result registers to the result struct 1016 * May be incorrect if several commands finished same time, 1017 * so read only when sure or have to. 1018 */ 1019 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1020 struct ata_res *res = &ccb->ataio.res; 1021 if ((et == SIIS_ERR_TFE) || 1022 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1023 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1024 1025 res->status = ATA_INB(ch->r_mem, offs + 2); 1026 res->error = ATA_INB(ch->r_mem, offs + 3); 1027 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1028 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1029 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1030 res->device = ATA_INB(ch->r_mem, offs + 7); 1031 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1032 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1033 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1034 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1035 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1036 } else 1037 bzero(res, sizeof(*res)); 1038 } 1039 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1040 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1041 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1042 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1043 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1044 } 1045 /* Set proper result status. */ 1046 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1047 if (et != SIIS_ERR_NONE || ch->recovery) { 1048 ch->eslots |= (1 << slot->slot); 1049 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1050 } 1051 switch (et) { 1052 case SIIS_ERR_NONE: 1053 ccb->ccb_h.status |= CAM_REQ_CMP; 1054 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1055 ccb->csio.scsi_status = SCSI_STATUS_OK; 1056 break; 1057 case SIIS_ERR_INVALID: 1058 ccb->ccb_h.status |= CAM_REQ_INVALID; 1059 break; 1060 case SIIS_ERR_INNOCENT: 1061 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1062 break; 1063 case SIIS_ERR_TFE: 1064 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1065 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1066 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1067 } else { 1068 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1069 } 1070 break; 1071 case SIIS_ERR_SATA: 1072 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1073 break; 1074 case SIIS_ERR_TIMEOUT: 1075 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1076 break; 1077 case SIIS_ERR_NCQ: 1078 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1079 break; 1080 default: 1081 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1082 } 1083 /* Free slot. */ 1084 ch->rslots &= ~(1 << slot->slot); 1085 ch->aslots &= ~(1 << slot->slot); 1086 slot->state = SIIS_SLOT_EMPTY; 1087 slot->ccb = NULL; 1088 /* Update channel stats. */ 1089 ch->numrslots--; 1090 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1091 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1092 ch->numtslots[ccb->ccb_h.target_id]--; 1093 } 1094 /* If it was NCQ command error, put result on hold. */ 1095 if (et == SIIS_ERR_NCQ) { 1096 ch->hold[slot->slot] = ccb; 1097 ch->numhslots++; 1098 } else if (ch->readlog) /* If it was our READ LOG command - process it. */ 1099 siis_process_read_log(dev, ccb); 1100 else 1101 xpt_done(ccb); 1102 /* Unfreeze frozen command. */ 1103 if (ch->frozen && ch->numrslots == 0) { 1104 union ccb *fccb = ch->frozen; 1105 ch->frozen = NULL; 1106 siis_begin_transaction(dev, fccb); 1107 xpt_release_simq(ch->sim, TRUE); 1108 } 1109 /* If we have no other active commands, ... */ 1110 if (ch->rslots == 0) { 1111 /* if we have slots in error, we can reinit port. */ 1112 if (ch->eslots != 0) 1113 siis_portinit(dev); 1114 /* if there commands on hold, we can do READ LOG. */ 1115 if (!ch->readlog && ch->numhslots) 1116 siis_issue_read_log(dev); 1117 } 1118 } 1119 1120 static void 1121 siis_issue_read_log(device_t dev) 1122 { 1123 struct siis_channel *ch = device_get_softc(dev); 1124 union ccb *ccb; 1125 struct ccb_ataio *ataio; 1126 int i; 1127 1128 /* Find some holden command. */ 1129 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1130 if (ch->hold[i]) 1131 break; 1132 } 1133 if (i == SIIS_MAX_SLOTS) 1134 return; 1135 ch->readlog = 1; 1136 ccb = xpt_alloc_ccb_nowait(); 1137 if (ccb == NULL) { 1138 device_printf(dev, "Unable allocate READ LOG command"); 1139 return; /* XXX */ 1140 } 1141 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1142 ccb->ccb_h.func_code = XPT_ATA_IO; 1143 ccb->ccb_h.flags = CAM_DIR_IN; 1144 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1145 ataio = &ccb->ataio; 1146 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1147 if (ataio->data_ptr == NULL) { 1148 device_printf(dev, "Unable allocate memory for READ LOG command"); 1149 return; /* XXX */ 1150 } 1151 ataio->dxfer_len = 512; 1152 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1153 ataio->cmd.flags = CAM_ATAIO_48BIT; 1154 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1155 ataio->cmd.sector_count = 1; 1156 ataio->cmd.sector_count_exp = 0; 1157 ataio->cmd.lba_low = 0x10; 1158 ataio->cmd.lba_mid = 0; 1159 ataio->cmd.lba_mid_exp = 0; 1160 siis_begin_transaction(dev, ccb); 1161 } 1162 1163 static void 1164 siis_process_read_log(device_t dev, union ccb *ccb) 1165 { 1166 struct siis_channel *ch = device_get_softc(dev); 1167 uint8_t *data; 1168 struct ata_res *res; 1169 int i; 1170 1171 ch->readlog = 0; 1172 data = ccb->ataio.data_ptr; 1173 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1174 (data[0] & 0x80) == 0) { 1175 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1176 if (!ch->hold[i]) 1177 continue; 1178 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1179 continue; 1180 if ((data[0] & 0x1F) == i) { 1181 res = &ch->hold[i]->ataio.res; 1182 res->status = data[2]; 1183 res->error = data[3]; 1184 res->lba_low = data[4]; 1185 res->lba_mid = data[5]; 1186 res->lba_high = data[6]; 1187 res->device = data[7]; 1188 res->lba_low_exp = data[8]; 1189 res->lba_mid_exp = data[9]; 1190 res->lba_high_exp = data[10]; 1191 res->sector_count = data[12]; 1192 res->sector_count_exp = data[13]; 1193 } else { 1194 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1195 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1196 } 1197 xpt_done(ch->hold[i]); 1198 ch->hold[i] = NULL; 1199 ch->numhslots--; 1200 } 1201 } else { 1202 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1203 device_printf(dev, "Error while READ LOG EXT\n"); 1204 else if ((data[0] & 0x80) == 0) { 1205 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1206 } 1207 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1208 if (!ch->hold[i]) 1209 continue; 1210 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1211 continue; 1212 xpt_done(ch->hold[i]); 1213 ch->hold[i] = NULL; 1214 ch->numhslots--; 1215 } 1216 } 1217 free(ccb->ataio.data_ptr, M_SIIS); 1218 xpt_free_ccb(ccb); 1219 } 1220 1221 static void 1222 siis_portinit(device_t dev) 1223 { 1224 struct siis_channel *ch = device_get_softc(dev); 1225 int i; 1226 1227 ch->eslots = 0; 1228 ch->recovery = 0; 1229 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1230 for (i = 0; i < 16; i++) { 1231 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1232 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1233 } 1234 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1235 siis_wait_ready(dev, 1000); 1236 } 1237 1238 #if 0 1239 static void 1240 siis_devreset(device_t dev) 1241 { 1242 struct siis_channel *ch = device_get_softc(dev); 1243 1244 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1245 siis_wait_ready(dev, 1000); 1246 } 1247 #endif 1248 1249 static int 1250 siis_wait_ready(device_t dev, int t) 1251 { 1252 struct siis_channel *ch = device_get_softc(dev); 1253 int timeout = 0; 1254 uint32_t val; 1255 1256 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1257 SIIS_P_CTL_READY) == 0) { 1258 DELAY(1000); 1259 if (timeout++ > t) { 1260 device_printf(dev, "port is not ready (timeout %dms) " 1261 "status = %08x\n", t, val); 1262 return (EBUSY); 1263 } 1264 } 1265 if (bootverbose) 1266 device_printf(dev, "ready wait time=%dms\n", timeout); 1267 return (0); 1268 } 1269 1270 static void 1271 siis_reset(device_t dev) 1272 { 1273 struct siis_channel *ch = device_get_softc(dev); 1274 int i; 1275 1276 if (bootverbose) 1277 device_printf(dev, "SIIS reset...\n"); 1278 xpt_freeze_simq(ch->sim, ch->numrslots); 1279 /* Requeue freezed command. */ 1280 if (ch->frozen) { 1281 union ccb *fccb = ch->frozen; 1282 ch->frozen = NULL; 1283 fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1284 xpt_done(fccb); 1285 } 1286 /* Disable port interrupts */ 1287 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1288 /* Kill the engine and requeue all running commands. */ 1289 siis_portinit(dev); 1290 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1291 /* Do we have a running request on slot? */ 1292 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1293 continue; 1294 /* XXX; Commands in loading state. */ 1295 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1296 } 1297 /* Reset and reconnect PHY, */ 1298 if (!siis_sata_phy_reset(dev)) { 1299 ch->devices = 0; 1300 /* Enable port interrupts */ 1301 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1302 if (bootverbose) 1303 device_printf(dev, 1304 "SIIS reset done: phy reset found no device\n"); 1305 /* Tell the XPT about the event */ 1306 xpt_async(AC_BUS_RESET, ch->path, NULL); 1307 return; 1308 } 1309 /* Wait for clearing busy status. */ 1310 if (siis_wait_ready(dev, 10000)) { 1311 device_printf(dev, "device ready timeout\n"); 1312 } 1313 ch->devices = 1; 1314 /* Enable port interrupts */ 1315 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1316 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1317 if (bootverbose) 1318 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1319 /* Tell the XPT about the event */ 1320 xpt_async(AC_BUS_RESET, ch->path, NULL); 1321 } 1322 1323 static int 1324 siis_setup_fis(struct siis_cmd *ctp, union ccb *ccb, int tag) 1325 { 1326 u_int8_t *fis = &ctp->fis[0]; 1327 1328 bzero(fis, 24); 1329 fis[0] = 0x27; /* host to device */ 1330 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1331 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1332 fis[1] |= 0x80; 1333 fis[2] = ATA_PACKET_CMD; 1334 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 1335 fis[3] = ATA_F_DMA; 1336 else { 1337 fis[5] = ccb->csio.dxfer_len; 1338 fis[6] = ccb->csio.dxfer_len >> 8; 1339 } 1340 fis[7] = ATA_D_LBA; 1341 fis[15] = ATA_A_4BIT; 1342 bzero(ctp->u.atapi.ccb, 16); 1343 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1344 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1345 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1346 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1347 fis[1] |= 0x80; 1348 fis[2] = ccb->ataio.cmd.command; 1349 fis[3] = ccb->ataio.cmd.features; 1350 fis[4] = ccb->ataio.cmd.lba_low; 1351 fis[5] = ccb->ataio.cmd.lba_mid; 1352 fis[6] = ccb->ataio.cmd.lba_high; 1353 fis[7] = ccb->ataio.cmd.device; 1354 fis[8] = ccb->ataio.cmd.lba_low_exp; 1355 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1356 fis[10] = ccb->ataio.cmd.lba_high_exp; 1357 fis[11] = ccb->ataio.cmd.features_exp; 1358 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1359 fis[12] = tag << 3; 1360 fis[13] = 0; 1361 } else { 1362 fis[12] = ccb->ataio.cmd.sector_count; 1363 fis[13] = ccb->ataio.cmd.sector_count_exp; 1364 } 1365 fis[15] = ATA_A_4BIT; 1366 } else { 1367 /* Soft reset. */ 1368 } 1369 return (20); 1370 } 1371 1372 static int 1373 siis_sata_connect(struct siis_channel *ch) 1374 { 1375 u_int32_t status; 1376 int timeout; 1377 1378 /* Wait up to 100ms for "connect well" */ 1379 for (timeout = 0; timeout < 100 ; timeout++) { 1380 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1381 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1382 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1383 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1384 break; 1385 DELAY(1000); 1386 } 1387 if (timeout >= 100) { 1388 if (bootverbose) { 1389 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1390 status); 1391 } 1392 return (0); 1393 } 1394 if (bootverbose) { 1395 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1396 timeout, status); 1397 } 1398 /* Clear SATA error register */ 1399 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1400 return (1); 1401 } 1402 1403 static int 1404 siis_sata_phy_reset(device_t dev) 1405 { 1406 struct siis_channel *ch = device_get_softc(dev); 1407 uint32_t val; 1408 1409 if (bootverbose) 1410 device_printf(dev, "hardware reset ...\n"); 1411 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, ATA_SC_IPM_DIS_PARTIAL | 1412 ATA_SC_IPM_DIS_SLUMBER | ATA_SC_DET_RESET); 1413 DELAY(50000); 1414 if (ch->sata_rev == 1) 1415 val = ATA_SC_SPD_SPEED_GEN1; 1416 else if (ch->sata_rev == 2) 1417 val = ATA_SC_SPD_SPEED_GEN2; 1418 else if (ch->sata_rev == 3) 1419 val = ATA_SC_SPD_SPEED_GEN3; 1420 else 1421 val = 0; 1422 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1423 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1424 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1425 DELAY(50000); 1426 return (siis_sata_connect(ch)); 1427 } 1428 1429 static void 1430 siisaction(struct cam_sim *sim, union ccb *ccb) 1431 { 1432 device_t dev; 1433 struct siis_channel *ch; 1434 1435 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1436 ccb->ccb_h.func_code)); 1437 1438 ch = (struct siis_channel *)cam_sim_softc(sim); 1439 dev = ch->dev; 1440 mtx_assert(&ch->mtx, MA_OWNED); 1441 switch (ccb->ccb_h.func_code) { 1442 /* Common cases first */ 1443 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1444 case XPT_SCSI_IO: 1445 if (ch->devices == 0) { 1446 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1447 xpt_done(ccb); 1448 break; 1449 } 1450 /* Check for command collision. */ 1451 if (siis_check_collision(dev, ccb)) { 1452 /* Freeze command. */ 1453 ch->frozen = ccb; 1454 /* We have only one frozen slot, so freeze simq also. */ 1455 xpt_freeze_simq(ch->sim, 1); 1456 return; 1457 } 1458 siis_begin_transaction(dev, ccb); 1459 break; 1460 case XPT_EN_LUN: /* Enable LUN as a target */ 1461 case XPT_TARGET_IO: /* Execute target I/O request */ 1462 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1463 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1464 case XPT_ABORT: /* Abort the specified CCB */ 1465 /* XXX Implement */ 1466 ccb->ccb_h.status = CAM_REQ_INVALID; 1467 xpt_done(ccb); 1468 break; 1469 case XPT_SET_TRAN_SETTINGS: 1470 { 1471 struct ccb_trans_settings *cts = &ccb->cts; 1472 1473 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1474 if (cts->xport_specific.sata.pm_present) 1475 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1476 else 1477 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1478 } 1479 ccb->ccb_h.status = CAM_REQ_CMP; 1480 xpt_done(ccb); 1481 break; 1482 } 1483 case XPT_GET_TRAN_SETTINGS: 1484 /* Get default/user set transfer settings for the target */ 1485 { 1486 struct ccb_trans_settings *cts = &ccb->cts; 1487 uint32_t status; 1488 1489 cts->protocol = PROTO_ATA; 1490 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1491 cts->transport = XPORT_SATA; 1492 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1493 cts->proto_specific.valid = 0; 1494 cts->xport_specific.sata.valid = 0; 1495 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1496 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1497 else 1498 status = ATA_INL(ch->r_mem, SIIS_P_SCTL) & ATA_SC_SPD_MASK; 1499 if (status & ATA_SS_SPD_GEN3) { 1500 cts->xport_specific.sata.bitrate = 600000; 1501 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1502 } else if (status & ATA_SS_SPD_GEN2) { 1503 cts->xport_specific.sata.bitrate = 300000; 1504 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1505 } else if (status & ATA_SS_SPD_GEN1) { 1506 cts->xport_specific.sata.bitrate = 150000; 1507 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1508 } 1509 cts->xport_specific.sata.pm_present = 1510 (ATA_INL(ch->r_mem, SIIS_P_STS) & SIIS_P_CTL_PME) ? 1511 1 : 0; 1512 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1513 ccb->ccb_h.status = CAM_REQ_CMP; 1514 xpt_done(ccb); 1515 break; 1516 } 1517 #if 0 1518 case XPT_CALC_GEOMETRY: 1519 { 1520 struct ccb_calc_geometry *ccg; 1521 uint32_t size_mb; 1522 uint32_t secs_per_cylinder; 1523 1524 ccg = &ccb->ccg; 1525 size_mb = ccg->volume_size 1526 / ((1024L * 1024L) / ccg->block_size); 1527 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1528 if (size_mb >= 2048) { 1529 ccg->heads = 255; 1530 ccg->secs_per_track = 63; 1531 } else { 1532 ccg->heads = 128; 1533 ccg->secs_per_track = 32; 1534 } 1535 } else { 1536 ccg->heads = 64; 1537 ccg->secs_per_track = 32; 1538 } 1539 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1540 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1541 ccb->ccb_h.status = CAM_REQ_CMP; 1542 xpt_done(ccb); 1543 break; 1544 } 1545 #endif 1546 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1547 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1548 siis_reset(dev); 1549 ccb->ccb_h.status = CAM_REQ_CMP; 1550 xpt_done(ccb); 1551 break; 1552 case XPT_TERM_IO: /* Terminate the I/O process */ 1553 /* XXX Implement */ 1554 ccb->ccb_h.status = CAM_REQ_INVALID; 1555 xpt_done(ccb); 1556 break; 1557 case XPT_PATH_INQ: /* Path routing inquiry */ 1558 { 1559 struct ccb_pathinq *cpi = &ccb->cpi; 1560 1561 cpi->version_num = 1; /* XXX??? */ 1562 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1563 cpi->hba_inquiry |= PI_SATAPM; 1564 cpi->target_sprt = 0; 1565 cpi->hba_misc = PIM_SEQSCAN; 1566 cpi->hba_eng_cnt = 0; 1567 cpi->max_target = 14; 1568 cpi->max_lun = 0; 1569 cpi->initiator_id = 0; 1570 cpi->bus_id = cam_sim_bus(sim); 1571 cpi->base_transfer_speed = 150000; 1572 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1573 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1574 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1575 cpi->unit_number = cam_sim_unit(sim); 1576 cpi->transport = XPORT_SATA; 1577 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1578 cpi->protocol = PROTO_ATA; 1579 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1580 cpi->ccb_h.status = CAM_REQ_CMP; 1581 cpi->maxio = MAXPHYS; 1582 xpt_done(ccb); 1583 break; 1584 } 1585 default: 1586 ccb->ccb_h.status = CAM_REQ_INVALID; 1587 xpt_done(ccb); 1588 break; 1589 } 1590 } 1591 1592 static void 1593 siispoll(struct cam_sim *sim) 1594 { 1595 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1596 1597 siis_ch_intr(ch->dev); 1598 } 1599