1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_xpt_periph.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_suspend(device_t dev); 64 static int siis_ch_resume(device_t dev); 65 static void siis_ch_intr_locked(void *data); 66 static void siis_ch_intr(void *data); 67 static void siis_begin_transaction(device_t dev, union ccb *ccb); 68 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 69 static void siis_execute_transaction(struct siis_slot *slot); 70 static void siis_timeout(struct siis_slot *slot); 71 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 72 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 73 static void siis_dmainit(device_t dev); 74 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 75 static void siis_dmafini(device_t dev); 76 static void siis_slotsalloc(device_t dev); 77 static void siis_slotsfree(device_t dev); 78 static void siis_reset(device_t dev); 79 static void siis_portinit(device_t dev); 80 static int siis_wait_ready(device_t dev, int t); 81 82 static int siis_sata_connect(struct siis_channel *ch); 83 84 static void siis_issue_read_log(device_t dev); 85 static void siis_process_read_log(device_t dev, union ccb *ccb); 86 87 static void siisaction(struct cam_sim *sim, union ccb *ccb); 88 static void siispoll(struct cam_sim *sim); 89 90 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 91 92 static struct { 93 uint32_t id; 94 const char *name; 95 int ports; 96 int quirks; 97 #define SIIS_Q_SNTF 1 98 } siis_ids[] = { 99 {0x31241095, "SiI3124", 4, 0}, 100 {0x31248086, "SiI3124", 4, 0}, 101 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF}, 102 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF}, 103 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF}, 104 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF}, 105 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF}, 106 {0, NULL, 0, 0} 107 }; 108 109 static int 110 siis_probe(device_t dev) 111 { 112 char buf[64]; 113 int i; 114 uint32_t devid = pci_get_devid(dev); 115 116 for (i = 0; siis_ids[i].id != 0; i++) { 117 if (siis_ids[i].id == devid) { 118 snprintf(buf, sizeof(buf), "%s SATA controller", 119 siis_ids[i].name); 120 device_set_desc_copy(dev, buf); 121 return (BUS_PROBE_VENDOR); 122 } 123 } 124 return (ENXIO); 125 } 126 127 static int 128 siis_attach(device_t dev) 129 { 130 struct siis_controller *ctlr = device_get_softc(dev); 131 uint32_t devid = pci_get_devid(dev); 132 device_t child; 133 int error, i, unit; 134 135 ctlr->dev = dev; 136 for (i = 0; siis_ids[i].id != 0; i++) { 137 if (siis_ids[i].id == devid) 138 break; 139 } 140 ctlr->quirks = siis_ids[i].quirks; 141 /* Global memory */ 142 ctlr->r_grid = PCIR_BAR(0); 143 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 144 &ctlr->r_grid, RF_ACTIVE))) 145 return (ENXIO); 146 /* Channels memory */ 147 ctlr->r_rid = PCIR_BAR(2); 148 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 149 &ctlr->r_rid, RF_ACTIVE))) 150 return (ENXIO); 151 /* Setup our own memory management for channels. */ 152 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 153 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 154 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 155 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 157 return (error); 158 } 159 if ((error = rman_manage_region(&ctlr->sc_iomem, 160 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 161 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 162 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 163 rman_fini(&ctlr->sc_iomem); 164 return (error); 165 } 166 /* Reset controller */ 167 siis_resume(dev); 168 /* Number of HW channels */ 169 ctlr->channels = siis_ids[i].ports; 170 /* Setup interrupts. */ 171 if (siis_setup_interrupt(dev)) { 172 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 173 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 174 rman_fini(&ctlr->sc_iomem); 175 return ENXIO; 176 } 177 /* Attach all channels on this controller */ 178 for (unit = 0; unit < ctlr->channels; unit++) { 179 child = device_add_child(dev, "siisch", -1); 180 if (child == NULL) 181 device_printf(dev, "failed to add channel device\n"); 182 else 183 device_set_ivars(child, (void *)(intptr_t)unit); 184 } 185 bus_generic_attach(dev); 186 return 0; 187 } 188 189 static int 190 siis_detach(device_t dev) 191 { 192 struct siis_controller *ctlr = device_get_softc(dev); 193 device_t *children; 194 int nchildren, i; 195 196 /* Detach & delete all children */ 197 if (!device_get_children(dev, &children, &nchildren)) { 198 for (i = 0; i < nchildren; i++) 199 device_delete_child(dev, children[i]); 200 free(children, M_TEMP); 201 } 202 /* Free interrupts. */ 203 if (ctlr->irq.r_irq) { 204 bus_teardown_intr(dev, ctlr->irq.r_irq, 205 ctlr->irq.handle); 206 bus_release_resource(dev, SYS_RES_IRQ, 207 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 208 } 209 pci_release_msi(dev); 210 /* Free memory. */ 211 rman_fini(&ctlr->sc_iomem); 212 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 213 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 214 return (0); 215 } 216 217 static int 218 siis_suspend(device_t dev) 219 { 220 struct siis_controller *ctlr = device_get_softc(dev); 221 222 bus_generic_suspend(dev); 223 /* Put controller into reset state. */ 224 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 225 return 0; 226 } 227 228 static int 229 siis_resume(device_t dev) 230 { 231 struct siis_controller *ctlr = device_get_softc(dev); 232 233 /* Put controller into reset state. */ 234 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 235 DELAY(10000); 236 /* Get controller out of reset state and enable port interrupts. */ 237 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 0x0000000f); 238 return (bus_generic_resume(dev)); 239 } 240 241 static int 242 siis_setup_interrupt(device_t dev) 243 { 244 struct siis_controller *ctlr = device_get_softc(dev); 245 int msi = 0; 246 247 /* Process hints. */ 248 resource_int_value(device_get_name(dev), 249 device_get_unit(dev), "msi", &msi); 250 if (msi < 0) 251 msi = 0; 252 else if (msi > 0) 253 msi = min(1, pci_msi_count(dev)); 254 /* Allocate MSI if needed/present. */ 255 if (msi && pci_alloc_msi(dev, &msi) != 0) 256 msi = 0; 257 /* Allocate all IRQs. */ 258 ctlr->irq.r_irq_rid = msi ? 1 : 0; 259 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 260 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 261 device_printf(dev, "unable to map interrupt\n"); 262 return ENXIO; 263 } 264 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 265 siis_intr, ctlr, &ctlr->irq.handle))) { 266 /* SOS XXX release r_irq */ 267 device_printf(dev, "unable to setup interrupt\n"); 268 return ENXIO; 269 } 270 return (0); 271 } 272 273 /* 274 * Common case interrupt handler. 275 */ 276 static void 277 siis_intr(void *data) 278 { 279 struct siis_controller *ctlr = (struct siis_controller *)data; 280 u_int32_t is; 281 void *arg; 282 int unit; 283 284 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 285 for (unit = 0; unit < ctlr->channels; unit++) { 286 if ((is & SIIS_IS_PORT(unit)) != 0 && 287 (arg = ctlr->interrupt[unit].argument)) { 288 ctlr->interrupt[unit].function(arg); 289 } 290 } 291 } 292 293 static struct resource * 294 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 295 u_long start, u_long end, u_long count, u_int flags) 296 { 297 struct siis_controller *ctlr = device_get_softc(dev); 298 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 299 struct resource *res = NULL; 300 int offset = unit << 13; 301 long st; 302 303 switch (type) { 304 case SYS_RES_MEMORY: 305 st = rman_get_start(ctlr->r_mem); 306 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 307 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 308 if (res) { 309 bus_space_handle_t bsh; 310 bus_space_tag_t bst; 311 bsh = rman_get_bushandle(ctlr->r_mem); 312 bst = rman_get_bustag(ctlr->r_mem); 313 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 314 rman_set_bushandle(res, bsh); 315 rman_set_bustag(res, bst); 316 } 317 break; 318 case SYS_RES_IRQ: 319 if (*rid == ATA_IRQ_RID) 320 res = ctlr->irq.r_irq; 321 break; 322 } 323 return (res); 324 } 325 326 static int 327 siis_release_resource(device_t dev, device_t child, int type, int rid, 328 struct resource *r) 329 { 330 331 switch (type) { 332 case SYS_RES_MEMORY: 333 rman_release_resource(r); 334 return (0); 335 case SYS_RES_IRQ: 336 if (rid != ATA_IRQ_RID) 337 return ENOENT; 338 return (0); 339 } 340 return (EINVAL); 341 } 342 343 static int 344 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 345 int flags, driver_filter_t *filter, driver_intr_t *function, 346 void *argument, void **cookiep) 347 { 348 struct siis_controller *ctlr = device_get_softc(dev); 349 int unit = (intptr_t)device_get_ivars(child); 350 351 if (filter != NULL) { 352 printf("siis.c: we cannot use a filter here\n"); 353 return (EINVAL); 354 } 355 ctlr->interrupt[unit].function = function; 356 ctlr->interrupt[unit].argument = argument; 357 return (0); 358 } 359 360 static int 361 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 362 void *cookie) 363 { 364 struct siis_controller *ctlr = device_get_softc(dev); 365 int unit = (intptr_t)device_get_ivars(child); 366 367 ctlr->interrupt[unit].function = NULL; 368 ctlr->interrupt[unit].argument = NULL; 369 return (0); 370 } 371 372 static int 373 siis_print_child(device_t dev, device_t child) 374 { 375 int retval; 376 377 retval = bus_print_child_header(dev, child); 378 retval += printf(" at channel %d", 379 (int)(intptr_t)device_get_ivars(child)); 380 retval += bus_print_child_footer(dev, child); 381 382 return (retval); 383 } 384 385 devclass_t siis_devclass; 386 static device_method_t siis_methods[] = { 387 DEVMETHOD(device_probe, siis_probe), 388 DEVMETHOD(device_attach, siis_attach), 389 DEVMETHOD(device_detach, siis_detach), 390 DEVMETHOD(device_suspend, siis_suspend), 391 DEVMETHOD(device_resume, siis_resume), 392 DEVMETHOD(bus_print_child, siis_print_child), 393 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 394 DEVMETHOD(bus_release_resource, siis_release_resource), 395 DEVMETHOD(bus_setup_intr, siis_setup_intr), 396 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 397 { 0, 0 } 398 }; 399 static driver_t siis_driver = { 400 "siis", 401 siis_methods, 402 sizeof(struct siis_controller) 403 }; 404 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 405 MODULE_VERSION(siis, 1); 406 MODULE_DEPEND(siis, cam, 1, 1, 1); 407 408 static int 409 siis_ch_probe(device_t dev) 410 { 411 412 device_set_desc_copy(dev, "SIIS channel"); 413 return (0); 414 } 415 416 static int 417 siis_ch_attach(device_t dev) 418 { 419 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 420 struct siis_channel *ch = device_get_softc(dev); 421 struct cam_devq *devq; 422 int rid, error, i, sata_rev = 0; 423 424 ch->dev = dev; 425 ch->unit = (intptr_t)device_get_ivars(dev); 426 ch->quirks = ctlr->quirks; 427 resource_int_value(device_get_name(dev), 428 device_get_unit(dev), "pm_level", &ch->pm_level); 429 resource_int_value(device_get_name(dev), 430 device_get_unit(dev), "sata_rev", &sata_rev); 431 for (i = 0; i < 16; i++) { 432 ch->user[i].revision = sata_rev; 433 ch->user[i].mode = 0; 434 ch->user[i].bytecount = 8192; 435 ch->user[i].tags = SIIS_MAX_SLOTS; 436 ch->curr[i] = ch->user[i]; 437 } 438 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 439 rid = ch->unit; 440 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 441 &rid, RF_ACTIVE))) 442 return (ENXIO); 443 siis_dmainit(dev); 444 siis_slotsalloc(dev); 445 siis_ch_resume(dev); 446 mtx_lock(&ch->mtx); 447 rid = ATA_IRQ_RID; 448 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 449 &rid, RF_SHAREABLE | RF_ACTIVE))) { 450 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 451 device_printf(dev, "Unable to map interrupt\n"); 452 return (ENXIO); 453 } 454 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 455 siis_ch_intr_locked, dev, &ch->ih))) { 456 device_printf(dev, "Unable to setup interrupt\n"); 457 error = ENXIO; 458 goto err1; 459 } 460 /* Create the device queue for our SIM. */ 461 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 462 if (devq == NULL) { 463 device_printf(dev, "Unable to allocate simq\n"); 464 error = ENOMEM; 465 goto err1; 466 } 467 /* Construct SIM entry */ 468 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 469 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 470 if (ch->sim == NULL) { 471 device_printf(dev, "unable to allocate sim\n"); 472 error = ENOMEM; 473 goto err2; 474 } 475 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 476 device_printf(dev, "unable to register xpt bus\n"); 477 error = ENXIO; 478 goto err2; 479 } 480 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 481 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 482 device_printf(dev, "unable to create path\n"); 483 error = ENXIO; 484 goto err3; 485 } 486 mtx_unlock(&ch->mtx); 487 return (0); 488 489 err3: 490 xpt_bus_deregister(cam_sim_path(ch->sim)); 491 err2: 492 cam_sim_free(ch->sim, /*free_devq*/TRUE); 493 err1: 494 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 495 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 496 mtx_unlock(&ch->mtx); 497 return (error); 498 } 499 500 static int 501 siis_ch_detach(device_t dev) 502 { 503 struct siis_channel *ch = device_get_softc(dev); 504 505 mtx_lock(&ch->mtx); 506 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 507 xpt_free_path(ch->path); 508 xpt_bus_deregister(cam_sim_path(ch->sim)); 509 cam_sim_free(ch->sim, /*free_devq*/TRUE); 510 mtx_unlock(&ch->mtx); 511 512 bus_teardown_intr(dev, ch->r_irq, ch->ih); 513 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 514 515 siis_ch_suspend(dev); 516 siis_slotsfree(dev); 517 siis_dmafini(dev); 518 519 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 520 mtx_destroy(&ch->mtx); 521 return (0); 522 } 523 524 static int 525 siis_ch_suspend(device_t dev) 526 { 527 struct siis_channel *ch = device_get_softc(dev); 528 529 /* Put port into reset state. */ 530 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 531 return (0); 532 } 533 534 static int 535 siis_ch_resume(device_t dev) 536 { 537 struct siis_channel *ch = device_get_softc(dev); 538 539 /* Get port out of reset state. */ 540 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 541 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 542 if (ch->pm_present) 543 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 544 else 545 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 546 /* Enable port interrupts */ 547 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 548 return (0); 549 } 550 551 devclass_t siisch_devclass; 552 static device_method_t siisch_methods[] = { 553 DEVMETHOD(device_probe, siis_ch_probe), 554 DEVMETHOD(device_attach, siis_ch_attach), 555 DEVMETHOD(device_detach, siis_ch_detach), 556 DEVMETHOD(device_suspend, siis_ch_suspend), 557 DEVMETHOD(device_resume, siis_ch_resume), 558 { 0, 0 } 559 }; 560 static driver_t siisch_driver = { 561 "siisch", 562 siisch_methods, 563 sizeof(struct siis_channel) 564 }; 565 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 566 567 struct siis_dc_cb_args { 568 bus_addr_t maddr; 569 int error; 570 }; 571 572 static void 573 siis_dmainit(device_t dev) 574 { 575 struct siis_channel *ch = device_get_softc(dev); 576 struct siis_dc_cb_args dcba; 577 578 /* Command area. */ 579 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 580 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 581 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 582 0, NULL, NULL, &ch->dma.work_tag)) 583 goto error; 584 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 585 &ch->dma.work_map)) 586 goto error; 587 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 588 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 589 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 590 goto error; 591 } 592 ch->dma.work_bus = dcba.maddr; 593 /* Data area. */ 594 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 595 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 596 NULL, NULL, 597 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 598 SIIS_SG_ENTRIES, 0xFFFFFFFF, 599 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 600 goto error; 601 } 602 return; 603 604 error: 605 device_printf(dev, "WARNING - DMA initialization failed\n"); 606 siis_dmafini(dev); 607 } 608 609 static void 610 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 611 { 612 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 613 614 if (!(dcba->error = error)) 615 dcba->maddr = segs[0].ds_addr; 616 } 617 618 static void 619 siis_dmafini(device_t dev) 620 { 621 struct siis_channel *ch = device_get_softc(dev); 622 623 if (ch->dma.data_tag) { 624 bus_dma_tag_destroy(ch->dma.data_tag); 625 ch->dma.data_tag = NULL; 626 } 627 if (ch->dma.work_bus) { 628 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 629 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 630 ch->dma.work_bus = 0; 631 ch->dma.work_map = NULL; 632 ch->dma.work = NULL; 633 } 634 if (ch->dma.work_tag) { 635 bus_dma_tag_destroy(ch->dma.work_tag); 636 ch->dma.work_tag = NULL; 637 } 638 } 639 640 static void 641 siis_slotsalloc(device_t dev) 642 { 643 struct siis_channel *ch = device_get_softc(dev); 644 int i; 645 646 /* Alloc and setup command/dma slots */ 647 bzero(ch->slot, sizeof(ch->slot)); 648 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 649 struct siis_slot *slot = &ch->slot[i]; 650 651 slot->dev = dev; 652 slot->slot = i; 653 slot->state = SIIS_SLOT_EMPTY; 654 slot->ccb = NULL; 655 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 656 657 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 658 device_printf(ch->dev, "FAILURE - create data_map\n"); 659 } 660 } 661 662 static void 663 siis_slotsfree(device_t dev) 664 { 665 struct siis_channel *ch = device_get_softc(dev); 666 int i; 667 668 /* Free all dma slots */ 669 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 670 struct siis_slot *slot = &ch->slot[i]; 671 672 callout_drain(&slot->timeout); 673 if (slot->dma.data_map) { 674 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 675 slot->dma.data_map = NULL; 676 } 677 } 678 } 679 680 static void 681 siis_notify_events(device_t dev) 682 { 683 struct siis_channel *ch = device_get_softc(dev); 684 struct cam_path *dpath; 685 u_int32_t status; 686 int i; 687 688 if (ch->quirks & SIIS_Q_SNTF) { 689 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 690 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 691 } else { 692 /* 693 * Without SNTF we have no idea which device sent notification. 694 * If PMP is connected, assume it, else - device. 695 */ 696 status = (ch->pm_present) ? 0x8000 : 0x0001; 697 } 698 if (bootverbose) 699 device_printf(dev, "SNTF 0x%04x\n", status); 700 for (i = 0; i < 16; i++) { 701 if ((status & (1 << i)) == 0) 702 continue; 703 if (xpt_create_path(&dpath, NULL, 704 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 705 xpt_async(AC_SCSI_AEN, dpath, NULL); 706 xpt_free_path(dpath); 707 } 708 } 709 710 } 711 712 static void 713 siis_phy_check_events(device_t dev) 714 { 715 struct siis_channel *ch = device_get_softc(dev); 716 717 /* If we have a connection event, deal with it */ 718 if (ch->pm_level == 0) { 719 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 720 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 721 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 722 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 723 if (bootverbose) 724 device_printf(dev, "CONNECT requested\n"); 725 siis_reset(dev); 726 } else { 727 if (bootverbose) 728 device_printf(dev, "DISCONNECT requested\n"); 729 ch->devices = 0; 730 } 731 } 732 } 733 734 static void 735 siis_ch_intr_locked(void *data) 736 { 737 device_t dev = (device_t)data; 738 struct siis_channel *ch = device_get_softc(dev); 739 740 mtx_lock(&ch->mtx); 741 siis_ch_intr(data); 742 mtx_unlock(&ch->mtx); 743 } 744 745 static void 746 siis_ch_intr(void *data) 747 { 748 device_t dev = (device_t)data; 749 struct siis_channel *ch = device_get_softc(dev); 750 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 751 enum siis_err_type et; 752 int i, ccs, port, tslots; 753 754 mtx_assert(&ch->mtx, MA_OWNED); 755 /* Read command statuses. */ 756 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 757 ok = ch->rslots & ~sstatus; 758 /* Complete all successfull commands. */ 759 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 760 if ((ok >> i) & 1) 761 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 762 } 763 /* Do we have any other events? */ 764 if ((sstatus & SIIS_P_SS_ATTN) == 0) 765 return; 766 /* Read and clear interrupt statuses. */ 767 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 768 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 769 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 770 /* Process PHY events */ 771 if (istatus & SIIS_P_IX_PHYRDYCHG) 772 siis_phy_check_events(dev); 773 /* Process NOTIFY events */ 774 if (istatus & SIIS_P_IX_SDBN) 775 siis_notify_events(dev); 776 /* Process command errors */ 777 if (istatus & SIIS_P_IX_COMMERR) { 778 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 779 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 780 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 781 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 782 err = ch->rslots & sstatus; 783 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 784 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 785 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 786 787 if (!ch->readlog && !ch->recovery) { 788 xpt_freeze_simq(ch->sim, ch->numrslots); 789 ch->recovery = 1; 790 } 791 if (ch->frozen) { 792 union ccb *fccb = ch->frozen; 793 ch->frozen = NULL; 794 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 795 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 796 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 797 xpt_freeze_devq(fccb->ccb_h.path, 1); 798 fccb->ccb_h.status |= CAM_DEV_QFRZN; 799 } 800 xpt_done(fccb); 801 } 802 if (estatus == SIIS_P_CMDERR_DEV || 803 estatus == SIIS_P_CMDERR_SDB || 804 estatus == SIIS_P_CMDERR_DATAFIS) { 805 tslots = ch->numtslots[port]; 806 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 807 /* XXX: requests in loading state. */ 808 if (((ch->rslots >> i) & 1) == 0) 809 continue; 810 if (ch->slot[i].ccb->ccb_h.target_id != port) 811 continue; 812 if (tslots == 0) { 813 /* Untagged operation. */ 814 if (i == ccs) 815 et = SIIS_ERR_TFE; 816 else 817 et = SIIS_ERR_INNOCENT; 818 } else { 819 /* Tagged operation. */ 820 et = SIIS_ERR_NCQ; 821 } 822 siis_end_transaction(&ch->slot[i], et); 823 } 824 /* 825 * We can't reinit port if there are some other 826 * commands active, use resume to complete them. 827 */ 828 if (ch->rslots != 0) 829 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 830 } else { 831 if (estatus == SIIS_P_CMDERR_SENDFIS || 832 estatus == SIIS_P_CMDERR_INCSTATE || 833 estatus == SIIS_P_CMDERR_PPE || 834 estatus == SIIS_P_CMDERR_SERVICE) { 835 et = SIIS_ERR_SATA; 836 } else 837 et = SIIS_ERR_INVALID; 838 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 839 /* XXX: requests in loading state. */ 840 if (((ch->rslots >> i) & 1) == 0) 841 continue; 842 siis_end_transaction(&ch->slot[i], et); 843 } 844 } 845 } 846 } 847 848 /* Must be called with channel locked. */ 849 static int 850 siis_check_collision(device_t dev, union ccb *ccb) 851 { 852 struct siis_channel *ch = device_get_softc(dev); 853 854 mtx_assert(&ch->mtx, MA_OWNED); 855 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 856 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 857 /* Tagged command while we have no supported tag free. */ 858 if (((~ch->oslots) & (0x7fffffff >> (31 - 859 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 860 return (1); 861 } 862 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 863 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 864 /* Atomic command while anything active. */ 865 if (ch->numrslots != 0) 866 return (1); 867 } 868 /* We have some atomic command running. */ 869 if (ch->aslots != 0) 870 return (1); 871 return (0); 872 } 873 874 /* Must be called with channel locked. */ 875 static void 876 siis_begin_transaction(device_t dev, union ccb *ccb) 877 { 878 struct siis_channel *ch = device_get_softc(dev); 879 struct siis_slot *slot; 880 int tag, tags; 881 882 mtx_assert(&ch->mtx, MA_OWNED); 883 /* Choose empty slot. */ 884 tags = SIIS_MAX_SLOTS; 885 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 886 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 887 tags = ch->curr[ccb->ccb_h.target_id].tags; 888 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 889 /* Occupy chosen slot. */ 890 slot = &ch->slot[tag]; 891 slot->ccb = ccb; 892 /* Update channel stats. */ 893 ch->oslots |= (1 << slot->slot); 894 ch->numrslots++; 895 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 896 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 897 ch->numtslots[ccb->ccb_h.target_id]++; 898 } 899 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 900 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 901 ch->aslots |= (1 << slot->slot); 902 slot->dma.nsegs = 0; 903 /* If request moves data, setup and load SG list */ 904 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 905 void *buf; 906 bus_size_t size; 907 908 slot->state = SIIS_SLOT_LOADING; 909 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 910 buf = ccb->ataio.data_ptr; 911 size = ccb->ataio.dxfer_len; 912 } else { 913 buf = ccb->csio.data_ptr; 914 size = ccb->csio.dxfer_len; 915 } 916 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 917 buf, size, siis_dmasetprd, slot, 0); 918 } else 919 siis_execute_transaction(slot); 920 } 921 922 /* Locked by busdma engine. */ 923 static void 924 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 925 { 926 struct siis_slot *slot = arg; 927 struct siis_channel *ch = device_get_softc(slot->dev); 928 struct siis_cmd *ctp; 929 struct siis_dma_prd *prd; 930 int i; 931 932 mtx_assert(&ch->mtx, MA_OWNED); 933 if (error) { 934 device_printf(slot->dev, "DMA load error\n"); 935 if (!ch->readlog) 936 xpt_freeze_simq(ch->sim, 1); 937 siis_end_transaction(slot, SIIS_ERR_INVALID); 938 return; 939 } 940 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 941 /* Get a piece of the workspace for this request */ 942 ctp = (struct siis_cmd *) 943 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 944 /* Fill S/G table */ 945 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 946 prd = &ctp->u.ata.prd[0]; 947 else 948 prd = &ctp->u.atapi.prd[0]; 949 for (i = 0; i < nsegs; i++) { 950 prd[i].dba = htole64(segs[i].ds_addr); 951 prd[i].dbc = htole32(segs[i].ds_len); 952 prd[i].control = 0; 953 } 954 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 955 slot->dma.nsegs = nsegs; 956 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 957 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 958 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 959 siis_execute_transaction(slot); 960 } 961 962 /* Must be called with channel locked. */ 963 static void 964 siis_execute_transaction(struct siis_slot *slot) 965 { 966 device_t dev = slot->dev; 967 struct siis_channel *ch = device_get_softc(dev); 968 struct siis_cmd *ctp; 969 union ccb *ccb = slot->ccb; 970 u_int64_t prb_bus; 971 972 mtx_assert(&ch->mtx, MA_OWNED); 973 /* Get a piece of the workspace for this request */ 974 ctp = (struct siis_cmd *) 975 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 976 ctp->control = 0; 977 ctp->protocol_override = 0; 978 ctp->transfer_count = 0; 979 /* Special handling for Soft Reset command. */ 980 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 981 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 982 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 983 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 984 if (ccb->ccb_h.flags & CAM_DIR_IN) 985 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 986 if (ccb->ccb_h.flags & CAM_DIR_OUT) 987 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 988 } 989 /* Setup the FIS for this request */ 990 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 991 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 992 if (!ch->readlog) 993 xpt_freeze_simq(ch->sim, 1); 994 siis_end_transaction(slot, SIIS_ERR_INVALID); 995 return; 996 } 997 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 998 BUS_DMASYNC_PREWRITE); 999 /* Issue command to the controller. */ 1000 slot->state = SIIS_SLOT_RUNNING; 1001 ch->rslots |= (1 << slot->slot); 1002 prb_bus = ch->dma.work_bus + 1003 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1004 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1005 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1006 /* Start command execution timeout */ 1007 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1008 (timeout_t*)siis_timeout, slot); 1009 return; 1010 } 1011 1012 /* Must be called with channel locked. */ 1013 static void 1014 siis_process_timeout(device_t dev) 1015 { 1016 struct siis_channel *ch = device_get_softc(dev); 1017 int i; 1018 1019 mtx_assert(&ch->mtx, MA_OWNED); 1020 if (!ch->readlog && !ch->recovery) { 1021 xpt_freeze_simq(ch->sim, ch->numrslots); 1022 ch->recovery = 1; 1023 } 1024 /* Handle the rest of commands. */ 1025 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1026 /* Do we have a running request on slot? */ 1027 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1028 continue; 1029 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1030 } 1031 } 1032 1033 /* Locked by callout mechanism. */ 1034 static void 1035 siis_timeout(struct siis_slot *slot) 1036 { 1037 device_t dev = slot->dev; 1038 struct siis_channel *ch = device_get_softc(dev); 1039 1040 mtx_assert(&ch->mtx, MA_OWNED); 1041 /* Check for stale timeout. */ 1042 if (slot->state < SIIS_SLOT_RUNNING) 1043 return; 1044 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1045 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1046 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1047 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1048 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1049 1050 if (ch->toslots == 0) 1051 xpt_freeze_simq(ch->sim, 1); 1052 ch->toslots |= (1 << slot->slot); 1053 if ((ch->rslots & ~ch->toslots) == 0) 1054 siis_process_timeout(dev); 1055 else 1056 device_printf(dev, " ... waiting for slots %08x\n", 1057 ch->rslots & ~ch->toslots); 1058 } 1059 1060 /* Must be called with channel locked. */ 1061 static void 1062 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1063 { 1064 device_t dev = slot->dev; 1065 struct siis_channel *ch = device_get_softc(dev); 1066 union ccb *ccb = slot->ccb; 1067 1068 mtx_assert(&ch->mtx, MA_OWNED); 1069 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1070 BUS_DMASYNC_POSTWRITE); 1071 /* Read result registers to the result struct 1072 * May be incorrect if several commands finished same time, 1073 * so read only when sure or have to. 1074 */ 1075 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1076 struct ata_res *res = &ccb->ataio.res; 1077 if ((et == SIIS_ERR_TFE) || 1078 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1079 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1080 1081 res->status = ATA_INB(ch->r_mem, offs + 2); 1082 res->error = ATA_INB(ch->r_mem, offs + 3); 1083 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1084 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1085 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1086 res->device = ATA_INB(ch->r_mem, offs + 7); 1087 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1088 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1089 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1090 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1091 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1092 } else 1093 bzero(res, sizeof(*res)); 1094 } 1095 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1096 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1097 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1098 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1099 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1100 } 1101 /* Set proper result status. */ 1102 if (et != SIIS_ERR_NONE || ch->recovery) { 1103 ch->eslots |= (1 << slot->slot); 1104 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1105 } 1106 /* In case of error, freeze device for proper recovery. */ 1107 if (et != SIIS_ERR_NONE && 1108 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1109 xpt_freeze_devq(ccb->ccb_h.path, 1); 1110 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1111 } 1112 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1113 switch (et) { 1114 case SIIS_ERR_NONE: 1115 ccb->ccb_h.status |= CAM_REQ_CMP; 1116 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1117 ccb->csio.scsi_status = SCSI_STATUS_OK; 1118 break; 1119 case SIIS_ERR_INVALID: 1120 ch->fatalerr = 1; 1121 ccb->ccb_h.status |= CAM_REQ_INVALID; 1122 break; 1123 case SIIS_ERR_INNOCENT: 1124 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1125 break; 1126 case SIIS_ERR_TFE: 1127 case SIIS_ERR_NCQ: 1128 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1129 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1130 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1131 } else { 1132 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1133 } 1134 break; 1135 case SIIS_ERR_SATA: 1136 ch->fatalerr = 1; 1137 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1138 break; 1139 case SIIS_ERR_TIMEOUT: 1140 ch->fatalerr = 1; 1141 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1142 break; 1143 default: 1144 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1145 } 1146 /* Free slot. */ 1147 ch->oslots &= ~(1 << slot->slot); 1148 ch->rslots &= ~(1 << slot->slot); 1149 ch->aslots &= ~(1 << slot->slot); 1150 if (et != SIIS_ERR_TIMEOUT) { 1151 if (ch->toslots == (1 << slot->slot)) 1152 xpt_release_simq(ch->sim, TRUE); 1153 ch->toslots &= ~(1 << slot->slot); 1154 } 1155 slot->state = SIIS_SLOT_EMPTY; 1156 slot->ccb = NULL; 1157 /* Update channel stats. */ 1158 ch->numrslots--; 1159 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1160 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1161 ch->numtslots[ccb->ccb_h.target_id]--; 1162 } 1163 /* If it was our READ LOG command - process it. */ 1164 if (ch->readlog) { 1165 siis_process_read_log(dev, ccb); 1166 /* If it was NCQ command error, put result on hold. */ 1167 } else if (et == SIIS_ERR_NCQ) { 1168 ch->hold[slot->slot] = ccb; 1169 ch->numhslots++; 1170 } else 1171 xpt_done(ccb); 1172 /* Unfreeze frozen command. */ 1173 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1174 union ccb *fccb = ch->frozen; 1175 ch->frozen = NULL; 1176 siis_begin_transaction(dev, fccb); 1177 xpt_release_simq(ch->sim, TRUE); 1178 } 1179 /* If we have no other active commands, ... */ 1180 if (ch->rslots == 0) { 1181 /* if there were timeouts or fatal error - reset port. */ 1182 if (ch->toslots != 0 || ch->fatalerr) { 1183 siis_reset(dev); 1184 } else { 1185 /* if we have slots in error, we can reinit port. */ 1186 if (ch->eslots != 0) 1187 siis_portinit(dev); 1188 /* if there commands on hold, we can do READ LOG. */ 1189 if (!ch->readlog && ch->numhslots) 1190 siis_issue_read_log(dev); 1191 } 1192 /* If all the reset of commands are in timeout - abort them. */ 1193 } else if ((ch->rslots & ~ch->toslots) == 0) 1194 siis_process_timeout(dev); 1195 } 1196 1197 static void 1198 siis_issue_read_log(device_t dev) 1199 { 1200 struct siis_channel *ch = device_get_softc(dev); 1201 union ccb *ccb; 1202 struct ccb_ataio *ataio; 1203 int i; 1204 1205 /* Find some holden command. */ 1206 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1207 if (ch->hold[i]) 1208 break; 1209 } 1210 if (i == SIIS_MAX_SLOTS) 1211 return; 1212 ch->readlog = 1; 1213 ccb = xpt_alloc_ccb_nowait(); 1214 if (ccb == NULL) { 1215 device_printf(dev, "Unable allocate READ LOG command"); 1216 return; /* XXX */ 1217 } 1218 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1219 ccb->ccb_h.func_code = XPT_ATA_IO; 1220 ccb->ccb_h.flags = CAM_DIR_IN; 1221 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1222 ataio = &ccb->ataio; 1223 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1224 if (ataio->data_ptr == NULL) { 1225 device_printf(dev, "Unable allocate memory for READ LOG command"); 1226 return; /* XXX */ 1227 } 1228 ataio->dxfer_len = 512; 1229 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1230 ataio->cmd.flags = CAM_ATAIO_48BIT; 1231 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1232 ataio->cmd.sector_count = 1; 1233 ataio->cmd.sector_count_exp = 0; 1234 ataio->cmd.lba_low = 0x10; 1235 ataio->cmd.lba_mid = 0; 1236 ataio->cmd.lba_mid_exp = 0; 1237 siis_begin_transaction(dev, ccb); 1238 } 1239 1240 static void 1241 siis_process_read_log(device_t dev, union ccb *ccb) 1242 { 1243 struct siis_channel *ch = device_get_softc(dev); 1244 uint8_t *data; 1245 struct ata_res *res; 1246 int i; 1247 1248 ch->readlog = 0; 1249 data = ccb->ataio.data_ptr; 1250 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1251 (data[0] & 0x80) == 0) { 1252 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1253 if (!ch->hold[i]) 1254 continue; 1255 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1256 continue; 1257 if ((data[0] & 0x1F) == i) { 1258 res = &ch->hold[i]->ataio.res; 1259 res->status = data[2]; 1260 res->error = data[3]; 1261 res->lba_low = data[4]; 1262 res->lba_mid = data[5]; 1263 res->lba_high = data[6]; 1264 res->device = data[7]; 1265 res->lba_low_exp = data[8]; 1266 res->lba_mid_exp = data[9]; 1267 res->lba_high_exp = data[10]; 1268 res->sector_count = data[12]; 1269 res->sector_count_exp = data[13]; 1270 } else { 1271 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1272 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1273 } 1274 xpt_done(ch->hold[i]); 1275 ch->hold[i] = NULL; 1276 ch->numhslots--; 1277 } 1278 } else { 1279 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1280 device_printf(dev, "Error while READ LOG EXT\n"); 1281 else if ((data[0] & 0x80) == 0) { 1282 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1283 } 1284 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1285 if (!ch->hold[i]) 1286 continue; 1287 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1288 continue; 1289 xpt_done(ch->hold[i]); 1290 ch->hold[i] = NULL; 1291 ch->numhslots--; 1292 } 1293 } 1294 free(ccb->ataio.data_ptr, M_SIIS); 1295 xpt_free_ccb(ccb); 1296 } 1297 1298 static void 1299 siis_portinit(device_t dev) 1300 { 1301 struct siis_channel *ch = device_get_softc(dev); 1302 int i; 1303 1304 ch->eslots = 0; 1305 ch->recovery = 0; 1306 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1307 for (i = 0; i < 16; i++) { 1308 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1309 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1310 } 1311 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1312 siis_wait_ready(dev, 1000); 1313 } 1314 1315 static int 1316 siis_devreset(device_t dev) 1317 { 1318 struct siis_channel *ch = device_get_softc(dev); 1319 int timeout = 0; 1320 uint32_t val; 1321 1322 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1323 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1324 SIIS_P_CTL_DEV_RESET) != 0) { 1325 DELAY(1000); 1326 if (timeout++ > 100) { 1327 device_printf(dev, "device reset stuck (timeout %dms) " 1328 "status = %08x\n", timeout, val); 1329 return (EBUSY); 1330 } 1331 } 1332 if (bootverbose) 1333 device_printf(dev, "device reset time=%dms\n", timeout); 1334 return (0); 1335 } 1336 1337 static int 1338 siis_wait_ready(device_t dev, int t) 1339 { 1340 struct siis_channel *ch = device_get_softc(dev); 1341 int timeout = 0; 1342 uint32_t val; 1343 1344 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1345 SIIS_P_CTL_READY) == 0) { 1346 DELAY(1000); 1347 if (timeout++ > t) { 1348 device_printf(dev, "port is not ready (timeout %dms) " 1349 "status = %08x\n", t, val); 1350 return (EBUSY); 1351 } 1352 } 1353 if (bootverbose) 1354 device_printf(dev, "ready wait time=%dms\n", timeout); 1355 return (0); 1356 } 1357 1358 static void 1359 siis_reset(device_t dev) 1360 { 1361 struct siis_channel *ch = device_get_softc(dev); 1362 int i, retry = 0, sata_rev; 1363 uint32_t val; 1364 1365 if (bootverbose) 1366 device_printf(dev, "SIIS reset...\n"); 1367 if (!ch->readlog && !ch->recovery) 1368 xpt_freeze_simq(ch->sim, ch->numrslots); 1369 /* Requeue frozen command. */ 1370 if (ch->frozen) { 1371 union ccb *fccb = ch->frozen; 1372 ch->frozen = NULL; 1373 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1374 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1375 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1376 xpt_freeze_devq(fccb->ccb_h.path, 1); 1377 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1378 } 1379 xpt_done(fccb); 1380 } 1381 /* Requeue all running commands. */ 1382 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1383 /* Do we have a running request on slot? */ 1384 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1385 continue; 1386 /* XXX; Commands in loading state. */ 1387 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1388 } 1389 /* Finish all holden commands as-is. */ 1390 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1391 if (!ch->hold[i]) 1392 continue; 1393 xpt_done(ch->hold[i]); 1394 ch->hold[i] = NULL; 1395 ch->numhslots--; 1396 } 1397 if (ch->toslots != 0) 1398 xpt_release_simq(ch->sim, TRUE); 1399 ch->eslots = 0; 1400 ch->recovery = 0; 1401 ch->toslots = 0; 1402 ch->fatalerr = 0; 1403 /* Disable port interrupts */ 1404 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1405 /* Set speed limit. */ 1406 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1407 if (sata_rev == 1) 1408 val = ATA_SC_SPD_SPEED_GEN1; 1409 else if (sata_rev == 2) 1410 val = ATA_SC_SPD_SPEED_GEN2; 1411 else if (sata_rev == 3) 1412 val = ATA_SC_SPD_SPEED_GEN3; 1413 else 1414 val = 0; 1415 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1416 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1417 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1418 retry: 1419 siis_devreset(dev); 1420 /* Reset and reconnect PHY, */ 1421 if (!siis_sata_connect(ch)) { 1422 ch->devices = 0; 1423 /* Enable port interrupts */ 1424 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1425 if (bootverbose) 1426 device_printf(dev, 1427 "SIIS reset done: phy reset found no device\n"); 1428 /* Tell the XPT about the event */ 1429 xpt_async(AC_BUS_RESET, ch->path, NULL); 1430 return; 1431 } 1432 /* Wait for clearing busy status. */ 1433 if (siis_wait_ready(dev, 10000)) { 1434 device_printf(dev, "device ready timeout\n"); 1435 if (!retry) { 1436 device_printf(dev, "trying full port reset ...\n"); 1437 /* Get port to the reset state. */ 1438 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1439 DELAY(10000); 1440 /* Get port out of reset state. */ 1441 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1442 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1443 if (ch->pm_present) 1444 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1445 else 1446 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1447 siis_wait_ready(dev, 5000); 1448 retry = 1; 1449 goto retry; 1450 } 1451 } 1452 ch->devices = 1; 1453 /* Enable port interrupts */ 1454 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1455 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1456 if (bootverbose) 1457 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1458 /* Tell the XPT about the event */ 1459 xpt_async(AC_BUS_RESET, ch->path, NULL); 1460 } 1461 1462 static int 1463 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1464 { 1465 struct siis_channel *ch = device_get_softc(dev); 1466 u_int8_t *fis = &ctp->fis[0]; 1467 1468 bzero(fis, 24); 1469 fis[0] = 0x27; /* host to device */ 1470 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1471 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1472 fis[1] |= 0x80; 1473 fis[2] = ATA_PACKET_CMD; 1474 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1475 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1476 fis[3] = ATA_F_DMA; 1477 else { 1478 fis[5] = ccb->csio.dxfer_len; 1479 fis[6] = ccb->csio.dxfer_len >> 8; 1480 } 1481 fis[7] = ATA_D_LBA; 1482 fis[15] = ATA_A_4BIT; 1483 bzero(ctp->u.atapi.ccb, 16); 1484 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1485 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1486 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1487 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1488 fis[1] |= 0x80; 1489 fis[2] = ccb->ataio.cmd.command; 1490 fis[3] = ccb->ataio.cmd.features; 1491 fis[4] = ccb->ataio.cmd.lba_low; 1492 fis[5] = ccb->ataio.cmd.lba_mid; 1493 fis[6] = ccb->ataio.cmd.lba_high; 1494 fis[7] = ccb->ataio.cmd.device; 1495 fis[8] = ccb->ataio.cmd.lba_low_exp; 1496 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1497 fis[10] = ccb->ataio.cmd.lba_high_exp; 1498 fis[11] = ccb->ataio.cmd.features_exp; 1499 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1500 fis[12] = tag << 3; 1501 fis[13] = 0; 1502 } else { 1503 fis[12] = ccb->ataio.cmd.sector_count; 1504 fis[13] = ccb->ataio.cmd.sector_count_exp; 1505 } 1506 fis[15] = ATA_A_4BIT; 1507 } else { 1508 /* Soft reset. */ 1509 } 1510 return (20); 1511 } 1512 1513 static int 1514 siis_sata_connect(struct siis_channel *ch) 1515 { 1516 u_int32_t status; 1517 int timeout; 1518 1519 /* Wait up to 100ms for "connect well" */ 1520 for (timeout = 0; timeout < 100 ; timeout++) { 1521 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1522 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1523 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1524 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1525 break; 1526 DELAY(1000); 1527 } 1528 if (timeout >= 100) { 1529 if (bootverbose) { 1530 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1531 status); 1532 } 1533 return (0); 1534 } 1535 if (bootverbose) { 1536 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1537 timeout, status); 1538 } 1539 /* Clear SATA error register */ 1540 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1541 return (1); 1542 } 1543 1544 static void 1545 siisaction(struct cam_sim *sim, union ccb *ccb) 1546 { 1547 device_t dev; 1548 struct siis_channel *ch; 1549 1550 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1551 ccb->ccb_h.func_code)); 1552 1553 ch = (struct siis_channel *)cam_sim_softc(sim); 1554 dev = ch->dev; 1555 mtx_assert(&ch->mtx, MA_OWNED); 1556 switch (ccb->ccb_h.func_code) { 1557 /* Common cases first */ 1558 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1559 case XPT_SCSI_IO: 1560 if (ch->devices == 0) { 1561 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1562 xpt_done(ccb); 1563 break; 1564 } 1565 /* Check for command collision. */ 1566 if (siis_check_collision(dev, ccb)) { 1567 /* Freeze command. */ 1568 ch->frozen = ccb; 1569 /* We have only one frozen slot, so freeze simq also. */ 1570 xpt_freeze_simq(ch->sim, 1); 1571 return; 1572 } 1573 siis_begin_transaction(dev, ccb); 1574 break; 1575 case XPT_EN_LUN: /* Enable LUN as a target */ 1576 case XPT_TARGET_IO: /* Execute target I/O request */ 1577 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1578 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1579 case XPT_ABORT: /* Abort the specified CCB */ 1580 /* XXX Implement */ 1581 ccb->ccb_h.status = CAM_REQ_INVALID; 1582 xpt_done(ccb); 1583 break; 1584 case XPT_SET_TRAN_SETTINGS: 1585 { 1586 struct ccb_trans_settings *cts = &ccb->cts; 1587 struct siis_device *d; 1588 1589 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1590 d = &ch->curr[ccb->ccb_h.target_id]; 1591 else 1592 d = &ch->user[ccb->ccb_h.target_id]; 1593 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1594 d->revision = cts->xport_specific.sata.revision; 1595 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1596 d->mode = cts->xport_specific.sata.mode; 1597 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1598 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1599 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1600 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1601 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1602 ch->pm_present = cts->xport_specific.sata.pm_present; 1603 if (ch->pm_present) 1604 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1605 else 1606 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1607 } 1608 ccb->ccb_h.status = CAM_REQ_CMP; 1609 xpt_done(ccb); 1610 break; 1611 } 1612 case XPT_GET_TRAN_SETTINGS: 1613 /* Get default/user set transfer settings for the target */ 1614 { 1615 struct ccb_trans_settings *cts = &ccb->cts; 1616 struct siis_device *d; 1617 uint32_t status; 1618 1619 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1620 d = &ch->curr[ccb->ccb_h.target_id]; 1621 else 1622 d = &ch->user[ccb->ccb_h.target_id]; 1623 cts->protocol = PROTO_ATA; 1624 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1625 cts->transport = XPORT_SATA; 1626 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1627 cts->proto_specific.valid = 0; 1628 cts->xport_specific.sata.valid = 0; 1629 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1630 (ccb->ccb_h.target_id == 15 || 1631 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1632 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1633 if (status & 0x0f0) { 1634 cts->xport_specific.sata.revision = 1635 (status & 0x0f0) >> 4; 1636 cts->xport_specific.sata.valid |= 1637 CTS_SATA_VALID_REVISION; 1638 } 1639 } else { 1640 cts->xport_specific.sata.revision = d->revision; 1641 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1642 } 1643 cts->xport_specific.sata.mode = d->mode; 1644 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1645 cts->xport_specific.sata.bytecount = d->bytecount; 1646 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1647 cts->xport_specific.sata.pm_present = ch->pm_present; 1648 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1649 cts->xport_specific.sata.tags = d->tags; 1650 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1651 ccb->ccb_h.status = CAM_REQ_CMP; 1652 xpt_done(ccb); 1653 break; 1654 } 1655 #if 0 1656 case XPT_CALC_GEOMETRY: 1657 { 1658 struct ccb_calc_geometry *ccg; 1659 uint32_t size_mb; 1660 uint32_t secs_per_cylinder; 1661 1662 ccg = &ccb->ccg; 1663 size_mb = ccg->volume_size 1664 / ((1024L * 1024L) / ccg->block_size); 1665 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1666 if (size_mb >= 2048) { 1667 ccg->heads = 255; 1668 ccg->secs_per_track = 63; 1669 } else { 1670 ccg->heads = 128; 1671 ccg->secs_per_track = 32; 1672 } 1673 } else { 1674 ccg->heads = 64; 1675 ccg->secs_per_track = 32; 1676 } 1677 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1678 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1679 ccb->ccb_h.status = CAM_REQ_CMP; 1680 xpt_done(ccb); 1681 break; 1682 } 1683 #endif 1684 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1685 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1686 siis_reset(dev); 1687 ccb->ccb_h.status = CAM_REQ_CMP; 1688 xpt_done(ccb); 1689 break; 1690 case XPT_TERM_IO: /* Terminate the I/O process */ 1691 /* XXX Implement */ 1692 ccb->ccb_h.status = CAM_REQ_INVALID; 1693 xpt_done(ccb); 1694 break; 1695 case XPT_PATH_INQ: /* Path routing inquiry */ 1696 { 1697 struct ccb_pathinq *cpi = &ccb->cpi; 1698 1699 cpi->version_num = 1; /* XXX??? */ 1700 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1701 cpi->hba_inquiry |= PI_SATAPM; 1702 cpi->target_sprt = 0; 1703 cpi->hba_misc = PIM_SEQSCAN; 1704 cpi->hba_eng_cnt = 0; 1705 cpi->max_target = 15; 1706 cpi->max_lun = 0; 1707 cpi->initiator_id = 0; 1708 cpi->bus_id = cam_sim_bus(sim); 1709 cpi->base_transfer_speed = 150000; 1710 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1711 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1712 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1713 cpi->unit_number = cam_sim_unit(sim); 1714 cpi->transport = XPORT_SATA; 1715 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1716 cpi->protocol = PROTO_ATA; 1717 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1718 cpi->ccb_h.status = CAM_REQ_CMP; 1719 cpi->maxio = MAXPHYS; 1720 xpt_done(ccb); 1721 break; 1722 } 1723 default: 1724 ccb->ccb_h.status = CAM_REQ_INVALID; 1725 xpt_done(ccb); 1726 break; 1727 } 1728 } 1729 1730 static void 1731 siispoll(struct cam_sim *sim) 1732 { 1733 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1734 1735 siis_ch_intr(ch->dev); 1736 } 1737