1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_debug.h> 56 57 /* local prototypes */ 58 static int siis_setup_interrupt(device_t dev); 59 static void siis_intr(void *data); 60 static int siis_suspend(device_t dev); 61 static int siis_resume(device_t dev); 62 static int siis_ch_suspend(device_t dev); 63 static int siis_ch_resume(device_t dev); 64 static void siis_ch_intr_locked(void *data); 65 static void siis_ch_intr(void *data); 66 static void siis_begin_transaction(device_t dev, union ccb *ccb); 67 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 68 static void siis_execute_transaction(struct siis_slot *slot); 69 static void siis_timeout(struct siis_slot *slot); 70 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 71 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 72 static void siis_dmainit(device_t dev); 73 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 74 static void siis_dmafini(device_t dev); 75 static void siis_slotsalloc(device_t dev); 76 static void siis_slotsfree(device_t dev); 77 static void siis_reset(device_t dev); 78 static void siis_portinit(device_t dev); 79 static int siis_wait_ready(device_t dev, int t); 80 81 static int siis_sata_connect(struct siis_channel *ch); 82 83 static void siis_issue_read_log(device_t dev); 84 static void siis_process_read_log(device_t dev, union ccb *ccb); 85 86 static void siisaction(struct cam_sim *sim, union ccb *ccb); 87 static void siispoll(struct cam_sim *sim); 88 89 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 90 91 static struct { 92 uint32_t id; 93 const char *name; 94 int ports; 95 int quirks; 96 #define SIIS_Q_SNTF 1 97 #define SIIS_Q_NOMSI 2 98 } siis_ids[] = { 99 {0x31241095, "SiI3124", 4, 0}, 100 {0x31248086, "SiI3124", 4, 0}, 101 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 102 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 103 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0, NULL, 0, 0} 107 }; 108 109 static int 110 siis_probe(device_t dev) 111 { 112 char buf[64]; 113 int i; 114 uint32_t devid = pci_get_devid(dev); 115 116 for (i = 0; siis_ids[i].id != 0; i++) { 117 if (siis_ids[i].id == devid) { 118 snprintf(buf, sizeof(buf), "%s SATA controller", 119 siis_ids[i].name); 120 device_set_desc_copy(dev, buf); 121 return (BUS_PROBE_VENDOR); 122 } 123 } 124 return (ENXIO); 125 } 126 127 static int 128 siis_attach(device_t dev) 129 { 130 struct siis_controller *ctlr = device_get_softc(dev); 131 uint32_t devid = pci_get_devid(dev); 132 device_t child; 133 int error, i, unit; 134 135 ctlr->dev = dev; 136 for (i = 0; siis_ids[i].id != 0; i++) { 137 if (siis_ids[i].id == devid) 138 break; 139 } 140 ctlr->quirks = siis_ids[i].quirks; 141 /* Global memory */ 142 ctlr->r_grid = PCIR_BAR(0); 143 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 144 &ctlr->r_grid, RF_ACTIVE))) 145 return (ENXIO); 146 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 147 /* Channels memory */ 148 ctlr->r_rid = PCIR_BAR(2); 149 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 150 &ctlr->r_rid, RF_ACTIVE))) 151 return (ENXIO); 152 /* Setup our own memory management for channels. */ 153 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 154 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 155 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 157 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 158 return (error); 159 } 160 if ((error = rman_manage_region(&ctlr->sc_iomem, 161 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 162 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 163 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 164 rman_fini(&ctlr->sc_iomem); 165 return (error); 166 } 167 /* Reset controller */ 168 siis_resume(dev); 169 /* Number of HW channels */ 170 ctlr->channels = siis_ids[i].ports; 171 /* Setup interrupts. */ 172 if (siis_setup_interrupt(dev)) { 173 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 174 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 175 rman_fini(&ctlr->sc_iomem); 176 return ENXIO; 177 } 178 /* Attach all channels on this controller */ 179 for (unit = 0; unit < ctlr->channels; unit++) { 180 child = device_add_child(dev, "siisch", -1); 181 if (child == NULL) 182 device_printf(dev, "failed to add channel device\n"); 183 else 184 device_set_ivars(child, (void *)(intptr_t)unit); 185 } 186 bus_generic_attach(dev); 187 return 0; 188 } 189 190 static int 191 siis_detach(device_t dev) 192 { 193 struct siis_controller *ctlr = device_get_softc(dev); 194 device_t *children; 195 int nchildren, i; 196 197 /* Detach & delete all children */ 198 if (!device_get_children(dev, &children, &nchildren)) { 199 for (i = 0; i < nchildren; i++) 200 device_delete_child(dev, children[i]); 201 free(children, M_TEMP); 202 } 203 /* Free interrupts. */ 204 if (ctlr->irq.r_irq) { 205 bus_teardown_intr(dev, ctlr->irq.r_irq, 206 ctlr->irq.handle); 207 bus_release_resource(dev, SYS_RES_IRQ, 208 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 209 } 210 pci_release_msi(dev); 211 /* Free memory. */ 212 rman_fini(&ctlr->sc_iomem); 213 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 214 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 215 return (0); 216 } 217 218 static int 219 siis_suspend(device_t dev) 220 { 221 struct siis_controller *ctlr = device_get_softc(dev); 222 223 bus_generic_suspend(dev); 224 /* Put controller into reset state. */ 225 ctlr->gctl |= SIIS_GCTL_GRESET; 226 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 227 return 0; 228 } 229 230 static int 231 siis_resume(device_t dev) 232 { 233 struct siis_controller *ctlr = device_get_softc(dev); 234 235 /* Set PCIe max read request size to at least 1024 bytes */ 236 if (pci_get_max_read_req(dev) < 1024) 237 pci_set_max_read_req(dev, 1024); 238 /* Put controller into reset state. */ 239 ctlr->gctl |= SIIS_GCTL_GRESET; 240 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 241 DELAY(10000); 242 /* Get controller out of reset state and enable port interrupts. */ 243 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 244 ctlr->gctl |= 0x0000000f; 245 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 246 return (bus_generic_resume(dev)); 247 } 248 249 static int 250 siis_setup_interrupt(device_t dev) 251 { 252 struct siis_controller *ctlr = device_get_softc(dev); 253 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 254 255 /* Process hints. */ 256 resource_int_value(device_get_name(dev), 257 device_get_unit(dev), "msi", &msi); 258 if (msi < 0) 259 msi = 0; 260 else if (msi > 0) 261 msi = min(1, pci_msi_count(dev)); 262 /* Allocate MSI if needed/present. */ 263 if (msi && pci_alloc_msi(dev, &msi) != 0) 264 msi = 0; 265 /* Allocate all IRQs. */ 266 ctlr->irq.r_irq_rid = msi ? 1 : 0; 267 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 268 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 269 device_printf(dev, "unable to map interrupt\n"); 270 return ENXIO; 271 } 272 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 273 siis_intr, ctlr, &ctlr->irq.handle))) { 274 /* SOS XXX release r_irq */ 275 device_printf(dev, "unable to setup interrupt\n"); 276 return ENXIO; 277 } 278 return (0); 279 } 280 281 /* 282 * Common case interrupt handler. 283 */ 284 static void 285 siis_intr(void *data) 286 { 287 struct siis_controller *ctlr = (struct siis_controller *)data; 288 u_int32_t is; 289 void *arg; 290 int unit; 291 292 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 293 for (unit = 0; unit < ctlr->channels; unit++) { 294 if ((is & SIIS_IS_PORT(unit)) != 0 && 295 (arg = ctlr->interrupt[unit].argument)) { 296 ctlr->interrupt[unit].function(arg); 297 } 298 } 299 /* Acknowledge interrupt, if MSI enabled. */ 300 if (ctlr->irq.r_irq_rid) { 301 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 302 ctlr->gctl | SIIS_GCTL_MSIACK); 303 } 304 } 305 306 static struct resource * 307 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 308 u_long start, u_long end, u_long count, u_int flags) 309 { 310 struct siis_controller *ctlr = device_get_softc(dev); 311 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 312 struct resource *res = NULL; 313 int offset = unit << 13; 314 long st; 315 316 switch (type) { 317 case SYS_RES_MEMORY: 318 st = rman_get_start(ctlr->r_mem); 319 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 320 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 321 if (res) { 322 bus_space_handle_t bsh; 323 bus_space_tag_t bst; 324 bsh = rman_get_bushandle(ctlr->r_mem); 325 bst = rman_get_bustag(ctlr->r_mem); 326 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 327 rman_set_bushandle(res, bsh); 328 rman_set_bustag(res, bst); 329 } 330 break; 331 case SYS_RES_IRQ: 332 if (*rid == ATA_IRQ_RID) 333 res = ctlr->irq.r_irq; 334 break; 335 } 336 return (res); 337 } 338 339 static int 340 siis_release_resource(device_t dev, device_t child, int type, int rid, 341 struct resource *r) 342 { 343 344 switch (type) { 345 case SYS_RES_MEMORY: 346 rman_release_resource(r); 347 return (0); 348 case SYS_RES_IRQ: 349 if (rid != ATA_IRQ_RID) 350 return ENOENT; 351 return (0); 352 } 353 return (EINVAL); 354 } 355 356 static int 357 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 358 int flags, driver_filter_t *filter, driver_intr_t *function, 359 void *argument, void **cookiep) 360 { 361 struct siis_controller *ctlr = device_get_softc(dev); 362 int unit = (intptr_t)device_get_ivars(child); 363 364 if (filter != NULL) { 365 printf("siis.c: we cannot use a filter here\n"); 366 return (EINVAL); 367 } 368 ctlr->interrupt[unit].function = function; 369 ctlr->interrupt[unit].argument = argument; 370 return (0); 371 } 372 373 static int 374 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 375 void *cookie) 376 { 377 struct siis_controller *ctlr = device_get_softc(dev); 378 int unit = (intptr_t)device_get_ivars(child); 379 380 ctlr->interrupt[unit].function = NULL; 381 ctlr->interrupt[unit].argument = NULL; 382 return (0); 383 } 384 385 static int 386 siis_print_child(device_t dev, device_t child) 387 { 388 int retval; 389 390 retval = bus_print_child_header(dev, child); 391 retval += printf(" at channel %d", 392 (int)(intptr_t)device_get_ivars(child)); 393 retval += bus_print_child_footer(dev, child); 394 395 return (retval); 396 } 397 398 devclass_t siis_devclass; 399 static device_method_t siis_methods[] = { 400 DEVMETHOD(device_probe, siis_probe), 401 DEVMETHOD(device_attach, siis_attach), 402 DEVMETHOD(device_detach, siis_detach), 403 DEVMETHOD(device_suspend, siis_suspend), 404 DEVMETHOD(device_resume, siis_resume), 405 DEVMETHOD(bus_print_child, siis_print_child), 406 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 407 DEVMETHOD(bus_release_resource, siis_release_resource), 408 DEVMETHOD(bus_setup_intr, siis_setup_intr), 409 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 410 { 0, 0 } 411 }; 412 static driver_t siis_driver = { 413 "siis", 414 siis_methods, 415 sizeof(struct siis_controller) 416 }; 417 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 418 MODULE_VERSION(siis, 1); 419 MODULE_DEPEND(siis, cam, 1, 1, 1); 420 421 static int 422 siis_ch_probe(device_t dev) 423 { 424 425 device_set_desc_copy(dev, "SIIS channel"); 426 return (0); 427 } 428 429 static int 430 siis_ch_attach(device_t dev) 431 { 432 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 433 struct siis_channel *ch = device_get_softc(dev); 434 struct cam_devq *devq; 435 int rid, error, i, sata_rev = 0; 436 437 ch->dev = dev; 438 ch->unit = (intptr_t)device_get_ivars(dev); 439 ch->quirks = ctlr->quirks; 440 resource_int_value(device_get_name(dev), 441 device_get_unit(dev), "pm_level", &ch->pm_level); 442 resource_int_value(device_get_name(dev), 443 device_get_unit(dev), "sata_rev", &sata_rev); 444 for (i = 0; i < 16; i++) { 445 ch->user[i].revision = sata_rev; 446 ch->user[i].mode = 0; 447 ch->user[i].bytecount = 8192; 448 ch->user[i].tags = SIIS_MAX_SLOTS; 449 ch->curr[i] = ch->user[i]; 450 } 451 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 452 rid = ch->unit; 453 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 454 &rid, RF_ACTIVE))) 455 return (ENXIO); 456 siis_dmainit(dev); 457 siis_slotsalloc(dev); 458 siis_ch_resume(dev); 459 mtx_lock(&ch->mtx); 460 rid = ATA_IRQ_RID; 461 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 462 &rid, RF_SHAREABLE | RF_ACTIVE))) { 463 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 464 device_printf(dev, "Unable to map interrupt\n"); 465 return (ENXIO); 466 } 467 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 468 siis_ch_intr_locked, dev, &ch->ih))) { 469 device_printf(dev, "Unable to setup interrupt\n"); 470 error = ENXIO; 471 goto err1; 472 } 473 /* Create the device queue for our SIM. */ 474 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 475 if (devq == NULL) { 476 device_printf(dev, "Unable to allocate simq\n"); 477 error = ENOMEM; 478 goto err1; 479 } 480 /* Construct SIM entry */ 481 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 482 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 483 if (ch->sim == NULL) { 484 device_printf(dev, "unable to allocate sim\n"); 485 error = ENOMEM; 486 goto err2; 487 } 488 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 489 device_printf(dev, "unable to register xpt bus\n"); 490 error = ENXIO; 491 goto err2; 492 } 493 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 494 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 495 device_printf(dev, "unable to create path\n"); 496 error = ENXIO; 497 goto err3; 498 } 499 mtx_unlock(&ch->mtx); 500 return (0); 501 502 err3: 503 xpt_bus_deregister(cam_sim_path(ch->sim)); 504 err2: 505 cam_sim_free(ch->sim, /*free_devq*/TRUE); 506 err1: 507 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 508 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 509 mtx_unlock(&ch->mtx); 510 return (error); 511 } 512 513 static int 514 siis_ch_detach(device_t dev) 515 { 516 struct siis_channel *ch = device_get_softc(dev); 517 518 mtx_lock(&ch->mtx); 519 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 520 xpt_free_path(ch->path); 521 xpt_bus_deregister(cam_sim_path(ch->sim)); 522 cam_sim_free(ch->sim, /*free_devq*/TRUE); 523 mtx_unlock(&ch->mtx); 524 525 bus_teardown_intr(dev, ch->r_irq, ch->ih); 526 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 527 528 siis_ch_suspend(dev); 529 siis_slotsfree(dev); 530 siis_dmafini(dev); 531 532 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 533 mtx_destroy(&ch->mtx); 534 return (0); 535 } 536 537 static int 538 siis_ch_suspend(device_t dev) 539 { 540 struct siis_channel *ch = device_get_softc(dev); 541 542 /* Put port into reset state. */ 543 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 544 return (0); 545 } 546 547 static int 548 siis_ch_resume(device_t dev) 549 { 550 struct siis_channel *ch = device_get_softc(dev); 551 552 /* Get port out of reset state. */ 553 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 554 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 555 if (ch->pm_present) 556 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 557 else 558 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 559 /* Enable port interrupts */ 560 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 561 return (0); 562 } 563 564 devclass_t siisch_devclass; 565 static device_method_t siisch_methods[] = { 566 DEVMETHOD(device_probe, siis_ch_probe), 567 DEVMETHOD(device_attach, siis_ch_attach), 568 DEVMETHOD(device_detach, siis_ch_detach), 569 DEVMETHOD(device_suspend, siis_ch_suspend), 570 DEVMETHOD(device_resume, siis_ch_resume), 571 { 0, 0 } 572 }; 573 static driver_t siisch_driver = { 574 "siisch", 575 siisch_methods, 576 sizeof(struct siis_channel) 577 }; 578 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 579 580 struct siis_dc_cb_args { 581 bus_addr_t maddr; 582 int error; 583 }; 584 585 static void 586 siis_dmainit(device_t dev) 587 { 588 struct siis_channel *ch = device_get_softc(dev); 589 struct siis_dc_cb_args dcba; 590 591 /* Command area. */ 592 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 593 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 594 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 595 0, NULL, NULL, &ch->dma.work_tag)) 596 goto error; 597 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 598 &ch->dma.work_map)) 599 goto error; 600 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 601 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 602 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 603 goto error; 604 } 605 ch->dma.work_bus = dcba.maddr; 606 /* Data area. */ 607 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 608 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 609 NULL, NULL, 610 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 611 SIIS_SG_ENTRIES, 0xFFFFFFFF, 612 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 613 goto error; 614 } 615 return; 616 617 error: 618 device_printf(dev, "WARNING - DMA initialization failed\n"); 619 siis_dmafini(dev); 620 } 621 622 static void 623 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 624 { 625 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 626 627 if (!(dcba->error = error)) 628 dcba->maddr = segs[0].ds_addr; 629 } 630 631 static void 632 siis_dmafini(device_t dev) 633 { 634 struct siis_channel *ch = device_get_softc(dev); 635 636 if (ch->dma.data_tag) { 637 bus_dma_tag_destroy(ch->dma.data_tag); 638 ch->dma.data_tag = NULL; 639 } 640 if (ch->dma.work_bus) { 641 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 642 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 643 ch->dma.work_bus = 0; 644 ch->dma.work_map = NULL; 645 ch->dma.work = NULL; 646 } 647 if (ch->dma.work_tag) { 648 bus_dma_tag_destroy(ch->dma.work_tag); 649 ch->dma.work_tag = NULL; 650 } 651 } 652 653 static void 654 siis_slotsalloc(device_t dev) 655 { 656 struct siis_channel *ch = device_get_softc(dev); 657 int i; 658 659 /* Alloc and setup command/dma slots */ 660 bzero(ch->slot, sizeof(ch->slot)); 661 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 662 struct siis_slot *slot = &ch->slot[i]; 663 664 slot->dev = dev; 665 slot->slot = i; 666 slot->state = SIIS_SLOT_EMPTY; 667 slot->ccb = NULL; 668 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 669 670 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 671 device_printf(ch->dev, "FAILURE - create data_map\n"); 672 } 673 } 674 675 static void 676 siis_slotsfree(device_t dev) 677 { 678 struct siis_channel *ch = device_get_softc(dev); 679 int i; 680 681 /* Free all dma slots */ 682 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 683 struct siis_slot *slot = &ch->slot[i]; 684 685 callout_drain(&slot->timeout); 686 if (slot->dma.data_map) { 687 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 688 slot->dma.data_map = NULL; 689 } 690 } 691 } 692 693 static void 694 siis_notify_events(device_t dev) 695 { 696 struct siis_channel *ch = device_get_softc(dev); 697 struct cam_path *dpath; 698 u_int32_t status; 699 int i; 700 701 if (ch->quirks & SIIS_Q_SNTF) { 702 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 703 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 704 } else { 705 /* 706 * Without SNTF we have no idea which device sent notification. 707 * If PMP is connected, assume it, else - device. 708 */ 709 status = (ch->pm_present) ? 0x8000 : 0x0001; 710 } 711 if (bootverbose) 712 device_printf(dev, "SNTF 0x%04x\n", status); 713 for (i = 0; i < 16; i++) { 714 if ((status & (1 << i)) == 0) 715 continue; 716 if (xpt_create_path(&dpath, NULL, 717 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 718 xpt_async(AC_SCSI_AEN, dpath, NULL); 719 xpt_free_path(dpath); 720 } 721 } 722 723 } 724 725 static void 726 siis_phy_check_events(device_t dev) 727 { 728 struct siis_channel *ch = device_get_softc(dev); 729 730 /* If we have a connection event, deal with it */ 731 if (ch->pm_level == 0) { 732 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 733 union ccb *ccb; 734 735 if (bootverbose) { 736 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 737 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 738 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 739 device_printf(dev, "CONNECT requested\n"); 740 } else 741 device_printf(dev, "DISCONNECT requested\n"); 742 } 743 siis_reset(dev); 744 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 745 return; 746 if (xpt_create_path(&ccb->ccb_h.path, NULL, 747 cam_sim_path(ch->sim), 748 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 749 xpt_free_ccb(ccb); 750 return; 751 } 752 xpt_rescan(ccb); 753 } 754 } 755 756 static void 757 siis_ch_intr_locked(void *data) 758 { 759 device_t dev = (device_t)data; 760 struct siis_channel *ch = device_get_softc(dev); 761 762 mtx_lock(&ch->mtx); 763 siis_ch_intr(data); 764 mtx_unlock(&ch->mtx); 765 } 766 767 static void 768 siis_ch_intr(void *data) 769 { 770 device_t dev = (device_t)data; 771 struct siis_channel *ch = device_get_softc(dev); 772 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 773 enum siis_err_type et; 774 int i, ccs, port, tslots; 775 776 mtx_assert(&ch->mtx, MA_OWNED); 777 /* Read command statuses. */ 778 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 779 ok = ch->rslots & ~sstatus; 780 /* Complete all successfull commands. */ 781 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 782 if ((ok >> i) & 1) 783 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 784 } 785 /* Do we have any other events? */ 786 if ((sstatus & SIIS_P_SS_ATTN) == 0) 787 return; 788 /* Read and clear interrupt statuses. */ 789 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 790 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 791 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 792 /* Process PHY events */ 793 if (istatus & SIIS_P_IX_PHYRDYCHG) 794 siis_phy_check_events(dev); 795 /* Process NOTIFY events */ 796 if (istatus & SIIS_P_IX_SDBN) 797 siis_notify_events(dev); 798 /* Process command errors */ 799 if (istatus & SIIS_P_IX_COMMERR) { 800 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 801 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 802 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 803 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 804 err = ch->rslots & sstatus; 805 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 806 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 807 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 808 809 if (!ch->readlog && !ch->recovery) { 810 xpt_freeze_simq(ch->sim, ch->numrslots); 811 ch->recovery = 1; 812 } 813 if (ch->frozen) { 814 union ccb *fccb = ch->frozen; 815 ch->frozen = NULL; 816 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 817 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 818 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 819 xpt_freeze_devq(fccb->ccb_h.path, 1); 820 fccb->ccb_h.status |= CAM_DEV_QFRZN; 821 } 822 xpt_done(fccb); 823 } 824 if (estatus == SIIS_P_CMDERR_DEV || 825 estatus == SIIS_P_CMDERR_SDB || 826 estatus == SIIS_P_CMDERR_DATAFIS) { 827 tslots = ch->numtslots[port]; 828 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 829 /* XXX: requests in loading state. */ 830 if (((ch->rslots >> i) & 1) == 0) 831 continue; 832 if (ch->slot[i].ccb->ccb_h.target_id != port) 833 continue; 834 if (tslots == 0) { 835 /* Untagged operation. */ 836 if (i == ccs) 837 et = SIIS_ERR_TFE; 838 else 839 et = SIIS_ERR_INNOCENT; 840 } else { 841 /* Tagged operation. */ 842 et = SIIS_ERR_NCQ; 843 } 844 siis_end_transaction(&ch->slot[i], et); 845 } 846 /* 847 * We can't reinit port if there are some other 848 * commands active, use resume to complete them. 849 */ 850 if (ch->rslots != 0) 851 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 852 } else { 853 if (estatus == SIIS_P_CMDERR_SENDFIS || 854 estatus == SIIS_P_CMDERR_INCSTATE || 855 estatus == SIIS_P_CMDERR_PPE || 856 estatus == SIIS_P_CMDERR_SERVICE) { 857 et = SIIS_ERR_SATA; 858 } else 859 et = SIIS_ERR_INVALID; 860 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 861 /* XXX: requests in loading state. */ 862 if (((ch->rslots >> i) & 1) == 0) 863 continue; 864 siis_end_transaction(&ch->slot[i], et); 865 } 866 } 867 } 868 } 869 870 /* Must be called with channel locked. */ 871 static int 872 siis_check_collision(device_t dev, union ccb *ccb) 873 { 874 struct siis_channel *ch = device_get_softc(dev); 875 876 mtx_assert(&ch->mtx, MA_OWNED); 877 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 878 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 879 /* Tagged command while we have no supported tag free. */ 880 if (((~ch->oslots) & (0x7fffffff >> (31 - 881 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 882 return (1); 883 } 884 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 885 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 886 /* Atomic command while anything active. */ 887 if (ch->numrslots != 0) 888 return (1); 889 } 890 /* We have some atomic command running. */ 891 if (ch->aslots != 0) 892 return (1); 893 return (0); 894 } 895 896 /* Must be called with channel locked. */ 897 static void 898 siis_begin_transaction(device_t dev, union ccb *ccb) 899 { 900 struct siis_channel *ch = device_get_softc(dev); 901 struct siis_slot *slot; 902 int tag, tags; 903 904 mtx_assert(&ch->mtx, MA_OWNED); 905 /* Choose empty slot. */ 906 tags = SIIS_MAX_SLOTS; 907 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 908 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 909 tags = ch->curr[ccb->ccb_h.target_id].tags; 910 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 911 /* Occupy chosen slot. */ 912 slot = &ch->slot[tag]; 913 slot->ccb = ccb; 914 /* Update channel stats. */ 915 ch->oslots |= (1 << slot->slot); 916 ch->numrslots++; 917 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 918 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 919 ch->numtslots[ccb->ccb_h.target_id]++; 920 } 921 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 922 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 923 ch->aslots |= (1 << slot->slot); 924 slot->dma.nsegs = 0; 925 /* If request moves data, setup and load SG list */ 926 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 927 void *buf; 928 bus_size_t size; 929 930 slot->state = SIIS_SLOT_LOADING; 931 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 932 buf = ccb->ataio.data_ptr; 933 size = ccb->ataio.dxfer_len; 934 } else { 935 buf = ccb->csio.data_ptr; 936 size = ccb->csio.dxfer_len; 937 } 938 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 939 buf, size, siis_dmasetprd, slot, 0); 940 } else 941 siis_execute_transaction(slot); 942 } 943 944 /* Locked by busdma engine. */ 945 static void 946 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 947 { 948 struct siis_slot *slot = arg; 949 struct siis_channel *ch = device_get_softc(slot->dev); 950 struct siis_cmd *ctp; 951 struct siis_dma_prd *prd; 952 int i; 953 954 mtx_assert(&ch->mtx, MA_OWNED); 955 if (error) { 956 device_printf(slot->dev, "DMA load error\n"); 957 if (!ch->readlog) 958 xpt_freeze_simq(ch->sim, 1); 959 siis_end_transaction(slot, SIIS_ERR_INVALID); 960 return; 961 } 962 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 963 /* Get a piece of the workspace for this request */ 964 ctp = (struct siis_cmd *) 965 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 966 /* Fill S/G table */ 967 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 968 prd = &ctp->u.ata.prd[0]; 969 else 970 prd = &ctp->u.atapi.prd[0]; 971 for (i = 0; i < nsegs; i++) { 972 prd[i].dba = htole64(segs[i].ds_addr); 973 prd[i].dbc = htole32(segs[i].ds_len); 974 prd[i].control = 0; 975 } 976 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 977 slot->dma.nsegs = nsegs; 978 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 979 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 980 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 981 siis_execute_transaction(slot); 982 } 983 984 /* Must be called with channel locked. */ 985 static void 986 siis_execute_transaction(struct siis_slot *slot) 987 { 988 device_t dev = slot->dev; 989 struct siis_channel *ch = device_get_softc(dev); 990 struct siis_cmd *ctp; 991 union ccb *ccb = slot->ccb; 992 u_int64_t prb_bus; 993 994 mtx_assert(&ch->mtx, MA_OWNED); 995 /* Get a piece of the workspace for this request */ 996 ctp = (struct siis_cmd *) 997 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 998 ctp->control = 0; 999 ctp->protocol_override = 0; 1000 ctp->transfer_count = 0; 1001 /* Special handling for Soft Reset command. */ 1002 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1003 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1004 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1005 } else { 1006 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1007 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1008 ctp->protocol_override |= 1009 htole16(SIIS_PRB_PROTO_NCQ); 1010 } 1011 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1012 ctp->protocol_override |= 1013 htole16(SIIS_PRB_PROTO_READ); 1014 } else 1015 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1016 ctp->protocol_override |= 1017 htole16(SIIS_PRB_PROTO_WRITE); 1018 } 1019 } 1020 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1021 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1022 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1023 else 1024 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1025 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1026 } 1027 /* Special handling for Soft Reset command. */ 1028 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1029 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1030 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1031 /* Kick controller into sane state */ 1032 siis_portinit(dev); 1033 } 1034 /* Setup the FIS for this request */ 1035 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1036 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1037 if (!ch->readlog) 1038 xpt_freeze_simq(ch->sim, 1); 1039 siis_end_transaction(slot, SIIS_ERR_INVALID); 1040 return; 1041 } 1042 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1043 BUS_DMASYNC_PREWRITE); 1044 /* Issue command to the controller. */ 1045 slot->state = SIIS_SLOT_RUNNING; 1046 ch->rslots |= (1 << slot->slot); 1047 prb_bus = ch->dma.work_bus + 1048 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1049 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1050 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1051 /* Start command execution timeout */ 1052 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1053 (timeout_t*)siis_timeout, slot); 1054 return; 1055 } 1056 1057 /* Must be called with channel locked. */ 1058 static void 1059 siis_process_timeout(device_t dev) 1060 { 1061 struct siis_channel *ch = device_get_softc(dev); 1062 int i; 1063 1064 mtx_assert(&ch->mtx, MA_OWNED); 1065 if (!ch->readlog && !ch->recovery) { 1066 xpt_freeze_simq(ch->sim, ch->numrslots); 1067 ch->recovery = 1; 1068 } 1069 /* Handle the rest of commands. */ 1070 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1071 /* Do we have a running request on slot? */ 1072 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1073 continue; 1074 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1075 } 1076 } 1077 1078 /* Must be called with channel locked. */ 1079 static void 1080 siis_rearm_timeout(device_t dev) 1081 { 1082 struct siis_channel *ch = device_get_softc(dev); 1083 int i; 1084 1085 mtx_assert(&ch->mtx, MA_OWNED); 1086 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1087 struct siis_slot *slot = &ch->slot[i]; 1088 1089 /* Do we have a running request on slot? */ 1090 if (slot->state < SIIS_SLOT_RUNNING) 1091 continue; 1092 if ((ch->toslots & (1 << i)) == 0) 1093 continue; 1094 callout_reset(&slot->timeout, 1095 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1096 (timeout_t*)siis_timeout, slot); 1097 } 1098 } 1099 1100 /* Locked by callout mechanism. */ 1101 static void 1102 siis_timeout(struct siis_slot *slot) 1103 { 1104 device_t dev = slot->dev; 1105 struct siis_channel *ch = device_get_softc(dev); 1106 1107 mtx_assert(&ch->mtx, MA_OWNED); 1108 /* Check for stale timeout. */ 1109 if (slot->state < SIIS_SLOT_RUNNING) 1110 return; 1111 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1112 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1113 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1114 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1115 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1116 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1117 1118 if (ch->toslots == 0) 1119 xpt_freeze_simq(ch->sim, 1); 1120 ch->toslots |= (1 << slot->slot); 1121 if ((ch->rslots & ~ch->toslots) == 0) 1122 siis_process_timeout(dev); 1123 else 1124 device_printf(dev, " ... waiting for slots %08x\n", 1125 ch->rslots & ~ch->toslots); 1126 } 1127 1128 /* Must be called with channel locked. */ 1129 static void 1130 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1131 { 1132 device_t dev = slot->dev; 1133 struct siis_channel *ch = device_get_softc(dev); 1134 union ccb *ccb = slot->ccb; 1135 1136 mtx_assert(&ch->mtx, MA_OWNED); 1137 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1138 BUS_DMASYNC_POSTWRITE); 1139 /* Read result registers to the result struct 1140 * May be incorrect if several commands finished same time, 1141 * so read only when sure or have to. 1142 */ 1143 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1144 struct ata_res *res = &ccb->ataio.res; 1145 if ((et == SIIS_ERR_TFE) || 1146 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1147 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1148 1149 res->status = ATA_INB(ch->r_mem, offs + 2); 1150 res->error = ATA_INB(ch->r_mem, offs + 3); 1151 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1152 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1153 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1154 res->device = ATA_INB(ch->r_mem, offs + 7); 1155 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1156 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1157 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1158 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1159 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1160 } else 1161 bzero(res, sizeof(*res)); 1162 } 1163 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1164 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1165 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1166 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1167 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1168 } 1169 /* Set proper result status. */ 1170 if (et != SIIS_ERR_NONE || ch->recovery) { 1171 ch->eslots |= (1 << slot->slot); 1172 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1173 } 1174 /* In case of error, freeze device for proper recovery. */ 1175 if (et != SIIS_ERR_NONE && 1176 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1177 xpt_freeze_devq(ccb->ccb_h.path, 1); 1178 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1179 } 1180 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1181 switch (et) { 1182 case SIIS_ERR_NONE: 1183 ccb->ccb_h.status |= CAM_REQ_CMP; 1184 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1185 ccb->csio.scsi_status = SCSI_STATUS_OK; 1186 break; 1187 case SIIS_ERR_INVALID: 1188 ch->fatalerr = 1; 1189 ccb->ccb_h.status |= CAM_REQ_INVALID; 1190 break; 1191 case SIIS_ERR_INNOCENT: 1192 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1193 break; 1194 case SIIS_ERR_TFE: 1195 case SIIS_ERR_NCQ: 1196 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1197 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1198 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1199 } else { 1200 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1201 } 1202 break; 1203 case SIIS_ERR_SATA: 1204 ch->fatalerr = 1; 1205 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1206 break; 1207 case SIIS_ERR_TIMEOUT: 1208 ch->fatalerr = 1; 1209 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1210 break; 1211 default: 1212 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1213 } 1214 /* Free slot. */ 1215 ch->oslots &= ~(1 << slot->slot); 1216 ch->rslots &= ~(1 << slot->slot); 1217 ch->aslots &= ~(1 << slot->slot); 1218 if (et != SIIS_ERR_TIMEOUT) { 1219 if (ch->toslots == (1 << slot->slot)) 1220 xpt_release_simq(ch->sim, TRUE); 1221 ch->toslots &= ~(1 << slot->slot); 1222 } 1223 slot->state = SIIS_SLOT_EMPTY; 1224 slot->ccb = NULL; 1225 /* Update channel stats. */ 1226 ch->numrslots--; 1227 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1228 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1229 ch->numtslots[ccb->ccb_h.target_id]--; 1230 } 1231 /* If it was our READ LOG command - process it. */ 1232 if (ch->readlog) { 1233 siis_process_read_log(dev, ccb); 1234 /* If it was NCQ command error, put result on hold. */ 1235 } else if (et == SIIS_ERR_NCQ) { 1236 ch->hold[slot->slot] = ccb; 1237 ch->numhslots++; 1238 } else 1239 xpt_done(ccb); 1240 /* Unfreeze frozen command. */ 1241 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1242 union ccb *fccb = ch->frozen; 1243 ch->frozen = NULL; 1244 siis_begin_transaction(dev, fccb); 1245 xpt_release_simq(ch->sim, TRUE); 1246 } 1247 /* If we have no other active commands, ... */ 1248 if (ch->rslots == 0) { 1249 /* if there were timeouts or fatal error - reset port. */ 1250 if (ch->toslots != 0 || ch->fatalerr) { 1251 siis_reset(dev); 1252 } else { 1253 /* if we have slots in error, we can reinit port. */ 1254 if (ch->eslots != 0) 1255 siis_portinit(dev); 1256 /* if there commands on hold, we can do READ LOG. */ 1257 if (!ch->readlog && ch->numhslots) 1258 siis_issue_read_log(dev); 1259 } 1260 /* If all the reset of commands are in timeout - abort them. */ 1261 } else if ((ch->rslots & ~ch->toslots) == 0 && 1262 et != SIIS_ERR_TIMEOUT) 1263 siis_rearm_timeout(dev); 1264 } 1265 1266 static void 1267 siis_issue_read_log(device_t dev) 1268 { 1269 struct siis_channel *ch = device_get_softc(dev); 1270 union ccb *ccb; 1271 struct ccb_ataio *ataio; 1272 int i; 1273 1274 /* Find some holden command. */ 1275 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1276 if (ch->hold[i]) 1277 break; 1278 } 1279 if (i == SIIS_MAX_SLOTS) 1280 return; 1281 ch->readlog = 1; 1282 ccb = xpt_alloc_ccb_nowait(); 1283 if (ccb == NULL) { 1284 device_printf(dev, "Unable allocate READ LOG command"); 1285 return; /* XXX */ 1286 } 1287 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1288 ccb->ccb_h.func_code = XPT_ATA_IO; 1289 ccb->ccb_h.flags = CAM_DIR_IN; 1290 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1291 ataio = &ccb->ataio; 1292 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1293 if (ataio->data_ptr == NULL) { 1294 device_printf(dev, "Unable allocate memory for READ LOG command"); 1295 return; /* XXX */ 1296 } 1297 ataio->dxfer_len = 512; 1298 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1299 ataio->cmd.flags = CAM_ATAIO_48BIT; 1300 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1301 ataio->cmd.sector_count = 1; 1302 ataio->cmd.sector_count_exp = 0; 1303 ataio->cmd.lba_low = 0x10; 1304 ataio->cmd.lba_mid = 0; 1305 ataio->cmd.lba_mid_exp = 0; 1306 siis_begin_transaction(dev, ccb); 1307 } 1308 1309 static void 1310 siis_process_read_log(device_t dev, union ccb *ccb) 1311 { 1312 struct siis_channel *ch = device_get_softc(dev); 1313 uint8_t *data; 1314 struct ata_res *res; 1315 int i; 1316 1317 ch->readlog = 0; 1318 data = ccb->ataio.data_ptr; 1319 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1320 (data[0] & 0x80) == 0) { 1321 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1322 if (!ch->hold[i]) 1323 continue; 1324 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1325 continue; 1326 if ((data[0] & 0x1F) == i) { 1327 res = &ch->hold[i]->ataio.res; 1328 res->status = data[2]; 1329 res->error = data[3]; 1330 res->lba_low = data[4]; 1331 res->lba_mid = data[5]; 1332 res->lba_high = data[6]; 1333 res->device = data[7]; 1334 res->lba_low_exp = data[8]; 1335 res->lba_mid_exp = data[9]; 1336 res->lba_high_exp = data[10]; 1337 res->sector_count = data[12]; 1338 res->sector_count_exp = data[13]; 1339 } else { 1340 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1341 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1342 } 1343 xpt_done(ch->hold[i]); 1344 ch->hold[i] = NULL; 1345 ch->numhslots--; 1346 } 1347 } else { 1348 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1349 device_printf(dev, "Error while READ LOG EXT\n"); 1350 else if ((data[0] & 0x80) == 0) { 1351 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1352 } 1353 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1354 if (!ch->hold[i]) 1355 continue; 1356 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1357 continue; 1358 xpt_done(ch->hold[i]); 1359 ch->hold[i] = NULL; 1360 ch->numhslots--; 1361 } 1362 } 1363 free(ccb->ataio.data_ptr, M_SIIS); 1364 xpt_free_ccb(ccb); 1365 } 1366 1367 static void 1368 siis_portinit(device_t dev) 1369 { 1370 struct siis_channel *ch = device_get_softc(dev); 1371 int i; 1372 1373 ch->eslots = 0; 1374 ch->recovery = 0; 1375 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1376 for (i = 0; i < 16; i++) { 1377 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1378 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1379 } 1380 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1381 siis_wait_ready(dev, 1000); 1382 } 1383 1384 static int 1385 siis_devreset(device_t dev) 1386 { 1387 struct siis_channel *ch = device_get_softc(dev); 1388 int timeout = 0; 1389 uint32_t val; 1390 1391 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1392 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1393 SIIS_P_CTL_DEV_RESET) != 0) { 1394 DELAY(1000); 1395 if (timeout++ > 100) { 1396 device_printf(dev, "device reset stuck (timeout %dms) " 1397 "status = %08x\n", timeout, val); 1398 return (EBUSY); 1399 } 1400 } 1401 return (0); 1402 } 1403 1404 static int 1405 siis_wait_ready(device_t dev, int t) 1406 { 1407 struct siis_channel *ch = device_get_softc(dev); 1408 int timeout = 0; 1409 uint32_t val; 1410 1411 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1412 SIIS_P_CTL_READY) == 0) { 1413 DELAY(1000); 1414 if (timeout++ > t) { 1415 device_printf(dev, "port is not ready (timeout %dms) " 1416 "status = %08x\n", t, val); 1417 return (EBUSY); 1418 } 1419 } 1420 return (0); 1421 } 1422 1423 static void 1424 siis_reset(device_t dev) 1425 { 1426 struct siis_channel *ch = device_get_softc(dev); 1427 int i, retry = 0, sata_rev; 1428 uint32_t val; 1429 1430 xpt_freeze_simq(ch->sim, 1); 1431 if (bootverbose) 1432 device_printf(dev, "SIIS reset...\n"); 1433 if (!ch->readlog && !ch->recovery) 1434 xpt_freeze_simq(ch->sim, ch->numrslots); 1435 /* Requeue frozen command. */ 1436 if (ch->frozen) { 1437 union ccb *fccb = ch->frozen; 1438 ch->frozen = NULL; 1439 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1440 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1441 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1442 xpt_freeze_devq(fccb->ccb_h.path, 1); 1443 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1444 } 1445 xpt_done(fccb); 1446 } 1447 /* Requeue all running commands. */ 1448 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1449 /* Do we have a running request on slot? */ 1450 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1451 continue; 1452 /* XXX; Commands in loading state. */ 1453 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1454 } 1455 /* Finish all holden commands as-is. */ 1456 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1457 if (!ch->hold[i]) 1458 continue; 1459 xpt_done(ch->hold[i]); 1460 ch->hold[i] = NULL; 1461 ch->numhslots--; 1462 } 1463 if (ch->toslots != 0) 1464 xpt_release_simq(ch->sim, TRUE); 1465 ch->eslots = 0; 1466 ch->recovery = 0; 1467 ch->toslots = 0; 1468 ch->fatalerr = 0; 1469 /* Disable port interrupts */ 1470 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1471 /* Set speed limit. */ 1472 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1473 if (sata_rev == 1) 1474 val = ATA_SC_SPD_SPEED_GEN1; 1475 else if (sata_rev == 2) 1476 val = ATA_SC_SPD_SPEED_GEN2; 1477 else if (sata_rev == 3) 1478 val = ATA_SC_SPD_SPEED_GEN3; 1479 else 1480 val = 0; 1481 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1482 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1483 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1484 retry: 1485 siis_devreset(dev); 1486 /* Reset and reconnect PHY, */ 1487 if (!siis_sata_connect(ch)) { 1488 ch->devices = 0; 1489 /* Enable port interrupts */ 1490 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1491 if (bootverbose) 1492 device_printf(dev, 1493 "SIIS reset done: phy reset found no device\n"); 1494 /* Tell the XPT about the event */ 1495 xpt_async(AC_BUS_RESET, ch->path, NULL); 1496 xpt_release_simq(ch->sim, TRUE); 1497 return; 1498 } 1499 /* Wait for clearing busy status. */ 1500 if (siis_wait_ready(dev, 10000)) { 1501 device_printf(dev, "device ready timeout\n"); 1502 if (!retry) { 1503 device_printf(dev, "trying full port reset ...\n"); 1504 /* Get port to the reset state. */ 1505 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1506 DELAY(10000); 1507 /* Get port out of reset state. */ 1508 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1509 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1510 if (ch->pm_present) 1511 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1512 else 1513 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1514 siis_wait_ready(dev, 5000); 1515 retry = 1; 1516 goto retry; 1517 } 1518 } 1519 ch->devices = 1; 1520 /* Enable port interrupts */ 1521 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1522 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1523 if (bootverbose) 1524 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1525 /* Tell the XPT about the event */ 1526 xpt_async(AC_BUS_RESET, ch->path, NULL); 1527 xpt_release_simq(ch->sim, TRUE); 1528 } 1529 1530 static int 1531 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1532 { 1533 struct siis_channel *ch = device_get_softc(dev); 1534 u_int8_t *fis = &ctp->fis[0]; 1535 1536 bzero(fis, 24); 1537 fis[0] = 0x27; /* host to device */ 1538 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1539 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1540 fis[1] |= 0x80; 1541 fis[2] = ATA_PACKET_CMD; 1542 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1543 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1544 fis[3] = ATA_F_DMA; 1545 else { 1546 fis[5] = ccb->csio.dxfer_len; 1547 fis[6] = ccb->csio.dxfer_len >> 8; 1548 } 1549 fis[7] = ATA_D_LBA; 1550 fis[15] = ATA_A_4BIT; 1551 bzero(ctp->u.atapi.ccb, 16); 1552 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1553 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1554 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1555 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1556 fis[1] |= 0x80; 1557 fis[2] = ccb->ataio.cmd.command; 1558 fis[3] = ccb->ataio.cmd.features; 1559 fis[4] = ccb->ataio.cmd.lba_low; 1560 fis[5] = ccb->ataio.cmd.lba_mid; 1561 fis[6] = ccb->ataio.cmd.lba_high; 1562 fis[7] = ccb->ataio.cmd.device; 1563 fis[8] = ccb->ataio.cmd.lba_low_exp; 1564 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1565 fis[10] = ccb->ataio.cmd.lba_high_exp; 1566 fis[11] = ccb->ataio.cmd.features_exp; 1567 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1568 fis[12] = tag << 3; 1569 fis[13] = 0; 1570 } else { 1571 fis[12] = ccb->ataio.cmd.sector_count; 1572 fis[13] = ccb->ataio.cmd.sector_count_exp; 1573 } 1574 fis[15] = ATA_A_4BIT; 1575 } else { 1576 /* Soft reset. */ 1577 } 1578 return (20); 1579 } 1580 1581 static int 1582 siis_sata_connect(struct siis_channel *ch) 1583 { 1584 u_int32_t status; 1585 int timeout; 1586 1587 /* Wait up to 100ms for "connect well" */ 1588 for (timeout = 0; timeout < 100 ; timeout++) { 1589 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1590 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1591 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1592 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1593 break; 1594 DELAY(1000); 1595 } 1596 if (timeout >= 100) { 1597 if (bootverbose) { 1598 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1599 status); 1600 } 1601 return (0); 1602 } 1603 if (bootverbose) { 1604 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1605 timeout, status); 1606 } 1607 /* Clear SATA error register */ 1608 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1609 return (1); 1610 } 1611 1612 static void 1613 siisaction(struct cam_sim *sim, union ccb *ccb) 1614 { 1615 device_t dev; 1616 struct siis_channel *ch; 1617 1618 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1619 ccb->ccb_h.func_code)); 1620 1621 ch = (struct siis_channel *)cam_sim_softc(sim); 1622 dev = ch->dev; 1623 mtx_assert(&ch->mtx, MA_OWNED); 1624 switch (ccb->ccb_h.func_code) { 1625 /* Common cases first */ 1626 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1627 case XPT_SCSI_IO: 1628 if (ch->devices == 0) { 1629 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1630 xpt_done(ccb); 1631 break; 1632 } 1633 /* Check for command collision. */ 1634 if (siis_check_collision(dev, ccb)) { 1635 /* Freeze command. */ 1636 ch->frozen = ccb; 1637 /* We have only one frozen slot, so freeze simq also. */ 1638 xpt_freeze_simq(ch->sim, 1); 1639 return; 1640 } 1641 siis_begin_transaction(dev, ccb); 1642 break; 1643 case XPT_EN_LUN: /* Enable LUN as a target */ 1644 case XPT_TARGET_IO: /* Execute target I/O request */ 1645 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1646 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1647 case XPT_ABORT: /* Abort the specified CCB */ 1648 /* XXX Implement */ 1649 ccb->ccb_h.status = CAM_REQ_INVALID; 1650 xpt_done(ccb); 1651 break; 1652 case XPT_SET_TRAN_SETTINGS: 1653 { 1654 struct ccb_trans_settings *cts = &ccb->cts; 1655 struct siis_device *d; 1656 1657 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1658 d = &ch->curr[ccb->ccb_h.target_id]; 1659 else 1660 d = &ch->user[ccb->ccb_h.target_id]; 1661 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1662 d->revision = cts->xport_specific.sata.revision; 1663 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1664 d->mode = cts->xport_specific.sata.mode; 1665 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1666 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1667 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1668 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1669 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1670 ch->pm_present = cts->xport_specific.sata.pm_present; 1671 if (ch->pm_present) 1672 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1673 else 1674 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1675 } 1676 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1677 d->atapi = cts->xport_specific.sata.atapi; 1678 ccb->ccb_h.status = CAM_REQ_CMP; 1679 xpt_done(ccb); 1680 break; 1681 } 1682 case XPT_GET_TRAN_SETTINGS: 1683 /* Get default/user set transfer settings for the target */ 1684 { 1685 struct ccb_trans_settings *cts = &ccb->cts; 1686 struct siis_device *d; 1687 uint32_t status; 1688 1689 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1690 d = &ch->curr[ccb->ccb_h.target_id]; 1691 else 1692 d = &ch->user[ccb->ccb_h.target_id]; 1693 cts->protocol = PROTO_ATA; 1694 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1695 cts->transport = XPORT_SATA; 1696 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1697 cts->proto_specific.valid = 0; 1698 cts->xport_specific.sata.valid = 0; 1699 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1700 (ccb->ccb_h.target_id == 15 || 1701 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1702 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1703 if (status & 0x0f0) { 1704 cts->xport_specific.sata.revision = 1705 (status & 0x0f0) >> 4; 1706 cts->xport_specific.sata.valid |= 1707 CTS_SATA_VALID_REVISION; 1708 } 1709 } else { 1710 cts->xport_specific.sata.revision = d->revision; 1711 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1712 } 1713 cts->xport_specific.sata.mode = d->mode; 1714 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1715 cts->xport_specific.sata.bytecount = d->bytecount; 1716 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1717 cts->xport_specific.sata.pm_present = ch->pm_present; 1718 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1719 cts->xport_specific.sata.tags = d->tags; 1720 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1721 cts->xport_specific.sata.atapi = d->atapi; 1722 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1723 ccb->ccb_h.status = CAM_REQ_CMP; 1724 xpt_done(ccb); 1725 break; 1726 } 1727 #if 0 1728 case XPT_CALC_GEOMETRY: 1729 { 1730 struct ccb_calc_geometry *ccg; 1731 uint32_t size_mb; 1732 uint32_t secs_per_cylinder; 1733 1734 ccg = &ccb->ccg; 1735 size_mb = ccg->volume_size 1736 / ((1024L * 1024L) / ccg->block_size); 1737 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1738 if (size_mb >= 2048) { 1739 ccg->heads = 255; 1740 ccg->secs_per_track = 63; 1741 } else { 1742 ccg->heads = 128; 1743 ccg->secs_per_track = 32; 1744 } 1745 } else { 1746 ccg->heads = 64; 1747 ccg->secs_per_track = 32; 1748 } 1749 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1750 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1751 ccb->ccb_h.status = CAM_REQ_CMP; 1752 xpt_done(ccb); 1753 break; 1754 } 1755 #endif 1756 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1757 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1758 siis_reset(dev); 1759 ccb->ccb_h.status = CAM_REQ_CMP; 1760 xpt_done(ccb); 1761 break; 1762 case XPT_TERM_IO: /* Terminate the I/O process */ 1763 /* XXX Implement */ 1764 ccb->ccb_h.status = CAM_REQ_INVALID; 1765 xpt_done(ccb); 1766 break; 1767 case XPT_PATH_INQ: /* Path routing inquiry */ 1768 { 1769 struct ccb_pathinq *cpi = &ccb->cpi; 1770 1771 cpi->version_num = 1; /* XXX??? */ 1772 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1773 cpi->hba_inquiry |= PI_SATAPM; 1774 cpi->target_sprt = 0; 1775 cpi->hba_misc = PIM_SEQSCAN; 1776 cpi->hba_eng_cnt = 0; 1777 cpi->max_target = 15; 1778 cpi->max_lun = 0; 1779 cpi->initiator_id = 0; 1780 cpi->bus_id = cam_sim_bus(sim); 1781 cpi->base_transfer_speed = 150000; 1782 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1783 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1784 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1785 cpi->unit_number = cam_sim_unit(sim); 1786 cpi->transport = XPORT_SATA; 1787 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1788 cpi->protocol = PROTO_ATA; 1789 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1790 cpi->ccb_h.status = CAM_REQ_CMP; 1791 cpi->maxio = MAXPHYS; 1792 xpt_done(ccb); 1793 break; 1794 } 1795 default: 1796 ccb->ccb_h.status = CAM_REQ_INVALID; 1797 xpt_done(ccb); 1798 break; 1799 } 1800 } 1801 1802 static void 1803 siispoll(struct cam_sim *sim) 1804 { 1805 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1806 1807 siis_ch_intr(ch->dev); 1808 } 1809