1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_debug.h> 56 57 /* local prototypes */ 58 static int siis_setup_interrupt(device_t dev); 59 static void siis_intr(void *data); 60 static int siis_suspend(device_t dev); 61 static int siis_resume(device_t dev); 62 static int siis_ch_init(device_t dev); 63 static int siis_ch_deinit(device_t dev); 64 static int siis_ch_suspend(device_t dev); 65 static int siis_ch_resume(device_t dev); 66 static void siis_ch_intr_locked(void *data); 67 static void siis_ch_intr(void *data); 68 static void siis_begin_transaction(device_t dev, union ccb *ccb); 69 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 70 static void siis_execute_transaction(struct siis_slot *slot); 71 static void siis_timeout(struct siis_slot *slot); 72 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 73 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 74 static void siis_dmainit(device_t dev); 75 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 76 static void siis_dmafini(device_t dev); 77 static void siis_slotsalloc(device_t dev); 78 static void siis_slotsfree(device_t dev); 79 static void siis_reset(device_t dev); 80 static void siis_portinit(device_t dev); 81 static int siis_wait_ready(device_t dev, int t); 82 83 static int siis_sata_connect(struct siis_channel *ch); 84 85 static void siis_issue_read_log(device_t dev); 86 static void siis_process_read_log(device_t dev, union ccb *ccb); 87 88 static void siisaction(struct cam_sim *sim, union ccb *ccb); 89 static void siispoll(struct cam_sim *sim); 90 91 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 92 93 static struct { 94 uint32_t id; 95 const char *name; 96 int ports; 97 int quirks; 98 #define SIIS_Q_SNTF 1 99 #define SIIS_Q_NOMSI 2 100 } siis_ids[] = { 101 {0x31241095, "SiI3124", 4, 0}, 102 {0x31248086, "SiI3124", 4, 0}, 103 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0, NULL, 0, 0} 109 }; 110 111 static int 112 siis_probe(device_t dev) 113 { 114 char buf[64]; 115 int i; 116 uint32_t devid = pci_get_devid(dev); 117 118 for (i = 0; siis_ids[i].id != 0; i++) { 119 if (siis_ids[i].id == devid) { 120 snprintf(buf, sizeof(buf), "%s SATA controller", 121 siis_ids[i].name); 122 device_set_desc_copy(dev, buf); 123 return (BUS_PROBE_VENDOR); 124 } 125 } 126 return (ENXIO); 127 } 128 129 static int 130 siis_attach(device_t dev) 131 { 132 struct siis_controller *ctlr = device_get_softc(dev); 133 uint32_t devid = pci_get_devid(dev); 134 device_t child; 135 int error, i, unit; 136 137 ctlr->dev = dev; 138 for (i = 0; siis_ids[i].id != 0; i++) { 139 if (siis_ids[i].id == devid) 140 break; 141 } 142 ctlr->quirks = siis_ids[i].quirks; 143 /* Global memory */ 144 ctlr->r_grid = PCIR_BAR(0); 145 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &ctlr->r_grid, RF_ACTIVE))) 147 return (ENXIO); 148 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 149 /* Channels memory */ 150 ctlr->r_rid = PCIR_BAR(2); 151 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 152 &ctlr->r_rid, RF_ACTIVE))) 153 return (ENXIO); 154 /* Setup our own memory management for channels. */ 155 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 156 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 157 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 158 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 159 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 160 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 161 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 162 return (error); 163 } 164 if ((error = rman_manage_region(&ctlr->sc_iomem, 165 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 166 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 167 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 168 rman_fini(&ctlr->sc_iomem); 169 return (error); 170 } 171 pci_enable_busmaster(dev); 172 /* Reset controller */ 173 siis_resume(dev); 174 /* Number of HW channels */ 175 ctlr->channels = siis_ids[i].ports; 176 /* Setup interrupts. */ 177 if (siis_setup_interrupt(dev)) { 178 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 179 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 180 rman_fini(&ctlr->sc_iomem); 181 return ENXIO; 182 } 183 /* Attach all channels on this controller */ 184 for (unit = 0; unit < ctlr->channels; unit++) { 185 child = device_add_child(dev, "siisch", -1); 186 if (child == NULL) 187 device_printf(dev, "failed to add channel device\n"); 188 else 189 device_set_ivars(child, (void *)(intptr_t)unit); 190 } 191 bus_generic_attach(dev); 192 return 0; 193 } 194 195 static int 196 siis_detach(device_t dev) 197 { 198 struct siis_controller *ctlr = device_get_softc(dev); 199 device_t *children; 200 int nchildren, i; 201 202 /* Detach & delete all children */ 203 if (!device_get_children(dev, &children, &nchildren)) { 204 for (i = 0; i < nchildren; i++) 205 device_delete_child(dev, children[i]); 206 free(children, M_TEMP); 207 } 208 /* Free interrupts. */ 209 if (ctlr->irq.r_irq) { 210 bus_teardown_intr(dev, ctlr->irq.r_irq, 211 ctlr->irq.handle); 212 bus_release_resource(dev, SYS_RES_IRQ, 213 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 214 } 215 pci_release_msi(dev); 216 /* Free memory. */ 217 rman_fini(&ctlr->sc_iomem); 218 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 219 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 220 return (0); 221 } 222 223 static int 224 siis_suspend(device_t dev) 225 { 226 struct siis_controller *ctlr = device_get_softc(dev); 227 228 bus_generic_suspend(dev); 229 /* Put controller into reset state. */ 230 ctlr->gctl |= SIIS_GCTL_GRESET; 231 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 232 return 0; 233 } 234 235 static int 236 siis_resume(device_t dev) 237 { 238 struct siis_controller *ctlr = device_get_softc(dev); 239 240 /* Set PCIe max read request size to at least 1024 bytes */ 241 if (pci_get_max_read_req(dev) < 1024) 242 pci_set_max_read_req(dev, 1024); 243 /* Put controller into reset state. */ 244 ctlr->gctl |= SIIS_GCTL_GRESET; 245 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 246 DELAY(10000); 247 /* Get controller out of reset state and enable port interrupts. */ 248 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 249 ctlr->gctl |= 0x0000000f; 250 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 251 return (bus_generic_resume(dev)); 252 } 253 254 static int 255 siis_setup_interrupt(device_t dev) 256 { 257 struct siis_controller *ctlr = device_get_softc(dev); 258 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 259 260 /* Process hints. */ 261 resource_int_value(device_get_name(dev), 262 device_get_unit(dev), "msi", &msi); 263 if (msi < 0) 264 msi = 0; 265 else if (msi > 0) 266 msi = min(1, pci_msi_count(dev)); 267 /* Allocate MSI if needed/present. */ 268 if (msi && pci_alloc_msi(dev, &msi) != 0) 269 msi = 0; 270 /* Allocate all IRQs. */ 271 ctlr->irq.r_irq_rid = msi ? 1 : 0; 272 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 273 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 274 device_printf(dev, "unable to map interrupt\n"); 275 return ENXIO; 276 } 277 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 278 siis_intr, ctlr, &ctlr->irq.handle))) { 279 /* SOS XXX release r_irq */ 280 device_printf(dev, "unable to setup interrupt\n"); 281 return ENXIO; 282 } 283 return (0); 284 } 285 286 /* 287 * Common case interrupt handler. 288 */ 289 static void 290 siis_intr(void *data) 291 { 292 struct siis_controller *ctlr = (struct siis_controller *)data; 293 u_int32_t is; 294 void *arg; 295 int unit; 296 297 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 298 for (unit = 0; unit < ctlr->channels; unit++) { 299 if ((is & SIIS_IS_PORT(unit)) != 0 && 300 (arg = ctlr->interrupt[unit].argument)) { 301 ctlr->interrupt[unit].function(arg); 302 } 303 } 304 /* Acknowledge interrupt, if MSI enabled. */ 305 if (ctlr->irq.r_irq_rid) { 306 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 307 ctlr->gctl | SIIS_GCTL_MSIACK); 308 } 309 } 310 311 static struct resource * 312 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 313 u_long start, u_long end, u_long count, u_int flags) 314 { 315 struct siis_controller *ctlr = device_get_softc(dev); 316 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 317 struct resource *res = NULL; 318 int offset = unit << 13; 319 long st; 320 321 switch (type) { 322 case SYS_RES_MEMORY: 323 st = rman_get_start(ctlr->r_mem); 324 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 325 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 326 if (res) { 327 bus_space_handle_t bsh; 328 bus_space_tag_t bst; 329 bsh = rman_get_bushandle(ctlr->r_mem); 330 bst = rman_get_bustag(ctlr->r_mem); 331 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 332 rman_set_bushandle(res, bsh); 333 rman_set_bustag(res, bst); 334 } 335 break; 336 case SYS_RES_IRQ: 337 if (*rid == ATA_IRQ_RID) 338 res = ctlr->irq.r_irq; 339 break; 340 } 341 return (res); 342 } 343 344 static int 345 siis_release_resource(device_t dev, device_t child, int type, int rid, 346 struct resource *r) 347 { 348 349 switch (type) { 350 case SYS_RES_MEMORY: 351 rman_release_resource(r); 352 return (0); 353 case SYS_RES_IRQ: 354 if (rid != ATA_IRQ_RID) 355 return ENOENT; 356 return (0); 357 } 358 return (EINVAL); 359 } 360 361 static int 362 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 363 int flags, driver_filter_t *filter, driver_intr_t *function, 364 void *argument, void **cookiep) 365 { 366 struct siis_controller *ctlr = device_get_softc(dev); 367 int unit = (intptr_t)device_get_ivars(child); 368 369 if (filter != NULL) { 370 printf("siis.c: we cannot use a filter here\n"); 371 return (EINVAL); 372 } 373 ctlr->interrupt[unit].function = function; 374 ctlr->interrupt[unit].argument = argument; 375 return (0); 376 } 377 378 static int 379 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 380 void *cookie) 381 { 382 struct siis_controller *ctlr = device_get_softc(dev); 383 int unit = (intptr_t)device_get_ivars(child); 384 385 ctlr->interrupt[unit].function = NULL; 386 ctlr->interrupt[unit].argument = NULL; 387 return (0); 388 } 389 390 static int 391 siis_print_child(device_t dev, device_t child) 392 { 393 int retval; 394 395 retval = bus_print_child_header(dev, child); 396 retval += printf(" at channel %d", 397 (int)(intptr_t)device_get_ivars(child)); 398 retval += bus_print_child_footer(dev, child); 399 400 return (retval); 401 } 402 403 static int 404 siis_child_location_str(device_t dev, device_t child, char *buf, 405 size_t buflen) 406 { 407 408 snprintf(buf, buflen, "channel=%d", 409 (int)(intptr_t)device_get_ivars(child)); 410 return (0); 411 } 412 413 devclass_t siis_devclass; 414 static device_method_t siis_methods[] = { 415 DEVMETHOD(device_probe, siis_probe), 416 DEVMETHOD(device_attach, siis_attach), 417 DEVMETHOD(device_detach, siis_detach), 418 DEVMETHOD(device_suspend, siis_suspend), 419 DEVMETHOD(device_resume, siis_resume), 420 DEVMETHOD(bus_print_child, siis_print_child), 421 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 422 DEVMETHOD(bus_release_resource, siis_release_resource), 423 DEVMETHOD(bus_setup_intr, siis_setup_intr), 424 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 425 DEVMETHOD(bus_child_location_str, siis_child_location_str), 426 { 0, 0 } 427 }; 428 static driver_t siis_driver = { 429 "siis", 430 siis_methods, 431 sizeof(struct siis_controller) 432 }; 433 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 434 MODULE_VERSION(siis, 1); 435 MODULE_DEPEND(siis, cam, 1, 1, 1); 436 437 static int 438 siis_ch_probe(device_t dev) 439 { 440 441 device_set_desc_copy(dev, "SIIS channel"); 442 return (0); 443 } 444 445 static int 446 siis_ch_attach(device_t dev) 447 { 448 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 449 struct siis_channel *ch = device_get_softc(dev); 450 struct cam_devq *devq; 451 int rid, error, i, sata_rev = 0; 452 453 ch->dev = dev; 454 ch->unit = (intptr_t)device_get_ivars(dev); 455 ch->quirks = ctlr->quirks; 456 resource_int_value(device_get_name(dev), 457 device_get_unit(dev), "pm_level", &ch->pm_level); 458 resource_int_value(device_get_name(dev), 459 device_get_unit(dev), "sata_rev", &sata_rev); 460 for (i = 0; i < 16; i++) { 461 ch->user[i].revision = sata_rev; 462 ch->user[i].mode = 0; 463 ch->user[i].bytecount = 8192; 464 ch->user[i].tags = SIIS_MAX_SLOTS; 465 ch->curr[i] = ch->user[i]; 466 if (ch->pm_level) 467 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 468 } 469 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 470 rid = ch->unit; 471 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 472 &rid, RF_ACTIVE))) 473 return (ENXIO); 474 siis_dmainit(dev); 475 siis_slotsalloc(dev); 476 siis_ch_init(dev); 477 mtx_lock(&ch->mtx); 478 rid = ATA_IRQ_RID; 479 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 480 &rid, RF_SHAREABLE | RF_ACTIVE))) { 481 device_printf(dev, "Unable to map interrupt\n"); 482 error = ENXIO; 483 goto err0; 484 } 485 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 486 siis_ch_intr_locked, dev, &ch->ih))) { 487 device_printf(dev, "Unable to setup interrupt\n"); 488 error = ENXIO; 489 goto err1; 490 } 491 /* Create the device queue for our SIM. */ 492 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 493 if (devq == NULL) { 494 device_printf(dev, "Unable to allocate simq\n"); 495 error = ENOMEM; 496 goto err1; 497 } 498 /* Construct SIM entry */ 499 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 500 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 501 if (ch->sim == NULL) { 502 cam_simq_free(devq); 503 device_printf(dev, "unable to allocate sim\n"); 504 error = ENOMEM; 505 goto err1; 506 } 507 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 508 device_printf(dev, "unable to register xpt bus\n"); 509 error = ENXIO; 510 goto err2; 511 } 512 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 513 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 514 device_printf(dev, "unable to create path\n"); 515 error = ENXIO; 516 goto err3; 517 } 518 mtx_unlock(&ch->mtx); 519 return (0); 520 521 err3: 522 xpt_bus_deregister(cam_sim_path(ch->sim)); 523 err2: 524 cam_sim_free(ch->sim, /*free_devq*/TRUE); 525 err1: 526 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 527 err0: 528 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 529 mtx_unlock(&ch->mtx); 530 mtx_destroy(&ch->mtx); 531 return (error); 532 } 533 534 static int 535 siis_ch_detach(device_t dev) 536 { 537 struct siis_channel *ch = device_get_softc(dev); 538 539 mtx_lock(&ch->mtx); 540 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 541 xpt_free_path(ch->path); 542 xpt_bus_deregister(cam_sim_path(ch->sim)); 543 cam_sim_free(ch->sim, /*free_devq*/TRUE); 544 mtx_unlock(&ch->mtx); 545 546 bus_teardown_intr(dev, ch->r_irq, ch->ih); 547 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 548 549 siis_ch_deinit(dev); 550 siis_slotsfree(dev); 551 siis_dmafini(dev); 552 553 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 554 mtx_destroy(&ch->mtx); 555 return (0); 556 } 557 558 static int 559 siis_ch_init(device_t dev) 560 { 561 struct siis_channel *ch = device_get_softc(dev); 562 563 /* Get port out of reset state. */ 564 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 565 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 566 if (ch->pm_present) 567 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 568 else 569 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 570 /* Enable port interrupts */ 571 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 572 return (0); 573 } 574 575 static int 576 siis_ch_deinit(device_t dev) 577 { 578 struct siis_channel *ch = device_get_softc(dev); 579 580 /* Put port into reset state. */ 581 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 582 return (0); 583 } 584 585 static int 586 siis_ch_suspend(device_t dev) 587 { 588 struct siis_channel *ch = device_get_softc(dev); 589 590 mtx_lock(&ch->mtx); 591 xpt_freeze_simq(ch->sim, 1); 592 while (ch->oslots) 593 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 594 siis_ch_deinit(dev); 595 mtx_unlock(&ch->mtx); 596 return (0); 597 } 598 599 static int 600 siis_ch_resume(device_t dev) 601 { 602 struct siis_channel *ch = device_get_softc(dev); 603 604 mtx_lock(&ch->mtx); 605 siis_ch_init(dev); 606 siis_reset(dev); 607 xpt_release_simq(ch->sim, TRUE); 608 mtx_unlock(&ch->mtx); 609 return (0); 610 } 611 612 devclass_t siisch_devclass; 613 static device_method_t siisch_methods[] = { 614 DEVMETHOD(device_probe, siis_ch_probe), 615 DEVMETHOD(device_attach, siis_ch_attach), 616 DEVMETHOD(device_detach, siis_ch_detach), 617 DEVMETHOD(device_suspend, siis_ch_suspend), 618 DEVMETHOD(device_resume, siis_ch_resume), 619 { 0, 0 } 620 }; 621 static driver_t siisch_driver = { 622 "siisch", 623 siisch_methods, 624 sizeof(struct siis_channel) 625 }; 626 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 627 628 struct siis_dc_cb_args { 629 bus_addr_t maddr; 630 int error; 631 }; 632 633 static void 634 siis_dmainit(device_t dev) 635 { 636 struct siis_channel *ch = device_get_softc(dev); 637 struct siis_dc_cb_args dcba; 638 639 /* Command area. */ 640 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 641 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 642 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 643 0, NULL, NULL, &ch->dma.work_tag)) 644 goto error; 645 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 646 &ch->dma.work_map)) 647 goto error; 648 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 649 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 650 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 651 goto error; 652 } 653 ch->dma.work_bus = dcba.maddr; 654 /* Data area. */ 655 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 656 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 657 NULL, NULL, 658 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 659 SIIS_SG_ENTRIES, 0xFFFFFFFF, 660 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 661 goto error; 662 } 663 return; 664 665 error: 666 device_printf(dev, "WARNING - DMA initialization failed\n"); 667 siis_dmafini(dev); 668 } 669 670 static void 671 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 672 { 673 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 674 675 if (!(dcba->error = error)) 676 dcba->maddr = segs[0].ds_addr; 677 } 678 679 static void 680 siis_dmafini(device_t dev) 681 { 682 struct siis_channel *ch = device_get_softc(dev); 683 684 if (ch->dma.data_tag) { 685 bus_dma_tag_destroy(ch->dma.data_tag); 686 ch->dma.data_tag = NULL; 687 } 688 if (ch->dma.work_bus) { 689 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 690 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 691 ch->dma.work_bus = 0; 692 ch->dma.work_map = NULL; 693 ch->dma.work = NULL; 694 } 695 if (ch->dma.work_tag) { 696 bus_dma_tag_destroy(ch->dma.work_tag); 697 ch->dma.work_tag = NULL; 698 } 699 } 700 701 static void 702 siis_slotsalloc(device_t dev) 703 { 704 struct siis_channel *ch = device_get_softc(dev); 705 int i; 706 707 /* Alloc and setup command/dma slots */ 708 bzero(ch->slot, sizeof(ch->slot)); 709 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 710 struct siis_slot *slot = &ch->slot[i]; 711 712 slot->dev = dev; 713 slot->slot = i; 714 slot->state = SIIS_SLOT_EMPTY; 715 slot->ccb = NULL; 716 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 717 718 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 719 device_printf(ch->dev, "FAILURE - create data_map\n"); 720 } 721 } 722 723 static void 724 siis_slotsfree(device_t dev) 725 { 726 struct siis_channel *ch = device_get_softc(dev); 727 int i; 728 729 /* Free all dma slots */ 730 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 731 struct siis_slot *slot = &ch->slot[i]; 732 733 callout_drain(&slot->timeout); 734 if (slot->dma.data_map) { 735 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 736 slot->dma.data_map = NULL; 737 } 738 } 739 } 740 741 static void 742 siis_notify_events(device_t dev) 743 { 744 struct siis_channel *ch = device_get_softc(dev); 745 struct cam_path *dpath; 746 u_int32_t status; 747 int i; 748 749 if (ch->quirks & SIIS_Q_SNTF) { 750 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 751 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 752 } else { 753 /* 754 * Without SNTF we have no idea which device sent notification. 755 * If PMP is connected, assume it, else - device. 756 */ 757 status = (ch->pm_present) ? 0x8000 : 0x0001; 758 } 759 if (bootverbose) 760 device_printf(dev, "SNTF 0x%04x\n", status); 761 for (i = 0; i < 16; i++) { 762 if ((status & (1 << i)) == 0) 763 continue; 764 if (xpt_create_path(&dpath, NULL, 765 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 766 xpt_async(AC_SCSI_AEN, dpath, NULL); 767 xpt_free_path(dpath); 768 } 769 } 770 771 } 772 773 static void 774 siis_phy_check_events(device_t dev) 775 { 776 struct siis_channel *ch = device_get_softc(dev); 777 778 /* If we have a connection event, deal with it */ 779 if (ch->pm_level == 0) { 780 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 781 union ccb *ccb; 782 783 if (bootverbose) { 784 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 785 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 786 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 787 device_printf(dev, "CONNECT requested\n"); 788 } else 789 device_printf(dev, "DISCONNECT requested\n"); 790 } 791 siis_reset(dev); 792 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 793 return; 794 if (xpt_create_path(&ccb->ccb_h.path, NULL, 795 cam_sim_path(ch->sim), 796 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 797 xpt_free_ccb(ccb); 798 return; 799 } 800 xpt_rescan(ccb); 801 } 802 } 803 804 static void 805 siis_ch_intr_locked(void *data) 806 { 807 device_t dev = (device_t)data; 808 struct siis_channel *ch = device_get_softc(dev); 809 810 mtx_lock(&ch->mtx); 811 siis_ch_intr(data); 812 mtx_unlock(&ch->mtx); 813 } 814 815 static void 816 siis_ch_intr(void *data) 817 { 818 device_t dev = (device_t)data; 819 struct siis_channel *ch = device_get_softc(dev); 820 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 821 enum siis_err_type et; 822 int i, ccs, port, tslots; 823 824 mtx_assert(&ch->mtx, MA_OWNED); 825 /* Read command statuses. */ 826 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 827 ok = ch->rslots & ~sstatus; 828 /* Complete all successfull commands. */ 829 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 830 if ((ok >> i) & 1) 831 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 832 } 833 /* Do we have any other events? */ 834 if ((sstatus & SIIS_P_SS_ATTN) == 0) 835 return; 836 /* Read and clear interrupt statuses. */ 837 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 838 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 839 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 840 /* Process PHY events */ 841 if (istatus & SIIS_P_IX_PHYRDYCHG) 842 siis_phy_check_events(dev); 843 /* Process NOTIFY events */ 844 if (istatus & SIIS_P_IX_SDBN) 845 siis_notify_events(dev); 846 /* Process command errors */ 847 if (istatus & SIIS_P_IX_COMMERR) { 848 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 849 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 850 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 851 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 852 err = ch->rslots & sstatus; 853 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 854 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 855 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 856 857 if (!ch->readlog && !ch->recovery) { 858 xpt_freeze_simq(ch->sim, ch->numrslots); 859 ch->recovery = 1; 860 } 861 if (ch->frozen) { 862 union ccb *fccb = ch->frozen; 863 ch->frozen = NULL; 864 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 865 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 866 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 867 xpt_freeze_devq(fccb->ccb_h.path, 1); 868 fccb->ccb_h.status |= CAM_DEV_QFRZN; 869 } 870 xpt_done(fccb); 871 } 872 if (estatus == SIIS_P_CMDERR_DEV || 873 estatus == SIIS_P_CMDERR_SDB || 874 estatus == SIIS_P_CMDERR_DATAFIS) { 875 tslots = ch->numtslots[port]; 876 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 877 /* XXX: requests in loading state. */ 878 if (((ch->rslots >> i) & 1) == 0) 879 continue; 880 if (ch->slot[i].ccb->ccb_h.target_id != port) 881 continue; 882 if (tslots == 0) { 883 /* Untagged operation. */ 884 if (i == ccs) 885 et = SIIS_ERR_TFE; 886 else 887 et = SIIS_ERR_INNOCENT; 888 } else { 889 /* Tagged operation. */ 890 et = SIIS_ERR_NCQ; 891 } 892 siis_end_transaction(&ch->slot[i], et); 893 } 894 /* 895 * We can't reinit port if there are some other 896 * commands active, use resume to complete them. 897 */ 898 if (ch->rslots != 0) 899 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 900 } else { 901 if (estatus == SIIS_P_CMDERR_SENDFIS || 902 estatus == SIIS_P_CMDERR_INCSTATE || 903 estatus == SIIS_P_CMDERR_PPE || 904 estatus == SIIS_P_CMDERR_SERVICE) { 905 et = SIIS_ERR_SATA; 906 } else 907 et = SIIS_ERR_INVALID; 908 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 909 /* XXX: requests in loading state. */ 910 if (((ch->rslots >> i) & 1) == 0) 911 continue; 912 siis_end_transaction(&ch->slot[i], et); 913 } 914 } 915 } 916 } 917 918 /* Must be called with channel locked. */ 919 static int 920 siis_check_collision(device_t dev, union ccb *ccb) 921 { 922 struct siis_channel *ch = device_get_softc(dev); 923 924 mtx_assert(&ch->mtx, MA_OWNED); 925 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 926 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 927 /* Tagged command while we have no supported tag free. */ 928 if (((~ch->oslots) & (0x7fffffff >> (31 - 929 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 930 return (1); 931 } 932 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 933 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 934 /* Atomic command while anything active. */ 935 if (ch->numrslots != 0) 936 return (1); 937 } 938 /* We have some atomic command running. */ 939 if (ch->aslots != 0) 940 return (1); 941 return (0); 942 } 943 944 /* Must be called with channel locked. */ 945 static void 946 siis_begin_transaction(device_t dev, union ccb *ccb) 947 { 948 struct siis_channel *ch = device_get_softc(dev); 949 struct siis_slot *slot; 950 int tag, tags; 951 952 mtx_assert(&ch->mtx, MA_OWNED); 953 /* Choose empty slot. */ 954 tags = SIIS_MAX_SLOTS; 955 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 956 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 957 tags = ch->curr[ccb->ccb_h.target_id].tags; 958 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 959 /* Occupy chosen slot. */ 960 slot = &ch->slot[tag]; 961 slot->ccb = ccb; 962 /* Update channel stats. */ 963 ch->oslots |= (1 << slot->slot); 964 ch->numrslots++; 965 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 966 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 967 ch->numtslots[ccb->ccb_h.target_id]++; 968 } 969 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 970 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 971 ch->aslots |= (1 << slot->slot); 972 slot->dma.nsegs = 0; 973 /* If request moves data, setup and load SG list */ 974 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 975 void *buf; 976 bus_size_t size; 977 978 slot->state = SIIS_SLOT_LOADING; 979 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 980 buf = ccb->ataio.data_ptr; 981 size = ccb->ataio.dxfer_len; 982 } else { 983 buf = ccb->csio.data_ptr; 984 size = ccb->csio.dxfer_len; 985 } 986 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 987 buf, size, siis_dmasetprd, slot, 0); 988 } else 989 siis_execute_transaction(slot); 990 } 991 992 /* Locked by busdma engine. */ 993 static void 994 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 995 { 996 struct siis_slot *slot = arg; 997 struct siis_channel *ch = device_get_softc(slot->dev); 998 struct siis_cmd *ctp; 999 struct siis_dma_prd *prd; 1000 int i; 1001 1002 mtx_assert(&ch->mtx, MA_OWNED); 1003 if (error) { 1004 device_printf(slot->dev, "DMA load error\n"); 1005 if (!ch->readlog) 1006 xpt_freeze_simq(ch->sim, 1); 1007 siis_end_transaction(slot, SIIS_ERR_INVALID); 1008 return; 1009 } 1010 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 1011 /* Get a piece of the workspace for this request */ 1012 ctp = (struct siis_cmd *) 1013 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1014 /* Fill S/G table */ 1015 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1016 prd = &ctp->u.ata.prd[0]; 1017 else 1018 prd = &ctp->u.atapi.prd[0]; 1019 for (i = 0; i < nsegs; i++) { 1020 prd[i].dba = htole64(segs[i].ds_addr); 1021 prd[i].dbc = htole32(segs[i].ds_len); 1022 prd[i].control = 0; 1023 } 1024 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1025 slot->dma.nsegs = nsegs; 1026 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1027 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1028 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1029 siis_execute_transaction(slot); 1030 } 1031 1032 /* Must be called with channel locked. */ 1033 static void 1034 siis_execute_transaction(struct siis_slot *slot) 1035 { 1036 device_t dev = slot->dev; 1037 struct siis_channel *ch = device_get_softc(dev); 1038 struct siis_cmd *ctp; 1039 union ccb *ccb = slot->ccb; 1040 u_int64_t prb_bus; 1041 1042 mtx_assert(&ch->mtx, MA_OWNED); 1043 /* Get a piece of the workspace for this request */ 1044 ctp = (struct siis_cmd *) 1045 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1046 ctp->control = 0; 1047 ctp->protocol_override = 0; 1048 ctp->transfer_count = 0; 1049 /* Special handling for Soft Reset command. */ 1050 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1051 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1052 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1053 } else { 1054 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1055 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1056 ctp->protocol_override |= 1057 htole16(SIIS_PRB_PROTO_NCQ); 1058 } 1059 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1060 ctp->protocol_override |= 1061 htole16(SIIS_PRB_PROTO_READ); 1062 } else 1063 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1064 ctp->protocol_override |= 1065 htole16(SIIS_PRB_PROTO_WRITE); 1066 } 1067 } 1068 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1069 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1070 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1071 else 1072 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1073 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1074 } 1075 /* Special handling for Soft Reset command. */ 1076 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1077 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1078 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1079 /* Kick controller into sane state */ 1080 siis_portinit(dev); 1081 } 1082 /* Setup the FIS for this request */ 1083 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1084 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1085 if (!ch->readlog) 1086 xpt_freeze_simq(ch->sim, 1); 1087 siis_end_transaction(slot, SIIS_ERR_INVALID); 1088 return; 1089 } 1090 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1091 BUS_DMASYNC_PREWRITE); 1092 /* Issue command to the controller. */ 1093 slot->state = SIIS_SLOT_RUNNING; 1094 ch->rslots |= (1 << slot->slot); 1095 prb_bus = ch->dma.work_bus + 1096 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1097 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1098 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1099 /* Start command execution timeout */ 1100 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1101 (timeout_t*)siis_timeout, slot); 1102 return; 1103 } 1104 1105 /* Must be called with channel locked. */ 1106 static void 1107 siis_process_timeout(device_t dev) 1108 { 1109 struct siis_channel *ch = device_get_softc(dev); 1110 int i; 1111 1112 mtx_assert(&ch->mtx, MA_OWNED); 1113 if (!ch->readlog && !ch->recovery) { 1114 xpt_freeze_simq(ch->sim, ch->numrslots); 1115 ch->recovery = 1; 1116 } 1117 /* Handle the rest of commands. */ 1118 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1119 /* Do we have a running request on slot? */ 1120 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1121 continue; 1122 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1123 } 1124 } 1125 1126 /* Must be called with channel locked. */ 1127 static void 1128 siis_rearm_timeout(device_t dev) 1129 { 1130 struct siis_channel *ch = device_get_softc(dev); 1131 int i; 1132 1133 mtx_assert(&ch->mtx, MA_OWNED); 1134 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1135 struct siis_slot *slot = &ch->slot[i]; 1136 1137 /* Do we have a running request on slot? */ 1138 if (slot->state < SIIS_SLOT_RUNNING) 1139 continue; 1140 if ((ch->toslots & (1 << i)) == 0) 1141 continue; 1142 callout_reset(&slot->timeout, 1143 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1144 (timeout_t*)siis_timeout, slot); 1145 } 1146 } 1147 1148 /* Locked by callout mechanism. */ 1149 static void 1150 siis_timeout(struct siis_slot *slot) 1151 { 1152 device_t dev = slot->dev; 1153 struct siis_channel *ch = device_get_softc(dev); 1154 1155 mtx_assert(&ch->mtx, MA_OWNED); 1156 /* Check for stale timeout. */ 1157 if (slot->state < SIIS_SLOT_RUNNING) 1158 return; 1159 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1160 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1161 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1162 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1163 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1164 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1165 1166 if (ch->toslots == 0) 1167 xpt_freeze_simq(ch->sim, 1); 1168 ch->toslots |= (1 << slot->slot); 1169 if ((ch->rslots & ~ch->toslots) == 0) 1170 siis_process_timeout(dev); 1171 else 1172 device_printf(dev, " ... waiting for slots %08x\n", 1173 ch->rslots & ~ch->toslots); 1174 } 1175 1176 /* Must be called with channel locked. */ 1177 static void 1178 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1179 { 1180 device_t dev = slot->dev; 1181 struct siis_channel *ch = device_get_softc(dev); 1182 union ccb *ccb = slot->ccb; 1183 int lastto; 1184 1185 mtx_assert(&ch->mtx, MA_OWNED); 1186 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1187 BUS_DMASYNC_POSTWRITE); 1188 /* Read result registers to the result struct 1189 * May be incorrect if several commands finished same time, 1190 * so read only when sure or have to. 1191 */ 1192 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1193 struct ata_res *res = &ccb->ataio.res; 1194 if ((et == SIIS_ERR_TFE) || 1195 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1196 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1197 1198 res->status = ATA_INB(ch->r_mem, offs + 2); 1199 res->error = ATA_INB(ch->r_mem, offs + 3); 1200 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1201 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1202 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1203 res->device = ATA_INB(ch->r_mem, offs + 7); 1204 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1205 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1206 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1207 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1208 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1209 } else 1210 bzero(res, sizeof(*res)); 1211 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1212 ch->numrslots == 1) { 1213 ccb->ataio.resid = ccb->ataio.dxfer_len - 1214 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1215 } 1216 } else { 1217 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1218 ch->numrslots == 1) { 1219 ccb->csio.resid = ccb->csio.dxfer_len - 1220 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1221 } 1222 } 1223 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1224 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1225 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1226 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1227 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1228 } 1229 /* Set proper result status. */ 1230 if (et != SIIS_ERR_NONE || ch->recovery) { 1231 ch->eslots |= (1 << slot->slot); 1232 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1233 } 1234 /* In case of error, freeze device for proper recovery. */ 1235 if (et != SIIS_ERR_NONE && 1236 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1237 xpt_freeze_devq(ccb->ccb_h.path, 1); 1238 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1239 } 1240 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1241 switch (et) { 1242 case SIIS_ERR_NONE: 1243 ccb->ccb_h.status |= CAM_REQ_CMP; 1244 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1245 ccb->csio.scsi_status = SCSI_STATUS_OK; 1246 break; 1247 case SIIS_ERR_INVALID: 1248 ch->fatalerr = 1; 1249 ccb->ccb_h.status |= CAM_REQ_INVALID; 1250 break; 1251 case SIIS_ERR_INNOCENT: 1252 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1253 break; 1254 case SIIS_ERR_TFE: 1255 case SIIS_ERR_NCQ: 1256 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1257 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1258 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1259 } else { 1260 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1261 } 1262 break; 1263 case SIIS_ERR_SATA: 1264 ch->fatalerr = 1; 1265 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1266 break; 1267 case SIIS_ERR_TIMEOUT: 1268 ch->fatalerr = 1; 1269 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1270 break; 1271 default: 1272 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1273 } 1274 /* Free slot. */ 1275 ch->oslots &= ~(1 << slot->slot); 1276 ch->rslots &= ~(1 << slot->slot); 1277 ch->aslots &= ~(1 << slot->slot); 1278 slot->state = SIIS_SLOT_EMPTY; 1279 slot->ccb = NULL; 1280 /* Update channel stats. */ 1281 ch->numrslots--; 1282 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1283 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1284 ch->numtslots[ccb->ccb_h.target_id]--; 1285 } 1286 /* Cancel timeout state if request completed normally. */ 1287 if (et != SIIS_ERR_TIMEOUT) { 1288 lastto = (ch->toslots == (1 << slot->slot)); 1289 ch->toslots &= ~(1 << slot->slot); 1290 if (lastto) 1291 xpt_release_simq(ch->sim, TRUE); 1292 } 1293 /* If it was our READ LOG command - process it. */ 1294 if (ch->readlog) { 1295 siis_process_read_log(dev, ccb); 1296 /* If it was NCQ command error, put result on hold. */ 1297 } else if (et == SIIS_ERR_NCQ) { 1298 ch->hold[slot->slot] = ccb; 1299 ch->numhslots++; 1300 } else 1301 xpt_done(ccb); 1302 /* Unfreeze frozen command. */ 1303 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1304 union ccb *fccb = ch->frozen; 1305 ch->frozen = NULL; 1306 siis_begin_transaction(dev, fccb); 1307 xpt_release_simq(ch->sim, TRUE); 1308 } 1309 /* If we have no other active commands, ... */ 1310 if (ch->rslots == 0) { 1311 /* if there were timeouts or fatal error - reset port. */ 1312 if (ch->toslots != 0 || ch->fatalerr) { 1313 siis_reset(dev); 1314 } else { 1315 /* if we have slots in error, we can reinit port. */ 1316 if (ch->eslots != 0) 1317 siis_portinit(dev); 1318 /* if there commands on hold, we can do READ LOG. */ 1319 if (!ch->readlog && ch->numhslots) 1320 siis_issue_read_log(dev); 1321 } 1322 /* If all the reset of commands are in timeout - abort them. */ 1323 } else if ((ch->rslots & ~ch->toslots) == 0 && 1324 et != SIIS_ERR_TIMEOUT) 1325 siis_rearm_timeout(dev); 1326 } 1327 1328 static void 1329 siis_issue_read_log(device_t dev) 1330 { 1331 struct siis_channel *ch = device_get_softc(dev); 1332 union ccb *ccb; 1333 struct ccb_ataio *ataio; 1334 int i; 1335 1336 /* Find some holden command. */ 1337 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1338 if (ch->hold[i]) 1339 break; 1340 } 1341 if (i == SIIS_MAX_SLOTS) 1342 return; 1343 ch->readlog = 1; 1344 ccb = xpt_alloc_ccb_nowait(); 1345 if (ccb == NULL) { 1346 device_printf(dev, "Unable allocate READ LOG command"); 1347 return; /* XXX */ 1348 } 1349 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1350 ccb->ccb_h.func_code = XPT_ATA_IO; 1351 ccb->ccb_h.flags = CAM_DIR_IN; 1352 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1353 ataio = &ccb->ataio; 1354 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1355 if (ataio->data_ptr == NULL) { 1356 xpt_free_ccb(ccb); 1357 device_printf(dev, "Unable allocate memory for READ LOG command"); 1358 return; /* XXX */ 1359 } 1360 ataio->dxfer_len = 512; 1361 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1362 ataio->cmd.flags = CAM_ATAIO_48BIT; 1363 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1364 ataio->cmd.sector_count = 1; 1365 ataio->cmd.sector_count_exp = 0; 1366 ataio->cmd.lba_low = 0x10; 1367 ataio->cmd.lba_mid = 0; 1368 ataio->cmd.lba_mid_exp = 0; 1369 siis_begin_transaction(dev, ccb); 1370 } 1371 1372 static void 1373 siis_process_read_log(device_t dev, union ccb *ccb) 1374 { 1375 struct siis_channel *ch = device_get_softc(dev); 1376 uint8_t *data; 1377 struct ata_res *res; 1378 int i; 1379 1380 ch->readlog = 0; 1381 data = ccb->ataio.data_ptr; 1382 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1383 (data[0] & 0x80) == 0) { 1384 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1385 if (!ch->hold[i]) 1386 continue; 1387 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1388 continue; 1389 if ((data[0] & 0x1F) == i) { 1390 res = &ch->hold[i]->ataio.res; 1391 res->status = data[2]; 1392 res->error = data[3]; 1393 res->lba_low = data[4]; 1394 res->lba_mid = data[5]; 1395 res->lba_high = data[6]; 1396 res->device = data[7]; 1397 res->lba_low_exp = data[8]; 1398 res->lba_mid_exp = data[9]; 1399 res->lba_high_exp = data[10]; 1400 res->sector_count = data[12]; 1401 res->sector_count_exp = data[13]; 1402 } else { 1403 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1404 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1405 } 1406 xpt_done(ch->hold[i]); 1407 ch->hold[i] = NULL; 1408 ch->numhslots--; 1409 } 1410 } else { 1411 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1412 device_printf(dev, "Error while READ LOG EXT\n"); 1413 else if ((data[0] & 0x80) == 0) { 1414 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1415 } 1416 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1417 if (!ch->hold[i]) 1418 continue; 1419 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1420 continue; 1421 xpt_done(ch->hold[i]); 1422 ch->hold[i] = NULL; 1423 ch->numhslots--; 1424 } 1425 } 1426 free(ccb->ataio.data_ptr, M_SIIS); 1427 xpt_free_ccb(ccb); 1428 } 1429 1430 static void 1431 siis_portinit(device_t dev) 1432 { 1433 struct siis_channel *ch = device_get_softc(dev); 1434 int i; 1435 1436 ch->eslots = 0; 1437 ch->recovery = 0; 1438 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1439 for (i = 0; i < 16; i++) { 1440 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1441 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1442 } 1443 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1444 siis_wait_ready(dev, 1000); 1445 } 1446 1447 static int 1448 siis_devreset(device_t dev) 1449 { 1450 struct siis_channel *ch = device_get_softc(dev); 1451 int timeout = 0; 1452 uint32_t val; 1453 1454 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1455 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1456 SIIS_P_CTL_DEV_RESET) != 0) { 1457 DELAY(1000); 1458 if (timeout++ > 100) { 1459 device_printf(dev, "device reset stuck (timeout %dms) " 1460 "status = %08x\n", timeout, val); 1461 return (EBUSY); 1462 } 1463 } 1464 return (0); 1465 } 1466 1467 static int 1468 siis_wait_ready(device_t dev, int t) 1469 { 1470 struct siis_channel *ch = device_get_softc(dev); 1471 int timeout = 0; 1472 uint32_t val; 1473 1474 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1475 SIIS_P_CTL_READY) == 0) { 1476 DELAY(1000); 1477 if (timeout++ > t) { 1478 device_printf(dev, "port is not ready (timeout %dms) " 1479 "status = %08x\n", t, val); 1480 return (EBUSY); 1481 } 1482 } 1483 return (0); 1484 } 1485 1486 static void 1487 siis_reset(device_t dev) 1488 { 1489 struct siis_channel *ch = device_get_softc(dev); 1490 int i, retry = 0, sata_rev; 1491 uint32_t val; 1492 1493 xpt_freeze_simq(ch->sim, 1); 1494 if (bootverbose) 1495 device_printf(dev, "SIIS reset...\n"); 1496 if (!ch->readlog && !ch->recovery) 1497 xpt_freeze_simq(ch->sim, ch->numrslots); 1498 /* Requeue frozen command. */ 1499 if (ch->frozen) { 1500 union ccb *fccb = ch->frozen; 1501 ch->frozen = NULL; 1502 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1503 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1504 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1505 xpt_freeze_devq(fccb->ccb_h.path, 1); 1506 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1507 } 1508 xpt_done(fccb); 1509 } 1510 /* Requeue all running commands. */ 1511 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1512 /* Do we have a running request on slot? */ 1513 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1514 continue; 1515 /* XXX; Commands in loading state. */ 1516 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1517 } 1518 /* Finish all holden commands as-is. */ 1519 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1520 if (!ch->hold[i]) 1521 continue; 1522 xpt_done(ch->hold[i]); 1523 ch->hold[i] = NULL; 1524 ch->numhslots--; 1525 } 1526 if (ch->toslots != 0) 1527 xpt_release_simq(ch->sim, TRUE); 1528 ch->eslots = 0; 1529 ch->recovery = 0; 1530 ch->toslots = 0; 1531 ch->fatalerr = 0; 1532 /* Disable port interrupts */ 1533 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1534 /* Set speed limit. */ 1535 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1536 if (sata_rev == 1) 1537 val = ATA_SC_SPD_SPEED_GEN1; 1538 else if (sata_rev == 2) 1539 val = ATA_SC_SPD_SPEED_GEN2; 1540 else if (sata_rev == 3) 1541 val = ATA_SC_SPD_SPEED_GEN3; 1542 else 1543 val = 0; 1544 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1545 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1546 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1547 retry: 1548 siis_devreset(dev); 1549 /* Reset and reconnect PHY, */ 1550 if (!siis_sata_connect(ch)) { 1551 ch->devices = 0; 1552 /* Enable port interrupts */ 1553 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1554 if (bootverbose) 1555 device_printf(dev, 1556 "SIIS reset done: phy reset found no device\n"); 1557 /* Tell the XPT about the event */ 1558 xpt_async(AC_BUS_RESET, ch->path, NULL); 1559 xpt_release_simq(ch->sim, TRUE); 1560 return; 1561 } 1562 /* Wait for clearing busy status. */ 1563 if (siis_wait_ready(dev, 10000)) { 1564 device_printf(dev, "device ready timeout\n"); 1565 if (!retry) { 1566 device_printf(dev, "trying full port reset ...\n"); 1567 /* Get port to the reset state. */ 1568 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1569 DELAY(10000); 1570 /* Get port out of reset state. */ 1571 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1572 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1573 if (ch->pm_present) 1574 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1575 else 1576 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1577 siis_wait_ready(dev, 5000); 1578 retry = 1; 1579 goto retry; 1580 } 1581 } 1582 ch->devices = 1; 1583 /* Enable port interrupts */ 1584 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1585 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1586 if (bootverbose) 1587 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1588 /* Tell the XPT about the event */ 1589 xpt_async(AC_BUS_RESET, ch->path, NULL); 1590 xpt_release_simq(ch->sim, TRUE); 1591 } 1592 1593 static int 1594 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1595 { 1596 struct siis_channel *ch = device_get_softc(dev); 1597 u_int8_t *fis = &ctp->fis[0]; 1598 1599 bzero(fis, 24); 1600 fis[0] = 0x27; /* host to device */ 1601 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1602 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1603 fis[1] |= 0x80; 1604 fis[2] = ATA_PACKET_CMD; 1605 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1606 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1607 fis[3] = ATA_F_DMA; 1608 else { 1609 fis[5] = ccb->csio.dxfer_len; 1610 fis[6] = ccb->csio.dxfer_len >> 8; 1611 } 1612 fis[7] = ATA_D_LBA; 1613 fis[15] = ATA_A_4BIT; 1614 bzero(ctp->u.atapi.ccb, 16); 1615 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1616 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1617 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1618 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1619 fis[1] |= 0x80; 1620 fis[2] = ccb->ataio.cmd.command; 1621 fis[3] = ccb->ataio.cmd.features; 1622 fis[4] = ccb->ataio.cmd.lba_low; 1623 fis[5] = ccb->ataio.cmd.lba_mid; 1624 fis[6] = ccb->ataio.cmd.lba_high; 1625 fis[7] = ccb->ataio.cmd.device; 1626 fis[8] = ccb->ataio.cmd.lba_low_exp; 1627 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1628 fis[10] = ccb->ataio.cmd.lba_high_exp; 1629 fis[11] = ccb->ataio.cmd.features_exp; 1630 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1631 fis[12] = tag << 3; 1632 fis[13] = 0; 1633 } else { 1634 fis[12] = ccb->ataio.cmd.sector_count; 1635 fis[13] = ccb->ataio.cmd.sector_count_exp; 1636 } 1637 fis[15] = ATA_A_4BIT; 1638 } else { 1639 /* Soft reset. */ 1640 } 1641 return (20); 1642 } 1643 1644 static int 1645 siis_sata_connect(struct siis_channel *ch) 1646 { 1647 u_int32_t status; 1648 int timeout; 1649 1650 /* Wait up to 100ms for "connect well" */ 1651 for (timeout = 0; timeout < 100 ; timeout++) { 1652 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1653 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1654 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1655 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1656 break; 1657 DELAY(1000); 1658 } 1659 if (timeout >= 100) { 1660 if (bootverbose) { 1661 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1662 status); 1663 } 1664 return (0); 1665 } 1666 if (bootverbose) { 1667 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1668 timeout, status); 1669 } 1670 /* Clear SATA error register */ 1671 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1672 return (1); 1673 } 1674 1675 static int 1676 siis_check_ids(device_t dev, union ccb *ccb) 1677 { 1678 1679 if (ccb->ccb_h.target_id > 15) { 1680 ccb->ccb_h.status = CAM_TID_INVALID; 1681 xpt_done(ccb); 1682 return (-1); 1683 } 1684 if (ccb->ccb_h.target_lun != 0) { 1685 ccb->ccb_h.status = CAM_LUN_INVALID; 1686 xpt_done(ccb); 1687 return (-1); 1688 } 1689 return (0); 1690 } 1691 1692 static void 1693 siisaction(struct cam_sim *sim, union ccb *ccb) 1694 { 1695 device_t dev, parent; 1696 struct siis_channel *ch; 1697 1698 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1699 ccb->ccb_h.func_code)); 1700 1701 ch = (struct siis_channel *)cam_sim_softc(sim); 1702 dev = ch->dev; 1703 mtx_assert(&ch->mtx, MA_OWNED); 1704 switch (ccb->ccb_h.func_code) { 1705 /* Common cases first */ 1706 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1707 case XPT_SCSI_IO: 1708 if (siis_check_ids(dev, ccb)) 1709 return; 1710 if (ch->devices == 0 || 1711 (ch->pm_present == 0 && 1712 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1713 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1714 break; 1715 } 1716 /* Check for command collision. */ 1717 if (siis_check_collision(dev, ccb)) { 1718 /* Freeze command. */ 1719 ch->frozen = ccb; 1720 /* We have only one frozen slot, so freeze simq also. */ 1721 xpt_freeze_simq(ch->sim, 1); 1722 return; 1723 } 1724 siis_begin_transaction(dev, ccb); 1725 return; 1726 case XPT_EN_LUN: /* Enable LUN as a target */ 1727 case XPT_TARGET_IO: /* Execute target I/O request */ 1728 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1729 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1730 case XPT_ABORT: /* Abort the specified CCB */ 1731 /* XXX Implement */ 1732 ccb->ccb_h.status = CAM_REQ_INVALID; 1733 break; 1734 case XPT_SET_TRAN_SETTINGS: 1735 { 1736 struct ccb_trans_settings *cts = &ccb->cts; 1737 struct siis_device *d; 1738 1739 if (siis_check_ids(dev, ccb)) 1740 return; 1741 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1742 d = &ch->curr[ccb->ccb_h.target_id]; 1743 else 1744 d = &ch->user[ccb->ccb_h.target_id]; 1745 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1746 d->revision = cts->xport_specific.sata.revision; 1747 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1748 d->mode = cts->xport_specific.sata.mode; 1749 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1750 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1751 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1752 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1753 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1754 ch->pm_present = cts->xport_specific.sata.pm_present; 1755 if (ch->pm_present) 1756 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1757 else 1758 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1759 } 1760 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1761 d->atapi = cts->xport_specific.sata.atapi; 1762 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1763 d->caps = cts->xport_specific.sata.caps; 1764 ccb->ccb_h.status = CAM_REQ_CMP; 1765 break; 1766 } 1767 case XPT_GET_TRAN_SETTINGS: 1768 /* Get default/user set transfer settings for the target */ 1769 { 1770 struct ccb_trans_settings *cts = &ccb->cts; 1771 struct siis_device *d; 1772 uint32_t status; 1773 1774 if (siis_check_ids(dev, ccb)) 1775 return; 1776 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1777 d = &ch->curr[ccb->ccb_h.target_id]; 1778 else 1779 d = &ch->user[ccb->ccb_h.target_id]; 1780 cts->protocol = PROTO_ATA; 1781 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1782 cts->transport = XPORT_SATA; 1783 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1784 cts->proto_specific.valid = 0; 1785 cts->xport_specific.sata.valid = 0; 1786 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1787 (ccb->ccb_h.target_id == 15 || 1788 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1789 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1790 if (status & 0x0f0) { 1791 cts->xport_specific.sata.revision = 1792 (status & 0x0f0) >> 4; 1793 cts->xport_specific.sata.valid |= 1794 CTS_SATA_VALID_REVISION; 1795 } 1796 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1797 if (ch->pm_level) 1798 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1799 cts->xport_specific.sata.caps &= 1800 ch->user[ccb->ccb_h.target_id].caps; 1801 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1802 } else { 1803 cts->xport_specific.sata.revision = d->revision; 1804 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1805 cts->xport_specific.sata.caps = d->caps; 1806 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1807 } 1808 cts->xport_specific.sata.mode = d->mode; 1809 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1810 cts->xport_specific.sata.bytecount = d->bytecount; 1811 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1812 cts->xport_specific.sata.pm_present = ch->pm_present; 1813 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1814 cts->xport_specific.sata.tags = d->tags; 1815 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1816 cts->xport_specific.sata.atapi = d->atapi; 1817 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1818 ccb->ccb_h.status = CAM_REQ_CMP; 1819 break; 1820 } 1821 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1822 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1823 siis_reset(dev); 1824 ccb->ccb_h.status = CAM_REQ_CMP; 1825 break; 1826 case XPT_TERM_IO: /* Terminate the I/O process */ 1827 /* XXX Implement */ 1828 ccb->ccb_h.status = CAM_REQ_INVALID; 1829 break; 1830 case XPT_PATH_INQ: /* Path routing inquiry */ 1831 { 1832 struct ccb_pathinq *cpi = &ccb->cpi; 1833 1834 parent = device_get_parent(dev); 1835 cpi->version_num = 1; /* XXX??? */ 1836 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1837 cpi->hba_inquiry |= PI_SATAPM; 1838 cpi->target_sprt = 0; 1839 cpi->hba_misc = PIM_SEQSCAN; 1840 cpi->hba_eng_cnt = 0; 1841 cpi->max_target = 15; 1842 cpi->max_lun = 0; 1843 cpi->initiator_id = 0; 1844 cpi->bus_id = cam_sim_bus(sim); 1845 cpi->base_transfer_speed = 150000; 1846 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1847 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1848 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1849 cpi->unit_number = cam_sim_unit(sim); 1850 cpi->transport = XPORT_SATA; 1851 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1852 cpi->protocol = PROTO_ATA; 1853 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1854 cpi->maxio = MAXPHYS; 1855 cpi->hba_vendor = pci_get_vendor(parent); 1856 cpi->hba_device = pci_get_device(parent); 1857 cpi->hba_subvendor = pci_get_subvendor(parent); 1858 cpi->hba_subdevice = pci_get_subdevice(parent); 1859 cpi->ccb_h.status = CAM_REQ_CMP; 1860 break; 1861 } 1862 default: 1863 ccb->ccb_h.status = CAM_REQ_INVALID; 1864 break; 1865 } 1866 xpt_done(ccb); 1867 } 1868 1869 static void 1870 siispoll(struct cam_sim *sim) 1871 { 1872 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1873 1874 siis_ch_intr(ch->dev); 1875 } 1876