1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_xpt_periph.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_suspend(device_t dev); 64 static int siis_ch_resume(device_t dev); 65 static void siis_ch_intr_locked(void *data); 66 static void siis_ch_intr(void *data); 67 static void siis_begin_transaction(device_t dev, union ccb *ccb); 68 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 69 static void siis_execute_transaction(struct siis_slot *slot); 70 static void siis_timeout(struct siis_slot *slot); 71 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 72 static int siis_setup_fis(struct siis_cmd *ctp, union ccb *ccb, int tag); 73 static void siis_dmainit(device_t dev); 74 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 75 static void siis_dmafini(device_t dev); 76 static void siis_slotsalloc(device_t dev); 77 static void siis_slotsfree(device_t dev); 78 static void siis_reset(device_t dev); 79 static void siis_portinit(device_t dev); 80 static int siis_wait_ready(device_t dev, int t); 81 82 static int siis_sata_connect(struct siis_channel *ch); 83 84 static void siis_issue_read_log(device_t dev); 85 static void siis_process_read_log(device_t dev, union ccb *ccb); 86 87 static void siisaction(struct cam_sim *sim, union ccb *ccb); 88 static void siispoll(struct cam_sim *sim); 89 90 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 91 92 static struct { 93 uint32_t id; 94 const char *name; 95 int ports; 96 } siis_ids[] = { 97 {0x31241095, "SiI3124", 4}, 98 {0x31248086, "SiI3124", 4}, 99 {0x31321095, "SiI3132", 2}, 100 {0x02421095, "SiI3132", 2}, 101 {0x02441095, "SiI3132", 2}, 102 {0x31311095, "SiI3131", 1}, 103 {0x35311095, "SiI3531", 1}, 104 {0, NULL, 0} 105 }; 106 107 static int 108 siis_probe(device_t dev) 109 { 110 char buf[64]; 111 int i; 112 uint32_t devid = pci_get_devid(dev); 113 114 for (i = 0; siis_ids[i].id != 0; i++) { 115 if (siis_ids[i].id == devid) { 116 snprintf(buf, sizeof(buf), "%s SATA2 controller", 117 siis_ids[i].name); 118 device_set_desc_copy(dev, buf); 119 return (BUS_PROBE_VENDOR); 120 } 121 } 122 return (ENXIO); 123 } 124 125 static int 126 siis_attach(device_t dev) 127 { 128 struct siis_controller *ctlr = device_get_softc(dev); 129 uint32_t devid = pci_get_devid(dev); 130 device_t child; 131 int error, i, unit; 132 133 for (i = 0; siis_ids[i].id != 0; i++) { 134 if (siis_ids[i].id == devid) 135 break; 136 } 137 ctlr->dev = dev; 138 /* Global memory */ 139 ctlr->r_grid = PCIR_BAR(0); 140 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 141 &ctlr->r_grid, RF_ACTIVE))) 142 return (ENXIO); 143 /* Channels memory */ 144 ctlr->r_rid = PCIR_BAR(2); 145 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &ctlr->r_rid, RF_ACTIVE))) 147 return (ENXIO); 148 /* Setup our own memory management for channels. */ 149 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 150 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 151 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 152 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 153 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 154 return (error); 155 } 156 if ((error = rman_manage_region(&ctlr->sc_iomem, 157 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 158 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 159 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 160 rman_fini(&ctlr->sc_iomem); 161 return (error); 162 } 163 /* Reset controller */ 164 siis_resume(dev); 165 /* Number of HW channels */ 166 ctlr->channels = siis_ids[i].ports; 167 /* Setup interrupts. */ 168 if (siis_setup_interrupt(dev)) { 169 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 170 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 171 rman_fini(&ctlr->sc_iomem); 172 return ENXIO; 173 } 174 /* Attach all channels on this controller */ 175 for (unit = 0; unit < ctlr->channels; unit++) { 176 child = device_add_child(dev, "siisch", -1); 177 if (child == NULL) 178 device_printf(dev, "failed to add channel device\n"); 179 else 180 device_set_ivars(child, (void *)(intptr_t)unit); 181 } 182 bus_generic_attach(dev); 183 return 0; 184 } 185 186 static int 187 siis_detach(device_t dev) 188 { 189 struct siis_controller *ctlr = device_get_softc(dev); 190 device_t *children; 191 int nchildren, i; 192 193 /* Detach & delete all children */ 194 if (!device_get_children(dev, &children, &nchildren)) { 195 for (i = 0; i < nchildren; i++) 196 device_delete_child(dev, children[i]); 197 free(children, M_TEMP); 198 } 199 /* Free interrupts. */ 200 if (ctlr->irq.r_irq) { 201 bus_teardown_intr(dev, ctlr->irq.r_irq, 202 ctlr->irq.handle); 203 bus_release_resource(dev, SYS_RES_IRQ, 204 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 205 } 206 pci_release_msi(dev); 207 /* Free memory. */ 208 rman_fini(&ctlr->sc_iomem); 209 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 210 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 211 return (0); 212 } 213 214 static int 215 siis_suspend(device_t dev) 216 { 217 struct siis_controller *ctlr = device_get_softc(dev); 218 219 bus_generic_suspend(dev); 220 /* Put controller into reset state. */ 221 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 222 return 0; 223 } 224 225 static int 226 siis_resume(device_t dev) 227 { 228 struct siis_controller *ctlr = device_get_softc(dev); 229 230 /* Put controller into reset state. */ 231 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 232 DELAY(10000); 233 /* Get controller out of reset state and enable port interrupts. */ 234 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 0x0000000f); 235 return (bus_generic_resume(dev)); 236 } 237 238 static int 239 siis_setup_interrupt(device_t dev) 240 { 241 struct siis_controller *ctlr = device_get_softc(dev); 242 int msi = 0; 243 244 /* Process hints. */ 245 resource_int_value(device_get_name(dev), 246 device_get_unit(dev), "msi", &msi); 247 if (msi < 0) 248 msi = 0; 249 else if (msi > 0) 250 msi = min(1, pci_msi_count(dev)); 251 /* Allocate MSI if needed/present. */ 252 if (msi && pci_alloc_msi(dev, &msi) != 0) 253 msi = 0; 254 /* Allocate all IRQs. */ 255 ctlr->irq.r_irq_rid = msi ? 1 : 0; 256 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 257 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 258 device_printf(dev, "unable to map interrupt\n"); 259 return ENXIO; 260 } 261 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 262 siis_intr, ctlr, &ctlr->irq.handle))) { 263 /* SOS XXX release r_irq */ 264 device_printf(dev, "unable to setup interrupt\n"); 265 return ENXIO; 266 } 267 return (0); 268 } 269 270 /* 271 * Common case interrupt handler. 272 */ 273 static void 274 siis_intr(void *data) 275 { 276 struct siis_controller *ctlr = (struct siis_controller *)data; 277 u_int32_t is; 278 void *arg; 279 int unit; 280 281 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 282 for (unit = 0; unit < ctlr->channels; unit++) { 283 if ((is & SIIS_IS_PORT(unit)) != 0 && 284 (arg = ctlr->interrupt[unit].argument)) { 285 ctlr->interrupt[unit].function(arg); 286 } 287 } 288 } 289 290 static struct resource * 291 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 292 u_long start, u_long end, u_long count, u_int flags) 293 { 294 struct siis_controller *ctlr = device_get_softc(dev); 295 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 296 struct resource *res = NULL; 297 int offset = unit << 13; 298 long st; 299 300 switch (type) { 301 case SYS_RES_MEMORY: 302 st = rman_get_start(ctlr->r_mem); 303 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 304 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 305 if (res) { 306 bus_space_handle_t bsh; 307 bus_space_tag_t bst; 308 bsh = rman_get_bushandle(ctlr->r_mem); 309 bst = rman_get_bustag(ctlr->r_mem); 310 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 311 rman_set_bushandle(res, bsh); 312 rman_set_bustag(res, bst); 313 } 314 break; 315 case SYS_RES_IRQ: 316 if (*rid == ATA_IRQ_RID) 317 res = ctlr->irq.r_irq; 318 break; 319 } 320 return (res); 321 } 322 323 static int 324 siis_release_resource(device_t dev, device_t child, int type, int rid, 325 struct resource *r) 326 { 327 328 switch (type) { 329 case SYS_RES_MEMORY: 330 rman_release_resource(r); 331 return (0); 332 case SYS_RES_IRQ: 333 if (rid != ATA_IRQ_RID) 334 return ENOENT; 335 return (0); 336 } 337 return (EINVAL); 338 } 339 340 static int 341 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 342 int flags, driver_filter_t *filter, driver_intr_t *function, 343 void *argument, void **cookiep) 344 { 345 struct siis_controller *ctlr = device_get_softc(dev); 346 int unit = (intptr_t)device_get_ivars(child); 347 348 if (filter != NULL) { 349 printf("siis.c: we cannot use a filter here\n"); 350 return (EINVAL); 351 } 352 ctlr->interrupt[unit].function = function; 353 ctlr->interrupt[unit].argument = argument; 354 return (0); 355 } 356 357 static int 358 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 359 void *cookie) 360 { 361 struct siis_controller *ctlr = device_get_softc(dev); 362 int unit = (intptr_t)device_get_ivars(child); 363 364 ctlr->interrupt[unit].function = NULL; 365 ctlr->interrupt[unit].argument = NULL; 366 return (0); 367 } 368 369 static int 370 siis_print_child(device_t dev, device_t child) 371 { 372 int retval; 373 374 retval = bus_print_child_header(dev, child); 375 retval += printf(" at channel %d", 376 (int)(intptr_t)device_get_ivars(child)); 377 retval += bus_print_child_footer(dev, child); 378 379 return (retval); 380 } 381 382 devclass_t siis_devclass; 383 static device_method_t siis_methods[] = { 384 DEVMETHOD(device_probe, siis_probe), 385 DEVMETHOD(device_attach, siis_attach), 386 DEVMETHOD(device_detach, siis_detach), 387 DEVMETHOD(device_suspend, siis_suspend), 388 DEVMETHOD(device_resume, siis_resume), 389 DEVMETHOD(bus_print_child, siis_print_child), 390 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 391 DEVMETHOD(bus_release_resource, siis_release_resource), 392 DEVMETHOD(bus_setup_intr, siis_setup_intr), 393 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 394 { 0, 0 } 395 }; 396 static driver_t siis_driver = { 397 "siis", 398 siis_methods, 399 sizeof(struct siis_controller) 400 }; 401 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 402 MODULE_VERSION(siis, 1); 403 MODULE_DEPEND(siis, cam, 1, 1, 1); 404 405 static int 406 siis_ch_probe(device_t dev) 407 { 408 409 device_set_desc_copy(dev, "SIIS channel"); 410 return (0); 411 } 412 413 static int 414 siis_ch_attach(device_t dev) 415 { 416 struct siis_channel *ch = device_get_softc(dev); 417 struct cam_devq *devq; 418 int rid, error; 419 420 ch->dev = dev; 421 ch->unit = (intptr_t)device_get_ivars(dev); 422 resource_int_value(device_get_name(dev), 423 device_get_unit(dev), "pm_level", &ch->pm_level); 424 resource_int_value(device_get_name(dev), 425 device_get_unit(dev), "sata_rev", &ch->sata_rev); 426 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 427 rid = ch->unit; 428 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 429 &rid, RF_ACTIVE))) 430 return (ENXIO); 431 siis_dmainit(dev); 432 siis_slotsalloc(dev); 433 siis_ch_resume(dev); 434 mtx_lock(&ch->mtx); 435 rid = ATA_IRQ_RID; 436 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 437 &rid, RF_SHAREABLE | RF_ACTIVE))) { 438 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 439 device_printf(dev, "Unable to map interrupt\n"); 440 return (ENXIO); 441 } 442 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 443 siis_ch_intr_locked, dev, &ch->ih))) { 444 device_printf(dev, "Unable to setup interrupt\n"); 445 error = ENXIO; 446 goto err1; 447 } 448 /* Create the device queue for our SIM. */ 449 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 450 if (devq == NULL) { 451 device_printf(dev, "Unable to allocate simq\n"); 452 error = ENOMEM; 453 goto err1; 454 } 455 /* Construct SIM entry */ 456 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 457 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 458 if (ch->sim == NULL) { 459 device_printf(dev, "unable to allocate sim\n"); 460 error = ENOMEM; 461 goto err2; 462 } 463 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 464 device_printf(dev, "unable to register xpt bus\n"); 465 error = ENXIO; 466 goto err2; 467 } 468 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 469 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 470 device_printf(dev, "unable to create path\n"); 471 error = ENXIO; 472 goto err3; 473 } 474 mtx_unlock(&ch->mtx); 475 return (0); 476 477 err3: 478 xpt_bus_deregister(cam_sim_path(ch->sim)); 479 err2: 480 cam_sim_free(ch->sim, /*free_devq*/TRUE); 481 err1: 482 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 483 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 484 mtx_unlock(&ch->mtx); 485 return (error); 486 } 487 488 static int 489 siis_ch_detach(device_t dev) 490 { 491 struct siis_channel *ch = device_get_softc(dev); 492 493 mtx_lock(&ch->mtx); 494 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 495 xpt_free_path(ch->path); 496 xpt_bus_deregister(cam_sim_path(ch->sim)); 497 cam_sim_free(ch->sim, /*free_devq*/TRUE); 498 mtx_unlock(&ch->mtx); 499 500 bus_teardown_intr(dev, ch->r_irq, ch->ih); 501 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 502 503 siis_ch_suspend(dev); 504 siis_slotsfree(dev); 505 siis_dmafini(dev); 506 507 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 508 mtx_destroy(&ch->mtx); 509 return (0); 510 } 511 512 static int 513 siis_ch_suspend(device_t dev) 514 { 515 struct siis_channel *ch = device_get_softc(dev); 516 517 /* Put port into reset state. */ 518 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 519 return (0); 520 } 521 522 static int 523 siis_ch_resume(device_t dev) 524 { 525 struct siis_channel *ch = device_get_softc(dev); 526 527 /* Get port out of reset state. */ 528 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 529 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 530 if (ch->pm_present) 531 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 532 else 533 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 534 /* Enable port interrupts */ 535 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 536 return (0); 537 } 538 539 devclass_t siisch_devclass; 540 static device_method_t siisch_methods[] = { 541 DEVMETHOD(device_probe, siis_ch_probe), 542 DEVMETHOD(device_attach, siis_ch_attach), 543 DEVMETHOD(device_detach, siis_ch_detach), 544 DEVMETHOD(device_suspend, siis_ch_suspend), 545 DEVMETHOD(device_resume, siis_ch_resume), 546 { 0, 0 } 547 }; 548 static driver_t siisch_driver = { 549 "siisch", 550 siisch_methods, 551 sizeof(struct siis_channel) 552 }; 553 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 554 555 struct siis_dc_cb_args { 556 bus_addr_t maddr; 557 int error; 558 }; 559 560 static void 561 siis_dmainit(device_t dev) 562 { 563 struct siis_channel *ch = device_get_softc(dev); 564 struct siis_dc_cb_args dcba; 565 566 /* Command area. */ 567 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 568 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 569 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 570 0, NULL, NULL, &ch->dma.work_tag)) 571 goto error; 572 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 573 &ch->dma.work_map)) 574 goto error; 575 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 576 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 577 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 578 goto error; 579 } 580 ch->dma.work_bus = dcba.maddr; 581 /* Data area. */ 582 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 583 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 584 NULL, NULL, 585 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 586 SIIS_SG_ENTRIES, 0xFFFFFFFF, 587 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 588 goto error; 589 } 590 return; 591 592 error: 593 device_printf(dev, "WARNING - DMA initialization failed\n"); 594 siis_dmafini(dev); 595 } 596 597 static void 598 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 599 { 600 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 601 602 if (!(dcba->error = error)) 603 dcba->maddr = segs[0].ds_addr; 604 } 605 606 static void 607 siis_dmafini(device_t dev) 608 { 609 struct siis_channel *ch = device_get_softc(dev); 610 611 if (ch->dma.data_tag) { 612 bus_dma_tag_destroy(ch->dma.data_tag); 613 ch->dma.data_tag = NULL; 614 } 615 if (ch->dma.work_bus) { 616 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 617 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 618 ch->dma.work_bus = 0; 619 ch->dma.work_map = NULL; 620 ch->dma.work = NULL; 621 } 622 if (ch->dma.work_tag) { 623 bus_dma_tag_destroy(ch->dma.work_tag); 624 ch->dma.work_tag = NULL; 625 } 626 } 627 628 static void 629 siis_slotsalloc(device_t dev) 630 { 631 struct siis_channel *ch = device_get_softc(dev); 632 int i; 633 634 /* Alloc and setup command/dma slots */ 635 bzero(ch->slot, sizeof(ch->slot)); 636 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 637 struct siis_slot *slot = &ch->slot[i]; 638 639 slot->dev = dev; 640 slot->slot = i; 641 slot->state = SIIS_SLOT_EMPTY; 642 slot->ccb = NULL; 643 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 644 645 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 646 device_printf(ch->dev, "FAILURE - create data_map\n"); 647 } 648 } 649 650 static void 651 siis_slotsfree(device_t dev) 652 { 653 struct siis_channel *ch = device_get_softc(dev); 654 int i; 655 656 /* Free all dma slots */ 657 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 658 struct siis_slot *slot = &ch->slot[i]; 659 660 callout_drain(&slot->timeout); 661 if (slot->dma.data_map) { 662 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 663 slot->dma.data_map = NULL; 664 } 665 } 666 } 667 668 static void 669 siis_notify_events(device_t dev) 670 { 671 struct siis_channel *ch = device_get_softc(dev); 672 struct cam_path *dpath; 673 u_int32_t status; 674 int i; 675 676 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 677 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 678 if (bootverbose) 679 device_printf(dev, "SNTF 0x%04x\n", status); 680 for (i = 0; i < 16; i++) { 681 if ((status & (1 << i)) == 0) 682 continue; 683 if (xpt_create_path(&dpath, NULL, 684 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 685 xpt_async(AC_SCSI_AEN, dpath, NULL); 686 xpt_free_path(dpath); 687 } 688 } 689 690 } 691 692 static void 693 siis_phy_check_events(device_t dev) 694 { 695 struct siis_channel *ch = device_get_softc(dev); 696 697 /* If we have a connection event, deal with it */ 698 if (ch->pm_level == 0) { 699 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 700 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 701 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 702 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 703 if (bootverbose) 704 device_printf(dev, "CONNECT requested\n"); 705 siis_reset(dev); 706 } else { 707 if (bootverbose) 708 device_printf(dev, "DISCONNECT requested\n"); 709 ch->devices = 0; 710 } 711 } 712 } 713 714 static void 715 siis_ch_intr_locked(void *data) 716 { 717 device_t dev = (device_t)data; 718 struct siis_channel *ch = device_get_softc(dev); 719 720 mtx_lock(&ch->mtx); 721 siis_ch_intr(data); 722 mtx_unlock(&ch->mtx); 723 } 724 725 static void 726 siis_ch_intr(void *data) 727 { 728 device_t dev = (device_t)data; 729 struct siis_channel *ch = device_get_softc(dev); 730 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 731 enum siis_err_type et; 732 int i, ccs, port, tslots; 733 734 mtx_assert(&ch->mtx, MA_OWNED); 735 /* Read command statuses. */ 736 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 737 ok = ch->rslots & ~sstatus; 738 /* Complete all successfull commands. */ 739 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 740 if ((ok >> i) & 1) 741 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 742 } 743 /* Do we have any other events? */ 744 if ((sstatus & SIIS_P_SS_ATTN) == 0) 745 return; 746 /* Read and clear interrupt statuses. */ 747 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 748 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 749 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 750 /* Process PHY events */ 751 if (istatus & SIIS_P_IX_PHYRDYCHG) 752 siis_phy_check_events(dev); 753 /* Process NOTIFY events */ 754 if (istatus & SIIS_P_IX_SDBN) 755 siis_notify_events(dev); 756 /* Process command errors */ 757 if (istatus & SIIS_P_IX_COMMERR) { 758 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 759 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 760 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 761 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 762 err = ch->rslots & sstatus; 763 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 764 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 765 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 766 767 if (!ch->readlog && !ch->recovery) { 768 xpt_freeze_simq(ch->sim, ch->numrslots); 769 ch->recovery = 1; 770 } 771 if (ch->frozen) { 772 union ccb *fccb = ch->frozen; 773 ch->frozen = NULL; 774 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 775 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 776 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 777 xpt_freeze_devq(fccb->ccb_h.path, 1); 778 fccb->ccb_h.status |= CAM_DEV_QFRZN; 779 } 780 xpt_done(fccb); 781 } 782 if (estatus == SIIS_P_CMDERR_DEV || 783 estatus == SIIS_P_CMDERR_SDB || 784 estatus == SIIS_P_CMDERR_DATAFIS) { 785 tslots = ch->numtslots[port]; 786 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 787 /* XXX: requests in loading state. */ 788 if (((ch->rslots >> i) & 1) == 0) 789 continue; 790 if (ch->slot[i].ccb->ccb_h.target_id != port) 791 continue; 792 if (tslots == 0) { 793 /* Untagged operation. */ 794 if (i == ccs) 795 et = SIIS_ERR_TFE; 796 else 797 et = SIIS_ERR_INNOCENT; 798 } else { 799 /* Tagged operation. */ 800 et = SIIS_ERR_NCQ; 801 } 802 siis_end_transaction(&ch->slot[i], et); 803 } 804 /* 805 * We can't reinit port if there are some other 806 * commands active, use resume to complete them. 807 */ 808 if (ch->rslots != 0) 809 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 810 } else { 811 if (estatus == SIIS_P_CMDERR_SENDFIS || 812 estatus == SIIS_P_CMDERR_INCSTATE || 813 estatus == SIIS_P_CMDERR_PPE || 814 estatus == SIIS_P_CMDERR_SERVICE) { 815 et = SIIS_ERR_SATA; 816 } else 817 et = SIIS_ERR_INVALID; 818 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 819 /* XXX: requests in loading state. */ 820 if (((ch->rslots >> i) & 1) == 0) 821 continue; 822 siis_end_transaction(&ch->slot[i], et); 823 } 824 } 825 } 826 } 827 828 /* Must be called with channel locked. */ 829 static int 830 siis_check_collision(device_t dev, union ccb *ccb) 831 { 832 struct siis_channel *ch = device_get_softc(dev); 833 834 mtx_assert(&ch->mtx, MA_OWNED); 835 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 836 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 837 /* Atomic command while anything active. */ 838 if (ch->numrslots != 0) 839 return (1); 840 } 841 /* We have some atomic command running. */ 842 if (ch->aslots != 0) 843 return (1); 844 return (0); 845 } 846 847 /* Must be called with channel locked. */ 848 static void 849 siis_begin_transaction(device_t dev, union ccb *ccb) 850 { 851 struct siis_channel *ch = device_get_softc(dev); 852 struct siis_slot *slot; 853 int tag; 854 855 mtx_assert(&ch->mtx, MA_OWNED); 856 /* Choose empty slot. */ 857 tag = ch->lastslot; 858 while (ch->slot[tag].state != SIIS_SLOT_EMPTY) { 859 if (++tag >= SIIS_MAX_SLOTS) 860 tag = 0; 861 KASSERT(tag != ch->lastslot, ("siis: ALL SLOTS BUSY!")); 862 } 863 ch->lastslot = tag; 864 /* Occupy chosen slot. */ 865 slot = &ch->slot[tag]; 866 slot->ccb = ccb; 867 /* Update channel stats. */ 868 ch->numrslots++; 869 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 870 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 871 ch->numtslots[ccb->ccb_h.target_id]++; 872 } 873 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 874 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 875 ch->aslots |= (1 << slot->slot); 876 slot->dma.nsegs = 0; 877 /* If request moves data, setup and load SG list */ 878 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 879 void *buf; 880 bus_size_t size; 881 882 slot->state = SIIS_SLOT_LOADING; 883 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 884 buf = ccb->ataio.data_ptr; 885 size = ccb->ataio.dxfer_len; 886 } else { 887 buf = ccb->csio.data_ptr; 888 size = ccb->csio.dxfer_len; 889 } 890 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 891 buf, size, siis_dmasetprd, slot, 0); 892 } else 893 siis_execute_transaction(slot); 894 } 895 896 /* Locked by busdma engine. */ 897 static void 898 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 899 { 900 struct siis_slot *slot = arg; 901 struct siis_channel *ch = device_get_softc(slot->dev); 902 struct siis_cmd *ctp; 903 struct siis_dma_prd *prd; 904 int i; 905 906 mtx_assert(&ch->mtx, MA_OWNED); 907 if (error) { 908 device_printf(slot->dev, "DMA load error\n"); 909 if (!ch->readlog) 910 xpt_freeze_simq(ch->sim, 1); 911 siis_end_transaction(slot, SIIS_ERR_INVALID); 912 return; 913 } 914 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 915 /* Get a piece of the workspace for this request */ 916 ctp = (struct siis_cmd *) 917 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 918 /* Fill S/G table */ 919 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 920 prd = &ctp->u.ata.prd[0]; 921 else 922 prd = &ctp->u.atapi.prd[0]; 923 for (i = 0; i < nsegs; i++) { 924 prd[i].dba = htole64(segs[i].ds_addr); 925 prd[i].dbc = htole32(segs[i].ds_len); 926 prd[i].control = 0; 927 } 928 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 929 slot->dma.nsegs = nsegs; 930 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 931 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 932 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 933 siis_execute_transaction(slot); 934 } 935 936 /* Must be called with channel locked. */ 937 static void 938 siis_execute_transaction(struct siis_slot *slot) 939 { 940 device_t dev = slot->dev; 941 struct siis_channel *ch = device_get_softc(dev); 942 struct siis_cmd *ctp; 943 union ccb *ccb = slot->ccb; 944 u_int64_t prb_bus; 945 946 mtx_assert(&ch->mtx, MA_OWNED); 947 /* Get a piece of the workspace for this request */ 948 ctp = (struct siis_cmd *) 949 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 950 ctp->control = 0; 951 ctp->protocol_override = 0; 952 ctp->transfer_count = 0; 953 /* Special handling for Soft Reset command. */ 954 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 955 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 956 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 957 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 958 if (ccb->ccb_h.flags & CAM_DIR_IN) 959 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 960 if (ccb->ccb_h.flags & CAM_DIR_OUT) 961 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 962 } 963 /* Setup the FIS for this request */ 964 if (!siis_setup_fis(ctp, ccb, slot->slot)) { 965 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 966 if (!ch->readlog) 967 xpt_freeze_simq(ch->sim, 1); 968 siis_end_transaction(slot, SIIS_ERR_INVALID); 969 return; 970 } 971 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 972 BUS_DMASYNC_PREWRITE); 973 /* Issue command to the controller. */ 974 slot->state = SIIS_SLOT_RUNNING; 975 ch->rslots |= (1 << slot->slot); 976 prb_bus = ch->dma.work_bus + 977 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 978 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 979 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 980 /* Start command execution timeout */ 981 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 982 (timeout_t*)siis_timeout, slot); 983 return; 984 } 985 986 /* Must be called with channel locked. */ 987 static void 988 siis_process_timeout(device_t dev) 989 { 990 struct siis_channel *ch = device_get_softc(dev); 991 int i; 992 993 mtx_assert(&ch->mtx, MA_OWNED); 994 if (!ch->readlog && !ch->recovery) { 995 xpt_freeze_simq(ch->sim, ch->numrslots); 996 ch->recovery = 1; 997 } 998 /* Handle the rest of commands. */ 999 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1000 /* Do we have a running request on slot? */ 1001 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1002 continue; 1003 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1004 } 1005 } 1006 1007 /* Locked by callout mechanism. */ 1008 static void 1009 siis_timeout(struct siis_slot *slot) 1010 { 1011 device_t dev = slot->dev; 1012 struct siis_channel *ch = device_get_softc(dev); 1013 1014 mtx_assert(&ch->mtx, MA_OWNED); 1015 /* Check for stale timeout. */ 1016 if (slot->state < SIIS_SLOT_RUNNING) 1017 return; 1018 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1019 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1020 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1021 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1022 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1023 1024 if (ch->toslots == 0) 1025 xpt_freeze_simq(ch->sim, 1); 1026 ch->toslots |= (1 << slot->slot); 1027 if ((ch->rslots & ~ch->toslots) == 0) 1028 siis_process_timeout(dev); 1029 else 1030 device_printf(dev, " ... waiting for slots %08x\n", 1031 ch->rslots & ~ch->toslots); 1032 } 1033 1034 /* Must be called with channel locked. */ 1035 static void 1036 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1037 { 1038 device_t dev = slot->dev; 1039 struct siis_channel *ch = device_get_softc(dev); 1040 union ccb *ccb = slot->ccb; 1041 1042 mtx_assert(&ch->mtx, MA_OWNED); 1043 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1044 BUS_DMASYNC_POSTWRITE); 1045 /* Read result registers to the result struct 1046 * May be incorrect if several commands finished same time, 1047 * so read only when sure or have to. 1048 */ 1049 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1050 struct ata_res *res = &ccb->ataio.res; 1051 if ((et == SIIS_ERR_TFE) || 1052 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1053 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1054 1055 res->status = ATA_INB(ch->r_mem, offs + 2); 1056 res->error = ATA_INB(ch->r_mem, offs + 3); 1057 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1058 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1059 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1060 res->device = ATA_INB(ch->r_mem, offs + 7); 1061 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1062 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1063 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1064 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1065 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1066 } else 1067 bzero(res, sizeof(*res)); 1068 } 1069 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1070 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1071 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1072 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1073 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1074 } 1075 /* Set proper result status. */ 1076 if (et != SIIS_ERR_NONE || ch->recovery) { 1077 ch->eslots |= (1 << slot->slot); 1078 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1079 } 1080 /* In case of error, freeze device for proper recovery. */ 1081 if (et != SIIS_ERR_NONE && 1082 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1083 xpt_freeze_devq(ccb->ccb_h.path, 1); 1084 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1085 } 1086 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1087 switch (et) { 1088 case SIIS_ERR_NONE: 1089 ccb->ccb_h.status |= CAM_REQ_CMP; 1090 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1091 ccb->csio.scsi_status = SCSI_STATUS_OK; 1092 break; 1093 case SIIS_ERR_INVALID: 1094 ch->fatalerr = 1; 1095 ccb->ccb_h.status |= CAM_REQ_INVALID; 1096 break; 1097 case SIIS_ERR_INNOCENT: 1098 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1099 break; 1100 case SIIS_ERR_TFE: 1101 case SIIS_ERR_NCQ: 1102 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1103 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1104 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1105 } else { 1106 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1107 } 1108 break; 1109 case SIIS_ERR_SATA: 1110 ch->fatalerr = 1; 1111 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1112 break; 1113 case SIIS_ERR_TIMEOUT: 1114 ch->fatalerr = 1; 1115 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1116 break; 1117 default: 1118 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1119 } 1120 /* Free slot. */ 1121 ch->rslots &= ~(1 << slot->slot); 1122 ch->aslots &= ~(1 << slot->slot); 1123 if (et != SIIS_ERR_TIMEOUT) { 1124 if (ch->toslots == (1 << slot->slot)) 1125 xpt_release_simq(ch->sim, TRUE); 1126 ch->toslots &= ~(1 << slot->slot); 1127 } 1128 slot->state = SIIS_SLOT_EMPTY; 1129 slot->ccb = NULL; 1130 /* Update channel stats. */ 1131 ch->numrslots--; 1132 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1133 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1134 ch->numtslots[ccb->ccb_h.target_id]--; 1135 } 1136 /* If it was our READ LOG command - process it. */ 1137 if (ch->readlog) { 1138 siis_process_read_log(dev, ccb); 1139 /* If it was NCQ command error, put result on hold. */ 1140 } else if (et == SIIS_ERR_NCQ) { 1141 ch->hold[slot->slot] = ccb; 1142 ch->numhslots++; 1143 } else 1144 xpt_done(ccb); 1145 /* Unfreeze frozen command. */ 1146 if (ch->frozen && ch->numrslots == 0) { 1147 union ccb *fccb = ch->frozen; 1148 ch->frozen = NULL; 1149 siis_begin_transaction(dev, fccb); 1150 xpt_release_simq(ch->sim, TRUE); 1151 } 1152 /* If we have no other active commands, ... */ 1153 if (ch->rslots == 0) { 1154 /* if there were timeouts or fatal error - reset port. */ 1155 if (ch->toslots != 0 || ch->fatalerr) { 1156 siis_reset(dev); 1157 } else { 1158 /* if we have slots in error, we can reinit port. */ 1159 if (ch->eslots != 0) 1160 siis_portinit(dev); 1161 /* if there commands on hold, we can do READ LOG. */ 1162 if (!ch->readlog && ch->numhslots) 1163 siis_issue_read_log(dev); 1164 } 1165 /* If all the reset of commands are in timeout - abort them. */ 1166 } else if ((ch->rslots & ~ch->toslots) == 0) 1167 siis_process_timeout(dev); 1168 } 1169 1170 static void 1171 siis_issue_read_log(device_t dev) 1172 { 1173 struct siis_channel *ch = device_get_softc(dev); 1174 union ccb *ccb; 1175 struct ccb_ataio *ataio; 1176 int i; 1177 1178 /* Find some holden command. */ 1179 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1180 if (ch->hold[i]) 1181 break; 1182 } 1183 if (i == SIIS_MAX_SLOTS) 1184 return; 1185 ch->readlog = 1; 1186 ccb = xpt_alloc_ccb_nowait(); 1187 if (ccb == NULL) { 1188 device_printf(dev, "Unable allocate READ LOG command"); 1189 return; /* XXX */ 1190 } 1191 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1192 ccb->ccb_h.func_code = XPT_ATA_IO; 1193 ccb->ccb_h.flags = CAM_DIR_IN; 1194 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1195 ataio = &ccb->ataio; 1196 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1197 if (ataio->data_ptr == NULL) { 1198 device_printf(dev, "Unable allocate memory for READ LOG command"); 1199 return; /* XXX */ 1200 } 1201 ataio->dxfer_len = 512; 1202 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1203 ataio->cmd.flags = CAM_ATAIO_48BIT; 1204 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1205 ataio->cmd.sector_count = 1; 1206 ataio->cmd.sector_count_exp = 0; 1207 ataio->cmd.lba_low = 0x10; 1208 ataio->cmd.lba_mid = 0; 1209 ataio->cmd.lba_mid_exp = 0; 1210 siis_begin_transaction(dev, ccb); 1211 } 1212 1213 static void 1214 siis_process_read_log(device_t dev, union ccb *ccb) 1215 { 1216 struct siis_channel *ch = device_get_softc(dev); 1217 uint8_t *data; 1218 struct ata_res *res; 1219 int i; 1220 1221 ch->readlog = 0; 1222 data = ccb->ataio.data_ptr; 1223 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1224 (data[0] & 0x80) == 0) { 1225 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1226 if (!ch->hold[i]) 1227 continue; 1228 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1229 continue; 1230 if ((data[0] & 0x1F) == i) { 1231 res = &ch->hold[i]->ataio.res; 1232 res->status = data[2]; 1233 res->error = data[3]; 1234 res->lba_low = data[4]; 1235 res->lba_mid = data[5]; 1236 res->lba_high = data[6]; 1237 res->device = data[7]; 1238 res->lba_low_exp = data[8]; 1239 res->lba_mid_exp = data[9]; 1240 res->lba_high_exp = data[10]; 1241 res->sector_count = data[12]; 1242 res->sector_count_exp = data[13]; 1243 } else { 1244 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1245 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1246 } 1247 xpt_done(ch->hold[i]); 1248 ch->hold[i] = NULL; 1249 ch->numhslots--; 1250 } 1251 } else { 1252 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1253 device_printf(dev, "Error while READ LOG EXT\n"); 1254 else if ((data[0] & 0x80) == 0) { 1255 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1256 } 1257 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1258 if (!ch->hold[i]) 1259 continue; 1260 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1261 continue; 1262 xpt_done(ch->hold[i]); 1263 ch->hold[i] = NULL; 1264 ch->numhslots--; 1265 } 1266 } 1267 free(ccb->ataio.data_ptr, M_SIIS); 1268 xpt_free_ccb(ccb); 1269 } 1270 1271 static void 1272 siis_portinit(device_t dev) 1273 { 1274 struct siis_channel *ch = device_get_softc(dev); 1275 int i; 1276 1277 ch->eslots = 0; 1278 ch->recovery = 0; 1279 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1280 for (i = 0; i < 16; i++) { 1281 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1282 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1283 } 1284 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1285 siis_wait_ready(dev, 1000); 1286 } 1287 1288 static int 1289 siis_devreset(device_t dev) 1290 { 1291 struct siis_channel *ch = device_get_softc(dev); 1292 int timeout = 0; 1293 uint32_t val; 1294 1295 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1296 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1297 SIIS_P_CTL_DEV_RESET) != 0) { 1298 DELAY(1000); 1299 if (timeout++ > 100) { 1300 device_printf(dev, "device reset stuck (timeout %dms) " 1301 "status = %08x\n", timeout, val); 1302 return (EBUSY); 1303 } 1304 } 1305 if (bootverbose) 1306 device_printf(dev, "device reset time=%dms\n", timeout); 1307 return (0); 1308 } 1309 1310 static int 1311 siis_wait_ready(device_t dev, int t) 1312 { 1313 struct siis_channel *ch = device_get_softc(dev); 1314 int timeout = 0; 1315 uint32_t val; 1316 1317 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1318 SIIS_P_CTL_READY) == 0) { 1319 DELAY(1000); 1320 if (timeout++ > t) { 1321 device_printf(dev, "port is not ready (timeout %dms) " 1322 "status = %08x\n", t, val); 1323 return (EBUSY); 1324 } 1325 } 1326 if (bootverbose) 1327 device_printf(dev, "ready wait time=%dms\n", timeout); 1328 return (0); 1329 } 1330 1331 static void 1332 siis_reset(device_t dev) 1333 { 1334 struct siis_channel *ch = device_get_softc(dev); 1335 int i, retry = 0; 1336 uint32_t val; 1337 1338 if (bootverbose) 1339 device_printf(dev, "SIIS reset...\n"); 1340 if (!ch->readlog && !ch->recovery) 1341 xpt_freeze_simq(ch->sim, ch->numrslots); 1342 /* Requeue frozen command. */ 1343 if (ch->frozen) { 1344 union ccb *fccb = ch->frozen; 1345 ch->frozen = NULL; 1346 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1347 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1348 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1349 xpt_freeze_devq(fccb->ccb_h.path, 1); 1350 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1351 } 1352 xpt_done(fccb); 1353 } 1354 /* Requeue all running commands. */ 1355 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1356 /* Do we have a running request on slot? */ 1357 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1358 continue; 1359 /* XXX; Commands in loading state. */ 1360 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1361 } 1362 /* Finish all holden commands as-is. */ 1363 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1364 if (!ch->hold[i]) 1365 continue; 1366 xpt_done(ch->hold[i]); 1367 ch->hold[i] = NULL; 1368 ch->numhslots--; 1369 } 1370 if (ch->toslots != 0) 1371 xpt_release_simq(ch->sim, TRUE); 1372 ch->eslots = 0; 1373 ch->recovery = 0; 1374 ch->toslots = 0; 1375 ch->fatalerr = 0; 1376 /* Disable port interrupts */ 1377 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1378 /* Set speed limit. */ 1379 if (ch->sata_rev == 1) 1380 val = ATA_SC_SPD_SPEED_GEN1; 1381 else if (ch->sata_rev == 2) 1382 val = ATA_SC_SPD_SPEED_GEN2; 1383 else if (ch->sata_rev == 3) 1384 val = ATA_SC_SPD_SPEED_GEN3; 1385 else 1386 val = 0; 1387 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1388 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1389 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1390 retry: 1391 siis_devreset(dev); 1392 /* Reset and reconnect PHY, */ 1393 if (!siis_sata_connect(ch)) { 1394 ch->devices = 0; 1395 /* Enable port interrupts */ 1396 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1397 if (bootverbose) 1398 device_printf(dev, 1399 "SIIS reset done: phy reset found no device\n"); 1400 /* Tell the XPT about the event */ 1401 xpt_async(AC_BUS_RESET, ch->path, NULL); 1402 return; 1403 } 1404 /* Wait for clearing busy status. */ 1405 if (siis_wait_ready(dev, 10000)) { 1406 device_printf(dev, "device ready timeout\n"); 1407 if (!retry) { 1408 device_printf(dev, "trying full port reset ...\n"); 1409 /* Get port to the reset state. */ 1410 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1411 DELAY(10000); 1412 /* Get port out of reset state. */ 1413 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1414 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1415 if (ch->pm_present) 1416 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1417 else 1418 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1419 siis_wait_ready(dev, 5000); 1420 retry = 1; 1421 goto retry; 1422 } 1423 } 1424 ch->devices = 1; 1425 /* Enable port interrupts */ 1426 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1427 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1428 if (bootverbose) 1429 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1430 /* Tell the XPT about the event */ 1431 xpt_async(AC_BUS_RESET, ch->path, NULL); 1432 } 1433 1434 static int 1435 siis_setup_fis(struct siis_cmd *ctp, union ccb *ccb, int tag) 1436 { 1437 u_int8_t *fis = &ctp->fis[0]; 1438 1439 bzero(fis, 24); 1440 fis[0] = 0x27; /* host to device */ 1441 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1442 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1443 fis[1] |= 0x80; 1444 fis[2] = ATA_PACKET_CMD; 1445 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 1446 fis[3] = ATA_F_DMA; 1447 else { 1448 fis[5] = ccb->csio.dxfer_len; 1449 fis[6] = ccb->csio.dxfer_len >> 8; 1450 } 1451 fis[7] = ATA_D_LBA; 1452 fis[15] = ATA_A_4BIT; 1453 bzero(ctp->u.atapi.ccb, 16); 1454 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1455 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1456 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1457 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1458 fis[1] |= 0x80; 1459 fis[2] = ccb->ataio.cmd.command; 1460 fis[3] = ccb->ataio.cmd.features; 1461 fis[4] = ccb->ataio.cmd.lba_low; 1462 fis[5] = ccb->ataio.cmd.lba_mid; 1463 fis[6] = ccb->ataio.cmd.lba_high; 1464 fis[7] = ccb->ataio.cmd.device; 1465 fis[8] = ccb->ataio.cmd.lba_low_exp; 1466 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1467 fis[10] = ccb->ataio.cmd.lba_high_exp; 1468 fis[11] = ccb->ataio.cmd.features_exp; 1469 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1470 fis[12] = tag << 3; 1471 fis[13] = 0; 1472 } else { 1473 fis[12] = ccb->ataio.cmd.sector_count; 1474 fis[13] = ccb->ataio.cmd.sector_count_exp; 1475 } 1476 fis[15] = ATA_A_4BIT; 1477 } else { 1478 /* Soft reset. */ 1479 } 1480 return (20); 1481 } 1482 1483 static int 1484 siis_sata_connect(struct siis_channel *ch) 1485 { 1486 u_int32_t status; 1487 int timeout; 1488 1489 /* Wait up to 100ms for "connect well" */ 1490 for (timeout = 0; timeout < 100 ; timeout++) { 1491 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1492 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1493 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1494 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1495 break; 1496 DELAY(1000); 1497 } 1498 if (timeout >= 100) { 1499 if (bootverbose) { 1500 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1501 status); 1502 } 1503 return (0); 1504 } 1505 if (bootverbose) { 1506 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1507 timeout, status); 1508 } 1509 /* Clear SATA error register */ 1510 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1511 return (1); 1512 } 1513 1514 static void 1515 siisaction(struct cam_sim *sim, union ccb *ccb) 1516 { 1517 device_t dev; 1518 struct siis_channel *ch; 1519 1520 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1521 ccb->ccb_h.func_code)); 1522 1523 ch = (struct siis_channel *)cam_sim_softc(sim); 1524 dev = ch->dev; 1525 mtx_assert(&ch->mtx, MA_OWNED); 1526 switch (ccb->ccb_h.func_code) { 1527 /* Common cases first */ 1528 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1529 case XPT_SCSI_IO: 1530 if (ch->devices == 0) { 1531 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1532 xpt_done(ccb); 1533 break; 1534 } 1535 /* Check for command collision. */ 1536 if (siis_check_collision(dev, ccb)) { 1537 /* Freeze command. */ 1538 ch->frozen = ccb; 1539 /* We have only one frozen slot, so freeze simq also. */ 1540 xpt_freeze_simq(ch->sim, 1); 1541 return; 1542 } 1543 siis_begin_transaction(dev, ccb); 1544 break; 1545 case XPT_EN_LUN: /* Enable LUN as a target */ 1546 case XPT_TARGET_IO: /* Execute target I/O request */ 1547 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1548 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1549 case XPT_ABORT: /* Abort the specified CCB */ 1550 /* XXX Implement */ 1551 ccb->ccb_h.status = CAM_REQ_INVALID; 1552 xpt_done(ccb); 1553 break; 1554 case XPT_SET_TRAN_SETTINGS: 1555 { 1556 struct ccb_trans_settings *cts = &ccb->cts; 1557 1558 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1559 ch->pm_present = cts->xport_specific.sata.pm_present; 1560 if (ch->pm_present) 1561 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1562 else 1563 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1564 } 1565 ccb->ccb_h.status = CAM_REQ_CMP; 1566 xpt_done(ccb); 1567 break; 1568 } 1569 case XPT_GET_TRAN_SETTINGS: 1570 /* Get default/user set transfer settings for the target */ 1571 { 1572 struct ccb_trans_settings *cts = &ccb->cts; 1573 uint32_t status; 1574 1575 cts->protocol = PROTO_ATA; 1576 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1577 cts->transport = XPORT_SATA; 1578 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1579 cts->proto_specific.valid = 0; 1580 cts->xport_specific.sata.valid = 0; 1581 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1582 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1583 else 1584 status = ATA_INL(ch->r_mem, SIIS_P_SCTL) & ATA_SC_SPD_MASK; 1585 if (status & ATA_SS_SPD_GEN3) { 1586 cts->xport_specific.sata.bitrate = 600000; 1587 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1588 } else if (status & ATA_SS_SPD_GEN2) { 1589 cts->xport_specific.sata.bitrate = 300000; 1590 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1591 } else if (status & ATA_SS_SPD_GEN1) { 1592 cts->xport_specific.sata.bitrate = 150000; 1593 cts->xport_specific.sata.valid |= CTS_SATA_VALID_SPEED; 1594 } 1595 cts->xport_specific.sata.pm_present = ch->pm_present; 1596 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1597 ccb->ccb_h.status = CAM_REQ_CMP; 1598 xpt_done(ccb); 1599 break; 1600 } 1601 #if 0 1602 case XPT_CALC_GEOMETRY: 1603 { 1604 struct ccb_calc_geometry *ccg; 1605 uint32_t size_mb; 1606 uint32_t secs_per_cylinder; 1607 1608 ccg = &ccb->ccg; 1609 size_mb = ccg->volume_size 1610 / ((1024L * 1024L) / ccg->block_size); 1611 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1612 if (size_mb >= 2048) { 1613 ccg->heads = 255; 1614 ccg->secs_per_track = 63; 1615 } else { 1616 ccg->heads = 128; 1617 ccg->secs_per_track = 32; 1618 } 1619 } else { 1620 ccg->heads = 64; 1621 ccg->secs_per_track = 32; 1622 } 1623 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1624 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1625 ccb->ccb_h.status = CAM_REQ_CMP; 1626 xpt_done(ccb); 1627 break; 1628 } 1629 #endif 1630 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1631 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1632 siis_reset(dev); 1633 ccb->ccb_h.status = CAM_REQ_CMP; 1634 xpt_done(ccb); 1635 break; 1636 case XPT_TERM_IO: /* Terminate the I/O process */ 1637 /* XXX Implement */ 1638 ccb->ccb_h.status = CAM_REQ_INVALID; 1639 xpt_done(ccb); 1640 break; 1641 case XPT_PATH_INQ: /* Path routing inquiry */ 1642 { 1643 struct ccb_pathinq *cpi = &ccb->cpi; 1644 1645 cpi->version_num = 1; /* XXX??? */ 1646 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1647 cpi->hba_inquiry |= PI_SATAPM; 1648 cpi->target_sprt = 0; 1649 cpi->hba_misc = PIM_SEQSCAN; 1650 cpi->hba_eng_cnt = 0; 1651 cpi->max_target = 15; 1652 cpi->max_lun = 0; 1653 cpi->initiator_id = 0; 1654 cpi->bus_id = cam_sim_bus(sim); 1655 cpi->base_transfer_speed = 150000; 1656 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1657 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1658 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1659 cpi->unit_number = cam_sim_unit(sim); 1660 cpi->transport = XPORT_SATA; 1661 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1662 cpi->protocol = PROTO_ATA; 1663 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1664 cpi->ccb_h.status = CAM_REQ_CMP; 1665 cpi->maxio = MAXPHYS; 1666 xpt_done(ccb); 1667 break; 1668 } 1669 default: 1670 ccb->ccb_h.status = CAM_REQ_INVALID; 1671 xpt_done(ccb); 1672 break; 1673 } 1674 } 1675 1676 static void 1677 siispoll(struct cam_sim *sim) 1678 { 1679 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1680 1681 siis_ch_intr(ch->dev); 1682 } 1683