1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include "siis.h" 50 51 #include <cam/cam.h> 52 #include <cam/cam_ccb.h> 53 #include <cam/cam_sim.h> 54 #include <cam/cam_xpt_sim.h> 55 #include <cam/cam_xpt_periph.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_suspend(device_t dev); 64 static int siis_ch_resume(device_t dev); 65 static void siis_ch_intr_locked(void *data); 66 static void siis_ch_intr(void *data); 67 static void siis_begin_transaction(device_t dev, union ccb *ccb); 68 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 69 static void siis_execute_transaction(struct siis_slot *slot); 70 static void siis_timeout(struct siis_slot *slot); 71 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 72 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 73 static void siis_dmainit(device_t dev); 74 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 75 static void siis_dmafini(device_t dev); 76 static void siis_slotsalloc(device_t dev); 77 static void siis_slotsfree(device_t dev); 78 static void siis_reset(device_t dev); 79 static void siis_portinit(device_t dev); 80 static int siis_wait_ready(device_t dev, int t); 81 82 static int siis_sata_connect(struct siis_channel *ch); 83 84 static void siis_issue_read_log(device_t dev); 85 static void siis_process_read_log(device_t dev, union ccb *ccb); 86 87 static void siisaction(struct cam_sim *sim, union ccb *ccb); 88 static void siispoll(struct cam_sim *sim); 89 90 MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 91 92 static struct { 93 uint32_t id; 94 const char *name; 95 int ports; 96 } siis_ids[] = { 97 {0x31241095, "SiI3124", 4}, 98 {0x31248086, "SiI3124", 4}, 99 {0x31321095, "SiI3132", 2}, 100 {0x02421095, "SiI3132", 2}, 101 {0x02441095, "SiI3132", 2}, 102 {0x31311095, "SiI3131", 1}, 103 {0x35311095, "SiI3531", 1}, 104 {0, NULL, 0} 105 }; 106 107 static int 108 siis_probe(device_t dev) 109 { 110 char buf[64]; 111 int i; 112 uint32_t devid = pci_get_devid(dev); 113 114 for (i = 0; siis_ids[i].id != 0; i++) { 115 if (siis_ids[i].id == devid) { 116 snprintf(buf, sizeof(buf), "%s SATA2 controller", 117 siis_ids[i].name); 118 device_set_desc_copy(dev, buf); 119 return (BUS_PROBE_VENDOR); 120 } 121 } 122 return (ENXIO); 123 } 124 125 static int 126 siis_attach(device_t dev) 127 { 128 struct siis_controller *ctlr = device_get_softc(dev); 129 uint32_t devid = pci_get_devid(dev); 130 device_t child; 131 int error, i, unit; 132 133 for (i = 0; siis_ids[i].id != 0; i++) { 134 if (siis_ids[i].id == devid) 135 break; 136 } 137 ctlr->dev = dev; 138 /* Global memory */ 139 ctlr->r_grid = PCIR_BAR(0); 140 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 141 &ctlr->r_grid, RF_ACTIVE))) 142 return (ENXIO); 143 /* Channels memory */ 144 ctlr->r_rid = PCIR_BAR(2); 145 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &ctlr->r_rid, RF_ACTIVE))) 147 return (ENXIO); 148 /* Setup our own memory management for channels. */ 149 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 150 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 151 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 152 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 153 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 154 return (error); 155 } 156 if ((error = rman_manage_region(&ctlr->sc_iomem, 157 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 158 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 159 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 160 rman_fini(&ctlr->sc_iomem); 161 return (error); 162 } 163 /* Reset controller */ 164 siis_resume(dev); 165 /* Number of HW channels */ 166 ctlr->channels = siis_ids[i].ports; 167 /* Setup interrupts. */ 168 if (siis_setup_interrupt(dev)) { 169 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 170 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 171 rman_fini(&ctlr->sc_iomem); 172 return ENXIO; 173 } 174 /* Attach all channels on this controller */ 175 for (unit = 0; unit < ctlr->channels; unit++) { 176 child = device_add_child(dev, "siisch", -1); 177 if (child == NULL) 178 device_printf(dev, "failed to add channel device\n"); 179 else 180 device_set_ivars(child, (void *)(intptr_t)unit); 181 } 182 bus_generic_attach(dev); 183 return 0; 184 } 185 186 static int 187 siis_detach(device_t dev) 188 { 189 struct siis_controller *ctlr = device_get_softc(dev); 190 device_t *children; 191 int nchildren, i; 192 193 /* Detach & delete all children */ 194 if (!device_get_children(dev, &children, &nchildren)) { 195 for (i = 0; i < nchildren; i++) 196 device_delete_child(dev, children[i]); 197 free(children, M_TEMP); 198 } 199 /* Free interrupts. */ 200 if (ctlr->irq.r_irq) { 201 bus_teardown_intr(dev, ctlr->irq.r_irq, 202 ctlr->irq.handle); 203 bus_release_resource(dev, SYS_RES_IRQ, 204 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 205 } 206 pci_release_msi(dev); 207 /* Free memory. */ 208 rman_fini(&ctlr->sc_iomem); 209 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 210 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 211 return (0); 212 } 213 214 static int 215 siis_suspend(device_t dev) 216 { 217 struct siis_controller *ctlr = device_get_softc(dev); 218 219 bus_generic_suspend(dev); 220 /* Put controller into reset state. */ 221 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 222 return 0; 223 } 224 225 static int 226 siis_resume(device_t dev) 227 { 228 struct siis_controller *ctlr = device_get_softc(dev); 229 230 /* Put controller into reset state. */ 231 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET); 232 DELAY(10000); 233 /* Get controller out of reset state and enable port interrupts. */ 234 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 0x0000000f); 235 return (bus_generic_resume(dev)); 236 } 237 238 static int 239 siis_setup_interrupt(device_t dev) 240 { 241 struct siis_controller *ctlr = device_get_softc(dev); 242 int msi = 0; 243 244 /* Process hints. */ 245 resource_int_value(device_get_name(dev), 246 device_get_unit(dev), "msi", &msi); 247 if (msi < 0) 248 msi = 0; 249 else if (msi > 0) 250 msi = min(1, pci_msi_count(dev)); 251 /* Allocate MSI if needed/present. */ 252 if (msi && pci_alloc_msi(dev, &msi) != 0) 253 msi = 0; 254 /* Allocate all IRQs. */ 255 ctlr->irq.r_irq_rid = msi ? 1 : 0; 256 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 257 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 258 device_printf(dev, "unable to map interrupt\n"); 259 return ENXIO; 260 } 261 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 262 siis_intr, ctlr, &ctlr->irq.handle))) { 263 /* SOS XXX release r_irq */ 264 device_printf(dev, "unable to setup interrupt\n"); 265 return ENXIO; 266 } 267 return (0); 268 } 269 270 /* 271 * Common case interrupt handler. 272 */ 273 static void 274 siis_intr(void *data) 275 { 276 struct siis_controller *ctlr = (struct siis_controller *)data; 277 u_int32_t is; 278 void *arg; 279 int unit; 280 281 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 282 for (unit = 0; unit < ctlr->channels; unit++) { 283 if ((is & SIIS_IS_PORT(unit)) != 0 && 284 (arg = ctlr->interrupt[unit].argument)) { 285 ctlr->interrupt[unit].function(arg); 286 } 287 } 288 } 289 290 static struct resource * 291 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 292 u_long start, u_long end, u_long count, u_int flags) 293 { 294 struct siis_controller *ctlr = device_get_softc(dev); 295 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 296 struct resource *res = NULL; 297 int offset = unit << 13; 298 long st; 299 300 switch (type) { 301 case SYS_RES_MEMORY: 302 st = rman_get_start(ctlr->r_mem); 303 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 304 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 305 if (res) { 306 bus_space_handle_t bsh; 307 bus_space_tag_t bst; 308 bsh = rman_get_bushandle(ctlr->r_mem); 309 bst = rman_get_bustag(ctlr->r_mem); 310 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 311 rman_set_bushandle(res, bsh); 312 rman_set_bustag(res, bst); 313 } 314 break; 315 case SYS_RES_IRQ: 316 if (*rid == ATA_IRQ_RID) 317 res = ctlr->irq.r_irq; 318 break; 319 } 320 return (res); 321 } 322 323 static int 324 siis_release_resource(device_t dev, device_t child, int type, int rid, 325 struct resource *r) 326 { 327 328 switch (type) { 329 case SYS_RES_MEMORY: 330 rman_release_resource(r); 331 return (0); 332 case SYS_RES_IRQ: 333 if (rid != ATA_IRQ_RID) 334 return ENOENT; 335 return (0); 336 } 337 return (EINVAL); 338 } 339 340 static int 341 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 342 int flags, driver_filter_t *filter, driver_intr_t *function, 343 void *argument, void **cookiep) 344 { 345 struct siis_controller *ctlr = device_get_softc(dev); 346 int unit = (intptr_t)device_get_ivars(child); 347 348 if (filter != NULL) { 349 printf("siis.c: we cannot use a filter here\n"); 350 return (EINVAL); 351 } 352 ctlr->interrupt[unit].function = function; 353 ctlr->interrupt[unit].argument = argument; 354 return (0); 355 } 356 357 static int 358 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 359 void *cookie) 360 { 361 struct siis_controller *ctlr = device_get_softc(dev); 362 int unit = (intptr_t)device_get_ivars(child); 363 364 ctlr->interrupt[unit].function = NULL; 365 ctlr->interrupt[unit].argument = NULL; 366 return (0); 367 } 368 369 static int 370 siis_print_child(device_t dev, device_t child) 371 { 372 int retval; 373 374 retval = bus_print_child_header(dev, child); 375 retval += printf(" at channel %d", 376 (int)(intptr_t)device_get_ivars(child)); 377 retval += bus_print_child_footer(dev, child); 378 379 return (retval); 380 } 381 382 devclass_t siis_devclass; 383 static device_method_t siis_methods[] = { 384 DEVMETHOD(device_probe, siis_probe), 385 DEVMETHOD(device_attach, siis_attach), 386 DEVMETHOD(device_detach, siis_detach), 387 DEVMETHOD(device_suspend, siis_suspend), 388 DEVMETHOD(device_resume, siis_resume), 389 DEVMETHOD(bus_print_child, siis_print_child), 390 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 391 DEVMETHOD(bus_release_resource, siis_release_resource), 392 DEVMETHOD(bus_setup_intr, siis_setup_intr), 393 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 394 { 0, 0 } 395 }; 396 static driver_t siis_driver = { 397 "siis", 398 siis_methods, 399 sizeof(struct siis_controller) 400 }; 401 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 402 MODULE_VERSION(siis, 1); 403 MODULE_DEPEND(siis, cam, 1, 1, 1); 404 405 static int 406 siis_ch_probe(device_t dev) 407 { 408 409 device_set_desc_copy(dev, "SIIS channel"); 410 return (0); 411 } 412 413 static int 414 siis_ch_attach(device_t dev) 415 { 416 struct siis_channel *ch = device_get_softc(dev); 417 struct cam_devq *devq; 418 int rid, error, i, sata_rev = 0; 419 420 ch->dev = dev; 421 ch->unit = (intptr_t)device_get_ivars(dev); 422 resource_int_value(device_get_name(dev), 423 device_get_unit(dev), "pm_level", &ch->pm_level); 424 resource_int_value(device_get_name(dev), 425 device_get_unit(dev), "sata_rev", &sata_rev); 426 for (i = 0; i < 16; i++) { 427 ch->user[i].revision = sata_rev; 428 ch->user[i].mode = 0; 429 ch->user[i].bytecount = 8192; 430 ch->user[i].tags = SIIS_MAX_SLOTS; 431 ch->curr[i] = ch->user[i]; 432 } 433 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 434 rid = ch->unit; 435 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 436 &rid, RF_ACTIVE))) 437 return (ENXIO); 438 siis_dmainit(dev); 439 siis_slotsalloc(dev); 440 siis_ch_resume(dev); 441 mtx_lock(&ch->mtx); 442 rid = ATA_IRQ_RID; 443 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 444 &rid, RF_SHAREABLE | RF_ACTIVE))) { 445 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 446 device_printf(dev, "Unable to map interrupt\n"); 447 return (ENXIO); 448 } 449 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 450 siis_ch_intr_locked, dev, &ch->ih))) { 451 device_printf(dev, "Unable to setup interrupt\n"); 452 error = ENXIO; 453 goto err1; 454 } 455 /* Create the device queue for our SIM. */ 456 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 457 if (devq == NULL) { 458 device_printf(dev, "Unable to allocate simq\n"); 459 error = ENOMEM; 460 goto err1; 461 } 462 /* Construct SIM entry */ 463 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 464 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 465 if (ch->sim == NULL) { 466 device_printf(dev, "unable to allocate sim\n"); 467 error = ENOMEM; 468 goto err2; 469 } 470 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 471 device_printf(dev, "unable to register xpt bus\n"); 472 error = ENXIO; 473 goto err2; 474 } 475 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 476 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 477 device_printf(dev, "unable to create path\n"); 478 error = ENXIO; 479 goto err3; 480 } 481 mtx_unlock(&ch->mtx); 482 return (0); 483 484 err3: 485 xpt_bus_deregister(cam_sim_path(ch->sim)); 486 err2: 487 cam_sim_free(ch->sim, /*free_devq*/TRUE); 488 err1: 489 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 490 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 491 mtx_unlock(&ch->mtx); 492 return (error); 493 } 494 495 static int 496 siis_ch_detach(device_t dev) 497 { 498 struct siis_channel *ch = device_get_softc(dev); 499 500 mtx_lock(&ch->mtx); 501 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 502 xpt_free_path(ch->path); 503 xpt_bus_deregister(cam_sim_path(ch->sim)); 504 cam_sim_free(ch->sim, /*free_devq*/TRUE); 505 mtx_unlock(&ch->mtx); 506 507 bus_teardown_intr(dev, ch->r_irq, ch->ih); 508 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 509 510 siis_ch_suspend(dev); 511 siis_slotsfree(dev); 512 siis_dmafini(dev); 513 514 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 515 mtx_destroy(&ch->mtx); 516 return (0); 517 } 518 519 static int 520 siis_ch_suspend(device_t dev) 521 { 522 struct siis_channel *ch = device_get_softc(dev); 523 524 /* Put port into reset state. */ 525 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 526 return (0); 527 } 528 529 static int 530 siis_ch_resume(device_t dev) 531 { 532 struct siis_channel *ch = device_get_softc(dev); 533 534 /* Get port out of reset state. */ 535 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 536 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 537 if (ch->pm_present) 538 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 539 else 540 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 541 /* Enable port interrupts */ 542 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 543 return (0); 544 } 545 546 devclass_t siisch_devclass; 547 static device_method_t siisch_methods[] = { 548 DEVMETHOD(device_probe, siis_ch_probe), 549 DEVMETHOD(device_attach, siis_ch_attach), 550 DEVMETHOD(device_detach, siis_ch_detach), 551 DEVMETHOD(device_suspend, siis_ch_suspend), 552 DEVMETHOD(device_resume, siis_ch_resume), 553 { 0, 0 } 554 }; 555 static driver_t siisch_driver = { 556 "siisch", 557 siisch_methods, 558 sizeof(struct siis_channel) 559 }; 560 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 561 562 struct siis_dc_cb_args { 563 bus_addr_t maddr; 564 int error; 565 }; 566 567 static void 568 siis_dmainit(device_t dev) 569 { 570 struct siis_channel *ch = device_get_softc(dev); 571 struct siis_dc_cb_args dcba; 572 573 /* Command area. */ 574 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 575 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 576 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 577 0, NULL, NULL, &ch->dma.work_tag)) 578 goto error; 579 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 580 &ch->dma.work_map)) 581 goto error; 582 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 583 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 584 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 585 goto error; 586 } 587 ch->dma.work_bus = dcba.maddr; 588 /* Data area. */ 589 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 590 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 591 NULL, NULL, 592 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 593 SIIS_SG_ENTRIES, 0xFFFFFFFF, 594 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 595 goto error; 596 } 597 return; 598 599 error: 600 device_printf(dev, "WARNING - DMA initialization failed\n"); 601 siis_dmafini(dev); 602 } 603 604 static void 605 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 606 { 607 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 608 609 if (!(dcba->error = error)) 610 dcba->maddr = segs[0].ds_addr; 611 } 612 613 static void 614 siis_dmafini(device_t dev) 615 { 616 struct siis_channel *ch = device_get_softc(dev); 617 618 if (ch->dma.data_tag) { 619 bus_dma_tag_destroy(ch->dma.data_tag); 620 ch->dma.data_tag = NULL; 621 } 622 if (ch->dma.work_bus) { 623 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 624 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 625 ch->dma.work_bus = 0; 626 ch->dma.work_map = NULL; 627 ch->dma.work = NULL; 628 } 629 if (ch->dma.work_tag) { 630 bus_dma_tag_destroy(ch->dma.work_tag); 631 ch->dma.work_tag = NULL; 632 } 633 } 634 635 static void 636 siis_slotsalloc(device_t dev) 637 { 638 struct siis_channel *ch = device_get_softc(dev); 639 int i; 640 641 /* Alloc and setup command/dma slots */ 642 bzero(ch->slot, sizeof(ch->slot)); 643 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 644 struct siis_slot *slot = &ch->slot[i]; 645 646 slot->dev = dev; 647 slot->slot = i; 648 slot->state = SIIS_SLOT_EMPTY; 649 slot->ccb = NULL; 650 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 651 652 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 653 device_printf(ch->dev, "FAILURE - create data_map\n"); 654 } 655 } 656 657 static void 658 siis_slotsfree(device_t dev) 659 { 660 struct siis_channel *ch = device_get_softc(dev); 661 int i; 662 663 /* Free all dma slots */ 664 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 665 struct siis_slot *slot = &ch->slot[i]; 666 667 callout_drain(&slot->timeout); 668 if (slot->dma.data_map) { 669 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 670 slot->dma.data_map = NULL; 671 } 672 } 673 } 674 675 static void 676 siis_notify_events(device_t dev) 677 { 678 struct siis_channel *ch = device_get_softc(dev); 679 struct cam_path *dpath; 680 u_int32_t status; 681 int i; 682 683 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 684 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 685 if (bootverbose) 686 device_printf(dev, "SNTF 0x%04x\n", status); 687 for (i = 0; i < 16; i++) { 688 if ((status & (1 << i)) == 0) 689 continue; 690 if (xpt_create_path(&dpath, NULL, 691 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 692 xpt_async(AC_SCSI_AEN, dpath, NULL); 693 xpt_free_path(dpath); 694 } 695 } 696 697 } 698 699 static void 700 siis_phy_check_events(device_t dev) 701 { 702 struct siis_channel *ch = device_get_softc(dev); 703 704 /* If we have a connection event, deal with it */ 705 if (ch->pm_level == 0) { 706 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 707 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 708 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 709 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 710 if (bootverbose) 711 device_printf(dev, "CONNECT requested\n"); 712 siis_reset(dev); 713 } else { 714 if (bootverbose) 715 device_printf(dev, "DISCONNECT requested\n"); 716 ch->devices = 0; 717 } 718 } 719 } 720 721 static void 722 siis_ch_intr_locked(void *data) 723 { 724 device_t dev = (device_t)data; 725 struct siis_channel *ch = device_get_softc(dev); 726 727 mtx_lock(&ch->mtx); 728 siis_ch_intr(data); 729 mtx_unlock(&ch->mtx); 730 } 731 732 static void 733 siis_ch_intr(void *data) 734 { 735 device_t dev = (device_t)data; 736 struct siis_channel *ch = device_get_softc(dev); 737 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 738 enum siis_err_type et; 739 int i, ccs, port, tslots; 740 741 mtx_assert(&ch->mtx, MA_OWNED); 742 /* Read command statuses. */ 743 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 744 ok = ch->rslots & ~sstatus; 745 /* Complete all successfull commands. */ 746 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 747 if ((ok >> i) & 1) 748 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 749 } 750 /* Do we have any other events? */ 751 if ((sstatus & SIIS_P_SS_ATTN) == 0) 752 return; 753 /* Read and clear interrupt statuses. */ 754 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 755 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 756 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 757 /* Process PHY events */ 758 if (istatus & SIIS_P_IX_PHYRDYCHG) 759 siis_phy_check_events(dev); 760 /* Process NOTIFY events */ 761 if (istatus & SIIS_P_IX_SDBN) 762 siis_notify_events(dev); 763 /* Process command errors */ 764 if (istatus & SIIS_P_IX_COMMERR) { 765 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 766 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 767 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 768 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 769 err = ch->rslots & sstatus; 770 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 771 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 772 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 773 774 if (!ch->readlog && !ch->recovery) { 775 xpt_freeze_simq(ch->sim, ch->numrslots); 776 ch->recovery = 1; 777 } 778 if (ch->frozen) { 779 union ccb *fccb = ch->frozen; 780 ch->frozen = NULL; 781 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 782 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 783 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 784 xpt_freeze_devq(fccb->ccb_h.path, 1); 785 fccb->ccb_h.status |= CAM_DEV_QFRZN; 786 } 787 xpt_done(fccb); 788 } 789 if (estatus == SIIS_P_CMDERR_DEV || 790 estatus == SIIS_P_CMDERR_SDB || 791 estatus == SIIS_P_CMDERR_DATAFIS) { 792 tslots = ch->numtslots[port]; 793 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 794 /* XXX: requests in loading state. */ 795 if (((ch->rslots >> i) & 1) == 0) 796 continue; 797 if (ch->slot[i].ccb->ccb_h.target_id != port) 798 continue; 799 if (tslots == 0) { 800 /* Untagged operation. */ 801 if (i == ccs) 802 et = SIIS_ERR_TFE; 803 else 804 et = SIIS_ERR_INNOCENT; 805 } else { 806 /* Tagged operation. */ 807 et = SIIS_ERR_NCQ; 808 } 809 siis_end_transaction(&ch->slot[i], et); 810 } 811 /* 812 * We can't reinit port if there are some other 813 * commands active, use resume to complete them. 814 */ 815 if (ch->rslots != 0) 816 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 817 } else { 818 if (estatus == SIIS_P_CMDERR_SENDFIS || 819 estatus == SIIS_P_CMDERR_INCSTATE || 820 estatus == SIIS_P_CMDERR_PPE || 821 estatus == SIIS_P_CMDERR_SERVICE) { 822 et = SIIS_ERR_SATA; 823 } else 824 et = SIIS_ERR_INVALID; 825 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 826 /* XXX: requests in loading state. */ 827 if (((ch->rslots >> i) & 1) == 0) 828 continue; 829 siis_end_transaction(&ch->slot[i], et); 830 } 831 } 832 } 833 } 834 835 /* Must be called with channel locked. */ 836 static int 837 siis_check_collision(device_t dev, union ccb *ccb) 838 { 839 struct siis_channel *ch = device_get_softc(dev); 840 841 mtx_assert(&ch->mtx, MA_OWNED); 842 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 843 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 844 /* Tagged command while we have no supported tag free. */ 845 if (((~ch->oslots) & (0x7fffffff >> (31 - 846 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 847 return (1); 848 } 849 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 850 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 851 /* Atomic command while anything active. */ 852 if (ch->numrslots != 0) 853 return (1); 854 } 855 /* We have some atomic command running. */ 856 if (ch->aslots != 0) 857 return (1); 858 return (0); 859 } 860 861 /* Must be called with channel locked. */ 862 static void 863 siis_begin_transaction(device_t dev, union ccb *ccb) 864 { 865 struct siis_channel *ch = device_get_softc(dev); 866 struct siis_slot *slot; 867 int tag, tags; 868 869 mtx_assert(&ch->mtx, MA_OWNED); 870 /* Choose empty slot. */ 871 tags = SIIS_MAX_SLOTS; 872 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 873 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 874 tags = ch->curr[ccb->ccb_h.target_id].tags; 875 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 876 /* Occupy chosen slot. */ 877 slot = &ch->slot[tag]; 878 slot->ccb = ccb; 879 /* Update channel stats. */ 880 ch->oslots |= (1 << slot->slot); 881 ch->numrslots++; 882 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 883 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 884 ch->numtslots[ccb->ccb_h.target_id]++; 885 } 886 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 887 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 888 ch->aslots |= (1 << slot->slot); 889 slot->dma.nsegs = 0; 890 /* If request moves data, setup and load SG list */ 891 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 892 void *buf; 893 bus_size_t size; 894 895 slot->state = SIIS_SLOT_LOADING; 896 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 897 buf = ccb->ataio.data_ptr; 898 size = ccb->ataio.dxfer_len; 899 } else { 900 buf = ccb->csio.data_ptr; 901 size = ccb->csio.dxfer_len; 902 } 903 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 904 buf, size, siis_dmasetprd, slot, 0); 905 } else 906 siis_execute_transaction(slot); 907 } 908 909 /* Locked by busdma engine. */ 910 static void 911 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 912 { 913 struct siis_slot *slot = arg; 914 struct siis_channel *ch = device_get_softc(slot->dev); 915 struct siis_cmd *ctp; 916 struct siis_dma_prd *prd; 917 int i; 918 919 mtx_assert(&ch->mtx, MA_OWNED); 920 if (error) { 921 device_printf(slot->dev, "DMA load error\n"); 922 if (!ch->readlog) 923 xpt_freeze_simq(ch->sim, 1); 924 siis_end_transaction(slot, SIIS_ERR_INVALID); 925 return; 926 } 927 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 928 /* Get a piece of the workspace for this request */ 929 ctp = (struct siis_cmd *) 930 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 931 /* Fill S/G table */ 932 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 933 prd = &ctp->u.ata.prd[0]; 934 else 935 prd = &ctp->u.atapi.prd[0]; 936 for (i = 0; i < nsegs; i++) { 937 prd[i].dba = htole64(segs[i].ds_addr); 938 prd[i].dbc = htole32(segs[i].ds_len); 939 prd[i].control = 0; 940 } 941 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 942 slot->dma.nsegs = nsegs; 943 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 944 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 945 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 946 siis_execute_transaction(slot); 947 } 948 949 /* Must be called with channel locked. */ 950 static void 951 siis_execute_transaction(struct siis_slot *slot) 952 { 953 device_t dev = slot->dev; 954 struct siis_channel *ch = device_get_softc(dev); 955 struct siis_cmd *ctp; 956 union ccb *ccb = slot->ccb; 957 u_int64_t prb_bus; 958 959 mtx_assert(&ch->mtx, MA_OWNED); 960 /* Get a piece of the workspace for this request */ 961 ctp = (struct siis_cmd *) 962 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 963 ctp->control = 0; 964 ctp->protocol_override = 0; 965 ctp->transfer_count = 0; 966 /* Special handling for Soft Reset command. */ 967 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 968 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 969 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 970 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 971 if (ccb->ccb_h.flags & CAM_DIR_IN) 972 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 973 if (ccb->ccb_h.flags & CAM_DIR_OUT) 974 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 975 } 976 /* Setup the FIS for this request */ 977 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 978 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 979 if (!ch->readlog) 980 xpt_freeze_simq(ch->sim, 1); 981 siis_end_transaction(slot, SIIS_ERR_INVALID); 982 return; 983 } 984 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 985 BUS_DMASYNC_PREWRITE); 986 /* Issue command to the controller. */ 987 slot->state = SIIS_SLOT_RUNNING; 988 ch->rslots |= (1 << slot->slot); 989 prb_bus = ch->dma.work_bus + 990 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 991 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 992 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 993 /* Start command execution timeout */ 994 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 995 (timeout_t*)siis_timeout, slot); 996 return; 997 } 998 999 /* Must be called with channel locked. */ 1000 static void 1001 siis_process_timeout(device_t dev) 1002 { 1003 struct siis_channel *ch = device_get_softc(dev); 1004 int i; 1005 1006 mtx_assert(&ch->mtx, MA_OWNED); 1007 if (!ch->readlog && !ch->recovery) { 1008 xpt_freeze_simq(ch->sim, ch->numrslots); 1009 ch->recovery = 1; 1010 } 1011 /* Handle the rest of commands. */ 1012 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1013 /* Do we have a running request on slot? */ 1014 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1015 continue; 1016 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1017 } 1018 } 1019 1020 /* Locked by callout mechanism. */ 1021 static void 1022 siis_timeout(struct siis_slot *slot) 1023 { 1024 device_t dev = slot->dev; 1025 struct siis_channel *ch = device_get_softc(dev); 1026 1027 mtx_assert(&ch->mtx, MA_OWNED); 1028 /* Check for stale timeout. */ 1029 if (slot->state < SIIS_SLOT_RUNNING) 1030 return; 1031 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1032 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1033 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1034 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1035 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1036 1037 if (ch->toslots == 0) 1038 xpt_freeze_simq(ch->sim, 1); 1039 ch->toslots |= (1 << slot->slot); 1040 if ((ch->rslots & ~ch->toslots) == 0) 1041 siis_process_timeout(dev); 1042 else 1043 device_printf(dev, " ... waiting for slots %08x\n", 1044 ch->rslots & ~ch->toslots); 1045 } 1046 1047 /* Must be called with channel locked. */ 1048 static void 1049 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1050 { 1051 device_t dev = slot->dev; 1052 struct siis_channel *ch = device_get_softc(dev); 1053 union ccb *ccb = slot->ccb; 1054 1055 mtx_assert(&ch->mtx, MA_OWNED); 1056 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1057 BUS_DMASYNC_POSTWRITE); 1058 /* Read result registers to the result struct 1059 * May be incorrect if several commands finished same time, 1060 * so read only when sure or have to. 1061 */ 1062 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1063 struct ata_res *res = &ccb->ataio.res; 1064 if ((et == SIIS_ERR_TFE) || 1065 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1066 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1067 1068 res->status = ATA_INB(ch->r_mem, offs + 2); 1069 res->error = ATA_INB(ch->r_mem, offs + 3); 1070 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1071 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1072 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1073 res->device = ATA_INB(ch->r_mem, offs + 7); 1074 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1075 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1076 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1077 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1078 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1079 } else 1080 bzero(res, sizeof(*res)); 1081 } 1082 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1083 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1084 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1085 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1086 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1087 } 1088 /* Set proper result status. */ 1089 if (et != SIIS_ERR_NONE || ch->recovery) { 1090 ch->eslots |= (1 << slot->slot); 1091 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1092 } 1093 /* In case of error, freeze device for proper recovery. */ 1094 if (et != SIIS_ERR_NONE && 1095 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1096 xpt_freeze_devq(ccb->ccb_h.path, 1); 1097 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1098 } 1099 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1100 switch (et) { 1101 case SIIS_ERR_NONE: 1102 ccb->ccb_h.status |= CAM_REQ_CMP; 1103 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1104 ccb->csio.scsi_status = SCSI_STATUS_OK; 1105 break; 1106 case SIIS_ERR_INVALID: 1107 ch->fatalerr = 1; 1108 ccb->ccb_h.status |= CAM_REQ_INVALID; 1109 break; 1110 case SIIS_ERR_INNOCENT: 1111 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1112 break; 1113 case SIIS_ERR_TFE: 1114 case SIIS_ERR_NCQ: 1115 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1116 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1117 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1118 } else { 1119 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1120 } 1121 break; 1122 case SIIS_ERR_SATA: 1123 ch->fatalerr = 1; 1124 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1125 break; 1126 case SIIS_ERR_TIMEOUT: 1127 ch->fatalerr = 1; 1128 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1129 break; 1130 default: 1131 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1132 } 1133 /* Free slot. */ 1134 ch->oslots &= ~(1 << slot->slot); 1135 ch->rslots &= ~(1 << slot->slot); 1136 ch->aslots &= ~(1 << slot->slot); 1137 if (et != SIIS_ERR_TIMEOUT) { 1138 if (ch->toslots == (1 << slot->slot)) 1139 xpt_release_simq(ch->sim, TRUE); 1140 ch->toslots &= ~(1 << slot->slot); 1141 } 1142 slot->state = SIIS_SLOT_EMPTY; 1143 slot->ccb = NULL; 1144 /* Update channel stats. */ 1145 ch->numrslots--; 1146 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1147 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1148 ch->numtslots[ccb->ccb_h.target_id]--; 1149 } 1150 /* If it was our READ LOG command - process it. */ 1151 if (ch->readlog) { 1152 siis_process_read_log(dev, ccb); 1153 /* If it was NCQ command error, put result on hold. */ 1154 } else if (et == SIIS_ERR_NCQ) { 1155 ch->hold[slot->slot] = ccb; 1156 ch->numhslots++; 1157 } else 1158 xpt_done(ccb); 1159 /* Unfreeze frozen command. */ 1160 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1161 union ccb *fccb = ch->frozen; 1162 ch->frozen = NULL; 1163 siis_begin_transaction(dev, fccb); 1164 xpt_release_simq(ch->sim, TRUE); 1165 } 1166 /* If we have no other active commands, ... */ 1167 if (ch->rslots == 0) { 1168 /* if there were timeouts or fatal error - reset port. */ 1169 if (ch->toslots != 0 || ch->fatalerr) { 1170 siis_reset(dev); 1171 } else { 1172 /* if we have slots in error, we can reinit port. */ 1173 if (ch->eslots != 0) 1174 siis_portinit(dev); 1175 /* if there commands on hold, we can do READ LOG. */ 1176 if (!ch->readlog && ch->numhslots) 1177 siis_issue_read_log(dev); 1178 } 1179 /* If all the reset of commands are in timeout - abort them. */ 1180 } else if ((ch->rslots & ~ch->toslots) == 0) 1181 siis_process_timeout(dev); 1182 } 1183 1184 static void 1185 siis_issue_read_log(device_t dev) 1186 { 1187 struct siis_channel *ch = device_get_softc(dev); 1188 union ccb *ccb; 1189 struct ccb_ataio *ataio; 1190 int i; 1191 1192 /* Find some holden command. */ 1193 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1194 if (ch->hold[i]) 1195 break; 1196 } 1197 if (i == SIIS_MAX_SLOTS) 1198 return; 1199 ch->readlog = 1; 1200 ccb = xpt_alloc_ccb_nowait(); 1201 if (ccb == NULL) { 1202 device_printf(dev, "Unable allocate READ LOG command"); 1203 return; /* XXX */ 1204 } 1205 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1206 ccb->ccb_h.func_code = XPT_ATA_IO; 1207 ccb->ccb_h.flags = CAM_DIR_IN; 1208 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1209 ataio = &ccb->ataio; 1210 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1211 if (ataio->data_ptr == NULL) { 1212 device_printf(dev, "Unable allocate memory for READ LOG command"); 1213 return; /* XXX */ 1214 } 1215 ataio->dxfer_len = 512; 1216 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1217 ataio->cmd.flags = CAM_ATAIO_48BIT; 1218 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1219 ataio->cmd.sector_count = 1; 1220 ataio->cmd.sector_count_exp = 0; 1221 ataio->cmd.lba_low = 0x10; 1222 ataio->cmd.lba_mid = 0; 1223 ataio->cmd.lba_mid_exp = 0; 1224 siis_begin_transaction(dev, ccb); 1225 } 1226 1227 static void 1228 siis_process_read_log(device_t dev, union ccb *ccb) 1229 { 1230 struct siis_channel *ch = device_get_softc(dev); 1231 uint8_t *data; 1232 struct ata_res *res; 1233 int i; 1234 1235 ch->readlog = 0; 1236 data = ccb->ataio.data_ptr; 1237 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1238 (data[0] & 0x80) == 0) { 1239 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1240 if (!ch->hold[i]) 1241 continue; 1242 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1243 continue; 1244 if ((data[0] & 0x1F) == i) { 1245 res = &ch->hold[i]->ataio.res; 1246 res->status = data[2]; 1247 res->error = data[3]; 1248 res->lba_low = data[4]; 1249 res->lba_mid = data[5]; 1250 res->lba_high = data[6]; 1251 res->device = data[7]; 1252 res->lba_low_exp = data[8]; 1253 res->lba_mid_exp = data[9]; 1254 res->lba_high_exp = data[10]; 1255 res->sector_count = data[12]; 1256 res->sector_count_exp = data[13]; 1257 } else { 1258 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1259 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1260 } 1261 xpt_done(ch->hold[i]); 1262 ch->hold[i] = NULL; 1263 ch->numhslots--; 1264 } 1265 } else { 1266 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1267 device_printf(dev, "Error while READ LOG EXT\n"); 1268 else if ((data[0] & 0x80) == 0) { 1269 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1270 } 1271 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1272 if (!ch->hold[i]) 1273 continue; 1274 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1275 continue; 1276 xpt_done(ch->hold[i]); 1277 ch->hold[i] = NULL; 1278 ch->numhslots--; 1279 } 1280 } 1281 free(ccb->ataio.data_ptr, M_SIIS); 1282 xpt_free_ccb(ccb); 1283 } 1284 1285 static void 1286 siis_portinit(device_t dev) 1287 { 1288 struct siis_channel *ch = device_get_softc(dev); 1289 int i; 1290 1291 ch->eslots = 0; 1292 ch->recovery = 0; 1293 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1294 for (i = 0; i < 16; i++) { 1295 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1296 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1297 } 1298 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1299 siis_wait_ready(dev, 1000); 1300 } 1301 1302 static int 1303 siis_devreset(device_t dev) 1304 { 1305 struct siis_channel *ch = device_get_softc(dev); 1306 int timeout = 0; 1307 uint32_t val; 1308 1309 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1310 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1311 SIIS_P_CTL_DEV_RESET) != 0) { 1312 DELAY(1000); 1313 if (timeout++ > 100) { 1314 device_printf(dev, "device reset stuck (timeout %dms) " 1315 "status = %08x\n", timeout, val); 1316 return (EBUSY); 1317 } 1318 } 1319 if (bootverbose) 1320 device_printf(dev, "device reset time=%dms\n", timeout); 1321 return (0); 1322 } 1323 1324 static int 1325 siis_wait_ready(device_t dev, int t) 1326 { 1327 struct siis_channel *ch = device_get_softc(dev); 1328 int timeout = 0; 1329 uint32_t val; 1330 1331 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1332 SIIS_P_CTL_READY) == 0) { 1333 DELAY(1000); 1334 if (timeout++ > t) { 1335 device_printf(dev, "port is not ready (timeout %dms) " 1336 "status = %08x\n", t, val); 1337 return (EBUSY); 1338 } 1339 } 1340 if (bootverbose) 1341 device_printf(dev, "ready wait time=%dms\n", timeout); 1342 return (0); 1343 } 1344 1345 static void 1346 siis_reset(device_t dev) 1347 { 1348 struct siis_channel *ch = device_get_softc(dev); 1349 int i, retry = 0, sata_rev; 1350 uint32_t val; 1351 1352 if (bootverbose) 1353 device_printf(dev, "SIIS reset...\n"); 1354 if (!ch->readlog && !ch->recovery) 1355 xpt_freeze_simq(ch->sim, ch->numrslots); 1356 /* Requeue frozen command. */ 1357 if (ch->frozen) { 1358 union ccb *fccb = ch->frozen; 1359 ch->frozen = NULL; 1360 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1361 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1362 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1363 xpt_freeze_devq(fccb->ccb_h.path, 1); 1364 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1365 } 1366 xpt_done(fccb); 1367 } 1368 /* Requeue all running commands. */ 1369 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1370 /* Do we have a running request on slot? */ 1371 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1372 continue; 1373 /* XXX; Commands in loading state. */ 1374 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1375 } 1376 /* Finish all holden commands as-is. */ 1377 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1378 if (!ch->hold[i]) 1379 continue; 1380 xpt_done(ch->hold[i]); 1381 ch->hold[i] = NULL; 1382 ch->numhslots--; 1383 } 1384 if (ch->toslots != 0) 1385 xpt_release_simq(ch->sim, TRUE); 1386 ch->eslots = 0; 1387 ch->recovery = 0; 1388 ch->toslots = 0; 1389 ch->fatalerr = 0; 1390 /* Disable port interrupts */ 1391 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1392 /* Set speed limit. */ 1393 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1394 if (sata_rev == 1) 1395 val = ATA_SC_SPD_SPEED_GEN1; 1396 else if (sata_rev == 2) 1397 val = ATA_SC_SPD_SPEED_GEN2; 1398 else if (sata_rev == 3) 1399 val = ATA_SC_SPD_SPEED_GEN3; 1400 else 1401 val = 0; 1402 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1403 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1404 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1405 retry: 1406 siis_devreset(dev); 1407 /* Reset and reconnect PHY, */ 1408 if (!siis_sata_connect(ch)) { 1409 ch->devices = 0; 1410 /* Enable port interrupts */ 1411 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1412 if (bootverbose) 1413 device_printf(dev, 1414 "SIIS reset done: phy reset found no device\n"); 1415 /* Tell the XPT about the event */ 1416 xpt_async(AC_BUS_RESET, ch->path, NULL); 1417 return; 1418 } 1419 /* Wait for clearing busy status. */ 1420 if (siis_wait_ready(dev, 10000)) { 1421 device_printf(dev, "device ready timeout\n"); 1422 if (!retry) { 1423 device_printf(dev, "trying full port reset ...\n"); 1424 /* Get port to the reset state. */ 1425 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1426 DELAY(10000); 1427 /* Get port out of reset state. */ 1428 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1429 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1430 if (ch->pm_present) 1431 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1432 else 1433 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1434 siis_wait_ready(dev, 5000); 1435 retry = 1; 1436 goto retry; 1437 } 1438 } 1439 ch->devices = 1; 1440 /* Enable port interrupts */ 1441 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1442 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1443 if (bootverbose) 1444 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1445 /* Tell the XPT about the event */ 1446 xpt_async(AC_BUS_RESET, ch->path, NULL); 1447 } 1448 1449 static int 1450 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1451 { 1452 struct siis_channel *ch = device_get_softc(dev); 1453 u_int8_t *fis = &ctp->fis[0]; 1454 1455 bzero(fis, 24); 1456 fis[0] = 0x27; /* host to device */ 1457 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1458 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1459 fis[1] |= 0x80; 1460 fis[2] = ATA_PACKET_CMD; 1461 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1462 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1463 fis[3] = ATA_F_DMA; 1464 else { 1465 fis[5] = ccb->csio.dxfer_len; 1466 fis[6] = ccb->csio.dxfer_len >> 8; 1467 } 1468 fis[7] = ATA_D_LBA; 1469 fis[15] = ATA_A_4BIT; 1470 bzero(ctp->u.atapi.ccb, 16); 1471 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1472 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1473 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1474 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1475 fis[1] |= 0x80; 1476 fis[2] = ccb->ataio.cmd.command; 1477 fis[3] = ccb->ataio.cmd.features; 1478 fis[4] = ccb->ataio.cmd.lba_low; 1479 fis[5] = ccb->ataio.cmd.lba_mid; 1480 fis[6] = ccb->ataio.cmd.lba_high; 1481 fis[7] = ccb->ataio.cmd.device; 1482 fis[8] = ccb->ataio.cmd.lba_low_exp; 1483 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1484 fis[10] = ccb->ataio.cmd.lba_high_exp; 1485 fis[11] = ccb->ataio.cmd.features_exp; 1486 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1487 fis[12] = tag << 3; 1488 fis[13] = 0; 1489 } else { 1490 fis[12] = ccb->ataio.cmd.sector_count; 1491 fis[13] = ccb->ataio.cmd.sector_count_exp; 1492 } 1493 fis[15] = ATA_A_4BIT; 1494 } else { 1495 /* Soft reset. */ 1496 } 1497 return (20); 1498 } 1499 1500 static int 1501 siis_sata_connect(struct siis_channel *ch) 1502 { 1503 u_int32_t status; 1504 int timeout; 1505 1506 /* Wait up to 100ms for "connect well" */ 1507 for (timeout = 0; timeout < 100 ; timeout++) { 1508 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1509 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1510 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1511 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1512 break; 1513 DELAY(1000); 1514 } 1515 if (timeout >= 100) { 1516 if (bootverbose) { 1517 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1518 status); 1519 } 1520 return (0); 1521 } 1522 if (bootverbose) { 1523 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1524 timeout, status); 1525 } 1526 /* Clear SATA error register */ 1527 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1528 return (1); 1529 } 1530 1531 static void 1532 siisaction(struct cam_sim *sim, union ccb *ccb) 1533 { 1534 device_t dev; 1535 struct siis_channel *ch; 1536 1537 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1538 ccb->ccb_h.func_code)); 1539 1540 ch = (struct siis_channel *)cam_sim_softc(sim); 1541 dev = ch->dev; 1542 mtx_assert(&ch->mtx, MA_OWNED); 1543 switch (ccb->ccb_h.func_code) { 1544 /* Common cases first */ 1545 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1546 case XPT_SCSI_IO: 1547 if (ch->devices == 0) { 1548 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1549 xpt_done(ccb); 1550 break; 1551 } 1552 /* Check for command collision. */ 1553 if (siis_check_collision(dev, ccb)) { 1554 /* Freeze command. */ 1555 ch->frozen = ccb; 1556 /* We have only one frozen slot, so freeze simq also. */ 1557 xpt_freeze_simq(ch->sim, 1); 1558 return; 1559 } 1560 siis_begin_transaction(dev, ccb); 1561 break; 1562 case XPT_EN_LUN: /* Enable LUN as a target */ 1563 case XPT_TARGET_IO: /* Execute target I/O request */ 1564 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1565 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1566 case XPT_ABORT: /* Abort the specified CCB */ 1567 /* XXX Implement */ 1568 ccb->ccb_h.status = CAM_REQ_INVALID; 1569 xpt_done(ccb); 1570 break; 1571 case XPT_SET_TRAN_SETTINGS: 1572 { 1573 struct ccb_trans_settings *cts = &ccb->cts; 1574 struct siis_device *d; 1575 1576 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1577 d = &ch->curr[ccb->ccb_h.target_id]; 1578 else 1579 d = &ch->user[ccb->ccb_h.target_id]; 1580 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1581 d->revision = cts->xport_specific.sata.revision; 1582 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1583 d->mode = cts->xport_specific.sata.mode; 1584 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1585 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1586 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1587 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1588 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1589 ch->pm_present = cts->xport_specific.sata.pm_present; 1590 if (ch->pm_present) 1591 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1592 else 1593 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1594 } 1595 ccb->ccb_h.status = CAM_REQ_CMP; 1596 xpt_done(ccb); 1597 break; 1598 } 1599 case XPT_GET_TRAN_SETTINGS: 1600 /* Get default/user set transfer settings for the target */ 1601 { 1602 struct ccb_trans_settings *cts = &ccb->cts; 1603 struct siis_device *d; 1604 uint32_t status; 1605 1606 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1607 d = &ch->curr[ccb->ccb_h.target_id]; 1608 else 1609 d = &ch->user[ccb->ccb_h.target_id]; 1610 cts->protocol = PROTO_ATA; 1611 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1612 cts->transport = XPORT_SATA; 1613 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1614 cts->proto_specific.valid = 0; 1615 cts->xport_specific.sata.valid = 0; 1616 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1617 (ccb->ccb_h.target_id == 15 || 1618 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1619 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1620 if (status & 0x0f0) { 1621 cts->xport_specific.sata.revision = 1622 (status & 0x0f0) >> 4; 1623 cts->xport_specific.sata.valid |= 1624 CTS_SATA_VALID_REVISION; 1625 } 1626 } else { 1627 cts->xport_specific.sata.revision = d->revision; 1628 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1629 } 1630 cts->xport_specific.sata.mode = d->mode; 1631 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1632 cts->xport_specific.sata.bytecount = d->bytecount; 1633 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1634 cts->xport_specific.sata.pm_present = ch->pm_present; 1635 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1636 cts->xport_specific.sata.tags = d->tags; 1637 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1638 ccb->ccb_h.status = CAM_REQ_CMP; 1639 xpt_done(ccb); 1640 break; 1641 } 1642 #if 0 1643 case XPT_CALC_GEOMETRY: 1644 { 1645 struct ccb_calc_geometry *ccg; 1646 uint32_t size_mb; 1647 uint32_t secs_per_cylinder; 1648 1649 ccg = &ccb->ccg; 1650 size_mb = ccg->volume_size 1651 / ((1024L * 1024L) / ccg->block_size); 1652 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1653 if (size_mb >= 2048) { 1654 ccg->heads = 255; 1655 ccg->secs_per_track = 63; 1656 } else { 1657 ccg->heads = 128; 1658 ccg->secs_per_track = 32; 1659 } 1660 } else { 1661 ccg->heads = 64; 1662 ccg->secs_per_track = 32; 1663 } 1664 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1665 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1666 ccb->ccb_h.status = CAM_REQ_CMP; 1667 xpt_done(ccb); 1668 break; 1669 } 1670 #endif 1671 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1672 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1673 siis_reset(dev); 1674 ccb->ccb_h.status = CAM_REQ_CMP; 1675 xpt_done(ccb); 1676 break; 1677 case XPT_TERM_IO: /* Terminate the I/O process */ 1678 /* XXX Implement */ 1679 ccb->ccb_h.status = CAM_REQ_INVALID; 1680 xpt_done(ccb); 1681 break; 1682 case XPT_PATH_INQ: /* Path routing inquiry */ 1683 { 1684 struct ccb_pathinq *cpi = &ccb->cpi; 1685 1686 cpi->version_num = 1; /* XXX??? */ 1687 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1688 cpi->hba_inquiry |= PI_SATAPM; 1689 cpi->target_sprt = 0; 1690 cpi->hba_misc = PIM_SEQSCAN; 1691 cpi->hba_eng_cnt = 0; 1692 cpi->max_target = 15; 1693 cpi->max_lun = 0; 1694 cpi->initiator_id = 0; 1695 cpi->bus_id = cam_sim_bus(sim); 1696 cpi->base_transfer_speed = 150000; 1697 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1698 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1699 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1700 cpi->unit_number = cam_sim_unit(sim); 1701 cpi->transport = XPORT_SATA; 1702 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1703 cpi->protocol = PROTO_ATA; 1704 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1705 cpi->ccb_h.status = CAM_REQ_CMP; 1706 cpi->maxio = MAXPHYS; 1707 xpt_done(ccb); 1708 break; 1709 } 1710 default: 1711 ccb->ccb_h.status = CAM_REQ_INVALID; 1712 xpt_done(ccb); 1713 break; 1714 } 1715 } 1716 1717 static void 1718 siispoll(struct cam_sim *sim) 1719 { 1720 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1721 1722 siis_ch_intr(ch->dev); 1723 } 1724