1 /*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/led/led.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include "siis.h" 51 52 #include <cam/cam.h> 53 #include <cam/cam_ccb.h> 54 #include <cam/cam_sim.h> 55 #include <cam/cam_xpt_sim.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_init(device_t dev); 64 static int siis_ch_deinit(device_t dev); 65 static int siis_ch_suspend(device_t dev); 66 static int siis_ch_resume(device_t dev); 67 static void siis_ch_intr_locked(void *data); 68 static void siis_ch_intr(void *data); 69 static void siis_ch_led(void *priv, int onoff); 70 static void siis_begin_transaction(device_t dev, union ccb *ccb); 71 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 72 static void siis_execute_transaction(struct siis_slot *slot); 73 static void siis_timeout(struct siis_slot *slot); 74 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 75 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 76 static void siis_dmainit(device_t dev); 77 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 78 static void siis_dmafini(device_t dev); 79 static void siis_slotsalloc(device_t dev); 80 static void siis_slotsfree(device_t dev); 81 static void siis_reset(device_t dev); 82 static void siis_portinit(device_t dev); 83 static int siis_wait_ready(device_t dev, int t); 84 85 static int siis_sata_connect(struct siis_channel *ch); 86 87 static void siis_issue_recovery(device_t dev); 88 static void siis_process_read_log(device_t dev, union ccb *ccb); 89 static void siis_process_request_sense(device_t dev, union ccb *ccb); 90 91 static void siisaction(struct cam_sim *sim, union ccb *ccb); 92 static void siispoll(struct cam_sim *sim); 93 94 static MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 95 96 static struct { 97 uint32_t id; 98 const char *name; 99 int ports; 100 int quirks; 101 #define SIIS_Q_SNTF 1 102 #define SIIS_Q_NOMSI 2 103 } siis_ids[] = { 104 {0x31241095, "SiI3124", 4, 0}, 105 {0x31248086, "SiI3124", 4, 0}, 106 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 109 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 110 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 111 {0, NULL, 0, 0} 112 }; 113 114 #define recovery_type spriv_field0 115 #define RECOVERY_NONE 0 116 #define RECOVERY_READ_LOG 1 117 #define RECOVERY_REQUEST_SENSE 2 118 #define recovery_slot spriv_field1 119 120 static int 121 siis_probe(device_t dev) 122 { 123 char buf[64]; 124 int i; 125 uint32_t devid = pci_get_devid(dev); 126 127 for (i = 0; siis_ids[i].id != 0; i++) { 128 if (siis_ids[i].id == devid) { 129 snprintf(buf, sizeof(buf), "%s SATA controller", 130 siis_ids[i].name); 131 device_set_desc_copy(dev, buf); 132 return (BUS_PROBE_VENDOR); 133 } 134 } 135 return (ENXIO); 136 } 137 138 static int 139 siis_attach(device_t dev) 140 { 141 struct siis_controller *ctlr = device_get_softc(dev); 142 uint32_t devid = pci_get_devid(dev); 143 device_t child; 144 int error, i, unit; 145 146 ctlr->dev = dev; 147 for (i = 0; siis_ids[i].id != 0; i++) { 148 if (siis_ids[i].id == devid) 149 break; 150 } 151 ctlr->quirks = siis_ids[i].quirks; 152 /* Global memory */ 153 ctlr->r_grid = PCIR_BAR(0); 154 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 155 &ctlr->r_grid, RF_ACTIVE))) 156 return (ENXIO); 157 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 158 /* Channels memory */ 159 ctlr->r_rid = PCIR_BAR(2); 160 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 161 &ctlr->r_rid, RF_ACTIVE))) 162 return (ENXIO); 163 /* Setup our own memory management for channels. */ 164 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 165 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 166 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 167 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 168 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 169 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 170 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 171 return (error); 172 } 173 if ((error = rman_manage_region(&ctlr->sc_iomem, 174 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 175 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 176 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 177 rman_fini(&ctlr->sc_iomem); 178 return (error); 179 } 180 pci_enable_busmaster(dev); 181 /* Reset controller */ 182 siis_resume(dev); 183 /* Number of HW channels */ 184 ctlr->channels = siis_ids[i].ports; 185 /* Setup interrupts. */ 186 if (siis_setup_interrupt(dev)) { 187 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 188 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 189 rman_fini(&ctlr->sc_iomem); 190 return ENXIO; 191 } 192 /* Attach all channels on this controller */ 193 for (unit = 0; unit < ctlr->channels; unit++) { 194 child = device_add_child(dev, "siisch", -1); 195 if (child == NULL) 196 device_printf(dev, "failed to add channel device\n"); 197 else 198 device_set_ivars(child, (void *)(intptr_t)unit); 199 } 200 bus_generic_attach(dev); 201 return 0; 202 } 203 204 static int 205 siis_detach(device_t dev) 206 { 207 struct siis_controller *ctlr = device_get_softc(dev); 208 209 /* Detach & delete all children */ 210 device_delete_children(dev); 211 212 /* Free interrupts. */ 213 if (ctlr->irq.r_irq) { 214 bus_teardown_intr(dev, ctlr->irq.r_irq, 215 ctlr->irq.handle); 216 bus_release_resource(dev, SYS_RES_IRQ, 217 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 218 } 219 pci_release_msi(dev); 220 /* Free memory. */ 221 rman_fini(&ctlr->sc_iomem); 222 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 223 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 224 return (0); 225 } 226 227 static int 228 siis_suspend(device_t dev) 229 { 230 struct siis_controller *ctlr = device_get_softc(dev); 231 232 bus_generic_suspend(dev); 233 /* Put controller into reset state. */ 234 ctlr->gctl |= SIIS_GCTL_GRESET; 235 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 236 return 0; 237 } 238 239 static int 240 siis_resume(device_t dev) 241 { 242 struct siis_controller *ctlr = device_get_softc(dev); 243 244 /* Set PCIe max read request size to at least 1024 bytes */ 245 if (pci_get_max_read_req(dev) < 1024) 246 pci_set_max_read_req(dev, 1024); 247 /* Put controller into reset state. */ 248 ctlr->gctl |= SIIS_GCTL_GRESET; 249 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 250 DELAY(10000); 251 /* Get controller out of reset state and enable port interrupts. */ 252 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 253 ctlr->gctl |= 0x0000000f; 254 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 255 return (bus_generic_resume(dev)); 256 } 257 258 static int 259 siis_setup_interrupt(device_t dev) 260 { 261 struct siis_controller *ctlr = device_get_softc(dev); 262 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 263 264 /* Process hints. */ 265 resource_int_value(device_get_name(dev), 266 device_get_unit(dev), "msi", &msi); 267 if (msi < 0) 268 msi = 0; 269 else if (msi > 0) 270 msi = min(1, pci_msi_count(dev)); 271 /* Allocate MSI if needed/present. */ 272 if (msi && pci_alloc_msi(dev, &msi) != 0) 273 msi = 0; 274 /* Allocate all IRQs. */ 275 ctlr->irq.r_irq_rid = msi ? 1 : 0; 276 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 277 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 278 device_printf(dev, "unable to map interrupt\n"); 279 return ENXIO; 280 } 281 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 282 siis_intr, ctlr, &ctlr->irq.handle))) { 283 /* SOS XXX release r_irq */ 284 device_printf(dev, "unable to setup interrupt\n"); 285 return ENXIO; 286 } 287 return (0); 288 } 289 290 /* 291 * Common case interrupt handler. 292 */ 293 static void 294 siis_intr(void *data) 295 { 296 struct siis_controller *ctlr = (struct siis_controller *)data; 297 u_int32_t is; 298 void *arg; 299 int unit; 300 301 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 302 for (unit = 0; unit < ctlr->channels; unit++) { 303 if ((is & SIIS_IS_PORT(unit)) != 0 && 304 (arg = ctlr->interrupt[unit].argument)) { 305 ctlr->interrupt[unit].function(arg); 306 } 307 } 308 /* Acknowledge interrupt, if MSI enabled. */ 309 if (ctlr->irq.r_irq_rid) { 310 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 311 ctlr->gctl | SIIS_GCTL_MSIACK); 312 } 313 } 314 315 static struct resource * 316 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 317 u_long start, u_long end, u_long count, u_int flags) 318 { 319 struct siis_controller *ctlr = device_get_softc(dev); 320 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 321 struct resource *res = NULL; 322 int offset = unit << 13; 323 long st; 324 325 switch (type) { 326 case SYS_RES_MEMORY: 327 st = rman_get_start(ctlr->r_mem); 328 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 329 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 330 if (res) { 331 bus_space_handle_t bsh; 332 bus_space_tag_t bst; 333 bsh = rman_get_bushandle(ctlr->r_mem); 334 bst = rman_get_bustag(ctlr->r_mem); 335 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 336 rman_set_bushandle(res, bsh); 337 rman_set_bustag(res, bst); 338 } 339 break; 340 case SYS_RES_IRQ: 341 if (*rid == ATA_IRQ_RID) 342 res = ctlr->irq.r_irq; 343 break; 344 } 345 return (res); 346 } 347 348 static int 349 siis_release_resource(device_t dev, device_t child, int type, int rid, 350 struct resource *r) 351 { 352 353 switch (type) { 354 case SYS_RES_MEMORY: 355 rman_release_resource(r); 356 return (0); 357 case SYS_RES_IRQ: 358 if (rid != ATA_IRQ_RID) 359 return ENOENT; 360 return (0); 361 } 362 return (EINVAL); 363 } 364 365 static int 366 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 367 int flags, driver_filter_t *filter, driver_intr_t *function, 368 void *argument, void **cookiep) 369 { 370 struct siis_controller *ctlr = device_get_softc(dev); 371 int unit = (intptr_t)device_get_ivars(child); 372 373 if (filter != NULL) { 374 printf("siis.c: we cannot use a filter here\n"); 375 return (EINVAL); 376 } 377 ctlr->interrupt[unit].function = function; 378 ctlr->interrupt[unit].argument = argument; 379 return (0); 380 } 381 382 static int 383 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 384 void *cookie) 385 { 386 struct siis_controller *ctlr = device_get_softc(dev); 387 int unit = (intptr_t)device_get_ivars(child); 388 389 ctlr->interrupt[unit].function = NULL; 390 ctlr->interrupt[unit].argument = NULL; 391 return (0); 392 } 393 394 static int 395 siis_print_child(device_t dev, device_t child) 396 { 397 int retval; 398 399 retval = bus_print_child_header(dev, child); 400 retval += printf(" at channel %d", 401 (int)(intptr_t)device_get_ivars(child)); 402 retval += bus_print_child_footer(dev, child); 403 404 return (retval); 405 } 406 407 static int 408 siis_child_location_str(device_t dev, device_t child, char *buf, 409 size_t buflen) 410 { 411 412 snprintf(buf, buflen, "channel=%d", 413 (int)(intptr_t)device_get_ivars(child)); 414 return (0); 415 } 416 417 static bus_dma_tag_t 418 siis_get_dma_tag(device_t bus, device_t child) 419 { 420 421 return (bus_get_dma_tag(bus)); 422 } 423 424 devclass_t siis_devclass; 425 static device_method_t siis_methods[] = { 426 DEVMETHOD(device_probe, siis_probe), 427 DEVMETHOD(device_attach, siis_attach), 428 DEVMETHOD(device_detach, siis_detach), 429 DEVMETHOD(device_suspend, siis_suspend), 430 DEVMETHOD(device_resume, siis_resume), 431 DEVMETHOD(bus_print_child, siis_print_child), 432 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 433 DEVMETHOD(bus_release_resource, siis_release_resource), 434 DEVMETHOD(bus_setup_intr, siis_setup_intr), 435 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 436 DEVMETHOD(bus_child_location_str, siis_child_location_str), 437 DEVMETHOD(bus_get_dma_tag, siis_get_dma_tag), 438 { 0, 0 } 439 }; 440 static driver_t siis_driver = { 441 "siis", 442 siis_methods, 443 sizeof(struct siis_controller) 444 }; 445 DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 446 MODULE_VERSION(siis, 1); 447 MODULE_DEPEND(siis, cam, 1, 1, 1); 448 449 static int 450 siis_ch_probe(device_t dev) 451 { 452 453 device_set_desc_copy(dev, "SIIS channel"); 454 return (0); 455 } 456 457 static int 458 siis_ch_attach(device_t dev) 459 { 460 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 461 struct siis_channel *ch = device_get_softc(dev); 462 struct cam_devq *devq; 463 int rid, error, i, sata_rev = 0; 464 465 ch->dev = dev; 466 ch->unit = (intptr_t)device_get_ivars(dev); 467 ch->quirks = ctlr->quirks; 468 ch->pm_level = 0; 469 resource_int_value(device_get_name(dev), 470 device_get_unit(dev), "pm_level", &ch->pm_level); 471 resource_int_value(device_get_name(dev), 472 device_get_unit(dev), "sata_rev", &sata_rev); 473 for (i = 0; i < 16; i++) { 474 ch->user[i].revision = sata_rev; 475 ch->user[i].mode = 0; 476 ch->user[i].bytecount = 8192; 477 ch->user[i].tags = SIIS_MAX_SLOTS; 478 ch->curr[i] = ch->user[i]; 479 if (ch->pm_level) 480 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 481 ch->user[i].caps |= CTS_SATA_CAPS_H_AN; 482 } 483 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 484 rid = ch->unit; 485 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 486 &rid, RF_ACTIVE))) 487 return (ENXIO); 488 siis_dmainit(dev); 489 siis_slotsalloc(dev); 490 siis_ch_init(dev); 491 mtx_lock(&ch->mtx); 492 rid = ATA_IRQ_RID; 493 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 494 &rid, RF_SHAREABLE | RF_ACTIVE))) { 495 device_printf(dev, "Unable to map interrupt\n"); 496 error = ENXIO; 497 goto err0; 498 } 499 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 500 siis_ch_intr_locked, dev, &ch->ih))) { 501 device_printf(dev, "Unable to setup interrupt\n"); 502 error = ENXIO; 503 goto err1; 504 } 505 /* Create the device queue for our SIM. */ 506 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 507 if (devq == NULL) { 508 device_printf(dev, "Unable to allocate simq\n"); 509 error = ENOMEM; 510 goto err1; 511 } 512 /* Construct SIM entry */ 513 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 514 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 515 if (ch->sim == NULL) { 516 cam_simq_free(devq); 517 device_printf(dev, "unable to allocate sim\n"); 518 error = ENOMEM; 519 goto err1; 520 } 521 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 522 device_printf(dev, "unable to register xpt bus\n"); 523 error = ENXIO; 524 goto err2; 525 } 526 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 527 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 528 device_printf(dev, "unable to create path\n"); 529 error = ENXIO; 530 goto err3; 531 } 532 mtx_unlock(&ch->mtx); 533 ch->led = led_create(siis_ch_led, dev, device_get_nameunit(dev)); 534 return (0); 535 536 err3: 537 xpt_bus_deregister(cam_sim_path(ch->sim)); 538 err2: 539 cam_sim_free(ch->sim, /*free_devq*/TRUE); 540 err1: 541 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 542 err0: 543 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 544 mtx_unlock(&ch->mtx); 545 mtx_destroy(&ch->mtx); 546 return (error); 547 } 548 549 static int 550 siis_ch_detach(device_t dev) 551 { 552 struct siis_channel *ch = device_get_softc(dev); 553 554 led_destroy(ch->led); 555 mtx_lock(&ch->mtx); 556 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 557 xpt_free_path(ch->path); 558 xpt_bus_deregister(cam_sim_path(ch->sim)); 559 cam_sim_free(ch->sim, /*free_devq*/TRUE); 560 mtx_unlock(&ch->mtx); 561 562 bus_teardown_intr(dev, ch->r_irq, ch->ih); 563 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 564 565 siis_ch_deinit(dev); 566 siis_slotsfree(dev); 567 siis_dmafini(dev); 568 569 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 570 mtx_destroy(&ch->mtx); 571 return (0); 572 } 573 574 static int 575 siis_ch_init(device_t dev) 576 { 577 struct siis_channel *ch = device_get_softc(dev); 578 579 /* Get port out of reset state. */ 580 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 581 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 582 if (ch->pm_present) 583 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 584 else 585 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 586 /* Enable port interrupts */ 587 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 588 return (0); 589 } 590 591 static int 592 siis_ch_deinit(device_t dev) 593 { 594 struct siis_channel *ch = device_get_softc(dev); 595 596 /* Put port into reset state. */ 597 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 598 return (0); 599 } 600 601 static int 602 siis_ch_suspend(device_t dev) 603 { 604 struct siis_channel *ch = device_get_softc(dev); 605 606 mtx_lock(&ch->mtx); 607 xpt_freeze_simq(ch->sim, 1); 608 while (ch->oslots) 609 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 610 siis_ch_deinit(dev); 611 mtx_unlock(&ch->mtx); 612 return (0); 613 } 614 615 static int 616 siis_ch_resume(device_t dev) 617 { 618 struct siis_channel *ch = device_get_softc(dev); 619 620 mtx_lock(&ch->mtx); 621 siis_ch_init(dev); 622 siis_reset(dev); 623 xpt_release_simq(ch->sim, TRUE); 624 mtx_unlock(&ch->mtx); 625 return (0); 626 } 627 628 devclass_t siisch_devclass; 629 static device_method_t siisch_methods[] = { 630 DEVMETHOD(device_probe, siis_ch_probe), 631 DEVMETHOD(device_attach, siis_ch_attach), 632 DEVMETHOD(device_detach, siis_ch_detach), 633 DEVMETHOD(device_suspend, siis_ch_suspend), 634 DEVMETHOD(device_resume, siis_ch_resume), 635 { 0, 0 } 636 }; 637 static driver_t siisch_driver = { 638 "siisch", 639 siisch_methods, 640 sizeof(struct siis_channel) 641 }; 642 DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 643 644 static void 645 siis_ch_led(void *priv, int onoff) 646 { 647 device_t dev; 648 struct siis_channel *ch; 649 650 dev = (device_t)priv; 651 ch = device_get_softc(dev); 652 653 if (onoff == 0) 654 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_LED_ON); 655 else 656 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_LED_ON); 657 } 658 659 struct siis_dc_cb_args { 660 bus_addr_t maddr; 661 int error; 662 }; 663 664 static void 665 siis_dmainit(device_t dev) 666 { 667 struct siis_channel *ch = device_get_softc(dev); 668 struct siis_dc_cb_args dcba; 669 670 /* Command area. */ 671 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 672 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 673 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 674 0, NULL, NULL, &ch->dma.work_tag)) 675 goto error; 676 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 677 &ch->dma.work_map)) 678 goto error; 679 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 680 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 681 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 682 goto error; 683 } 684 ch->dma.work_bus = dcba.maddr; 685 /* Data area. */ 686 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 687 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 688 NULL, NULL, 689 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 690 SIIS_SG_ENTRIES, 0xFFFFFFFF, 691 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 692 goto error; 693 } 694 return; 695 696 error: 697 device_printf(dev, "WARNING - DMA initialization failed\n"); 698 siis_dmafini(dev); 699 } 700 701 static void 702 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 703 { 704 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 705 706 if (!(dcba->error = error)) 707 dcba->maddr = segs[0].ds_addr; 708 } 709 710 static void 711 siis_dmafini(device_t dev) 712 { 713 struct siis_channel *ch = device_get_softc(dev); 714 715 if (ch->dma.data_tag) { 716 bus_dma_tag_destroy(ch->dma.data_tag); 717 ch->dma.data_tag = NULL; 718 } 719 if (ch->dma.work_bus) { 720 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 721 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 722 ch->dma.work_bus = 0; 723 ch->dma.work_map = NULL; 724 ch->dma.work = NULL; 725 } 726 if (ch->dma.work_tag) { 727 bus_dma_tag_destroy(ch->dma.work_tag); 728 ch->dma.work_tag = NULL; 729 } 730 } 731 732 static void 733 siis_slotsalloc(device_t dev) 734 { 735 struct siis_channel *ch = device_get_softc(dev); 736 int i; 737 738 /* Alloc and setup command/dma slots */ 739 bzero(ch->slot, sizeof(ch->slot)); 740 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 741 struct siis_slot *slot = &ch->slot[i]; 742 743 slot->dev = dev; 744 slot->slot = i; 745 slot->state = SIIS_SLOT_EMPTY; 746 slot->ccb = NULL; 747 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 748 749 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 750 device_printf(ch->dev, "FAILURE - create data_map\n"); 751 } 752 } 753 754 static void 755 siis_slotsfree(device_t dev) 756 { 757 struct siis_channel *ch = device_get_softc(dev); 758 int i; 759 760 /* Free all dma slots */ 761 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 762 struct siis_slot *slot = &ch->slot[i]; 763 764 callout_drain(&slot->timeout); 765 if (slot->dma.data_map) { 766 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 767 slot->dma.data_map = NULL; 768 } 769 } 770 } 771 772 static void 773 siis_notify_events(device_t dev) 774 { 775 struct siis_channel *ch = device_get_softc(dev); 776 struct cam_path *dpath; 777 u_int32_t status; 778 int i; 779 780 if (ch->quirks & SIIS_Q_SNTF) { 781 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 782 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 783 } else { 784 /* 785 * Without SNTF we have no idea which device sent notification. 786 * If PMP is connected, assume it, else - device. 787 */ 788 status = (ch->pm_present) ? 0x8000 : 0x0001; 789 } 790 if (bootverbose) 791 device_printf(dev, "SNTF 0x%04x\n", status); 792 for (i = 0; i < 16; i++) { 793 if ((status & (1 << i)) == 0) 794 continue; 795 if (xpt_create_path(&dpath, NULL, 796 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 797 xpt_async(AC_SCSI_AEN, dpath, NULL); 798 xpt_free_path(dpath); 799 } 800 } 801 802 } 803 804 static void 805 siis_phy_check_events(device_t dev) 806 { 807 struct siis_channel *ch = device_get_softc(dev); 808 809 /* If we have a connection event, deal with it */ 810 if (ch->pm_level == 0) { 811 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 812 union ccb *ccb; 813 814 if (bootverbose) { 815 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 816 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 817 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 818 device_printf(dev, "CONNECT requested\n"); 819 } else 820 device_printf(dev, "DISCONNECT requested\n"); 821 } 822 siis_reset(dev); 823 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 824 return; 825 if (xpt_create_path(&ccb->ccb_h.path, NULL, 826 cam_sim_path(ch->sim), 827 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 828 xpt_free_ccb(ccb); 829 return; 830 } 831 xpt_rescan(ccb); 832 } 833 } 834 835 static void 836 siis_ch_intr_locked(void *data) 837 { 838 device_t dev = (device_t)data; 839 struct siis_channel *ch = device_get_softc(dev); 840 841 mtx_lock(&ch->mtx); 842 siis_ch_intr(data); 843 mtx_unlock(&ch->mtx); 844 } 845 846 static void 847 siis_ch_intr(void *data) 848 { 849 device_t dev = (device_t)data; 850 struct siis_channel *ch = device_get_softc(dev); 851 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 852 enum siis_err_type et; 853 int i, ccs, port, tslots; 854 855 mtx_assert(&ch->mtx, MA_OWNED); 856 /* Read command statuses. */ 857 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 858 ok = ch->rslots & ~sstatus; 859 /* Complete all successfull commands. */ 860 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 861 if ((ok >> i) & 1) 862 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 863 } 864 /* Do we have any other events? */ 865 if ((sstatus & SIIS_P_SS_ATTN) == 0) 866 return; 867 /* Read and clear interrupt statuses. */ 868 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 869 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 870 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 871 /* Process PHY events */ 872 if (istatus & SIIS_P_IX_PHYRDYCHG) 873 siis_phy_check_events(dev); 874 /* Process NOTIFY events */ 875 if (istatus & SIIS_P_IX_SDBN) 876 siis_notify_events(dev); 877 /* Process command errors */ 878 if (istatus & SIIS_P_IX_COMMERR) { 879 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 880 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 881 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 882 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 883 err = ch->rslots & sstatus; 884 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 885 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 886 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 887 888 if (!ch->recoverycmd && !ch->recovery) { 889 xpt_freeze_simq(ch->sim, ch->numrslots); 890 ch->recovery = 1; 891 } 892 if (ch->frozen) { 893 union ccb *fccb = ch->frozen; 894 ch->frozen = NULL; 895 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 896 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 897 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 898 xpt_freeze_devq(fccb->ccb_h.path, 1); 899 fccb->ccb_h.status |= CAM_DEV_QFRZN; 900 } 901 xpt_done(fccb); 902 } 903 if (estatus == SIIS_P_CMDERR_DEV || 904 estatus == SIIS_P_CMDERR_SDB || 905 estatus == SIIS_P_CMDERR_DATAFIS) { 906 tslots = ch->numtslots[port]; 907 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 908 /* XXX: requests in loading state. */ 909 if (((ch->rslots >> i) & 1) == 0) 910 continue; 911 if (ch->slot[i].ccb->ccb_h.target_id != port) 912 continue; 913 if (tslots == 0) { 914 /* Untagged operation. */ 915 if (i == ccs) 916 et = SIIS_ERR_TFE; 917 else 918 et = SIIS_ERR_INNOCENT; 919 } else { 920 /* Tagged operation. */ 921 et = SIIS_ERR_NCQ; 922 } 923 siis_end_transaction(&ch->slot[i], et); 924 } 925 /* 926 * We can't reinit port if there are some other 927 * commands active, use resume to complete them. 928 */ 929 if (ch->rslots != 0 && !ch->recoverycmd) 930 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 931 } else { 932 if (estatus == SIIS_P_CMDERR_SENDFIS || 933 estatus == SIIS_P_CMDERR_INCSTATE || 934 estatus == SIIS_P_CMDERR_PPE || 935 estatus == SIIS_P_CMDERR_SERVICE) { 936 et = SIIS_ERR_SATA; 937 } else 938 et = SIIS_ERR_INVALID; 939 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 940 /* XXX: requests in loading state. */ 941 if (((ch->rslots >> i) & 1) == 0) 942 continue; 943 siis_end_transaction(&ch->slot[i], et); 944 } 945 } 946 } 947 } 948 949 /* Must be called with channel locked. */ 950 static int 951 siis_check_collision(device_t dev, union ccb *ccb) 952 { 953 struct siis_channel *ch = device_get_softc(dev); 954 955 mtx_assert(&ch->mtx, MA_OWNED); 956 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 957 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 958 /* Tagged command while we have no supported tag free. */ 959 if (((~ch->oslots) & (0x7fffffff >> (31 - 960 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 961 return (1); 962 } 963 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 964 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 965 /* Atomic command while anything active. */ 966 if (ch->numrslots != 0) 967 return (1); 968 } 969 /* We have some atomic command running. */ 970 if (ch->aslots != 0) 971 return (1); 972 return (0); 973 } 974 975 /* Must be called with channel locked. */ 976 static void 977 siis_begin_transaction(device_t dev, union ccb *ccb) 978 { 979 struct siis_channel *ch = device_get_softc(dev); 980 struct siis_slot *slot; 981 int tag, tags; 982 983 mtx_assert(&ch->mtx, MA_OWNED); 984 /* Choose empty slot. */ 985 tags = SIIS_MAX_SLOTS; 986 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 987 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 988 tags = ch->curr[ccb->ccb_h.target_id].tags; 989 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 990 /* Occupy chosen slot. */ 991 slot = &ch->slot[tag]; 992 slot->ccb = ccb; 993 /* Update channel stats. */ 994 ch->oslots |= (1 << slot->slot); 995 ch->numrslots++; 996 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 997 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 998 ch->numtslots[ccb->ccb_h.target_id]++; 999 } 1000 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1001 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1002 ch->aslots |= (1 << slot->slot); 1003 slot->dma.nsegs = 0; 1004 /* If request moves data, setup and load SG list */ 1005 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1006 slot->state = SIIS_SLOT_LOADING; 1007 bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, 1008 ccb, siis_dmasetprd, slot, 0); 1009 } else 1010 siis_execute_transaction(slot); 1011 } 1012 1013 /* Locked by busdma engine. */ 1014 static void 1015 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1016 { 1017 struct siis_slot *slot = arg; 1018 struct siis_channel *ch = device_get_softc(slot->dev); 1019 struct siis_cmd *ctp; 1020 struct siis_dma_prd *prd; 1021 int i; 1022 1023 mtx_assert(&ch->mtx, MA_OWNED); 1024 if (error) { 1025 device_printf(slot->dev, "DMA load error\n"); 1026 if (!ch->recoverycmd) 1027 xpt_freeze_simq(ch->sim, 1); 1028 siis_end_transaction(slot, SIIS_ERR_INVALID); 1029 return; 1030 } 1031 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 1032 slot->dma.nsegs = nsegs; 1033 if (nsegs != 0) { 1034 /* Get a piece of the workspace for this request */ 1035 ctp = (struct siis_cmd *)(ch->dma.work + SIIS_CT_OFFSET + 1036 (SIIS_CT_SIZE * slot->slot)); 1037 /* Fill S/G table */ 1038 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1039 prd = &ctp->u.ata.prd[0]; 1040 else 1041 prd = &ctp->u.atapi.prd[0]; 1042 for (i = 0; i < nsegs; i++) { 1043 prd[i].dba = htole64(segs[i].ds_addr); 1044 prd[i].dbc = htole32(segs[i].ds_len); 1045 prd[i].control = 0; 1046 } 1047 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1048 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1049 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1050 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1051 } 1052 siis_execute_transaction(slot); 1053 } 1054 1055 /* Must be called with channel locked. */ 1056 static void 1057 siis_execute_transaction(struct siis_slot *slot) 1058 { 1059 device_t dev = slot->dev; 1060 struct siis_channel *ch = device_get_softc(dev); 1061 struct siis_cmd *ctp; 1062 union ccb *ccb = slot->ccb; 1063 u_int64_t prb_bus; 1064 1065 mtx_assert(&ch->mtx, MA_OWNED); 1066 /* Get a piece of the workspace for this request */ 1067 ctp = (struct siis_cmd *) 1068 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1069 ctp->control = 0; 1070 ctp->protocol_override = 0; 1071 ctp->transfer_count = 0; 1072 /* Special handling for Soft Reset command. */ 1073 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1074 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1075 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1076 } else { 1077 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1078 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1079 ctp->protocol_override |= 1080 htole16(SIIS_PRB_PROTO_NCQ); 1081 } 1082 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1083 ctp->protocol_override |= 1084 htole16(SIIS_PRB_PROTO_READ); 1085 } else 1086 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1087 ctp->protocol_override |= 1088 htole16(SIIS_PRB_PROTO_WRITE); 1089 } 1090 } 1091 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1092 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1093 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1094 else 1095 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1096 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1097 } 1098 /* Special handling for Soft Reset command. */ 1099 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1100 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1101 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1102 /* Kick controller into sane state */ 1103 siis_portinit(dev); 1104 } 1105 /* Setup the FIS for this request */ 1106 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1107 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1108 if (!ch->recoverycmd) 1109 xpt_freeze_simq(ch->sim, 1); 1110 siis_end_transaction(slot, SIIS_ERR_INVALID); 1111 return; 1112 } 1113 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1114 BUS_DMASYNC_PREWRITE); 1115 /* Issue command to the controller. */ 1116 slot->state = SIIS_SLOT_RUNNING; 1117 ch->rslots |= (1 << slot->slot); 1118 prb_bus = ch->dma.work_bus + 1119 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1120 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1121 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1122 /* Start command execution timeout */ 1123 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1124 (timeout_t*)siis_timeout, slot); 1125 return; 1126 } 1127 1128 /* Must be called with channel locked. */ 1129 static void 1130 siis_process_timeout(device_t dev) 1131 { 1132 struct siis_channel *ch = device_get_softc(dev); 1133 int i; 1134 1135 mtx_assert(&ch->mtx, MA_OWNED); 1136 if (!ch->recoverycmd && !ch->recovery) { 1137 xpt_freeze_simq(ch->sim, ch->numrslots); 1138 ch->recovery = 1; 1139 } 1140 /* Handle the rest of commands. */ 1141 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1142 /* Do we have a running request on slot? */ 1143 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1144 continue; 1145 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1146 } 1147 } 1148 1149 /* Must be called with channel locked. */ 1150 static void 1151 siis_rearm_timeout(device_t dev) 1152 { 1153 struct siis_channel *ch = device_get_softc(dev); 1154 int i; 1155 1156 mtx_assert(&ch->mtx, MA_OWNED); 1157 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1158 struct siis_slot *slot = &ch->slot[i]; 1159 1160 /* Do we have a running request on slot? */ 1161 if (slot->state < SIIS_SLOT_RUNNING) 1162 continue; 1163 if ((ch->toslots & (1 << i)) == 0) 1164 continue; 1165 callout_reset(&slot->timeout, 1166 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1167 (timeout_t*)siis_timeout, slot); 1168 } 1169 } 1170 1171 /* Locked by callout mechanism. */ 1172 static void 1173 siis_timeout(struct siis_slot *slot) 1174 { 1175 device_t dev = slot->dev; 1176 struct siis_channel *ch = device_get_softc(dev); 1177 union ccb *ccb = slot->ccb; 1178 1179 mtx_assert(&ch->mtx, MA_OWNED); 1180 /* Check for stale timeout. */ 1181 if (slot->state < SIIS_SLOT_RUNNING) 1182 return; 1183 1184 /* Handle soft-reset timeouts without doing hard-reset. */ 1185 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1186 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1187 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1188 xpt_freeze_simq(ch->sim, ch->numrslots); 1189 siis_end_transaction(slot, SIIS_ERR_TFE); 1190 return; 1191 } 1192 1193 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1194 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1195 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1196 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1197 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1198 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1199 1200 if (ch->toslots == 0) 1201 xpt_freeze_simq(ch->sim, 1); 1202 ch->toslots |= (1 << slot->slot); 1203 if ((ch->rslots & ~ch->toslots) == 0) 1204 siis_process_timeout(dev); 1205 else 1206 device_printf(dev, " ... waiting for slots %08x\n", 1207 ch->rslots & ~ch->toslots); 1208 } 1209 1210 /* Must be called with channel locked. */ 1211 static void 1212 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1213 { 1214 device_t dev = slot->dev; 1215 struct siis_channel *ch = device_get_softc(dev); 1216 union ccb *ccb = slot->ccb; 1217 int lastto; 1218 1219 mtx_assert(&ch->mtx, MA_OWNED); 1220 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1221 BUS_DMASYNC_POSTWRITE); 1222 /* Read result registers to the result struct 1223 * May be incorrect if several commands finished same time, 1224 * so read only when sure or have to. 1225 */ 1226 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1227 struct ata_res *res = &ccb->ataio.res; 1228 if ((et == SIIS_ERR_TFE) || 1229 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1230 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1231 1232 res->status = ATA_INB(ch->r_mem, offs + 2); 1233 res->error = ATA_INB(ch->r_mem, offs + 3); 1234 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1235 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1236 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1237 res->device = ATA_INB(ch->r_mem, offs + 7); 1238 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1239 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1240 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1241 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1242 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1243 } else 1244 bzero(res, sizeof(*res)); 1245 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1246 ch->numrslots == 1) { 1247 ccb->ataio.resid = ccb->ataio.dxfer_len - 1248 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1249 } 1250 } else { 1251 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1252 ch->numrslots == 1) { 1253 ccb->csio.resid = ccb->csio.dxfer_len - 1254 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1255 } 1256 } 1257 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1258 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1259 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1260 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1261 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1262 } 1263 /* Set proper result status. */ 1264 if (et != SIIS_ERR_NONE || ch->recovery) { 1265 ch->eslots |= (1 << slot->slot); 1266 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1267 } 1268 /* In case of error, freeze device for proper recovery. */ 1269 if (et != SIIS_ERR_NONE && (!ch->recoverycmd) && 1270 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1271 xpt_freeze_devq(ccb->ccb_h.path, 1); 1272 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1273 } 1274 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1275 switch (et) { 1276 case SIIS_ERR_NONE: 1277 ccb->ccb_h.status |= CAM_REQ_CMP; 1278 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1279 ccb->csio.scsi_status = SCSI_STATUS_OK; 1280 break; 1281 case SIIS_ERR_INVALID: 1282 ch->fatalerr = 1; 1283 ccb->ccb_h.status |= CAM_REQ_INVALID; 1284 break; 1285 case SIIS_ERR_INNOCENT: 1286 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1287 break; 1288 case SIIS_ERR_TFE: 1289 case SIIS_ERR_NCQ: 1290 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1291 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1292 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1293 } else { 1294 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1295 } 1296 break; 1297 case SIIS_ERR_SATA: 1298 ch->fatalerr = 1; 1299 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1300 break; 1301 case SIIS_ERR_TIMEOUT: 1302 ch->fatalerr = 1; 1303 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1304 break; 1305 default: 1306 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1307 } 1308 /* Free slot. */ 1309 ch->oslots &= ~(1 << slot->slot); 1310 ch->rslots &= ~(1 << slot->slot); 1311 ch->aslots &= ~(1 << slot->slot); 1312 slot->state = SIIS_SLOT_EMPTY; 1313 slot->ccb = NULL; 1314 /* Update channel stats. */ 1315 ch->numrslots--; 1316 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1317 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1318 ch->numtslots[ccb->ccb_h.target_id]--; 1319 } 1320 /* Cancel timeout state if request completed normally. */ 1321 if (et != SIIS_ERR_TIMEOUT) { 1322 lastto = (ch->toslots == (1 << slot->slot)); 1323 ch->toslots &= ~(1 << slot->slot); 1324 if (lastto) 1325 xpt_release_simq(ch->sim, TRUE); 1326 } 1327 /* If it was our READ LOG command - process it. */ 1328 if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 1329 siis_process_read_log(dev, ccb); 1330 /* If it was our REQUEST SENSE command - process it. */ 1331 } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 1332 siis_process_request_sense(dev, ccb); 1333 /* If it was NCQ or ATAPI command error, put result on hold. */ 1334 } else if (et == SIIS_ERR_NCQ || 1335 ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 1336 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 1337 ch->hold[slot->slot] = ccb; 1338 ch->numhslots++; 1339 } else 1340 xpt_done(ccb); 1341 /* If we have no other active commands, ... */ 1342 if (ch->rslots == 0) { 1343 /* if there were timeouts or fatal error - reset port. */ 1344 if (ch->toslots != 0 || ch->fatalerr) { 1345 siis_reset(dev); 1346 } else { 1347 /* if we have slots in error, we can reinit port. */ 1348 if (ch->eslots != 0) 1349 siis_portinit(dev); 1350 /* if there commands on hold, we can do recovery. */ 1351 if (!ch->recoverycmd && ch->numhslots) 1352 siis_issue_recovery(dev); 1353 } 1354 /* If all the reset of commands are in timeout - abort them. */ 1355 } else if ((ch->rslots & ~ch->toslots) == 0 && 1356 et != SIIS_ERR_TIMEOUT) 1357 siis_rearm_timeout(dev); 1358 /* Unfreeze frozen command. */ 1359 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1360 union ccb *fccb = ch->frozen; 1361 ch->frozen = NULL; 1362 siis_begin_transaction(dev, fccb); 1363 xpt_release_simq(ch->sim, TRUE); 1364 } 1365 } 1366 1367 static void 1368 siis_issue_recovery(device_t dev) 1369 { 1370 struct siis_channel *ch = device_get_softc(dev); 1371 union ccb *ccb; 1372 struct ccb_ataio *ataio; 1373 struct ccb_scsiio *csio; 1374 int i; 1375 1376 /* Find some held command. */ 1377 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1378 if (ch->hold[i]) 1379 break; 1380 } 1381 if (i == SIIS_MAX_SLOTS) 1382 return; 1383 ccb = xpt_alloc_ccb_nowait(); 1384 if (ccb == NULL) { 1385 device_printf(dev, "Unable to allocate recovery command\n"); 1386 completeall: 1387 /* We can't do anything -- complete held commands. */ 1388 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1389 if (ch->hold[i] == NULL) 1390 continue; 1391 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1392 ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 1393 xpt_done(ch->hold[i]); 1394 ch->hold[i] = NULL; 1395 ch->numhslots--; 1396 } 1397 siis_reset(dev); 1398 return; 1399 } 1400 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1401 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1402 /* READ LOG */ 1403 ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 1404 ccb->ccb_h.func_code = XPT_ATA_IO; 1405 ccb->ccb_h.flags = CAM_DIR_IN; 1406 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1407 ataio = &ccb->ataio; 1408 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1409 if (ataio->data_ptr == NULL) { 1410 xpt_free_ccb(ccb); 1411 device_printf(dev, 1412 "Unable to allocate memory for READ LOG command\n"); 1413 goto completeall; 1414 } 1415 ataio->dxfer_len = 512; 1416 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1417 ataio->cmd.flags = CAM_ATAIO_48BIT; 1418 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1419 ataio->cmd.sector_count = 1; 1420 ataio->cmd.sector_count_exp = 0; 1421 ataio->cmd.lba_low = 0x10; 1422 ataio->cmd.lba_mid = 0; 1423 ataio->cmd.lba_mid_exp = 0; 1424 } else { 1425 /* REQUEST SENSE */ 1426 ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 1427 ccb->ccb_h.recovery_slot = i; 1428 ccb->ccb_h.func_code = XPT_SCSI_IO; 1429 ccb->ccb_h.flags = CAM_DIR_IN; 1430 ccb->ccb_h.status = 0; 1431 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1432 csio = &ccb->csio; 1433 csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 1434 csio->dxfer_len = ch->hold[i]->csio.sense_len; 1435 csio->cdb_len = 6; 1436 bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 1437 csio->cdb_io.cdb_bytes[0] = 0x03; 1438 csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 1439 } 1440 ch->recoverycmd = 1; 1441 siis_begin_transaction(dev, ccb); 1442 } 1443 1444 static void 1445 siis_process_read_log(device_t dev, union ccb *ccb) 1446 { 1447 struct siis_channel *ch = device_get_softc(dev); 1448 uint8_t *data; 1449 struct ata_res *res; 1450 int i; 1451 1452 ch->recoverycmd = 0; 1453 data = ccb->ataio.data_ptr; 1454 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1455 (data[0] & 0x80) == 0) { 1456 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1457 if (!ch->hold[i]) 1458 continue; 1459 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1460 continue; 1461 if ((data[0] & 0x1F) == i) { 1462 res = &ch->hold[i]->ataio.res; 1463 res->status = data[2]; 1464 res->error = data[3]; 1465 res->lba_low = data[4]; 1466 res->lba_mid = data[5]; 1467 res->lba_high = data[6]; 1468 res->device = data[7]; 1469 res->lba_low_exp = data[8]; 1470 res->lba_mid_exp = data[9]; 1471 res->lba_high_exp = data[10]; 1472 res->sector_count = data[12]; 1473 res->sector_count_exp = data[13]; 1474 } else { 1475 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1476 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1477 } 1478 xpt_done(ch->hold[i]); 1479 ch->hold[i] = NULL; 1480 ch->numhslots--; 1481 } 1482 } else { 1483 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1484 device_printf(dev, "Error while READ LOG EXT\n"); 1485 else if ((data[0] & 0x80) == 0) { 1486 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1487 } 1488 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1489 if (!ch->hold[i]) 1490 continue; 1491 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1492 continue; 1493 xpt_done(ch->hold[i]); 1494 ch->hold[i] = NULL; 1495 ch->numhslots--; 1496 } 1497 } 1498 free(ccb->ataio.data_ptr, M_SIIS); 1499 xpt_free_ccb(ccb); 1500 } 1501 1502 static void 1503 siis_process_request_sense(device_t dev, union ccb *ccb) 1504 { 1505 struct siis_channel *ch = device_get_softc(dev); 1506 int i; 1507 1508 ch->recoverycmd = 0; 1509 1510 i = ccb->ccb_h.recovery_slot; 1511 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 1512 ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 1513 } else { 1514 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1515 ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 1516 } 1517 xpt_done(ch->hold[i]); 1518 ch->hold[i] = NULL; 1519 ch->numhslots--; 1520 xpt_free_ccb(ccb); 1521 } 1522 1523 static void 1524 siis_portinit(device_t dev) 1525 { 1526 struct siis_channel *ch = device_get_softc(dev); 1527 int i; 1528 1529 ch->eslots = 0; 1530 ch->recovery = 0; 1531 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1532 for (i = 0; i < 16; i++) { 1533 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1534 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1535 } 1536 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1537 siis_wait_ready(dev, 1000); 1538 } 1539 1540 static int 1541 siis_devreset(device_t dev) 1542 { 1543 struct siis_channel *ch = device_get_softc(dev); 1544 int timeout = 0; 1545 uint32_t val; 1546 1547 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1548 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1549 SIIS_P_CTL_DEV_RESET) != 0) { 1550 DELAY(100); 1551 if (timeout++ > 1000) { 1552 device_printf(dev, "device reset stuck " 1553 "(timeout 100ms) status = %08x\n", val); 1554 return (EBUSY); 1555 } 1556 } 1557 return (0); 1558 } 1559 1560 static int 1561 siis_wait_ready(device_t dev, int t) 1562 { 1563 struct siis_channel *ch = device_get_softc(dev); 1564 int timeout = 0; 1565 uint32_t val; 1566 1567 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1568 SIIS_P_CTL_READY) == 0) { 1569 DELAY(1000); 1570 if (timeout++ > t) { 1571 device_printf(dev, "port is not ready (timeout %dms) " 1572 "status = %08x\n", t, val); 1573 return (EBUSY); 1574 } 1575 } 1576 return (0); 1577 } 1578 1579 static void 1580 siis_reset(device_t dev) 1581 { 1582 struct siis_channel *ch = device_get_softc(dev); 1583 int i, retry = 0, sata_rev; 1584 uint32_t val; 1585 1586 xpt_freeze_simq(ch->sim, 1); 1587 if (bootverbose) 1588 device_printf(dev, "SIIS reset...\n"); 1589 if (!ch->recoverycmd && !ch->recovery) 1590 xpt_freeze_simq(ch->sim, ch->numrslots); 1591 /* Requeue frozen command. */ 1592 if (ch->frozen) { 1593 union ccb *fccb = ch->frozen; 1594 ch->frozen = NULL; 1595 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1596 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1597 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1598 xpt_freeze_devq(fccb->ccb_h.path, 1); 1599 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1600 } 1601 xpt_done(fccb); 1602 } 1603 /* Requeue all running commands. */ 1604 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1605 /* Do we have a running request on slot? */ 1606 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1607 continue; 1608 /* XXX; Commands in loading state. */ 1609 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1610 } 1611 /* Finish all held commands as-is. */ 1612 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1613 if (!ch->hold[i]) 1614 continue; 1615 xpt_done(ch->hold[i]); 1616 ch->hold[i] = NULL; 1617 ch->numhslots--; 1618 } 1619 if (ch->toslots != 0) 1620 xpt_release_simq(ch->sim, TRUE); 1621 ch->eslots = 0; 1622 ch->recovery = 0; 1623 ch->toslots = 0; 1624 ch->fatalerr = 0; 1625 /* Disable port interrupts */ 1626 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1627 /* Set speed limit. */ 1628 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1629 if (sata_rev == 1) 1630 val = ATA_SC_SPD_SPEED_GEN1; 1631 else if (sata_rev == 2) 1632 val = ATA_SC_SPD_SPEED_GEN2; 1633 else if (sata_rev == 3) 1634 val = ATA_SC_SPD_SPEED_GEN3; 1635 else 1636 val = 0; 1637 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1638 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1639 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1640 retry: 1641 siis_devreset(dev); 1642 /* Reset and reconnect PHY, */ 1643 if (!siis_sata_connect(ch)) { 1644 ch->devices = 0; 1645 /* Enable port interrupts */ 1646 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1647 if (bootverbose) 1648 device_printf(dev, 1649 "SIIS reset done: phy reset found no device\n"); 1650 /* Tell the XPT about the event */ 1651 xpt_async(AC_BUS_RESET, ch->path, NULL); 1652 xpt_release_simq(ch->sim, TRUE); 1653 return; 1654 } 1655 /* Wait for port ready status. */ 1656 if (siis_wait_ready(dev, 1000)) { 1657 device_printf(dev, "port ready timeout\n"); 1658 if (!retry) { 1659 device_printf(dev, "trying full port reset ...\n"); 1660 /* Get port to the reset state. */ 1661 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1662 DELAY(10000); 1663 /* Get port out of reset state. */ 1664 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1665 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1666 if (ch->pm_present) 1667 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1668 else 1669 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1670 siis_wait_ready(dev, 5000); 1671 retry = 1; 1672 goto retry; 1673 } 1674 } 1675 ch->devices = 1; 1676 /* Enable port interrupts */ 1677 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1678 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1679 if (bootverbose) 1680 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1681 /* Tell the XPT about the event */ 1682 xpt_async(AC_BUS_RESET, ch->path, NULL); 1683 xpt_release_simq(ch->sim, TRUE); 1684 } 1685 1686 static int 1687 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1688 { 1689 struct siis_channel *ch = device_get_softc(dev); 1690 u_int8_t *fis = &ctp->fis[0]; 1691 1692 bzero(fis, 24); 1693 fis[0] = 0x27; /* host to device */ 1694 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1695 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1696 fis[1] |= 0x80; 1697 fis[2] = ATA_PACKET_CMD; 1698 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1699 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1700 fis[3] = ATA_F_DMA; 1701 else { 1702 fis[5] = ccb->csio.dxfer_len; 1703 fis[6] = ccb->csio.dxfer_len >> 8; 1704 } 1705 fis[7] = ATA_D_LBA; 1706 fis[15] = ATA_A_4BIT; 1707 bzero(ctp->u.atapi.ccb, 16); 1708 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1709 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1710 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1711 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1712 fis[1] |= 0x80; 1713 fis[2] = ccb->ataio.cmd.command; 1714 fis[3] = ccb->ataio.cmd.features; 1715 fis[4] = ccb->ataio.cmd.lba_low; 1716 fis[5] = ccb->ataio.cmd.lba_mid; 1717 fis[6] = ccb->ataio.cmd.lba_high; 1718 fis[7] = ccb->ataio.cmd.device; 1719 fis[8] = ccb->ataio.cmd.lba_low_exp; 1720 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1721 fis[10] = ccb->ataio.cmd.lba_high_exp; 1722 fis[11] = ccb->ataio.cmd.features_exp; 1723 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1724 fis[12] = tag << 3; 1725 fis[13] = 0; 1726 } else { 1727 fis[12] = ccb->ataio.cmd.sector_count; 1728 fis[13] = ccb->ataio.cmd.sector_count_exp; 1729 } 1730 fis[15] = ATA_A_4BIT; 1731 } else { 1732 /* Soft reset. */ 1733 } 1734 return (20); 1735 } 1736 1737 static int 1738 siis_sata_connect(struct siis_channel *ch) 1739 { 1740 u_int32_t status; 1741 int timeout, found = 0; 1742 1743 /* Wait up to 100ms for "connect well" */ 1744 for (timeout = 0; timeout < 1000 ; timeout++) { 1745 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1746 if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1747 found = 1; 1748 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1749 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1750 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1751 break; 1752 if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 1753 if (bootverbose) { 1754 device_printf(ch->dev, "SATA offline status=%08x\n", 1755 status); 1756 } 1757 return (0); 1758 } 1759 if (found == 0 && timeout >= 100) 1760 break; 1761 DELAY(100); 1762 } 1763 if (timeout >= 1000 || !found) { 1764 if (bootverbose) { 1765 device_printf(ch->dev, 1766 "SATA connect timeout time=%dus status=%08x\n", 1767 timeout * 100, status); 1768 } 1769 return (0); 1770 } 1771 if (bootverbose) { 1772 device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 1773 timeout * 100, status); 1774 } 1775 /* Clear SATA error register */ 1776 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1777 return (1); 1778 } 1779 1780 static int 1781 siis_check_ids(device_t dev, union ccb *ccb) 1782 { 1783 1784 if (ccb->ccb_h.target_id > 15) { 1785 ccb->ccb_h.status = CAM_TID_INVALID; 1786 xpt_done(ccb); 1787 return (-1); 1788 } 1789 if (ccb->ccb_h.target_lun != 0) { 1790 ccb->ccb_h.status = CAM_LUN_INVALID; 1791 xpt_done(ccb); 1792 return (-1); 1793 } 1794 return (0); 1795 } 1796 1797 static void 1798 siisaction(struct cam_sim *sim, union ccb *ccb) 1799 { 1800 device_t dev, parent; 1801 struct siis_channel *ch; 1802 1803 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1804 ccb->ccb_h.func_code)); 1805 1806 ch = (struct siis_channel *)cam_sim_softc(sim); 1807 dev = ch->dev; 1808 mtx_assert(&ch->mtx, MA_OWNED); 1809 switch (ccb->ccb_h.func_code) { 1810 /* Common cases first */ 1811 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1812 case XPT_SCSI_IO: 1813 if (siis_check_ids(dev, ccb)) 1814 return; 1815 if (ch->devices == 0 || 1816 (ch->pm_present == 0 && 1817 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1818 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1819 break; 1820 } 1821 ccb->ccb_h.recovery_type = RECOVERY_NONE; 1822 /* Check for command collision. */ 1823 if (siis_check_collision(dev, ccb)) { 1824 /* Freeze command. */ 1825 ch->frozen = ccb; 1826 /* We have only one frozen slot, so freeze simq also. */ 1827 xpt_freeze_simq(ch->sim, 1); 1828 return; 1829 } 1830 siis_begin_transaction(dev, ccb); 1831 return; 1832 case XPT_EN_LUN: /* Enable LUN as a target */ 1833 case XPT_TARGET_IO: /* Execute target I/O request */ 1834 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1835 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1836 case XPT_ABORT: /* Abort the specified CCB */ 1837 /* XXX Implement */ 1838 ccb->ccb_h.status = CAM_REQ_INVALID; 1839 break; 1840 case XPT_SET_TRAN_SETTINGS: 1841 { 1842 struct ccb_trans_settings *cts = &ccb->cts; 1843 struct siis_device *d; 1844 1845 if (siis_check_ids(dev, ccb)) 1846 return; 1847 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1848 d = &ch->curr[ccb->ccb_h.target_id]; 1849 else 1850 d = &ch->user[ccb->ccb_h.target_id]; 1851 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1852 d->revision = cts->xport_specific.sata.revision; 1853 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1854 d->mode = cts->xport_specific.sata.mode; 1855 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1856 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1857 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1858 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1859 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1860 ch->pm_present = cts->xport_specific.sata.pm_present; 1861 if (ch->pm_present) 1862 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1863 else 1864 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1865 } 1866 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1867 d->atapi = cts->xport_specific.sata.atapi; 1868 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1869 d->caps = cts->xport_specific.sata.caps; 1870 ccb->ccb_h.status = CAM_REQ_CMP; 1871 break; 1872 } 1873 case XPT_GET_TRAN_SETTINGS: 1874 /* Get default/user set transfer settings for the target */ 1875 { 1876 struct ccb_trans_settings *cts = &ccb->cts; 1877 struct siis_device *d; 1878 uint32_t status; 1879 1880 if (siis_check_ids(dev, ccb)) 1881 return; 1882 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1883 d = &ch->curr[ccb->ccb_h.target_id]; 1884 else 1885 d = &ch->user[ccb->ccb_h.target_id]; 1886 cts->protocol = PROTO_UNSPECIFIED; 1887 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1888 cts->transport = XPORT_SATA; 1889 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1890 cts->proto_specific.valid = 0; 1891 cts->xport_specific.sata.valid = 0; 1892 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1893 (ccb->ccb_h.target_id == 15 || 1894 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1895 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1896 if (status & 0x0f0) { 1897 cts->xport_specific.sata.revision = 1898 (status & 0x0f0) >> 4; 1899 cts->xport_specific.sata.valid |= 1900 CTS_SATA_VALID_REVISION; 1901 } 1902 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1903 if (ch->pm_level) 1904 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1905 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 1906 cts->xport_specific.sata.caps &= 1907 ch->user[ccb->ccb_h.target_id].caps; 1908 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1909 } else { 1910 cts->xport_specific.sata.revision = d->revision; 1911 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1912 cts->xport_specific.sata.caps = d->caps; 1913 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1914 (ch->quirks & SIIS_Q_SNTF) == 0) 1915 cts->xport_specific.sata.caps &= ~CTS_SATA_CAPS_H_AN; 1916 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1917 } 1918 cts->xport_specific.sata.mode = d->mode; 1919 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1920 cts->xport_specific.sata.bytecount = d->bytecount; 1921 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1922 cts->xport_specific.sata.pm_present = ch->pm_present; 1923 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1924 cts->xport_specific.sata.tags = d->tags; 1925 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1926 cts->xport_specific.sata.atapi = d->atapi; 1927 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1928 ccb->ccb_h.status = CAM_REQ_CMP; 1929 break; 1930 } 1931 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1932 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1933 siis_reset(dev); 1934 ccb->ccb_h.status = CAM_REQ_CMP; 1935 break; 1936 case XPT_TERM_IO: /* Terminate the I/O process */ 1937 /* XXX Implement */ 1938 ccb->ccb_h.status = CAM_REQ_INVALID; 1939 break; 1940 case XPT_PATH_INQ: /* Path routing inquiry */ 1941 { 1942 struct ccb_pathinq *cpi = &ccb->cpi; 1943 1944 parent = device_get_parent(dev); 1945 cpi->version_num = 1; /* XXX??? */ 1946 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1947 cpi->hba_inquiry |= PI_SATAPM; 1948 cpi->target_sprt = 0; 1949 cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED; 1950 cpi->hba_eng_cnt = 0; 1951 cpi->max_target = 15; 1952 cpi->max_lun = 0; 1953 cpi->initiator_id = 0; 1954 cpi->bus_id = cam_sim_bus(sim); 1955 cpi->base_transfer_speed = 150000; 1956 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1957 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1958 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1959 cpi->unit_number = cam_sim_unit(sim); 1960 cpi->transport = XPORT_SATA; 1961 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1962 cpi->protocol = PROTO_ATA; 1963 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1964 cpi->maxio = MAXPHYS; 1965 cpi->hba_vendor = pci_get_vendor(parent); 1966 cpi->hba_device = pci_get_device(parent); 1967 cpi->hba_subvendor = pci_get_subvendor(parent); 1968 cpi->hba_subdevice = pci_get_subdevice(parent); 1969 cpi->ccb_h.status = CAM_REQ_CMP; 1970 break; 1971 } 1972 default: 1973 ccb->ccb_h.status = CAM_REQ_INVALID; 1974 break; 1975 } 1976 xpt_done(ccb); 1977 } 1978 1979 static void 1980 siispoll(struct cam_sim *sim) 1981 { 1982 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1983 1984 siis_ch_intr(ch->dev); 1985 } 1986