1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/module.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/ata.h> 34 #include <sys/bus.h> 35 #include <sys/endian.h> 36 #include <sys/malloc.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 #include <sys/sbuf.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/led/led.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include "siis.h" 51 52 #include <cam/cam.h> 53 #include <cam/cam_ccb.h> 54 #include <cam/cam_sim.h> 55 #include <cam/cam_xpt_sim.h> 56 #include <cam/cam_debug.h> 57 58 /* local prototypes */ 59 static int siis_setup_interrupt(device_t dev); 60 static void siis_intr(void *data); 61 static int siis_suspend(device_t dev); 62 static int siis_resume(device_t dev); 63 static int siis_ch_init(device_t dev); 64 static int siis_ch_deinit(device_t dev); 65 static int siis_ch_suspend(device_t dev); 66 static int siis_ch_resume(device_t dev); 67 static void siis_ch_intr_locked(void *data); 68 static void siis_ch_intr(void *data); 69 static void siis_ch_led(void *priv, int onoff); 70 static void siis_begin_transaction(device_t dev, union ccb *ccb); 71 static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 72 static void siis_execute_transaction(struct siis_slot *slot); 73 static void siis_timeout(void *arg); 74 static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 75 static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 76 static void siis_dmainit(device_t dev); 77 static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 78 static void siis_dmafini(device_t dev); 79 static void siis_slotsalloc(device_t dev); 80 static void siis_slotsfree(device_t dev); 81 static void siis_reset(device_t dev); 82 static void siis_portinit(device_t dev); 83 static int siis_wait_ready(device_t dev, int t); 84 85 static int siis_sata_connect(struct siis_channel *ch); 86 87 static void siis_issue_recovery(device_t dev); 88 static void siis_process_read_log(device_t dev, union ccb *ccb); 89 static void siis_process_request_sense(device_t dev, union ccb *ccb); 90 91 static void siisaction(struct cam_sim *sim, union ccb *ccb); 92 static void siispoll(struct cam_sim *sim); 93 94 static MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 95 96 static struct { 97 uint32_t id; 98 const char *name; 99 int ports; 100 int quirks; 101 #define SIIS_Q_SNTF 1 102 #define SIIS_Q_NOMSI 2 103 } siis_ids[] = { 104 {0x31241095, "SiI3124", 4, 0}, 105 {0x31248086, "SiI3124", 4, 0}, 106 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 109 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 110 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 111 {0, NULL, 0, 0} 112 }; 113 114 #define recovery_type spriv_field0 115 #define RECOVERY_NONE 0 116 #define RECOVERY_READ_LOG 1 117 #define RECOVERY_REQUEST_SENSE 2 118 #define recovery_slot spriv_field1 119 120 static int 121 siis_probe(device_t dev) 122 { 123 char buf[64]; 124 int i; 125 uint32_t devid = pci_get_devid(dev); 126 127 for (i = 0; siis_ids[i].id != 0; i++) { 128 if (siis_ids[i].id == devid) { 129 snprintf(buf, sizeof(buf), "%s SATA controller", 130 siis_ids[i].name); 131 device_set_desc_copy(dev, buf); 132 return (BUS_PROBE_DEFAULT); 133 } 134 } 135 return (ENXIO); 136 } 137 138 static int 139 siis_attach(device_t dev) 140 { 141 struct siis_controller *ctlr = device_get_softc(dev); 142 uint32_t devid = pci_get_devid(dev); 143 device_t child; 144 int error, i, unit; 145 146 ctlr->dev = dev; 147 for (i = 0; siis_ids[i].id != 0; i++) { 148 if (siis_ids[i].id == devid) 149 break; 150 } 151 ctlr->quirks = siis_ids[i].quirks; 152 /* Global memory */ 153 ctlr->r_grid = PCIR_BAR(0); 154 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 155 &ctlr->r_grid, RF_ACTIVE))) 156 return (ENXIO); 157 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 158 /* Channels memory */ 159 ctlr->r_rid = PCIR_BAR(2); 160 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 161 &ctlr->r_rid, RF_ACTIVE))) 162 return (ENXIO); 163 /* Setup our own memory management for channels. */ 164 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 165 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 166 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 167 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 168 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 169 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 170 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 171 return (error); 172 } 173 if ((error = rman_manage_region(&ctlr->sc_iomem, 174 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 175 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 176 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 177 rman_fini(&ctlr->sc_iomem); 178 return (error); 179 } 180 pci_enable_busmaster(dev); 181 /* Reset controller */ 182 siis_resume(dev); 183 /* Number of HW channels */ 184 ctlr->channels = siis_ids[i].ports; 185 /* Setup interrupts. */ 186 if (siis_setup_interrupt(dev)) { 187 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 188 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 189 rman_fini(&ctlr->sc_iomem); 190 return ENXIO; 191 } 192 /* Attach all channels on this controller */ 193 for (unit = 0; unit < ctlr->channels; unit++) { 194 child = device_add_child(dev, "siisch", -1); 195 if (child == NULL) 196 device_printf(dev, "failed to add channel device\n"); 197 else 198 device_set_ivars(child, (void *)(intptr_t)unit); 199 } 200 bus_generic_attach(dev); 201 return 0; 202 } 203 204 static int 205 siis_detach(device_t dev) 206 { 207 struct siis_controller *ctlr = device_get_softc(dev); 208 209 /* Detach & delete all children */ 210 device_delete_children(dev); 211 212 /* Free interrupts. */ 213 if (ctlr->irq.r_irq) { 214 bus_teardown_intr(dev, ctlr->irq.r_irq, 215 ctlr->irq.handle); 216 bus_release_resource(dev, SYS_RES_IRQ, 217 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 218 } 219 pci_release_msi(dev); 220 /* Free memory. */ 221 rman_fini(&ctlr->sc_iomem); 222 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 223 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 224 return (0); 225 } 226 227 static int 228 siis_suspend(device_t dev) 229 { 230 struct siis_controller *ctlr = device_get_softc(dev); 231 232 bus_generic_suspend(dev); 233 /* Put controller into reset state. */ 234 ctlr->gctl |= SIIS_GCTL_GRESET; 235 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 236 return 0; 237 } 238 239 static int 240 siis_resume(device_t dev) 241 { 242 struct siis_controller *ctlr = device_get_softc(dev); 243 244 /* Set PCIe max read request size to at least 1024 bytes */ 245 if (pci_get_max_read_req(dev) < 1024) 246 pci_set_max_read_req(dev, 1024); 247 /* Put controller into reset state. */ 248 ctlr->gctl |= SIIS_GCTL_GRESET; 249 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 250 DELAY(10000); 251 /* Get controller out of reset state and enable port interrupts. */ 252 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 253 ctlr->gctl |= 0x0000000f; 254 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 255 return (bus_generic_resume(dev)); 256 } 257 258 static int 259 siis_setup_interrupt(device_t dev) 260 { 261 struct siis_controller *ctlr = device_get_softc(dev); 262 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 263 264 /* Process hints. */ 265 resource_int_value(device_get_name(dev), 266 device_get_unit(dev), "msi", &msi); 267 if (msi < 0) 268 msi = 0; 269 else if (msi > 0) 270 msi = min(1, pci_msi_count(dev)); 271 /* Allocate MSI if needed/present. */ 272 if (msi && pci_alloc_msi(dev, &msi) != 0) 273 msi = 0; 274 /* Allocate all IRQs. */ 275 ctlr->irq.r_irq_rid = msi ? 1 : 0; 276 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 277 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 278 device_printf(dev, "unable to map interrupt\n"); 279 return ENXIO; 280 } 281 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 282 siis_intr, ctlr, &ctlr->irq.handle))) { 283 /* SOS XXX release r_irq */ 284 device_printf(dev, "unable to setup interrupt\n"); 285 return ENXIO; 286 } 287 return (0); 288 } 289 290 /* 291 * Common case interrupt handler. 292 */ 293 static void 294 siis_intr(void *data) 295 { 296 struct siis_controller *ctlr = (struct siis_controller *)data; 297 u_int32_t is; 298 void *arg; 299 int unit; 300 301 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 302 for (unit = 0; unit < ctlr->channels; unit++) { 303 if ((is & SIIS_IS_PORT(unit)) != 0 && 304 (arg = ctlr->interrupt[unit].argument)) { 305 ctlr->interrupt[unit].function(arg); 306 } 307 } 308 /* Acknowledge interrupt, if MSI enabled. */ 309 if (ctlr->irq.r_irq_rid) { 310 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 311 ctlr->gctl | SIIS_GCTL_MSIACK); 312 } 313 } 314 315 static struct resource * 316 siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 317 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 318 { 319 struct siis_controller *ctlr = device_get_softc(dev); 320 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 321 struct resource *res = NULL; 322 int offset = unit << 13; 323 rman_res_t st; 324 325 switch (type) { 326 case SYS_RES_MEMORY: 327 st = rman_get_start(ctlr->r_mem); 328 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 329 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 330 if (res) { 331 bus_space_handle_t bsh; 332 bus_space_tag_t bst; 333 bsh = rman_get_bushandle(ctlr->r_mem); 334 bst = rman_get_bustag(ctlr->r_mem); 335 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 336 rman_set_bushandle(res, bsh); 337 rman_set_bustag(res, bst); 338 } 339 break; 340 case SYS_RES_IRQ: 341 if (*rid == ATA_IRQ_RID) 342 res = ctlr->irq.r_irq; 343 break; 344 } 345 return (res); 346 } 347 348 static int 349 siis_release_resource(device_t dev, device_t child, int type, int rid, 350 struct resource *r) 351 { 352 353 switch (type) { 354 case SYS_RES_MEMORY: 355 rman_release_resource(r); 356 return (0); 357 case SYS_RES_IRQ: 358 if (rid != ATA_IRQ_RID) 359 return ENOENT; 360 return (0); 361 } 362 return (EINVAL); 363 } 364 365 static int 366 siis_setup_intr(device_t dev, device_t child, struct resource *irq, 367 int flags, driver_filter_t *filter, driver_intr_t *function, 368 void *argument, void **cookiep) 369 { 370 struct siis_controller *ctlr = device_get_softc(dev); 371 int unit = (intptr_t)device_get_ivars(child); 372 373 if (filter != NULL) { 374 printf("siis.c: we cannot use a filter here\n"); 375 return (EINVAL); 376 } 377 ctlr->interrupt[unit].function = function; 378 ctlr->interrupt[unit].argument = argument; 379 return (0); 380 } 381 382 static int 383 siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 384 void *cookie) 385 { 386 struct siis_controller *ctlr = device_get_softc(dev); 387 int unit = (intptr_t)device_get_ivars(child); 388 389 ctlr->interrupt[unit].function = NULL; 390 ctlr->interrupt[unit].argument = NULL; 391 return (0); 392 } 393 394 static int 395 siis_print_child(device_t dev, device_t child) 396 { 397 int retval; 398 399 retval = bus_print_child_header(dev, child); 400 retval += printf(" at channel %d", 401 (int)(intptr_t)device_get_ivars(child)); 402 retval += bus_print_child_footer(dev, child); 403 404 return (retval); 405 } 406 407 static int 408 siis_child_location(device_t dev, device_t child, struct sbuf *sb) 409 { 410 411 sbuf_printf(sb, "channel=%d", 412 (int)(intptr_t)device_get_ivars(child)); 413 return (0); 414 } 415 416 static bus_dma_tag_t 417 siis_get_dma_tag(device_t bus, device_t child) 418 { 419 420 return (bus_get_dma_tag(bus)); 421 } 422 423 static device_method_t siis_methods[] = { 424 DEVMETHOD(device_probe, siis_probe), 425 DEVMETHOD(device_attach, siis_attach), 426 DEVMETHOD(device_detach, siis_detach), 427 DEVMETHOD(device_suspend, siis_suspend), 428 DEVMETHOD(device_resume, siis_resume), 429 DEVMETHOD(bus_print_child, siis_print_child), 430 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 431 DEVMETHOD(bus_release_resource, siis_release_resource), 432 DEVMETHOD(bus_setup_intr, siis_setup_intr), 433 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 434 DEVMETHOD(bus_child_location, siis_child_location), 435 DEVMETHOD(bus_get_dma_tag, siis_get_dma_tag), 436 { 0, 0 } 437 }; 438 439 static driver_t siis_driver = { 440 "siis", 441 siis_methods, 442 sizeof(struct siis_controller) 443 }; 444 445 DRIVER_MODULE(siis, pci, siis_driver, 0, 0); 446 MODULE_VERSION(siis, 1); 447 MODULE_DEPEND(siis, cam, 1, 1, 1); 448 449 static int 450 siis_ch_probe(device_t dev) 451 { 452 453 device_set_desc_copy(dev, "SIIS channel"); 454 return (BUS_PROBE_DEFAULT); 455 } 456 457 static int 458 siis_ch_attach(device_t dev) 459 { 460 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 461 struct siis_channel *ch = device_get_softc(dev); 462 struct cam_devq *devq; 463 int rid, error, i, sata_rev = 0; 464 465 ch->dev = dev; 466 ch->unit = (intptr_t)device_get_ivars(dev); 467 ch->quirks = ctlr->quirks; 468 ch->pm_level = 0; 469 resource_int_value(device_get_name(dev), 470 device_get_unit(dev), "pm_level", &ch->pm_level); 471 resource_int_value(device_get_name(dev), 472 device_get_unit(dev), "sata_rev", &sata_rev); 473 for (i = 0; i < 16; i++) { 474 ch->user[i].revision = sata_rev; 475 ch->user[i].mode = 0; 476 ch->user[i].bytecount = 8192; 477 ch->user[i].tags = SIIS_MAX_SLOTS; 478 ch->curr[i] = ch->user[i]; 479 if (ch->pm_level) 480 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 481 ch->user[i].caps |= CTS_SATA_CAPS_H_AN; 482 } 483 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 484 rid = ch->unit; 485 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 486 &rid, RF_ACTIVE))) 487 return (ENXIO); 488 siis_dmainit(dev); 489 siis_slotsalloc(dev); 490 siis_ch_init(dev); 491 mtx_lock(&ch->mtx); 492 rid = ATA_IRQ_RID; 493 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 494 &rid, RF_SHAREABLE | RF_ACTIVE))) { 495 device_printf(dev, "Unable to map interrupt\n"); 496 error = ENXIO; 497 goto err0; 498 } 499 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 500 siis_ch_intr_locked, dev, &ch->ih))) { 501 device_printf(dev, "Unable to setup interrupt\n"); 502 error = ENXIO; 503 goto err1; 504 } 505 /* Create the device queue for our SIM. */ 506 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 507 if (devq == NULL) { 508 device_printf(dev, "Unable to allocate simq\n"); 509 error = ENOMEM; 510 goto err1; 511 } 512 /* Construct SIM entry */ 513 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 514 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 515 if (ch->sim == NULL) { 516 cam_simq_free(devq); 517 device_printf(dev, "unable to allocate sim\n"); 518 error = ENOMEM; 519 goto err1; 520 } 521 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 522 device_printf(dev, "unable to register xpt bus\n"); 523 error = ENXIO; 524 goto err2; 525 } 526 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 527 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 528 device_printf(dev, "unable to create path\n"); 529 error = ENXIO; 530 goto err3; 531 } 532 mtx_unlock(&ch->mtx); 533 ch->led = led_create(siis_ch_led, dev, device_get_nameunit(dev)); 534 return (0); 535 536 err3: 537 xpt_bus_deregister(cam_sim_path(ch->sim)); 538 err2: 539 cam_sim_free(ch->sim, /*free_devq*/TRUE); 540 err1: 541 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 542 err0: 543 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 544 mtx_unlock(&ch->mtx); 545 mtx_destroy(&ch->mtx); 546 return (error); 547 } 548 549 static int 550 siis_ch_detach(device_t dev) 551 { 552 struct siis_channel *ch = device_get_softc(dev); 553 554 led_destroy(ch->led); 555 mtx_lock(&ch->mtx); 556 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 557 xpt_free_path(ch->path); 558 xpt_bus_deregister(cam_sim_path(ch->sim)); 559 cam_sim_free(ch->sim, /*free_devq*/TRUE); 560 mtx_unlock(&ch->mtx); 561 562 bus_teardown_intr(dev, ch->r_irq, ch->ih); 563 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 564 565 siis_ch_deinit(dev); 566 siis_slotsfree(dev); 567 siis_dmafini(dev); 568 569 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 570 mtx_destroy(&ch->mtx); 571 return (0); 572 } 573 574 static int 575 siis_ch_init(device_t dev) 576 { 577 struct siis_channel *ch = device_get_softc(dev); 578 579 /* Get port out of reset state. */ 580 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 581 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 582 if (ch->pm_present) 583 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 584 else 585 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 586 /* Enable port interrupts */ 587 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 588 return (0); 589 } 590 591 static int 592 siis_ch_deinit(device_t dev) 593 { 594 struct siis_channel *ch = device_get_softc(dev); 595 596 /* Put port into reset state. */ 597 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 598 return (0); 599 } 600 601 static int 602 siis_ch_suspend(device_t dev) 603 { 604 struct siis_channel *ch = device_get_softc(dev); 605 606 mtx_lock(&ch->mtx); 607 xpt_freeze_simq(ch->sim, 1); 608 while (ch->oslots) 609 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 610 siis_ch_deinit(dev); 611 mtx_unlock(&ch->mtx); 612 return (0); 613 } 614 615 static int 616 siis_ch_resume(device_t dev) 617 { 618 struct siis_channel *ch = device_get_softc(dev); 619 620 mtx_lock(&ch->mtx); 621 siis_ch_init(dev); 622 siis_reset(dev); 623 xpt_release_simq(ch->sim, TRUE); 624 mtx_unlock(&ch->mtx); 625 return (0); 626 } 627 628 static device_method_t siisch_methods[] = { 629 DEVMETHOD(device_probe, siis_ch_probe), 630 DEVMETHOD(device_attach, siis_ch_attach), 631 DEVMETHOD(device_detach, siis_ch_detach), 632 DEVMETHOD(device_suspend, siis_ch_suspend), 633 DEVMETHOD(device_resume, siis_ch_resume), 634 { 0, 0 } 635 }; 636 637 static driver_t siisch_driver = { 638 "siisch", 639 siisch_methods, 640 sizeof(struct siis_channel) 641 }; 642 643 DRIVER_MODULE(siisch, siis, siisch_driver, 0, 0); 644 645 static void 646 siis_ch_led(void *priv, int onoff) 647 { 648 device_t dev; 649 struct siis_channel *ch; 650 651 dev = (device_t)priv; 652 ch = device_get_softc(dev); 653 654 if (onoff == 0) 655 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_LED_ON); 656 else 657 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_LED_ON); 658 } 659 660 struct siis_dc_cb_args { 661 bus_addr_t maddr; 662 int error; 663 }; 664 665 static void 666 siis_dmainit(device_t dev) 667 { 668 struct siis_channel *ch = device_get_softc(dev); 669 struct siis_dc_cb_args dcba; 670 671 /* Command area. */ 672 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 673 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 674 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 675 0, NULL, NULL, &ch->dma.work_tag)) 676 goto error; 677 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 678 &ch->dma.work_map)) 679 goto error; 680 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 681 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 682 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 683 goto error; 684 } 685 ch->dma.work_bus = dcba.maddr; 686 /* Data area. */ 687 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 688 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 689 NULL, NULL, 690 SIIS_SG_ENTRIES * PAGE_SIZE, SIIS_SG_ENTRIES, 0xFFFFFFFF, 691 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 692 goto error; 693 } 694 return; 695 696 error: 697 device_printf(dev, "WARNING - DMA initialization failed\n"); 698 siis_dmafini(dev); 699 } 700 701 static void 702 siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 703 { 704 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 705 706 if (!(dcba->error = error)) 707 dcba->maddr = segs[0].ds_addr; 708 } 709 710 static void 711 siis_dmafini(device_t dev) 712 { 713 struct siis_channel *ch = device_get_softc(dev); 714 715 if (ch->dma.data_tag) { 716 bus_dma_tag_destroy(ch->dma.data_tag); 717 ch->dma.data_tag = NULL; 718 } 719 if (ch->dma.work_bus) { 720 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 721 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 722 ch->dma.work_bus = 0; 723 ch->dma.work_map = NULL; 724 ch->dma.work = NULL; 725 } 726 if (ch->dma.work_tag) { 727 bus_dma_tag_destroy(ch->dma.work_tag); 728 ch->dma.work_tag = NULL; 729 } 730 } 731 732 static void 733 siis_slotsalloc(device_t dev) 734 { 735 struct siis_channel *ch = device_get_softc(dev); 736 int i; 737 738 /* Alloc and setup command/dma slots */ 739 bzero(ch->slot, sizeof(ch->slot)); 740 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 741 struct siis_slot *slot = &ch->slot[i]; 742 743 slot->dev = dev; 744 slot->slot = i; 745 slot->state = SIIS_SLOT_EMPTY; 746 slot->prb_offset = SIIS_PRB_SIZE * i; 747 slot->ccb = NULL; 748 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 749 750 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 751 device_printf(ch->dev, "FAILURE - create data_map\n"); 752 } 753 } 754 755 static void 756 siis_slotsfree(device_t dev) 757 { 758 struct siis_channel *ch = device_get_softc(dev); 759 int i; 760 761 /* Free all dma slots */ 762 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 763 struct siis_slot *slot = &ch->slot[i]; 764 765 callout_drain(&slot->timeout); 766 if (slot->dma.data_map) { 767 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 768 slot->dma.data_map = NULL; 769 } 770 } 771 } 772 773 static void 774 siis_notify_events(device_t dev) 775 { 776 struct siis_channel *ch = device_get_softc(dev); 777 struct cam_path *dpath; 778 u_int32_t status; 779 int i; 780 781 if (ch->quirks & SIIS_Q_SNTF) { 782 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 783 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 784 } else { 785 /* 786 * Without SNTF we have no idea which device sent notification. 787 * If PMP is connected, assume it, else - device. 788 */ 789 status = (ch->pm_present) ? 0x8000 : 0x0001; 790 } 791 if (bootverbose) 792 device_printf(dev, "SNTF 0x%04x\n", status); 793 for (i = 0; i < 16; i++) { 794 if ((status & (1 << i)) == 0) 795 continue; 796 if (xpt_create_path(&dpath, NULL, 797 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 798 xpt_async(AC_SCSI_AEN, dpath, NULL); 799 xpt_free_path(dpath); 800 } 801 } 802 803 } 804 805 static void 806 siis_phy_check_events(device_t dev) 807 { 808 struct siis_channel *ch = device_get_softc(dev); 809 810 /* If we have a connection event, deal with it */ 811 if (ch->pm_level == 0) { 812 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 813 union ccb *ccb; 814 815 if (bootverbose) { 816 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 817 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 818 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 819 device_printf(dev, "CONNECT requested\n"); 820 } else 821 device_printf(dev, "DISCONNECT requested\n"); 822 } 823 siis_reset(dev); 824 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 825 return; 826 if (xpt_create_path(&ccb->ccb_h.path, NULL, 827 cam_sim_path(ch->sim), 828 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 829 xpt_free_ccb(ccb); 830 return; 831 } 832 xpt_rescan(ccb); 833 } 834 } 835 836 static void 837 siis_ch_intr_locked(void *data) 838 { 839 device_t dev = (device_t)data; 840 struct siis_channel *ch = device_get_softc(dev); 841 842 mtx_lock(&ch->mtx); 843 siis_ch_intr(data); 844 mtx_unlock(&ch->mtx); 845 } 846 847 static void 848 siis_ch_intr(void *data) 849 { 850 device_t dev = (device_t)data; 851 struct siis_channel *ch = device_get_softc(dev); 852 uint32_t istatus, sstatus, ctx, estatus, ok; 853 enum siis_err_type et; 854 int i, ccs, port, tslots; 855 856 mtx_assert(&ch->mtx, MA_OWNED); 857 /* Read command statuses. */ 858 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 859 ok = ch->rslots & ~sstatus; 860 /* Complete all successful commands. */ 861 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 862 if ((ok >> i) & 1) 863 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 864 } 865 /* Do we have any other events? */ 866 if ((sstatus & SIIS_P_SS_ATTN) == 0) 867 return; 868 /* Read and clear interrupt statuses. */ 869 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 870 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 871 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 872 /* Process PHY events */ 873 if (istatus & SIIS_P_IX_PHYRDYCHG) 874 siis_phy_check_events(dev); 875 /* Process NOTIFY events */ 876 if (istatus & SIIS_P_IX_SDBN) 877 siis_notify_events(dev); 878 /* Process command errors */ 879 if (istatus & SIIS_P_IX_COMMERR) { 880 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 881 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 882 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 883 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 884 //device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 885 // __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 886 // ATA_INL(ch->r_mem, SIIS_P_SERR)); 887 888 if (!ch->recoverycmd && !ch->recovery) { 889 xpt_freeze_simq(ch->sim, ch->numrslots); 890 ch->recovery = 1; 891 } 892 if (ch->frozen) { 893 union ccb *fccb = ch->frozen; 894 ch->frozen = NULL; 895 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 896 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 897 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 898 xpt_freeze_devq(fccb->ccb_h.path, 1); 899 fccb->ccb_h.status |= CAM_DEV_QFRZN; 900 } 901 xpt_done(fccb); 902 } 903 if (estatus == SIIS_P_CMDERR_DEV || 904 estatus == SIIS_P_CMDERR_SDB || 905 estatus == SIIS_P_CMDERR_DATAFIS) { 906 tslots = ch->numtslots[port]; 907 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 908 /* XXX: requests in loading state. */ 909 if (((ch->rslots >> i) & 1) == 0) 910 continue; 911 if (ch->slot[i].ccb->ccb_h.target_id != port) 912 continue; 913 if (tslots == 0) { 914 /* Untagged operation. */ 915 if (i == ccs) 916 et = SIIS_ERR_TFE; 917 else 918 et = SIIS_ERR_INNOCENT; 919 } else { 920 /* Tagged operation. */ 921 et = SIIS_ERR_NCQ; 922 } 923 siis_end_transaction(&ch->slot[i], et); 924 } 925 /* 926 * We can't reinit port if there are some other 927 * commands active, use resume to complete them. 928 */ 929 if (ch->rslots != 0 && !ch->recoverycmd) 930 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 931 } else { 932 if (estatus == SIIS_P_CMDERR_SENDFIS || 933 estatus == SIIS_P_CMDERR_INCSTATE || 934 estatus == SIIS_P_CMDERR_PPE || 935 estatus == SIIS_P_CMDERR_SERVICE) { 936 et = SIIS_ERR_SATA; 937 } else 938 et = SIIS_ERR_INVALID; 939 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 940 /* XXX: requests in loading state. */ 941 if (((ch->rslots >> i) & 1) == 0) 942 continue; 943 siis_end_transaction(&ch->slot[i], et); 944 } 945 } 946 } 947 } 948 949 /* Must be called with channel locked. */ 950 static int 951 siis_check_collision(device_t dev, union ccb *ccb) 952 { 953 struct siis_channel *ch = device_get_softc(dev); 954 955 mtx_assert(&ch->mtx, MA_OWNED); 956 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 957 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 958 /* Tagged command while we have no supported tag free. */ 959 if (((~ch->oslots) & (0x7fffffff >> (31 - 960 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 961 return (1); 962 } 963 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 964 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 965 /* Atomic command while anything active. */ 966 if (ch->numrslots != 0) 967 return (1); 968 } 969 /* We have some atomic command running. */ 970 if (ch->aslots != 0) 971 return (1); 972 return (0); 973 } 974 975 /* Must be called with channel locked. */ 976 static void 977 siis_begin_transaction(device_t dev, union ccb *ccb) 978 { 979 struct siis_channel *ch = device_get_softc(dev); 980 struct siis_slot *slot; 981 int tag, tags; 982 983 mtx_assert(&ch->mtx, MA_OWNED); 984 /* Choose empty slot. */ 985 tags = SIIS_MAX_SLOTS; 986 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 987 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 988 tags = ch->curr[ccb->ccb_h.target_id].tags; 989 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 990 /* Occupy chosen slot. */ 991 slot = &ch->slot[tag]; 992 slot->ccb = ccb; 993 /* Update channel stats. */ 994 ch->oslots |= (1 << slot->slot); 995 ch->numrslots++; 996 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 997 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 998 ch->numtslots[ccb->ccb_h.target_id]++; 999 } 1000 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1001 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1002 ch->aslots |= (1 << slot->slot); 1003 slot->dma.nsegs = 0; 1004 /* If request moves data, setup and load SG list */ 1005 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1006 slot->state = SIIS_SLOT_LOADING; 1007 bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, 1008 ccb, siis_dmasetprd, slot, 0); 1009 } else 1010 siis_execute_transaction(slot); 1011 } 1012 1013 /* Locked by busdma engine. */ 1014 static void 1015 siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1016 { 1017 struct siis_slot *slot = arg; 1018 struct siis_channel *ch = device_get_softc(slot->dev); 1019 struct siis_cmd *ctp; 1020 struct siis_dma_prd *prd; 1021 int i; 1022 1023 mtx_assert(&ch->mtx, MA_OWNED); 1024 if (error) { 1025 device_printf(slot->dev, "DMA load error\n"); 1026 if (!ch->recoverycmd) 1027 xpt_freeze_simq(ch->sim, 1); 1028 siis_end_transaction(slot, SIIS_ERR_INVALID); 1029 return; 1030 } 1031 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 1032 slot->dma.nsegs = nsegs; 1033 if (nsegs != 0) { 1034 /* Get a piece of the workspace for this request */ 1035 ctp = (struct siis_cmd *)(ch->dma.work + slot->prb_offset); 1036 /* Fill S/G table */ 1037 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1038 prd = &ctp->u.ata.prd[0]; 1039 else 1040 prd = &ctp->u.atapi.prd[0]; 1041 for (i = 0; i < nsegs; i++) { 1042 prd[i].dba = htole64(segs[i].ds_addr); 1043 prd[i].dbc = htole32(segs[i].ds_len); 1044 prd[i].control = 0; 1045 } 1046 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1047 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1048 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1049 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1050 } 1051 siis_execute_transaction(slot); 1052 } 1053 1054 /* Must be called with channel locked. */ 1055 static void 1056 siis_execute_transaction(struct siis_slot *slot) 1057 { 1058 device_t dev = slot->dev; 1059 struct siis_channel *ch = device_get_softc(dev); 1060 struct siis_cmd *ctp; 1061 union ccb *ccb = slot->ccb; 1062 u_int64_t prb_bus; 1063 1064 mtx_assert(&ch->mtx, MA_OWNED); 1065 /* Get a piece of the workspace for this request */ 1066 ctp = (struct siis_cmd *)(ch->dma.work + slot->prb_offset); 1067 ctp->control = 0; 1068 ctp->protocol_override = 0; 1069 ctp->transfer_count = 0; 1070 /* Special handling for Soft Reset command. */ 1071 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1072 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1073 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1074 } else { 1075 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1076 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1077 ctp->protocol_override |= 1078 htole16(SIIS_PRB_PROTO_NCQ); 1079 } 1080 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1081 ctp->protocol_override |= 1082 htole16(SIIS_PRB_PROTO_READ); 1083 } else 1084 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1085 ctp->protocol_override |= 1086 htole16(SIIS_PRB_PROTO_WRITE); 1087 } 1088 } 1089 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1090 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1091 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1092 else 1093 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1094 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1095 } 1096 /* Special handling for Soft Reset command. */ 1097 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1098 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1099 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1100 /* Kick controller into sane state */ 1101 siis_portinit(dev); 1102 } 1103 /* Setup the FIS for this request */ 1104 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1105 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1106 if (!ch->recoverycmd) 1107 xpt_freeze_simq(ch->sim, 1); 1108 siis_end_transaction(slot, SIIS_ERR_INVALID); 1109 return; 1110 } 1111 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1112 BUS_DMASYNC_PREWRITE); 1113 /* Issue command to the controller. */ 1114 slot->state = SIIS_SLOT_RUNNING; 1115 ch->rslots |= (1 << slot->slot); 1116 prb_bus = ch->dma.work_bus + slot->prb_offset; 1117 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1118 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1119 /* Start command execution timeout */ 1120 callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0, 1121 siis_timeout, slot, 0); 1122 return; 1123 } 1124 1125 /* Must be called with channel locked. */ 1126 static void 1127 siis_process_timeout(device_t dev) 1128 { 1129 struct siis_channel *ch = device_get_softc(dev); 1130 int i; 1131 1132 mtx_assert(&ch->mtx, MA_OWNED); 1133 if (!ch->recoverycmd && !ch->recovery) { 1134 xpt_freeze_simq(ch->sim, ch->numrslots); 1135 ch->recovery = 1; 1136 } 1137 /* Handle the rest of commands. */ 1138 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1139 /* Do we have a running request on slot? */ 1140 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1141 continue; 1142 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1143 } 1144 } 1145 1146 /* Must be called with channel locked. */ 1147 static void 1148 siis_rearm_timeout(device_t dev) 1149 { 1150 struct siis_channel *ch = device_get_softc(dev); 1151 int i; 1152 1153 mtx_assert(&ch->mtx, MA_OWNED); 1154 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1155 struct siis_slot *slot = &ch->slot[i]; 1156 1157 /* Do we have a running request on slot? */ 1158 if (slot->state < SIIS_SLOT_RUNNING) 1159 continue; 1160 if ((ch->toslots & (1 << i)) == 0) 1161 continue; 1162 callout_reset_sbt(&slot->timeout, 1163 SBT_1MS * slot->ccb->ccb_h.timeout, 0, 1164 siis_timeout, slot, 0); 1165 } 1166 } 1167 1168 /* Locked by callout mechanism. */ 1169 static void 1170 siis_timeout(void *arg) 1171 { 1172 struct siis_slot *slot = arg; 1173 device_t dev = slot->dev; 1174 struct siis_channel *ch = device_get_softc(dev); 1175 union ccb *ccb = slot->ccb; 1176 1177 mtx_assert(&ch->mtx, MA_OWNED); 1178 /* Check for stale timeout. */ 1179 if (slot->state < SIIS_SLOT_RUNNING) 1180 return; 1181 1182 /* Handle soft-reset timeouts without doing hard-reset. */ 1183 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1184 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1185 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1186 xpt_freeze_simq(ch->sim, ch->numrslots); 1187 siis_end_transaction(slot, SIIS_ERR_TFE); 1188 return; 1189 } 1190 1191 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1192 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1193 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1194 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1195 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1196 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1197 1198 if (ch->toslots == 0) 1199 xpt_freeze_simq(ch->sim, 1); 1200 ch->toslots |= (1 << slot->slot); 1201 if ((ch->rslots & ~ch->toslots) == 0) 1202 siis_process_timeout(dev); 1203 else 1204 device_printf(dev, " ... waiting for slots %08x\n", 1205 ch->rslots & ~ch->toslots); 1206 } 1207 1208 /* Must be called with channel locked. */ 1209 static void 1210 siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1211 { 1212 device_t dev = slot->dev; 1213 struct siis_channel *ch = device_get_softc(dev); 1214 union ccb *ccb = slot->ccb; 1215 int lastto; 1216 1217 mtx_assert(&ch->mtx, MA_OWNED); 1218 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1219 BUS_DMASYNC_POSTWRITE); 1220 /* Read result registers to the result struct 1221 * May be incorrect if several commands finished same time, 1222 * so read only when sure or have to. 1223 */ 1224 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1225 struct ata_res *res = &ccb->ataio.res; 1226 if ((et == SIIS_ERR_TFE) || 1227 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1228 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1229 1230 res->status = ATA_INB(ch->r_mem, offs + 2); 1231 res->error = ATA_INB(ch->r_mem, offs + 3); 1232 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1233 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1234 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1235 res->device = ATA_INB(ch->r_mem, offs + 7); 1236 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1237 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1238 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1239 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1240 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1241 } else 1242 bzero(res, sizeof(*res)); 1243 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1244 ch->numrslots == 1) { 1245 ccb->ataio.resid = ccb->ataio.dxfer_len - 1246 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1247 } 1248 } else { 1249 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN && 1250 ch->numrslots == 1) { 1251 ccb->csio.resid = ccb->csio.dxfer_len - 1252 ATA_INL(ch->r_mem, SIIS_P_LRAM_SLOT(slot->slot) + 4); 1253 } 1254 } 1255 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1256 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1257 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1258 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1259 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1260 } 1261 /* Set proper result status. */ 1262 if (et != SIIS_ERR_NONE || ch->recovery) { 1263 ch->eslots |= (1 << slot->slot); 1264 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1265 } 1266 /* In case of error, freeze device for proper recovery. */ 1267 if (et != SIIS_ERR_NONE && (!ch->recoverycmd) && 1268 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1269 xpt_freeze_devq(ccb->ccb_h.path, 1); 1270 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1271 } 1272 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1273 switch (et) { 1274 case SIIS_ERR_NONE: 1275 ccb->ccb_h.status |= CAM_REQ_CMP; 1276 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1277 ccb->csio.scsi_status = SCSI_STATUS_OK; 1278 break; 1279 case SIIS_ERR_INVALID: 1280 ch->fatalerr = 1; 1281 ccb->ccb_h.status |= CAM_REQ_INVALID; 1282 break; 1283 case SIIS_ERR_INNOCENT: 1284 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1285 break; 1286 case SIIS_ERR_TFE: 1287 case SIIS_ERR_NCQ: 1288 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1289 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1290 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1291 } else { 1292 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1293 } 1294 break; 1295 case SIIS_ERR_SATA: 1296 ch->fatalerr = 1; 1297 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1298 break; 1299 case SIIS_ERR_TIMEOUT: 1300 ch->fatalerr = 1; 1301 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1302 break; 1303 default: 1304 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1305 } 1306 /* Free slot. */ 1307 ch->oslots &= ~(1 << slot->slot); 1308 ch->rslots &= ~(1 << slot->slot); 1309 ch->aslots &= ~(1 << slot->slot); 1310 slot->state = SIIS_SLOT_EMPTY; 1311 slot->ccb = NULL; 1312 /* Update channel stats. */ 1313 ch->numrslots--; 1314 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1315 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1316 ch->numtslots[ccb->ccb_h.target_id]--; 1317 } 1318 /* Cancel timeout state if request completed normally. */ 1319 if (et != SIIS_ERR_TIMEOUT) { 1320 lastto = (ch->toslots == (1 << slot->slot)); 1321 ch->toslots &= ~(1 << slot->slot); 1322 if (lastto) 1323 xpt_release_simq(ch->sim, TRUE); 1324 } 1325 /* If it was our READ LOG command - process it. */ 1326 if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 1327 siis_process_read_log(dev, ccb); 1328 /* If it was our REQUEST SENSE command - process it. */ 1329 } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 1330 siis_process_request_sense(dev, ccb); 1331 /* If it was NCQ or ATAPI command error, put result on hold. */ 1332 } else if (et == SIIS_ERR_NCQ || 1333 ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 1334 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 1335 ch->hold[slot->slot] = ccb; 1336 ch->numhslots++; 1337 } else 1338 xpt_done(ccb); 1339 /* If we have no other active commands, ... */ 1340 if (ch->rslots == 0) { 1341 /* if there were timeouts or fatal error - reset port. */ 1342 if (ch->toslots != 0 || ch->fatalerr) { 1343 siis_reset(dev); 1344 } else { 1345 /* if we have slots in error, we can reinit port. */ 1346 if (ch->eslots != 0) 1347 siis_portinit(dev); 1348 /* if there commands on hold, we can do recovery. */ 1349 if (!ch->recoverycmd && ch->numhslots) 1350 siis_issue_recovery(dev); 1351 } 1352 /* If all the reset of commands are in timeout - abort them. */ 1353 } else if ((ch->rslots & ~ch->toslots) == 0 && 1354 et != SIIS_ERR_TIMEOUT) 1355 siis_rearm_timeout(dev); 1356 /* Unfreeze frozen command. */ 1357 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1358 union ccb *fccb = ch->frozen; 1359 ch->frozen = NULL; 1360 siis_begin_transaction(dev, fccb); 1361 xpt_release_simq(ch->sim, TRUE); 1362 } 1363 } 1364 1365 static void 1366 siis_issue_recovery(device_t dev) 1367 { 1368 struct siis_channel *ch = device_get_softc(dev); 1369 union ccb *ccb; 1370 struct ccb_ataio *ataio; 1371 struct ccb_scsiio *csio; 1372 int i; 1373 1374 /* Find some held command. */ 1375 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1376 if (ch->hold[i]) 1377 break; 1378 } 1379 if (i == SIIS_MAX_SLOTS) 1380 return; 1381 ccb = xpt_alloc_ccb_nowait(); 1382 if (ccb == NULL) { 1383 device_printf(dev, "Unable to allocate recovery command\n"); 1384 completeall: 1385 /* We can't do anything -- complete held commands. */ 1386 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1387 if (ch->hold[i] == NULL) 1388 continue; 1389 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1390 ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 1391 xpt_done(ch->hold[i]); 1392 ch->hold[i] = NULL; 1393 ch->numhslots--; 1394 } 1395 siis_reset(dev); 1396 return; 1397 } 1398 xpt_setup_ccb(&ccb->ccb_h, ch->hold[i]->ccb_h.path, 1399 ch->hold[i]->ccb_h.pinfo.priority); 1400 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1401 /* READ LOG */ 1402 ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 1403 ccb->ccb_h.func_code = XPT_ATA_IO; 1404 ccb->ccb_h.flags = CAM_DIR_IN; 1405 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1406 ataio = &ccb->ataio; 1407 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1408 if (ataio->data_ptr == NULL) { 1409 xpt_free_ccb(ccb); 1410 device_printf(dev, 1411 "Unable to allocate memory for READ LOG command\n"); 1412 goto completeall; 1413 } 1414 ataio->dxfer_len = 512; 1415 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1416 ataio->cmd.flags = CAM_ATAIO_48BIT; 1417 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1418 ataio->cmd.sector_count = 1; 1419 ataio->cmd.sector_count_exp = 0; 1420 ataio->cmd.lba_low = 0x10; 1421 ataio->cmd.lba_mid = 0; 1422 ataio->cmd.lba_mid_exp = 0; 1423 } else { 1424 /* REQUEST SENSE */ 1425 ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 1426 ccb->ccb_h.recovery_slot = i; 1427 ccb->ccb_h.func_code = XPT_SCSI_IO; 1428 ccb->ccb_h.flags = CAM_DIR_IN; 1429 ccb->ccb_h.status = 0; 1430 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1431 csio = &ccb->csio; 1432 csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 1433 csio->dxfer_len = ch->hold[i]->csio.sense_len; 1434 csio->cdb_len = 6; 1435 bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 1436 csio->cdb_io.cdb_bytes[0] = 0x03; 1437 csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 1438 } 1439 ch->recoverycmd = 1; 1440 siis_begin_transaction(dev, ccb); 1441 } 1442 1443 static void 1444 siis_process_read_log(device_t dev, union ccb *ccb) 1445 { 1446 struct siis_channel *ch = device_get_softc(dev); 1447 uint8_t *data; 1448 struct ata_res *res; 1449 int i; 1450 1451 ch->recoverycmd = 0; 1452 data = ccb->ataio.data_ptr; 1453 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1454 (data[0] & 0x80) == 0) { 1455 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1456 if (!ch->hold[i]) 1457 continue; 1458 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1459 continue; 1460 if ((data[0] & 0x1F) == i) { 1461 res = &ch->hold[i]->ataio.res; 1462 res->status = data[2]; 1463 res->error = data[3]; 1464 res->lba_low = data[4]; 1465 res->lba_mid = data[5]; 1466 res->lba_high = data[6]; 1467 res->device = data[7]; 1468 res->lba_low_exp = data[8]; 1469 res->lba_mid_exp = data[9]; 1470 res->lba_high_exp = data[10]; 1471 res->sector_count = data[12]; 1472 res->sector_count_exp = data[13]; 1473 } else { 1474 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1475 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1476 } 1477 xpt_done(ch->hold[i]); 1478 ch->hold[i] = NULL; 1479 ch->numhslots--; 1480 } 1481 } else { 1482 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1483 device_printf(dev, "Error while READ LOG EXT\n"); 1484 else if ((data[0] & 0x80) == 0) { 1485 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1486 } 1487 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1488 if (!ch->hold[i]) 1489 continue; 1490 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1491 continue; 1492 xpt_done(ch->hold[i]); 1493 ch->hold[i] = NULL; 1494 ch->numhslots--; 1495 } 1496 } 1497 free(ccb->ataio.data_ptr, M_SIIS); 1498 xpt_free_ccb(ccb); 1499 } 1500 1501 static void 1502 siis_process_request_sense(device_t dev, union ccb *ccb) 1503 { 1504 struct siis_channel *ch = device_get_softc(dev); 1505 int i; 1506 1507 ch->recoverycmd = 0; 1508 1509 i = ccb->ccb_h.recovery_slot; 1510 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 1511 ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 1512 } else { 1513 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1514 ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 1515 } 1516 xpt_done(ch->hold[i]); 1517 ch->hold[i] = NULL; 1518 ch->numhslots--; 1519 xpt_free_ccb(ccb); 1520 } 1521 1522 static void 1523 siis_portinit(device_t dev) 1524 { 1525 struct siis_channel *ch = device_get_softc(dev); 1526 int i; 1527 1528 ch->eslots = 0; 1529 ch->recovery = 0; 1530 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1531 for (i = 0; i < 16; i++) { 1532 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1533 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1534 } 1535 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1536 siis_wait_ready(dev, 1000); 1537 } 1538 1539 static int 1540 siis_devreset(device_t dev) 1541 { 1542 struct siis_channel *ch = device_get_softc(dev); 1543 int timeout = 0; 1544 uint32_t val; 1545 1546 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1547 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1548 SIIS_P_CTL_DEV_RESET) != 0) { 1549 DELAY(100); 1550 if (timeout++ > 1000) { 1551 device_printf(dev, "device reset stuck " 1552 "(timeout 100ms) status = %08x\n", val); 1553 return (EBUSY); 1554 } 1555 } 1556 return (0); 1557 } 1558 1559 static int 1560 siis_wait_ready(device_t dev, int t) 1561 { 1562 struct siis_channel *ch = device_get_softc(dev); 1563 int timeout = 0; 1564 uint32_t val; 1565 1566 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1567 SIIS_P_CTL_READY) == 0) { 1568 DELAY(1000); 1569 if (timeout++ > t) { 1570 device_printf(dev, "port is not ready (timeout %dms) " 1571 "status = %08x\n", t, val); 1572 return (EBUSY); 1573 } 1574 } 1575 return (0); 1576 } 1577 1578 static void 1579 siis_reset(device_t dev) 1580 { 1581 struct siis_channel *ch = device_get_softc(dev); 1582 int i, retry = 0, sata_rev; 1583 uint32_t val; 1584 1585 xpt_freeze_simq(ch->sim, 1); 1586 if (bootverbose) 1587 device_printf(dev, "SIIS reset...\n"); 1588 if (!ch->recoverycmd && !ch->recovery) 1589 xpt_freeze_simq(ch->sim, ch->numrslots); 1590 /* Requeue frozen command. */ 1591 if (ch->frozen) { 1592 union ccb *fccb = ch->frozen; 1593 ch->frozen = NULL; 1594 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1595 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1596 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1597 xpt_freeze_devq(fccb->ccb_h.path, 1); 1598 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1599 } 1600 xpt_done(fccb); 1601 } 1602 /* Requeue all running commands. */ 1603 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1604 /* Do we have a running request on slot? */ 1605 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1606 continue; 1607 /* XXX; Commands in loading state. */ 1608 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1609 } 1610 /* Finish all held commands as-is. */ 1611 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1612 if (!ch->hold[i]) 1613 continue; 1614 xpt_done(ch->hold[i]); 1615 ch->hold[i] = NULL; 1616 ch->numhslots--; 1617 } 1618 if (ch->toslots != 0) 1619 xpt_release_simq(ch->sim, TRUE); 1620 ch->eslots = 0; 1621 ch->recovery = 0; 1622 ch->toslots = 0; 1623 ch->fatalerr = 0; 1624 /* Disable port interrupts */ 1625 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1626 /* Set speed limit. */ 1627 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1628 if (sata_rev == 1) 1629 val = ATA_SC_SPD_SPEED_GEN1; 1630 else if (sata_rev == 2) 1631 val = ATA_SC_SPD_SPEED_GEN2; 1632 else if (sata_rev == 3) 1633 val = ATA_SC_SPD_SPEED_GEN3; 1634 else 1635 val = 0; 1636 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1637 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1638 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1639 retry: 1640 siis_devreset(dev); 1641 /* Reset and reconnect PHY, */ 1642 if (!siis_sata_connect(ch)) { 1643 ch->devices = 0; 1644 /* Enable port interrupts */ 1645 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1646 if (bootverbose) 1647 device_printf(dev, 1648 "SIIS reset done: phy reset found no device\n"); 1649 /* Tell the XPT about the event */ 1650 xpt_async(AC_BUS_RESET, ch->path, NULL); 1651 xpt_release_simq(ch->sim, TRUE); 1652 return; 1653 } 1654 /* Wait for port ready status. */ 1655 if (siis_wait_ready(dev, 1000)) { 1656 device_printf(dev, "port ready timeout\n"); 1657 if (!retry) { 1658 device_printf(dev, "trying full port reset ...\n"); 1659 /* Get port to the reset state. */ 1660 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1661 DELAY(10000); 1662 /* Get port out of reset state. */ 1663 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1664 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1665 if (ch->pm_present) 1666 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1667 else 1668 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1669 siis_wait_ready(dev, 5000); 1670 retry = 1; 1671 goto retry; 1672 } 1673 } 1674 ch->devices = 1; 1675 /* Enable port interrupts */ 1676 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1677 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1678 if (bootverbose) 1679 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1680 /* Tell the XPT about the event */ 1681 xpt_async(AC_BUS_RESET, ch->path, NULL); 1682 xpt_release_simq(ch->sim, TRUE); 1683 } 1684 1685 static int 1686 siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1687 { 1688 struct siis_channel *ch = device_get_softc(dev); 1689 u_int8_t *fis = &ctp->fis[0]; 1690 1691 bzero(fis, 24); 1692 fis[0] = 0x27; /* host to device */ 1693 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1694 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1695 fis[1] |= 0x80; 1696 fis[2] = ATA_PACKET_CMD; 1697 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1698 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1699 fis[3] = ATA_F_DMA; 1700 else { 1701 fis[5] = ccb->csio.dxfer_len; 1702 fis[6] = ccb->csio.dxfer_len >> 8; 1703 } 1704 fis[7] = ATA_D_LBA; 1705 fis[15] = ATA_A_4BIT; 1706 bzero(ctp->u.atapi.ccb, 16); 1707 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1708 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1709 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1710 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1711 fis[1] |= 0x80; 1712 fis[2] = ccb->ataio.cmd.command; 1713 fis[3] = ccb->ataio.cmd.features; 1714 fis[4] = ccb->ataio.cmd.lba_low; 1715 fis[5] = ccb->ataio.cmd.lba_mid; 1716 fis[6] = ccb->ataio.cmd.lba_high; 1717 fis[7] = ccb->ataio.cmd.device; 1718 fis[8] = ccb->ataio.cmd.lba_low_exp; 1719 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1720 fis[10] = ccb->ataio.cmd.lba_high_exp; 1721 fis[11] = ccb->ataio.cmd.features_exp; 1722 fis[12] = ccb->ataio.cmd.sector_count; 1723 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1724 fis[12] &= 0x07; 1725 fis[12] |= tag << 3; 1726 } 1727 fis[13] = ccb->ataio.cmd.sector_count_exp; 1728 if (ccb->ataio.ata_flags & ATA_FLAG_ICC) 1729 fis[14] = ccb->ataio.icc; 1730 fis[15] = ATA_A_4BIT; 1731 if (ccb->ataio.ata_flags & ATA_FLAG_AUX) { 1732 fis[16] = ccb->ataio.aux & 0xff; 1733 fis[17] = (ccb->ataio.aux >> 8) & 0xff; 1734 fis[18] = (ccb->ataio.aux >> 16) & 0xff; 1735 fis[19] = (ccb->ataio.aux >> 24) & 0xff; 1736 } 1737 } else { 1738 /* Soft reset. */ 1739 } 1740 return (20); 1741 } 1742 1743 static int 1744 siis_sata_connect(struct siis_channel *ch) 1745 { 1746 u_int32_t status; 1747 int timeout, found = 0; 1748 1749 /* Wait up to 100ms for "connect well" */ 1750 for (timeout = 0; timeout < 1000 ; timeout++) { 1751 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1752 if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1753 found = 1; 1754 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1755 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1756 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1757 break; 1758 if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 1759 if (bootverbose) { 1760 device_printf(ch->dev, "SATA offline status=%08x\n", 1761 status); 1762 } 1763 return (0); 1764 } 1765 if (found == 0 && timeout >= 100) 1766 break; 1767 DELAY(100); 1768 } 1769 if (timeout >= 1000 || !found) { 1770 if (bootverbose) { 1771 device_printf(ch->dev, 1772 "SATA connect timeout time=%dus status=%08x\n", 1773 timeout * 100, status); 1774 } 1775 return (0); 1776 } 1777 if (bootverbose) { 1778 device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 1779 timeout * 100, status); 1780 } 1781 /* Clear SATA error register */ 1782 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1783 return (1); 1784 } 1785 1786 static int 1787 siis_check_ids(device_t dev, union ccb *ccb) 1788 { 1789 1790 if (ccb->ccb_h.target_id > 15) { 1791 ccb->ccb_h.status = CAM_TID_INVALID; 1792 xpt_done(ccb); 1793 return (-1); 1794 } 1795 if (ccb->ccb_h.target_lun != 0) { 1796 ccb->ccb_h.status = CAM_LUN_INVALID; 1797 xpt_done(ccb); 1798 return (-1); 1799 } 1800 return (0); 1801 } 1802 1803 static void 1804 siisaction(struct cam_sim *sim, union ccb *ccb) 1805 { 1806 device_t dev, parent; 1807 struct siis_channel *ch; 1808 1809 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1810 ccb->ccb_h.func_code)); 1811 1812 ch = (struct siis_channel *)cam_sim_softc(sim); 1813 dev = ch->dev; 1814 mtx_assert(&ch->mtx, MA_OWNED); 1815 switch (ccb->ccb_h.func_code) { 1816 /* Common cases first */ 1817 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1818 case XPT_SCSI_IO: 1819 if (siis_check_ids(dev, ccb)) 1820 return; 1821 if (ch->devices == 0 || 1822 (ch->pm_present == 0 && 1823 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1824 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1825 break; 1826 } 1827 ccb->ccb_h.recovery_type = RECOVERY_NONE; 1828 /* Check for command collision. */ 1829 if (siis_check_collision(dev, ccb)) { 1830 /* Freeze command. */ 1831 ch->frozen = ccb; 1832 /* We have only one frozen slot, so freeze simq also. */ 1833 xpt_freeze_simq(ch->sim, 1); 1834 return; 1835 } 1836 siis_begin_transaction(dev, ccb); 1837 return; 1838 case XPT_ABORT: /* Abort the specified CCB */ 1839 /* XXX Implement */ 1840 ccb->ccb_h.status = CAM_REQ_INVALID; 1841 break; 1842 case XPT_SET_TRAN_SETTINGS: 1843 { 1844 struct ccb_trans_settings *cts = &ccb->cts; 1845 struct siis_device *d; 1846 1847 if (siis_check_ids(dev, ccb)) 1848 return; 1849 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1850 d = &ch->curr[ccb->ccb_h.target_id]; 1851 else 1852 d = &ch->user[ccb->ccb_h.target_id]; 1853 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1854 d->revision = cts->xport_specific.sata.revision; 1855 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1856 d->mode = cts->xport_specific.sata.mode; 1857 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1858 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1859 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1860 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1861 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1862 ch->pm_present = cts->xport_specific.sata.pm_present; 1863 if (ch->pm_present) 1864 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1865 else 1866 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1867 } 1868 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1869 d->atapi = cts->xport_specific.sata.atapi; 1870 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1871 d->caps = cts->xport_specific.sata.caps; 1872 ccb->ccb_h.status = CAM_REQ_CMP; 1873 break; 1874 } 1875 case XPT_GET_TRAN_SETTINGS: 1876 /* Get default/user set transfer settings for the target */ 1877 { 1878 struct ccb_trans_settings *cts = &ccb->cts; 1879 struct siis_device *d; 1880 uint32_t status; 1881 1882 if (siis_check_ids(dev, ccb)) 1883 return; 1884 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1885 d = &ch->curr[ccb->ccb_h.target_id]; 1886 else 1887 d = &ch->user[ccb->ccb_h.target_id]; 1888 cts->protocol = PROTO_UNSPECIFIED; 1889 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1890 cts->transport = XPORT_SATA; 1891 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1892 cts->proto_specific.valid = 0; 1893 cts->xport_specific.sata.valid = 0; 1894 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1895 (ccb->ccb_h.target_id == 15 || 1896 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1897 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1898 if (status & 0x0f0) { 1899 cts->xport_specific.sata.revision = 1900 (status & 0x0f0) >> 4; 1901 cts->xport_specific.sata.valid |= 1902 CTS_SATA_VALID_REVISION; 1903 } 1904 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1905 if (ch->pm_level) 1906 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1907 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 1908 cts->xport_specific.sata.caps &= 1909 ch->user[ccb->ccb_h.target_id].caps; 1910 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1911 } else { 1912 cts->xport_specific.sata.revision = d->revision; 1913 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1914 cts->xport_specific.sata.caps = d->caps; 1915 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1916 (ch->quirks & SIIS_Q_SNTF) == 0) 1917 cts->xport_specific.sata.caps &= ~CTS_SATA_CAPS_H_AN; 1918 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1919 } 1920 cts->xport_specific.sata.mode = d->mode; 1921 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1922 cts->xport_specific.sata.bytecount = d->bytecount; 1923 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1924 cts->xport_specific.sata.pm_present = ch->pm_present; 1925 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1926 cts->xport_specific.sata.tags = d->tags; 1927 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1928 cts->xport_specific.sata.atapi = d->atapi; 1929 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1930 ccb->ccb_h.status = CAM_REQ_CMP; 1931 break; 1932 } 1933 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1934 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1935 siis_reset(dev); 1936 ccb->ccb_h.status = CAM_REQ_CMP; 1937 break; 1938 case XPT_TERM_IO: /* Terminate the I/O process */ 1939 /* XXX Implement */ 1940 ccb->ccb_h.status = CAM_REQ_INVALID; 1941 break; 1942 case XPT_PATH_INQ: /* Path routing inquiry */ 1943 { 1944 struct ccb_pathinq *cpi = &ccb->cpi; 1945 1946 parent = device_get_parent(dev); 1947 cpi->version_num = 1; /* XXX??? */ 1948 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1949 cpi->hba_inquiry |= PI_SATAPM; 1950 cpi->target_sprt = 0; 1951 cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED | PIM_ATA_EXT; 1952 cpi->hba_eng_cnt = 0; 1953 cpi->max_target = 15; 1954 cpi->max_lun = 0; 1955 cpi->initiator_id = 0; 1956 cpi->bus_id = cam_sim_bus(sim); 1957 cpi->base_transfer_speed = 150000; 1958 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1959 strlcpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1960 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1961 cpi->unit_number = cam_sim_unit(sim); 1962 cpi->transport = XPORT_SATA; 1963 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1964 cpi->protocol = PROTO_ATA; 1965 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1966 cpi->maxio = maxphys; 1967 cpi->hba_vendor = pci_get_vendor(parent); 1968 cpi->hba_device = pci_get_device(parent); 1969 cpi->hba_subvendor = pci_get_subvendor(parent); 1970 cpi->hba_subdevice = pci_get_subdevice(parent); 1971 cpi->ccb_h.status = CAM_REQ_CMP; 1972 break; 1973 } 1974 default: 1975 ccb->ccb_h.status = CAM_REQ_INVALID; 1976 break; 1977 } 1978 xpt_done(ccb); 1979 } 1980 1981 static void 1982 siispoll(struct cam_sim *sim) 1983 { 1984 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1985 1986 siis_ch_intr(ch->dev); 1987 } 1988