1 /*- 2 * Copyright (c) 2010-2011 Solarflare Communications, Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* Theory of operation: 31 * 32 * Tx queues allocation and mapping 33 * 34 * One Tx queue with enabled checksum offload is allocated per Rx channel 35 * (event queue). Also 2 Tx queues (one without checksum offload and one 36 * with IP checksum offload only) are allocated and bound to event queue 0. 37 * sfxge_txq_type is used as Tx queue label. 38 * 39 * So, event queue plus label mapping to Tx queue index is: 40 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES) 41 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1 42 * See sfxge_get_txq_by_label() sfxge_ev.c 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD$"); 47 48 #include <sys/types.h> 49 #include <sys/mbuf.h> 50 #include <sys/smp.h> 51 #include <sys/socket.h> 52 #include <sys/sysctl.h> 53 #include <sys/syslog.h> 54 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if.h> 58 #include <net/if_vlan_var.h> 59 60 #include <netinet/in.h> 61 #include <netinet/ip.h> 62 #include <netinet/ip6.h> 63 #include <netinet/tcp.h> 64 65 #include "common/efx.h" 66 67 #include "sfxge.h" 68 #include "sfxge_tx.h" 69 70 /* 71 * Estimate maximum number of Tx descriptors required for TSO packet. 72 * With minimum MSS and maximum mbuf length we might need more (even 73 * than a ring-ful of descriptors), but this should not happen in 74 * practice except due to deliberate attack. In that case we will 75 * truncate the output at a packet boundary. 76 */ 77 #define SFXGE_TSO_MAX_DESC \ 78 (SFXGE_TSO_MAX_SEGS * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1) 79 80 /* 81 * Set the block level to ensure there is space to generate a 82 * large number of descriptors for TSO. 83 */ 84 #define SFXGE_TXQ_BLOCK_LEVEL(_entries) \ 85 (EFX_TXQ_LIMIT(_entries) - SFXGE_TSO_MAX_DESC) 86 87 #ifdef SFXGE_HAVE_MQ 88 89 #define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max) 90 static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT; 91 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max); 92 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN, 93 &sfxge_tx_dpl_get_max, 0, 94 "Maximum number of any packets in deferred packet get-list"); 95 96 #define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \ 97 SFXGE_PARAM(tx_dpl_get_non_tcp_max) 98 static int sfxge_tx_dpl_get_non_tcp_max = 99 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT; 100 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max); 101 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN, 102 &sfxge_tx_dpl_get_non_tcp_max, 0, 103 "Maximum number of non-TCP packets in deferred packet get-list"); 104 105 #define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max) 106 static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT; 107 TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max); 108 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN, 109 &sfxge_tx_dpl_put_max, 0, 110 "Maximum number of any packets in deferred packet put-list"); 111 112 #endif 113 114 115 /* Forward declarations. */ 116 static void sfxge_tx_qdpl_service(struct sfxge_txq *txq); 117 static void sfxge_tx_qlist_post(struct sfxge_txq *txq); 118 static void sfxge_tx_qunblock(struct sfxge_txq *txq); 119 static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 120 const bus_dma_segment_t *dma_seg, int n_dma_seg); 121 122 void 123 sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq) 124 { 125 unsigned int completed; 126 127 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 128 129 completed = txq->completed; 130 while (completed != txq->pending) { 131 struct sfxge_tx_mapping *stmp; 132 unsigned int id; 133 134 id = completed++ & txq->ptr_mask; 135 136 stmp = &txq->stmp[id]; 137 if (stmp->flags & TX_BUF_UNMAP) { 138 bus_dmamap_unload(txq->packet_dma_tag, stmp->map); 139 if (stmp->flags & TX_BUF_MBUF) { 140 struct mbuf *m = stmp->u.mbuf; 141 do 142 m = m_free(m); 143 while (m != NULL); 144 } else { 145 free(stmp->u.heap_buf, M_SFXGE); 146 } 147 stmp->flags = 0; 148 } 149 } 150 txq->completed = completed; 151 152 /* Check whether we need to unblock the queue. */ 153 mb(); 154 if (txq->blocked) { 155 unsigned int level; 156 157 level = txq->added - txq->completed; 158 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) 159 sfxge_tx_qunblock(txq); 160 } 161 } 162 163 #ifdef SFXGE_HAVE_MQ 164 165 static unsigned int 166 sfxge_is_mbuf_non_tcp(struct mbuf *mbuf) 167 { 168 /* Absense of TCP checksum flags does not mean that it is non-TCP 169 * but it should be true if user wants to achieve high throughput. 170 */ 171 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP))); 172 } 173 174 /* 175 * Reorder the put list and append it to the get list. 176 */ 177 static void 178 sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq) 179 { 180 struct sfxge_tx_dpl *stdp; 181 struct mbuf *mbuf, *get_next, **get_tailp; 182 volatile uintptr_t *putp; 183 uintptr_t put; 184 unsigned int count; 185 unsigned int non_tcp_count; 186 187 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 188 189 stdp = &txq->dpl; 190 191 /* Acquire the put list. */ 192 putp = &stdp->std_put; 193 put = atomic_readandclear_ptr(putp); 194 mbuf = (void *)put; 195 196 if (mbuf == NULL) 197 return; 198 199 /* Reverse the put list. */ 200 get_tailp = &mbuf->m_nextpkt; 201 get_next = NULL; 202 203 count = 0; 204 non_tcp_count = 0; 205 do { 206 struct mbuf *put_next; 207 208 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf); 209 put_next = mbuf->m_nextpkt; 210 mbuf->m_nextpkt = get_next; 211 get_next = mbuf; 212 mbuf = put_next; 213 214 count++; 215 } while (mbuf != NULL); 216 217 if (count > stdp->std_put_hiwat) 218 stdp->std_put_hiwat = count; 219 220 /* Append the reversed put list to the get list. */ 221 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL")); 222 *stdp->std_getp = get_next; 223 stdp->std_getp = get_tailp; 224 stdp->std_get_count += count; 225 stdp->std_get_non_tcp_count += non_tcp_count; 226 } 227 228 #endif /* SFXGE_HAVE_MQ */ 229 230 static void 231 sfxge_tx_qreap(struct sfxge_txq *txq) 232 { 233 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 234 235 txq->reaped = txq->completed; 236 } 237 238 static void 239 sfxge_tx_qlist_post(struct sfxge_txq *txq) 240 { 241 unsigned int old_added; 242 unsigned int level; 243 int rc; 244 245 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 246 247 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0")); 248 KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC, 249 ("txq->n_pend_desc too large")); 250 KASSERT(!txq->blocked, ("txq->blocked")); 251 252 old_added = txq->added; 253 254 /* Post the fragment list. */ 255 rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc, 256 txq->reaped, &txq->added); 257 KASSERT(rc == 0, ("efx_tx_qpost() failed")); 258 259 /* If efx_tx_qpost() had to refragment, our information about 260 * buffers to free may be associated with the wrong 261 * descriptors. 262 */ 263 KASSERT(txq->added - old_added == txq->n_pend_desc, 264 ("efx_tx_qpost() refragmented descriptors")); 265 266 level = txq->added - txq->reaped; 267 KASSERT(level <= txq->entries, ("overfilled TX queue")); 268 269 /* Clear the fragment list. */ 270 txq->n_pend_desc = 0; 271 272 /* Have we reached the block level? */ 273 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) 274 return; 275 276 /* Reap, and check again */ 277 sfxge_tx_qreap(txq); 278 level = txq->added - txq->reaped; 279 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) 280 return; 281 282 txq->blocked = 1; 283 284 /* 285 * Avoid a race with completion interrupt handling that could leave 286 * the queue blocked. 287 */ 288 mb(); 289 sfxge_tx_qreap(txq); 290 level = txq->added - txq->reaped; 291 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) { 292 mb(); 293 txq->blocked = 0; 294 } 295 } 296 297 static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf) 298 { 299 bus_dmamap_t *used_map; 300 bus_dmamap_t map; 301 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG]; 302 unsigned int id; 303 struct sfxge_tx_mapping *stmp; 304 efx_buffer_t *desc; 305 int n_dma_seg; 306 int rc; 307 int i; 308 309 KASSERT(!txq->blocked, ("txq->blocked")); 310 311 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) 312 prefetch_read_many(mbuf->m_data); 313 314 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) { 315 rc = EINTR; 316 goto reject; 317 } 318 319 /* Load the packet for DMA. */ 320 id = txq->added & txq->ptr_mask; 321 stmp = &txq->stmp[id]; 322 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map, 323 mbuf, dma_seg, &n_dma_seg, 0); 324 if (rc == EFBIG) { 325 /* Try again. */ 326 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT, 327 SFXGE_TX_MAPPING_MAX_SEG); 328 if (new_mbuf == NULL) 329 goto reject; 330 ++txq->collapses; 331 mbuf = new_mbuf; 332 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, 333 stmp->map, mbuf, 334 dma_seg, &n_dma_seg, 0); 335 } 336 if (rc != 0) 337 goto reject; 338 339 /* Make the packet visible to the hardware. */ 340 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE); 341 342 used_map = &stmp->map; 343 344 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) { 345 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg); 346 if (rc < 0) 347 goto reject_mapped; 348 stmp = &txq->stmp[rc]; 349 } else { 350 /* Add the mapping to the fragment list, and set flags 351 * for the buffer. 352 */ 353 i = 0; 354 for (;;) { 355 desc = &txq->pend_desc[i]; 356 desc->eb_addr = dma_seg[i].ds_addr; 357 desc->eb_size = dma_seg[i].ds_len; 358 if (i == n_dma_seg - 1) { 359 desc->eb_eop = 1; 360 break; 361 } 362 desc->eb_eop = 0; 363 i++; 364 365 stmp->flags = 0; 366 if (__predict_false(stmp == 367 &txq->stmp[txq->ptr_mask])) 368 stmp = &txq->stmp[0]; 369 else 370 stmp++; 371 } 372 txq->n_pend_desc = n_dma_seg; 373 } 374 375 /* 376 * If the mapping required more than one descriptor 377 * then we need to associate the DMA map with the last 378 * descriptor, not the first. 379 */ 380 if (used_map != &stmp->map) { 381 map = stmp->map; 382 stmp->map = *used_map; 383 *used_map = map; 384 } 385 386 stmp->u.mbuf = mbuf; 387 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF; 388 389 /* Post the fragment list. */ 390 sfxge_tx_qlist_post(txq); 391 392 return (0); 393 394 reject_mapped: 395 bus_dmamap_unload(txq->packet_dma_tag, *used_map); 396 reject: 397 /* Drop the packet on the floor. */ 398 m_freem(mbuf); 399 ++txq->drops; 400 401 return (rc); 402 } 403 404 #ifdef SFXGE_HAVE_MQ 405 406 /* 407 * Drain the deferred packet list into the transmit queue. 408 */ 409 static void 410 sfxge_tx_qdpl_drain(struct sfxge_txq *txq) 411 { 412 struct sfxge_softc *sc; 413 struct sfxge_tx_dpl *stdp; 414 struct mbuf *mbuf, *next; 415 unsigned int count; 416 unsigned int non_tcp_count; 417 unsigned int pushed; 418 int rc; 419 420 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 421 422 sc = txq->sc; 423 stdp = &txq->dpl; 424 pushed = txq->added; 425 426 prefetch_read_many(sc->enp); 427 prefetch_read_many(txq->common); 428 429 mbuf = stdp->std_get; 430 count = stdp->std_get_count; 431 non_tcp_count = stdp->std_get_non_tcp_count; 432 433 if (count > stdp->std_get_hiwat) 434 stdp->std_get_hiwat = count; 435 436 while (count != 0) { 437 KASSERT(mbuf != NULL, ("mbuf == NULL")); 438 439 next = mbuf->m_nextpkt; 440 mbuf->m_nextpkt = NULL; 441 442 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */ 443 444 if (next != NULL) 445 prefetch_read_many(next); 446 447 rc = sfxge_tx_queue_mbuf(txq, mbuf); 448 --count; 449 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf); 450 mbuf = next; 451 if (rc != 0) 452 continue; 453 454 if (txq->blocked) 455 break; 456 457 /* Push the fragments to the hardware in batches. */ 458 if (txq->added - pushed >= SFXGE_TX_BATCH) { 459 efx_tx_qpush(txq->common, txq->added); 460 pushed = txq->added; 461 } 462 } 463 464 if (count == 0) { 465 KASSERT(mbuf == NULL, ("mbuf != NULL")); 466 KASSERT(non_tcp_count == 0, 467 ("inconsistent TCP/non-TCP detection")); 468 stdp->std_get = NULL; 469 stdp->std_get_count = 0; 470 stdp->std_get_non_tcp_count = 0; 471 stdp->std_getp = &stdp->std_get; 472 } else { 473 stdp->std_get = mbuf; 474 stdp->std_get_count = count; 475 stdp->std_get_non_tcp_count = non_tcp_count; 476 } 477 478 if (txq->added != pushed) 479 efx_tx_qpush(txq->common, txq->added); 480 481 KASSERT(txq->blocked || stdp->std_get_count == 0, 482 ("queue unblocked but count is non-zero")); 483 } 484 485 #define SFXGE_TX_QDPL_PENDING(_txq) \ 486 ((_txq)->dpl.std_put != 0) 487 488 /* 489 * Service the deferred packet list. 490 * 491 * NOTE: drops the txq mutex! 492 */ 493 static void 494 sfxge_tx_qdpl_service(struct sfxge_txq *txq) 495 { 496 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 497 498 do { 499 if (SFXGE_TX_QDPL_PENDING(txq)) 500 sfxge_tx_qdpl_swizzle(txq); 501 502 if (!txq->blocked) 503 sfxge_tx_qdpl_drain(txq); 504 505 SFXGE_TXQ_UNLOCK(txq); 506 } while (SFXGE_TX_QDPL_PENDING(txq) && 507 SFXGE_TXQ_TRYLOCK(txq)); 508 } 509 510 /* 511 * Put a packet on the deferred packet list. 512 * 513 * If we are called with the txq lock held, we put the packet on the "get 514 * list", otherwise we atomically push it on the "put list". The swizzle 515 * function takes care of ordering. 516 * 517 * The length of the put list is bounded by SFXGE_TX_MAX_DEFERRED. We 518 * overload the csum_data field in the mbuf to keep track of this length 519 * because there is no cheap alternative to avoid races. 520 */ 521 static int 522 sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked) 523 { 524 struct sfxge_tx_dpl *stdp; 525 526 stdp = &txq->dpl; 527 528 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); 529 530 if (locked) { 531 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 532 533 sfxge_tx_qdpl_swizzle(txq); 534 535 if (stdp->std_get_count >= stdp->std_get_max) { 536 txq->get_overflow++; 537 return (ENOBUFS); 538 } 539 if (sfxge_is_mbuf_non_tcp(mbuf)) { 540 if (stdp->std_get_non_tcp_count >= 541 stdp->std_get_non_tcp_max) { 542 txq->get_non_tcp_overflow++; 543 return (ENOBUFS); 544 } 545 stdp->std_get_non_tcp_count++; 546 } 547 548 *(stdp->std_getp) = mbuf; 549 stdp->std_getp = &mbuf->m_nextpkt; 550 stdp->std_get_count++; 551 } else { 552 volatile uintptr_t *putp; 553 uintptr_t old; 554 uintptr_t new; 555 unsigned old_len; 556 557 putp = &stdp->std_put; 558 new = (uintptr_t)mbuf; 559 560 do { 561 old = *putp; 562 if (old != 0) { 563 struct mbuf *mp = (struct mbuf *)old; 564 old_len = mp->m_pkthdr.csum_data; 565 } else 566 old_len = 0; 567 if (old_len >= stdp->std_put_max) { 568 atomic_add_long(&txq->put_overflow, 1); 569 return (ENOBUFS); 570 } 571 mbuf->m_pkthdr.csum_data = old_len + 1; 572 mbuf->m_nextpkt = (void *)old; 573 } while (atomic_cmpset_ptr(putp, old, new) == 0); 574 } 575 576 return (0); 577 } 578 579 /* 580 * Called from if_transmit - will try to grab the txq lock and enqueue to the 581 * put list if it succeeds, otherwise try to push onto the defer list if space. 582 */ 583 int 584 sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m) 585 { 586 int locked; 587 int rc; 588 589 if (!SFXGE_LINK_UP(txq->sc)) { 590 rc = ENETDOWN; 591 atomic_add_long(&txq->netdown_drops, 1); 592 goto fail; 593 } 594 595 /* 596 * Try to grab the txq lock. If we are able to get the lock, 597 * the packet will be appended to the "get list" of the deferred 598 * packet list. Otherwise, it will be pushed on the "put list". 599 */ 600 locked = SFXGE_TXQ_TRYLOCK(txq); 601 602 if (sfxge_tx_qdpl_put(txq, m, locked) != 0) { 603 if (locked) 604 SFXGE_TXQ_UNLOCK(txq); 605 rc = ENOBUFS; 606 goto fail; 607 } 608 609 /* 610 * Try to grab the lock again. 611 * 612 * If we are able to get the lock, we need to process the deferred 613 * packet list. If we are not able to get the lock, another thread 614 * is processing the list. 615 */ 616 if (!locked) 617 locked = SFXGE_TXQ_TRYLOCK(txq); 618 619 if (locked) { 620 /* Try to service the list. */ 621 sfxge_tx_qdpl_service(txq); 622 /* Lock has been dropped. */ 623 } 624 625 return (0); 626 627 fail: 628 m_freem(m); 629 return (rc); 630 } 631 632 static void 633 sfxge_tx_qdpl_flush(struct sfxge_txq *txq) 634 { 635 struct sfxge_tx_dpl *stdp = &txq->dpl; 636 struct mbuf *mbuf, *next; 637 638 SFXGE_TXQ_LOCK(txq); 639 640 sfxge_tx_qdpl_swizzle(txq); 641 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) { 642 next = mbuf->m_nextpkt; 643 m_freem(mbuf); 644 } 645 stdp->std_get = NULL; 646 stdp->std_get_count = 0; 647 stdp->std_get_non_tcp_count = 0; 648 stdp->std_getp = &stdp->std_get; 649 650 SFXGE_TXQ_UNLOCK(txq); 651 } 652 653 void 654 sfxge_if_qflush(struct ifnet *ifp) 655 { 656 struct sfxge_softc *sc; 657 int i; 658 659 sc = ifp->if_softc; 660 661 for (i = 0; i < sc->txq_count; i++) 662 sfxge_tx_qdpl_flush(sc->txq[i]); 663 } 664 665 /* 666 * TX start -- called by the stack. 667 */ 668 int 669 sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) 670 { 671 struct sfxge_softc *sc; 672 struct sfxge_txq *txq; 673 int rc; 674 675 sc = (struct sfxge_softc *)ifp->if_softc; 676 677 KASSERT(ifp->if_flags & IFF_UP, ("interface not up")); 678 679 /* Pick the desired transmit queue. */ 680 if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) { 681 int index = 0; 682 683 /* check if flowid is set */ 684 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 685 uint32_t hash = m->m_pkthdr.flowid; 686 687 index = sc->rx_indir_table[hash % SFXGE_RX_SCALE_MAX]; 688 } 689 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index]; 690 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) { 691 txq = sc->txq[SFXGE_TXQ_IP_CKSUM]; 692 } else { 693 txq = sc->txq[SFXGE_TXQ_NON_CKSUM]; 694 } 695 696 rc = sfxge_tx_packet_add(txq, m); 697 698 return (rc); 699 } 700 701 #else /* !SFXGE_HAVE_MQ */ 702 703 static void sfxge_if_start_locked(struct ifnet *ifp) 704 { 705 struct sfxge_softc *sc = ifp->if_softc; 706 struct sfxge_txq *txq; 707 struct mbuf *mbuf; 708 unsigned int pushed[SFXGE_TXQ_NTYPES]; 709 unsigned int q_index; 710 711 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) != 712 IFF_DRV_RUNNING) 713 return; 714 715 if (!sc->port.link_up) 716 return; 717 718 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) { 719 txq = sc->txq[q_index]; 720 pushed[q_index] = txq->added; 721 } 722 723 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { 724 IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf); 725 if (mbuf == NULL) 726 break; 727 728 ETHER_BPF_MTAP(ifp, mbuf); /* packet capture */ 729 730 /* Pick the desired transmit queue. */ 731 if (mbuf->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) 732 q_index = SFXGE_TXQ_IP_TCP_UDP_CKSUM; 733 else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP) 734 q_index = SFXGE_TXQ_IP_CKSUM; 735 else 736 q_index = SFXGE_TXQ_NON_CKSUM; 737 txq = sc->txq[q_index]; 738 739 if (sfxge_tx_queue_mbuf(txq, mbuf) != 0) 740 continue; 741 742 if (txq->blocked) { 743 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 744 break; 745 } 746 747 /* Push the fragments to the hardware in batches. */ 748 if (txq->added - pushed[q_index] >= SFXGE_TX_BATCH) { 749 efx_tx_qpush(txq->common, txq->added); 750 pushed[q_index] = txq->added; 751 } 752 } 753 754 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) { 755 txq = sc->txq[q_index]; 756 if (txq->added != pushed[q_index]) 757 efx_tx_qpush(txq->common, txq->added); 758 } 759 } 760 761 void sfxge_if_start(struct ifnet *ifp) 762 { 763 struct sfxge_softc *sc = ifp->if_softc; 764 765 SFXGE_TXQ_LOCK(sc->txq[0]); 766 sfxge_if_start_locked(ifp); 767 SFXGE_TXQ_UNLOCK(sc->txq[0]); 768 } 769 770 static void 771 sfxge_tx_qdpl_service(struct sfxge_txq *txq) 772 { 773 struct ifnet *ifp = txq->sc->ifnet; 774 775 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 776 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 777 sfxge_if_start_locked(ifp); 778 SFXGE_TXQ_UNLOCK(txq); 779 } 780 781 #endif /* SFXGE_HAVE_MQ */ 782 783 /* 784 * Software "TSO". Not quite as good as doing it in hardware, but 785 * still faster than segmenting in the stack. 786 */ 787 788 struct sfxge_tso_state { 789 /* Output position */ 790 unsigned out_len; /* Remaining length in current segment */ 791 unsigned seqnum; /* Current sequence number */ 792 unsigned packet_space; /* Remaining space in current packet */ 793 794 /* Input position */ 795 uint64_t dma_addr; /* DMA address of current position */ 796 unsigned in_len; /* Remaining length in current mbuf */ 797 798 const struct mbuf *mbuf; /* Input mbuf (head of chain) */ 799 u_short protocol; /* Network protocol (after VLAN decap) */ 800 ssize_t nh_off; /* Offset of network header */ 801 ssize_t tcph_off; /* Offset of TCP header */ 802 unsigned header_len; /* Number of bytes of header */ 803 unsigned seg_size; /* TCP segment size */ 804 }; 805 806 static const struct ip *tso_iph(const struct sfxge_tso_state *tso) 807 { 808 KASSERT(tso->protocol == htons(ETHERTYPE_IP), 809 ("tso_iph() in non-IPv4 state")); 810 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off); 811 } 812 static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso) 813 { 814 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 815 ("tso_ip6h() in non-IPv6 state")); 816 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off); 817 } 818 static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso) 819 { 820 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off); 821 } 822 823 /* Size of preallocated TSO header buffers. Larger blocks must be 824 * allocated from the heap. 825 */ 826 #define TSOH_STD_SIZE 128 827 828 /* At most half the descriptors in the queue at any time will refer to 829 * a TSO header buffer, since they must always be followed by a 830 * payload descriptor referring to an mbuf. 831 */ 832 #define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u) 833 #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) 834 #define TSOH_PAGE_COUNT(_txq_entries) \ 835 ((TSOH_COUNT(_txq_entries) + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE) 836 837 static int tso_init(struct sfxge_txq *txq) 838 { 839 struct sfxge_softc *sc = txq->sc; 840 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries); 841 int i, rc; 842 843 /* Allocate TSO header buffers */ 844 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]), 845 M_SFXGE, M_WAITOK); 846 847 for (i = 0; i < tsoh_page_count; i++) { 848 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]); 849 if (rc != 0) 850 goto fail; 851 } 852 853 return (0); 854 855 fail: 856 while (i-- > 0) 857 sfxge_dma_free(&txq->tsoh_buffer[i]); 858 free(txq->tsoh_buffer, M_SFXGE); 859 txq->tsoh_buffer = NULL; 860 return (rc); 861 } 862 863 static void tso_fini(struct sfxge_txq *txq) 864 { 865 int i; 866 867 if (txq->tsoh_buffer != NULL) { 868 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++) 869 sfxge_dma_free(&txq->tsoh_buffer[i]); 870 free(txq->tsoh_buffer, M_SFXGE); 871 } 872 } 873 874 static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) 875 { 876 struct ether_header *eh = mtod(mbuf, struct ether_header *); 877 const struct tcphdr *th; 878 struct tcphdr th_copy; 879 880 tso->mbuf = mbuf; 881 882 /* Find network protocol and header */ 883 tso->protocol = eh->ether_type; 884 if (tso->protocol == htons(ETHERTYPE_VLAN)) { 885 struct ether_vlan_header *veh = 886 mtod(mbuf, struct ether_vlan_header *); 887 tso->protocol = veh->evl_proto; 888 tso->nh_off = sizeof(*veh); 889 } else { 890 tso->nh_off = sizeof(*eh); 891 } 892 893 /* Find TCP header */ 894 if (tso->protocol == htons(ETHERTYPE_IP)) { 895 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP, 896 ("TSO required on non-TCP packet")); 897 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl; 898 } else { 899 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 900 ("TSO required on non-IP packet")); 901 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP, 902 ("TSO required on non-TCP packet")); 903 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr); 904 } 905 906 KASSERT(mbuf->m_len >= tso->tcph_off, 907 ("network header is fragmented in mbuf")); 908 /* We need TCP header including flags (window is the next) */ 909 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) { 910 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy), 911 (caddr_t)&th_copy); 912 th = &th_copy; 913 } else { 914 th = tso_tcph(tso); 915 } 916 917 tso->header_len = tso->tcph_off + 4 * th->th_off; 918 tso->seg_size = mbuf->m_pkthdr.tso_segsz; 919 920 tso->seqnum = ntohl(th->th_seq); 921 922 /* These flags must not be duplicated */ 923 KASSERT(!(th->th_flags & (TH_URG | TH_SYN | TH_RST)), 924 ("incompatible TCP flag on TSO packet")); 925 926 tso->out_len = mbuf->m_pkthdr.len - tso->header_len; 927 } 928 929 /* 930 * tso_fill_packet_with_fragment - form descriptors for the current fragment 931 * 932 * Form descriptors for the current fragment, until we reach the end 933 * of fragment or end-of-packet. Return 0 on success, 1 if not enough 934 * space. 935 */ 936 static void tso_fill_packet_with_fragment(struct sfxge_txq *txq, 937 struct sfxge_tso_state *tso) 938 { 939 efx_buffer_t *desc; 940 int n; 941 942 if (tso->in_len == 0 || tso->packet_space == 0) 943 return; 944 945 KASSERT(tso->in_len > 0, ("TSO input length went negative")); 946 KASSERT(tso->packet_space > 0, ("TSO packet space went negative")); 947 948 n = min(tso->in_len, tso->packet_space); 949 950 tso->packet_space -= n; 951 tso->out_len -= n; 952 tso->in_len -= n; 953 954 desc = &txq->pend_desc[txq->n_pend_desc++]; 955 desc->eb_addr = tso->dma_addr; 956 desc->eb_size = n; 957 desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0; 958 959 tso->dma_addr += n; 960 } 961 962 /* Callback from bus_dmamap_load() for long TSO headers. */ 963 static void tso_map_long_header(void *dma_addr_ret, 964 bus_dma_segment_t *segs, int nseg, 965 int error) 966 { 967 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) && 968 __predict_true(nseg == 1)) ? 969 segs->ds_addr : 0); 970 } 971 972 /* 973 * tso_start_new_packet - generate a new header and prepare for the new packet 974 * 975 * Generate a new header and prepare for the new packet. Return 0 on 976 * success, or an error code if failed to alloc header. 977 */ 978 static int tso_start_new_packet(struct sfxge_txq *txq, 979 struct sfxge_tso_state *tso, 980 unsigned int id) 981 { 982 struct sfxge_tx_mapping *stmp = &txq->stmp[id]; 983 struct tcphdr *tsoh_th; 984 unsigned ip_length; 985 caddr_t header; 986 uint64_t dma_addr; 987 bus_dmamap_t map; 988 efx_buffer_t *desc; 989 int rc; 990 991 /* Allocate a DMA-mapped header buffer. */ 992 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) { 993 unsigned int page_index = (id / 2) / TSOH_PER_PAGE; 994 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE; 995 996 header = (txq->tsoh_buffer[page_index].esm_base + 997 buf_index * TSOH_STD_SIZE); 998 dma_addr = (txq->tsoh_buffer[page_index].esm_addr + 999 buf_index * TSOH_STD_SIZE); 1000 map = txq->tsoh_buffer[page_index].esm_map; 1001 1002 stmp->flags = 0; 1003 } else { 1004 /* We cannot use bus_dmamem_alloc() as that may sleep */ 1005 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); 1006 if (__predict_false(!header)) 1007 return (ENOMEM); 1008 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, 1009 header, tso->header_len, 1010 tso_map_long_header, &dma_addr, 1011 BUS_DMA_NOWAIT); 1012 if (__predict_false(dma_addr == 0)) { 1013 if (rc == 0) { 1014 /* Succeeded but got >1 segment */ 1015 bus_dmamap_unload(txq->packet_dma_tag, 1016 stmp->map); 1017 rc = EINVAL; 1018 } 1019 free(header, M_SFXGE); 1020 return (rc); 1021 } 1022 map = stmp->map; 1023 1024 txq->tso_long_headers++; 1025 stmp->u.heap_buf = header; 1026 stmp->flags = TX_BUF_UNMAP; 1027 } 1028 1029 tsoh_th = (struct tcphdr *)(header + tso->tcph_off); 1030 1031 /* Copy and update the headers. */ 1032 m_copydata(tso->mbuf, 0, tso->header_len, header); 1033 1034 tsoh_th->th_seq = htonl(tso->seqnum); 1035 tso->seqnum += tso->seg_size; 1036 if (tso->out_len > tso->seg_size) { 1037 /* This packet will not finish the TSO burst. */ 1038 ip_length = tso->header_len - tso->nh_off + tso->seg_size; 1039 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH); 1040 } else { 1041 /* This packet will be the last in the TSO burst. */ 1042 ip_length = tso->header_len - tso->nh_off + tso->out_len; 1043 } 1044 1045 if (tso->protocol == htons(ETHERTYPE_IP)) { 1046 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off); 1047 tsoh_iph->ip_len = htons(ip_length); 1048 /* XXX We should increment ip_id, but FreeBSD doesn't 1049 * currently allocate extra IDs for multiple segments. 1050 */ 1051 } else { 1052 struct ip6_hdr *tsoh_iph = 1053 (struct ip6_hdr *)(header + tso->nh_off); 1054 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph)); 1055 } 1056 1057 /* Make the header visible to the hardware. */ 1058 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE); 1059 1060 tso->packet_space = tso->seg_size; 1061 txq->tso_packets++; 1062 1063 /* Form a descriptor for this header. */ 1064 desc = &txq->pend_desc[txq->n_pend_desc++]; 1065 desc->eb_addr = dma_addr; 1066 desc->eb_size = tso->header_len; 1067 desc->eb_eop = 0; 1068 1069 return (0); 1070 } 1071 1072 static int 1073 sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 1074 const bus_dma_segment_t *dma_seg, int n_dma_seg) 1075 { 1076 struct sfxge_tso_state tso; 1077 unsigned int id, next_id; 1078 unsigned skipped = 0; 1079 1080 tso_start(&tso, mbuf); 1081 1082 while (dma_seg->ds_len + skipped <= tso.header_len) { 1083 skipped += dma_seg->ds_len; 1084 --n_dma_seg; 1085 KASSERT(n_dma_seg, ("no payload found in TSO packet")); 1086 ++dma_seg; 1087 } 1088 tso.in_len = dma_seg->ds_len + (tso.header_len - skipped); 1089 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped); 1090 1091 id = txq->added & txq->ptr_mask; 1092 if (__predict_false(tso_start_new_packet(txq, &tso, id))) 1093 return (-1); 1094 1095 while (1) { 1096 id = (id + 1) & txq->ptr_mask; 1097 tso_fill_packet_with_fragment(txq, &tso); 1098 1099 /* Move onto the next fragment? */ 1100 if (tso.in_len == 0) { 1101 --n_dma_seg; 1102 if (n_dma_seg == 0) 1103 break; 1104 ++dma_seg; 1105 tso.in_len = dma_seg->ds_len; 1106 tso.dma_addr = dma_seg->ds_addr; 1107 } 1108 1109 /* End of packet? */ 1110 if (tso.packet_space == 0) { 1111 /* If the queue is now full due to tiny MSS, 1112 * or we can't create another header, discard 1113 * the remainder of the input mbuf but do not 1114 * roll back the work we have done. 1115 */ 1116 if (txq->n_pend_desc + 1 /* header */ + n_dma_seg > 1117 SFXGE_TSO_MAX_DESC) { 1118 txq->tso_pdrop_too_many++; 1119 break; 1120 } 1121 next_id = (id + 1) & txq->ptr_mask; 1122 if (__predict_false(tso_start_new_packet(txq, &tso, 1123 next_id))) { 1124 txq->tso_pdrop_no_rsrc++; 1125 break; 1126 } 1127 id = next_id; 1128 } 1129 } 1130 1131 txq->tso_bursts++; 1132 return (id); 1133 } 1134 1135 static void 1136 sfxge_tx_qunblock(struct sfxge_txq *txq) 1137 { 1138 struct sfxge_softc *sc; 1139 struct sfxge_evq *evq; 1140 1141 sc = txq->sc; 1142 evq = sc->evq[txq->evq_index]; 1143 1144 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 1145 1146 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) 1147 return; 1148 1149 SFXGE_TXQ_LOCK(txq); 1150 1151 if (txq->blocked) { 1152 unsigned int level; 1153 1154 level = txq->added - txq->completed; 1155 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) { 1156 /* reaped must be in sync with blocked */ 1157 sfxge_tx_qreap(txq); 1158 txq->blocked = 0; 1159 } 1160 } 1161 1162 sfxge_tx_qdpl_service(txq); 1163 /* note: lock has been dropped */ 1164 } 1165 1166 void 1167 sfxge_tx_qflush_done(struct sfxge_txq *txq) 1168 { 1169 1170 txq->flush_state = SFXGE_FLUSH_DONE; 1171 } 1172 1173 static void 1174 sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index) 1175 { 1176 struct sfxge_txq *txq; 1177 struct sfxge_evq *evq; 1178 unsigned int count; 1179 1180 txq = sc->txq[index]; 1181 evq = sc->evq[txq->evq_index]; 1182 1183 SFXGE_TXQ_LOCK(txq); 1184 1185 KASSERT(txq->init_state == SFXGE_TXQ_STARTED, 1186 ("txq->init_state != SFXGE_TXQ_STARTED")); 1187 1188 txq->init_state = SFXGE_TXQ_INITIALIZED; 1189 txq->flush_state = SFXGE_FLUSH_PENDING; 1190 1191 /* Flush the transmit queue. */ 1192 efx_tx_qflush(txq->common); 1193 1194 SFXGE_TXQ_UNLOCK(txq); 1195 1196 count = 0; 1197 do { 1198 /* Spin for 100ms. */ 1199 DELAY(100000); 1200 1201 if (txq->flush_state != SFXGE_FLUSH_PENDING) 1202 break; 1203 } while (++count < 20); 1204 1205 SFXGE_EVQ_LOCK(evq); 1206 SFXGE_TXQ_LOCK(txq); 1207 1208 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED, 1209 ("txq->flush_state == SFXGE_FLUSH_FAILED")); 1210 1211 txq->flush_state = SFXGE_FLUSH_DONE; 1212 1213 txq->blocked = 0; 1214 txq->pending = txq->added; 1215 1216 sfxge_tx_qcomplete(txq, evq); 1217 KASSERT(txq->completed == txq->added, 1218 ("txq->completed != txq->added")); 1219 1220 sfxge_tx_qreap(txq); 1221 KASSERT(txq->reaped == txq->completed, 1222 ("txq->reaped != txq->completed")); 1223 1224 txq->added = 0; 1225 txq->pending = 0; 1226 txq->completed = 0; 1227 txq->reaped = 0; 1228 1229 /* Destroy the common code transmit queue. */ 1230 efx_tx_qdestroy(txq->common); 1231 txq->common = NULL; 1232 1233 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1234 EFX_TXQ_NBUFS(sc->txq_entries)); 1235 1236 SFXGE_EVQ_UNLOCK(evq); 1237 SFXGE_TXQ_UNLOCK(txq); 1238 } 1239 1240 static int 1241 sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index) 1242 { 1243 struct sfxge_txq *txq; 1244 efsys_mem_t *esmp; 1245 uint16_t flags; 1246 struct sfxge_evq *evq; 1247 int rc; 1248 1249 txq = sc->txq[index]; 1250 esmp = &txq->mem; 1251 evq = sc->evq[txq->evq_index]; 1252 1253 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1254 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1255 KASSERT(evq->init_state == SFXGE_EVQ_STARTED, 1256 ("evq->init_state != SFXGE_EVQ_STARTED")); 1257 1258 /* Program the buffer table. */ 1259 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp, 1260 EFX_TXQ_NBUFS(sc->txq_entries))) != 0) 1261 return (rc); 1262 1263 /* Determine the kind of queue we are creating. */ 1264 switch (txq->type) { 1265 case SFXGE_TXQ_NON_CKSUM: 1266 flags = 0; 1267 break; 1268 case SFXGE_TXQ_IP_CKSUM: 1269 flags = EFX_CKSUM_IPV4; 1270 break; 1271 case SFXGE_TXQ_IP_TCP_UDP_CKSUM: 1272 flags = EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP; 1273 break; 1274 default: 1275 KASSERT(0, ("Impossible TX queue")); 1276 flags = 0; 1277 break; 1278 } 1279 1280 /* Create the common code transmit queue. */ 1281 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp, 1282 sc->txq_entries, txq->buf_base_id, flags, evq->common, 1283 &txq->common)) != 0) 1284 goto fail; 1285 1286 SFXGE_TXQ_LOCK(txq); 1287 1288 /* Enable the transmit queue. */ 1289 efx_tx_qenable(txq->common); 1290 1291 txq->init_state = SFXGE_TXQ_STARTED; 1292 1293 SFXGE_TXQ_UNLOCK(txq); 1294 1295 return (0); 1296 1297 fail: 1298 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1299 EFX_TXQ_NBUFS(sc->txq_entries)); 1300 return (rc); 1301 } 1302 1303 void 1304 sfxge_tx_stop(struct sfxge_softc *sc) 1305 { 1306 int index; 1307 1308 index = sc->txq_count; 1309 while (--index >= 0) 1310 sfxge_tx_qstop(sc, index); 1311 1312 /* Tear down the transmit module */ 1313 efx_tx_fini(sc->enp); 1314 } 1315 1316 int 1317 sfxge_tx_start(struct sfxge_softc *sc) 1318 { 1319 int index; 1320 int rc; 1321 1322 /* Initialize the common code transmit module. */ 1323 if ((rc = efx_tx_init(sc->enp)) != 0) 1324 return (rc); 1325 1326 for (index = 0; index < sc->txq_count; index++) { 1327 if ((rc = sfxge_tx_qstart(sc, index)) != 0) 1328 goto fail; 1329 } 1330 1331 return (0); 1332 1333 fail: 1334 while (--index >= 0) 1335 sfxge_tx_qstop(sc, index); 1336 1337 efx_tx_fini(sc->enp); 1338 1339 return (rc); 1340 } 1341 1342 /** 1343 * Destroy a transmit queue. 1344 */ 1345 static void 1346 sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index) 1347 { 1348 struct sfxge_txq *txq; 1349 unsigned int nmaps; 1350 1351 txq = sc->txq[index]; 1352 1353 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1354 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1355 1356 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) 1357 tso_fini(txq); 1358 1359 /* Free the context arrays. */ 1360 free(txq->pend_desc, M_SFXGE); 1361 nmaps = sc->txq_entries; 1362 while (nmaps-- != 0) 1363 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1364 free(txq->stmp, M_SFXGE); 1365 1366 /* Release DMA memory mapping. */ 1367 sfxge_dma_free(&txq->mem); 1368 1369 sc->txq[index] = NULL; 1370 1371 #ifdef SFXGE_HAVE_MQ 1372 SFXGE_TXQ_LOCK_DESTROY(txq); 1373 #endif 1374 1375 free(txq, M_SFXGE); 1376 } 1377 1378 static int 1379 sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, 1380 enum sfxge_txq_type type, unsigned int evq_index) 1381 { 1382 char name[16]; 1383 struct sysctl_oid *txq_node; 1384 struct sfxge_txq *txq; 1385 struct sfxge_evq *evq; 1386 #ifdef SFXGE_HAVE_MQ 1387 struct sfxge_tx_dpl *stdp; 1388 #endif 1389 efsys_mem_t *esmp; 1390 unsigned int nmaps; 1391 int rc; 1392 1393 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK); 1394 txq->sc = sc; 1395 txq->entries = sc->txq_entries; 1396 txq->ptr_mask = txq->entries - 1; 1397 1398 sc->txq[txq_index] = txq; 1399 esmp = &txq->mem; 1400 1401 evq = sc->evq[evq_index]; 1402 1403 /* Allocate and zero DMA space for the descriptor ring. */ 1404 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0) 1405 return (rc); 1406 1407 /* Allocate buffer table entries. */ 1408 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries), 1409 &txq->buf_base_id); 1410 1411 /* Create a DMA tag for packet mappings. */ 1412 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 0x1000, 1413 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL, 1414 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 0x1000, 0, NULL, NULL, 1415 &txq->packet_dma_tag) != 0) { 1416 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n"); 1417 rc = ENOMEM; 1418 goto fail; 1419 } 1420 1421 /* Allocate pending descriptor array for batching writes. */ 1422 txq->pend_desc = malloc(sizeof(efx_buffer_t) * sc->txq_entries, 1423 M_SFXGE, M_ZERO | M_WAITOK); 1424 1425 /* Allocate and initialise mbuf DMA mapping array. */ 1426 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries, 1427 M_SFXGE, M_ZERO | M_WAITOK); 1428 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) { 1429 rc = bus_dmamap_create(txq->packet_dma_tag, 0, 1430 &txq->stmp[nmaps].map); 1431 if (rc != 0) 1432 goto fail2; 1433 } 1434 1435 snprintf(name, sizeof(name), "%u", txq_index); 1436 txq_node = SYSCTL_ADD_NODE( 1437 device_get_sysctl_ctx(sc->dev), 1438 SYSCTL_CHILDREN(sc->txqs_node), 1439 OID_AUTO, name, CTLFLAG_RD, NULL, ""); 1440 if (txq_node == NULL) { 1441 rc = ENOMEM; 1442 goto fail_txq_node; 1443 } 1444 1445 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM && 1446 (rc = tso_init(txq)) != 0) 1447 goto fail3; 1448 1449 #ifdef SFXGE_HAVE_MQ 1450 if (sfxge_tx_dpl_get_max <= 0) { 1451 log(LOG_ERR, "%s=%d must be greater than 0", 1452 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max); 1453 rc = EINVAL; 1454 goto fail_tx_dpl_get_max; 1455 } 1456 if (sfxge_tx_dpl_get_non_tcp_max <= 0) { 1457 log(LOG_ERR, "%s=%d must be greater than 0", 1458 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, 1459 sfxge_tx_dpl_get_non_tcp_max); 1460 rc = EINVAL; 1461 goto fail_tx_dpl_get_max; 1462 } 1463 if (sfxge_tx_dpl_put_max < 0) { 1464 log(LOG_ERR, "%s=%d must be greater or equal to 0", 1465 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max); 1466 rc = EINVAL; 1467 goto fail_tx_dpl_put_max; 1468 } 1469 1470 /* Initialize the deferred packet list. */ 1471 stdp = &txq->dpl; 1472 stdp->std_put_max = sfxge_tx_dpl_put_max; 1473 stdp->std_get_max = sfxge_tx_dpl_get_max; 1474 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max; 1475 stdp->std_getp = &stdp->std_get; 1476 1477 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index); 1478 1479 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), 1480 SYSCTL_CHILDREN(txq_node), OID_AUTO, 1481 "dpl_get_count", CTLFLAG_RD | CTLFLAG_STATS, 1482 &stdp->std_get_count, 0, ""); 1483 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), 1484 SYSCTL_CHILDREN(txq_node), OID_AUTO, 1485 "dpl_get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS, 1486 &stdp->std_get_non_tcp_count, 0, ""); 1487 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), 1488 SYSCTL_CHILDREN(txq_node), OID_AUTO, 1489 "dpl_get_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1490 &stdp->std_get_hiwat, 0, ""); 1491 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev), 1492 SYSCTL_CHILDREN(txq_node), OID_AUTO, 1493 "dpl_put_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1494 &stdp->std_put_hiwat, 0, ""); 1495 #endif 1496 1497 txq->type = type; 1498 txq->evq_index = evq_index; 1499 txq->txq_index = txq_index; 1500 txq->init_state = SFXGE_TXQ_INITIALIZED; 1501 1502 return (0); 1503 1504 fail_tx_dpl_put_max: 1505 fail_tx_dpl_get_max: 1506 fail3: 1507 fail_txq_node: 1508 free(txq->pend_desc, M_SFXGE); 1509 fail2: 1510 while (nmaps-- != 0) 1511 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1512 free(txq->stmp, M_SFXGE); 1513 bus_dma_tag_destroy(txq->packet_dma_tag); 1514 1515 fail: 1516 sfxge_dma_free(esmp); 1517 1518 return (rc); 1519 } 1520 1521 static const struct { 1522 const char *name; 1523 size_t offset; 1524 } sfxge_tx_stats[] = { 1525 #define SFXGE_TX_STAT(name, member) \ 1526 { #name, offsetof(struct sfxge_txq, member) } 1527 SFXGE_TX_STAT(tso_bursts, tso_bursts), 1528 SFXGE_TX_STAT(tso_packets, tso_packets), 1529 SFXGE_TX_STAT(tso_long_headers, tso_long_headers), 1530 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many), 1531 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc), 1532 SFXGE_TX_STAT(tx_collapses, collapses), 1533 SFXGE_TX_STAT(tx_drops, drops), 1534 SFXGE_TX_STAT(tx_get_overflow, get_overflow), 1535 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow), 1536 SFXGE_TX_STAT(tx_put_overflow, put_overflow), 1537 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops), 1538 }; 1539 1540 static int 1541 sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS) 1542 { 1543 struct sfxge_softc *sc = arg1; 1544 unsigned int id = arg2; 1545 unsigned long sum; 1546 unsigned int index; 1547 1548 /* Sum across all TX queues */ 1549 sum = 0; 1550 for (index = 0; index < sc->txq_count; index++) 1551 sum += *(unsigned long *)((caddr_t)sc->txq[index] + 1552 sfxge_tx_stats[id].offset); 1553 1554 return (SYSCTL_OUT(req, &sum, sizeof(sum))); 1555 } 1556 1557 static void 1558 sfxge_tx_stat_init(struct sfxge_softc *sc) 1559 { 1560 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 1561 struct sysctl_oid_list *stat_list; 1562 unsigned int id; 1563 1564 stat_list = SYSCTL_CHILDREN(sc->stats_node); 1565 1566 for (id = 0; id < nitems(sfxge_tx_stats); id++) { 1567 SYSCTL_ADD_PROC( 1568 ctx, stat_list, 1569 OID_AUTO, sfxge_tx_stats[id].name, 1570 CTLTYPE_ULONG|CTLFLAG_RD, 1571 sc, id, sfxge_tx_stat_handler, "LU", 1572 ""); 1573 } 1574 } 1575 1576 uint64_t 1577 sfxge_tx_get_drops(struct sfxge_softc *sc) 1578 { 1579 unsigned int index; 1580 uint64_t drops = 0; 1581 struct sfxge_txq *txq; 1582 1583 /* Sum across all TX queues */ 1584 for (index = 0; index < sc->txq_count; index++) { 1585 txq = sc->txq[index]; 1586 /* 1587 * In theory, txq->put_overflow and txq->netdown_drops 1588 * should use atomic operation and other should be 1589 * obtained under txq lock, but it is just statistics. 1590 */ 1591 drops += txq->drops + txq->get_overflow + 1592 txq->get_non_tcp_overflow + 1593 txq->put_overflow + txq->netdown_drops + 1594 txq->tso_pdrop_too_many + txq->tso_pdrop_no_rsrc; 1595 } 1596 return (drops); 1597 } 1598 1599 void 1600 sfxge_tx_fini(struct sfxge_softc *sc) 1601 { 1602 int index; 1603 1604 index = sc->txq_count; 1605 while (--index >= 0) 1606 sfxge_tx_qfini(sc, index); 1607 1608 sc->txq_count = 0; 1609 } 1610 1611 1612 int 1613 sfxge_tx_init(struct sfxge_softc *sc) 1614 { 1615 struct sfxge_intr *intr; 1616 int index; 1617 int rc; 1618 1619 intr = &sc->intr; 1620 1621 KASSERT(intr->state == SFXGE_INTR_INITIALIZED, 1622 ("intr->state != SFXGE_INTR_INITIALIZED")); 1623 1624 #ifdef SFXGE_HAVE_MQ 1625 sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc; 1626 #else 1627 sc->txq_count = SFXGE_TXQ_NTYPES; 1628 #endif 1629 1630 sc->txqs_node = SYSCTL_ADD_NODE( 1631 device_get_sysctl_ctx(sc->dev), 1632 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 1633 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues"); 1634 if (sc->txqs_node == NULL) { 1635 rc = ENOMEM; 1636 goto fail_txq_node; 1637 } 1638 1639 /* Initialize the transmit queues */ 1640 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM, 1641 SFXGE_TXQ_NON_CKSUM, 0)) != 0) 1642 goto fail; 1643 1644 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM, 1645 SFXGE_TXQ_IP_CKSUM, 0)) != 0) 1646 goto fail2; 1647 1648 for (index = 0; 1649 index < sc->txq_count - SFXGE_TXQ_NTYPES + 1; 1650 index++) { 1651 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index, 1652 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0) 1653 goto fail3; 1654 } 1655 1656 sfxge_tx_stat_init(sc); 1657 1658 return (0); 1659 1660 fail3: 1661 while (--index >= 0) 1662 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index); 1663 1664 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM); 1665 1666 fail2: 1667 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM); 1668 1669 fail: 1670 fail_txq_node: 1671 sc->txq_count = 0; 1672 return (rc); 1673 } 1674