1 /*- 2 * Copyright (c) 2010-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 */ 33 34 /* Theory of operation: 35 * 36 * Tx queues allocation and mapping 37 * 38 * One Tx queue with enabled checksum offload is allocated per Rx channel 39 * (event queue). Also 2 Tx queues (one without checksum offload and one 40 * with IP checksum offload only) are allocated and bound to event queue 0. 41 * sfxge_txq_type is used as Tx queue label. 42 * 43 * So, event queue plus label mapping to Tx queue index is: 44 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES) 45 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1 46 * See sfxge_get_txq_by_label() sfxge_ev.c 47 */ 48 49 #include <sys/cdefs.h> 50 __FBSDID("$FreeBSD$"); 51 52 #include "opt_rss.h" 53 54 #include <sys/param.h> 55 #include <sys/malloc.h> 56 #include <sys/mbuf.h> 57 #include <sys/smp.h> 58 #include <sys/socket.h> 59 #include <sys/sysctl.h> 60 #include <sys/syslog.h> 61 #include <sys/limits.h> 62 63 #include <net/bpf.h> 64 #include <net/ethernet.h> 65 #include <net/if.h> 66 #include <net/if_vlan_var.h> 67 68 #include <netinet/in.h> 69 #include <netinet/ip.h> 70 #include <netinet/ip6.h> 71 #include <netinet/tcp.h> 72 73 #ifdef RSS 74 #include <net/rss_config.h> 75 #endif 76 77 #include "common/efx.h" 78 79 #include "sfxge.h" 80 #include "sfxge_tx.h" 81 82 83 #define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max) 84 static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT; 85 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max); 86 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN, 87 &sfxge_tx_dpl_get_max, 0, 88 "Maximum number of any packets in deferred packet get-list"); 89 90 #define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \ 91 SFXGE_PARAM(tx_dpl_get_non_tcp_max) 92 static int sfxge_tx_dpl_get_non_tcp_max = 93 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT; 94 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max); 95 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN, 96 &sfxge_tx_dpl_get_non_tcp_max, 0, 97 "Maximum number of non-TCP packets in deferred packet get-list"); 98 99 #define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max) 100 static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT; 101 TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max); 102 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN, 103 &sfxge_tx_dpl_put_max, 0, 104 "Maximum number of any packets in deferred packet put-list"); 105 106 #define SFXGE_PARAM_TSO_FW_ASSISTED SFXGE_PARAM(tso_fw_assisted) 107 static int sfxge_tso_fw_assisted = (SFXGE_FATSOV1 | SFXGE_FATSOV2); 108 TUNABLE_INT(SFXGE_PARAM_TSO_FW_ASSISTED, &sfxge_tso_fw_assisted); 109 SYSCTL_INT(_hw_sfxge, OID_AUTO, tso_fw_assisted, CTLFLAG_RDTUN, 110 &sfxge_tso_fw_assisted, 0, 111 "Bitmask of FW-assisted TSO allowed to use if supported by NIC firmware"); 112 113 114 static const struct { 115 const char *name; 116 size_t offset; 117 } sfxge_tx_stats[] = { 118 #define SFXGE_TX_STAT(name, member) \ 119 { #name, offsetof(struct sfxge_txq, member) } 120 SFXGE_TX_STAT(tso_bursts, tso_bursts), 121 SFXGE_TX_STAT(tso_packets, tso_packets), 122 SFXGE_TX_STAT(tso_long_headers, tso_long_headers), 123 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many), 124 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc), 125 SFXGE_TX_STAT(tx_collapses, collapses), 126 SFXGE_TX_STAT(tx_drops, drops), 127 SFXGE_TX_STAT(tx_get_overflow, get_overflow), 128 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow), 129 SFXGE_TX_STAT(tx_put_overflow, put_overflow), 130 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops), 131 }; 132 133 134 /* Forward declarations. */ 135 static void sfxge_tx_qdpl_service(struct sfxge_txq *txq); 136 static void sfxge_tx_qlist_post(struct sfxge_txq *txq); 137 static void sfxge_tx_qunblock(struct sfxge_txq *txq); 138 static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 139 const bus_dma_segment_t *dma_seg, int n_dma_seg, 140 int vlan_tagged); 141 142 static int 143 sfxge_tx_maybe_insert_tag(struct sfxge_txq *txq, struct mbuf *mbuf) 144 { 145 uint16_t this_tag = ((mbuf->m_flags & M_VLANTAG) ? 146 mbuf->m_pkthdr.ether_vtag : 147 0); 148 149 if (this_tag == txq->hw_vlan_tci) 150 return (0); 151 152 efx_tx_qdesc_vlantci_create(txq->common, 153 bswap16(this_tag), 154 &txq->pend_desc[0]); 155 txq->n_pend_desc = 1; 156 txq->hw_vlan_tci = this_tag; 157 return (1); 158 } 159 160 static inline void 161 sfxge_next_stmp(struct sfxge_txq *txq, struct sfxge_tx_mapping **pstmp) 162 { 163 KASSERT((*pstmp)->flags == 0, ("stmp flags are not 0")); 164 if (__predict_false(*pstmp == 165 &txq->stmp[txq->ptr_mask])) 166 *pstmp = &txq->stmp[0]; 167 else 168 (*pstmp)++; 169 } 170 171 172 void 173 sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq) 174 { 175 unsigned int completed; 176 177 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 178 179 completed = txq->completed; 180 while (completed != txq->pending) { 181 struct sfxge_tx_mapping *stmp; 182 unsigned int id; 183 184 id = completed++ & txq->ptr_mask; 185 186 stmp = &txq->stmp[id]; 187 if (stmp->flags & TX_BUF_UNMAP) { 188 bus_dmamap_unload(txq->packet_dma_tag, stmp->map); 189 if (stmp->flags & TX_BUF_MBUF) { 190 struct mbuf *m = stmp->u.mbuf; 191 do 192 m = m_free(m); 193 while (m != NULL); 194 } else { 195 free(stmp->u.heap_buf, M_SFXGE); 196 } 197 stmp->flags = 0; 198 } 199 } 200 txq->completed = completed; 201 202 /* Check whether we need to unblock the queue. */ 203 mb(); 204 if (txq->blocked) { 205 unsigned int level; 206 207 level = txq->added - txq->completed; 208 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) 209 sfxge_tx_qunblock(txq); 210 } 211 } 212 213 static unsigned int 214 sfxge_is_mbuf_non_tcp(struct mbuf *mbuf) 215 { 216 /* Absence of TCP checksum flags does not mean that it is non-TCP 217 * but it should be true if user wants to achieve high throughput. 218 */ 219 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP))); 220 } 221 222 /* 223 * Reorder the put list and append it to the get list. 224 */ 225 static void 226 sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq) 227 { 228 struct sfxge_tx_dpl *stdp; 229 struct mbuf *mbuf, *get_next, **get_tailp; 230 volatile uintptr_t *putp; 231 uintptr_t put; 232 unsigned int count; 233 unsigned int non_tcp_count; 234 235 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 236 237 stdp = &txq->dpl; 238 239 /* Acquire the put list. */ 240 putp = &stdp->std_put; 241 put = atomic_readandclear_ptr(putp); 242 mbuf = (void *)put; 243 244 if (mbuf == NULL) 245 return; 246 247 /* Reverse the put list. */ 248 get_tailp = &mbuf->m_nextpkt; 249 get_next = NULL; 250 251 count = 0; 252 non_tcp_count = 0; 253 do { 254 struct mbuf *put_next; 255 256 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf); 257 put_next = mbuf->m_nextpkt; 258 mbuf->m_nextpkt = get_next; 259 get_next = mbuf; 260 mbuf = put_next; 261 262 count++; 263 } while (mbuf != NULL); 264 265 if (count > stdp->std_put_hiwat) 266 stdp->std_put_hiwat = count; 267 268 /* Append the reversed put list to the get list. */ 269 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL")); 270 *stdp->std_getp = get_next; 271 stdp->std_getp = get_tailp; 272 stdp->std_get_count += count; 273 stdp->std_get_non_tcp_count += non_tcp_count; 274 } 275 276 static void 277 sfxge_tx_qreap(struct sfxge_txq *txq) 278 { 279 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 280 281 txq->reaped = txq->completed; 282 } 283 284 static void 285 sfxge_tx_qlist_post(struct sfxge_txq *txq) 286 { 287 unsigned int old_added; 288 unsigned int block_level; 289 unsigned int level; 290 int rc; 291 292 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 293 294 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0")); 295 KASSERT(txq->n_pend_desc <= txq->max_pkt_desc, 296 ("txq->n_pend_desc too large")); 297 KASSERT(!txq->blocked, ("txq->blocked")); 298 299 old_added = txq->added; 300 301 /* Post the fragment list. */ 302 rc = efx_tx_qdesc_post(txq->common, txq->pend_desc, txq->n_pend_desc, 303 txq->reaped, &txq->added); 304 KASSERT(rc == 0, ("efx_tx_qdesc_post() failed")); 305 306 /* If efx_tx_qdesc_post() had to refragment, our information about 307 * buffers to free may be associated with the wrong 308 * descriptors. 309 */ 310 KASSERT(txq->added - old_added == txq->n_pend_desc, 311 ("efx_tx_qdesc_post() refragmented descriptors")); 312 313 level = txq->added - txq->reaped; 314 KASSERT(level <= txq->entries, ("overfilled TX queue")); 315 316 /* Clear the fragment list. */ 317 txq->n_pend_desc = 0; 318 319 /* 320 * Set the block level to ensure there is space to generate a 321 * large number of descriptors for TSO. 322 */ 323 block_level = EFX_TXQ_LIMIT(txq->entries) - txq->max_pkt_desc; 324 325 /* Have we reached the block level? */ 326 if (level < block_level) 327 return; 328 329 /* Reap, and check again */ 330 sfxge_tx_qreap(txq); 331 level = txq->added - txq->reaped; 332 if (level < block_level) 333 return; 334 335 txq->blocked = 1; 336 337 /* 338 * Avoid a race with completion interrupt handling that could leave 339 * the queue blocked. 340 */ 341 mb(); 342 sfxge_tx_qreap(txq); 343 level = txq->added - txq->reaped; 344 if (level < block_level) { 345 mb(); 346 txq->blocked = 0; 347 } 348 } 349 350 static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf) 351 { 352 bus_dmamap_t *used_map; 353 bus_dmamap_t map; 354 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG]; 355 unsigned int id; 356 struct sfxge_tx_mapping *stmp; 357 efx_desc_t *desc; 358 int n_dma_seg; 359 int rc; 360 int i; 361 int eop; 362 int vlan_tagged; 363 364 KASSERT(!txq->blocked, ("txq->blocked")); 365 366 #if SFXGE_TX_PARSE_EARLY 367 /* 368 * If software TSO is used, we still need to copy packet header, 369 * even if we have already parsed it early before enqueue. 370 */ 371 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) && 372 (txq->tso_fw_assisted == 0)) 373 prefetch_read_many(mbuf->m_data); 374 #else 375 /* 376 * Prefetch packet header since we need to parse it and extract 377 * IP ID, TCP sequence number and flags. 378 */ 379 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) 380 prefetch_read_many(mbuf->m_data); 381 #endif 382 383 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) { 384 rc = EINTR; 385 goto reject; 386 } 387 388 /* Load the packet for DMA. */ 389 id = txq->added & txq->ptr_mask; 390 stmp = &txq->stmp[id]; 391 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map, 392 mbuf, dma_seg, &n_dma_seg, 0); 393 if (rc == EFBIG) { 394 /* Try again. */ 395 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT, 396 SFXGE_TX_MAPPING_MAX_SEG); 397 if (new_mbuf == NULL) 398 goto reject; 399 ++txq->collapses; 400 mbuf = new_mbuf; 401 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, 402 stmp->map, mbuf, 403 dma_seg, &n_dma_seg, 0); 404 } 405 if (rc != 0) 406 goto reject; 407 408 /* Make the packet visible to the hardware. */ 409 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE); 410 411 used_map = &stmp->map; 412 413 vlan_tagged = sfxge_tx_maybe_insert_tag(txq, mbuf); 414 if (vlan_tagged) { 415 sfxge_next_stmp(txq, &stmp); 416 } 417 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) { 418 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg, vlan_tagged); 419 if (rc < 0) 420 goto reject_mapped; 421 stmp = &txq->stmp[(rc - 1) & txq->ptr_mask]; 422 } else { 423 /* Add the mapping to the fragment list, and set flags 424 * for the buffer. 425 */ 426 427 i = 0; 428 for (;;) { 429 desc = &txq->pend_desc[i + vlan_tagged]; 430 eop = (i == n_dma_seg - 1); 431 efx_tx_qdesc_dma_create(txq->common, 432 dma_seg[i].ds_addr, 433 dma_seg[i].ds_len, 434 eop, 435 desc); 436 if (eop) 437 break; 438 i++; 439 sfxge_next_stmp(txq, &stmp); 440 } 441 txq->n_pend_desc = n_dma_seg + vlan_tagged; 442 } 443 444 /* 445 * If the mapping required more than one descriptor 446 * then we need to associate the DMA map with the last 447 * descriptor, not the first. 448 */ 449 if (used_map != &stmp->map) { 450 map = stmp->map; 451 stmp->map = *used_map; 452 *used_map = map; 453 } 454 455 stmp->u.mbuf = mbuf; 456 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF; 457 458 /* Post the fragment list. */ 459 sfxge_tx_qlist_post(txq); 460 461 return (0); 462 463 reject_mapped: 464 bus_dmamap_unload(txq->packet_dma_tag, *used_map); 465 reject: 466 /* Drop the packet on the floor. */ 467 m_freem(mbuf); 468 ++txq->drops; 469 470 return (rc); 471 } 472 473 /* 474 * Drain the deferred packet list into the transmit queue. 475 */ 476 static void 477 sfxge_tx_qdpl_drain(struct sfxge_txq *txq) 478 { 479 struct sfxge_softc *sc; 480 struct sfxge_tx_dpl *stdp; 481 struct mbuf *mbuf, *next; 482 unsigned int count; 483 unsigned int non_tcp_count; 484 unsigned int pushed; 485 int rc; 486 487 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 488 489 sc = txq->sc; 490 stdp = &txq->dpl; 491 pushed = txq->added; 492 493 if (__predict_true(txq->init_state == SFXGE_TXQ_STARTED)) { 494 prefetch_read_many(sc->enp); 495 prefetch_read_many(txq->common); 496 } 497 498 mbuf = stdp->std_get; 499 count = stdp->std_get_count; 500 non_tcp_count = stdp->std_get_non_tcp_count; 501 502 if (count > stdp->std_get_hiwat) 503 stdp->std_get_hiwat = count; 504 505 while (count != 0) { 506 KASSERT(mbuf != NULL, ("mbuf == NULL")); 507 508 next = mbuf->m_nextpkt; 509 mbuf->m_nextpkt = NULL; 510 511 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */ 512 513 if (next != NULL) 514 prefetch_read_many(next); 515 516 rc = sfxge_tx_queue_mbuf(txq, mbuf); 517 --count; 518 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf); 519 mbuf = next; 520 if (rc != 0) 521 continue; 522 523 if (txq->blocked) 524 break; 525 526 /* Push the fragments to the hardware in batches. */ 527 if (txq->added - pushed >= SFXGE_TX_BATCH) { 528 efx_tx_qpush(txq->common, txq->added, pushed); 529 pushed = txq->added; 530 } 531 } 532 533 if (count == 0) { 534 KASSERT(mbuf == NULL, ("mbuf != NULL")); 535 KASSERT(non_tcp_count == 0, 536 ("inconsistent TCP/non-TCP detection")); 537 stdp->std_get = NULL; 538 stdp->std_get_count = 0; 539 stdp->std_get_non_tcp_count = 0; 540 stdp->std_getp = &stdp->std_get; 541 } else { 542 stdp->std_get = mbuf; 543 stdp->std_get_count = count; 544 stdp->std_get_non_tcp_count = non_tcp_count; 545 } 546 547 if (txq->added != pushed) 548 efx_tx_qpush(txq->common, txq->added, pushed); 549 550 KASSERT(txq->blocked || stdp->std_get_count == 0, 551 ("queue unblocked but count is non-zero")); 552 } 553 554 #define SFXGE_TX_QDPL_PENDING(_txq) ((_txq)->dpl.std_put != 0) 555 556 /* 557 * Service the deferred packet list. 558 * 559 * NOTE: drops the txq mutex! 560 */ 561 static void 562 sfxge_tx_qdpl_service(struct sfxge_txq *txq) 563 { 564 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 565 566 do { 567 if (SFXGE_TX_QDPL_PENDING(txq)) 568 sfxge_tx_qdpl_swizzle(txq); 569 570 if (!txq->blocked) 571 sfxge_tx_qdpl_drain(txq); 572 573 SFXGE_TXQ_UNLOCK(txq); 574 } while (SFXGE_TX_QDPL_PENDING(txq) && 575 SFXGE_TXQ_TRYLOCK(txq)); 576 } 577 578 /* 579 * Put a packet on the deferred packet get-list. 580 */ 581 static int 582 sfxge_tx_qdpl_put_locked(struct sfxge_txq *txq, struct mbuf *mbuf) 583 { 584 struct sfxge_tx_dpl *stdp; 585 586 stdp = &txq->dpl; 587 588 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); 589 590 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); 591 592 if (stdp->std_get_count >= stdp->std_get_max) { 593 txq->get_overflow++; 594 return (ENOBUFS); 595 } 596 if (sfxge_is_mbuf_non_tcp(mbuf)) { 597 if (stdp->std_get_non_tcp_count >= 598 stdp->std_get_non_tcp_max) { 599 txq->get_non_tcp_overflow++; 600 return (ENOBUFS); 601 } 602 stdp->std_get_non_tcp_count++; 603 } 604 605 *(stdp->std_getp) = mbuf; 606 stdp->std_getp = &mbuf->m_nextpkt; 607 stdp->std_get_count++; 608 609 return (0); 610 } 611 612 /* 613 * Put a packet on the deferred packet put-list. 614 * 615 * We overload the csum_data field in the mbuf to keep track of this length 616 * because there is no cheap alternative to avoid races. 617 */ 618 static int 619 sfxge_tx_qdpl_put_unlocked(struct sfxge_txq *txq, struct mbuf *mbuf) 620 { 621 struct sfxge_tx_dpl *stdp; 622 volatile uintptr_t *putp; 623 uintptr_t old; 624 uintptr_t new; 625 unsigned int put_count; 626 627 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); 628 629 SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq); 630 631 stdp = &txq->dpl; 632 putp = &stdp->std_put; 633 new = (uintptr_t)mbuf; 634 635 do { 636 old = *putp; 637 if (old != 0) { 638 struct mbuf *mp = (struct mbuf *)old; 639 put_count = mp->m_pkthdr.csum_data; 640 } else 641 put_count = 0; 642 if (put_count >= stdp->std_put_max) { 643 atomic_add_long(&txq->put_overflow, 1); 644 return (ENOBUFS); 645 } 646 mbuf->m_pkthdr.csum_data = put_count + 1; 647 mbuf->m_nextpkt = (void *)old; 648 } while (atomic_cmpset_ptr(putp, old, new) == 0); 649 650 return (0); 651 } 652 653 /* 654 * Called from if_transmit - will try to grab the txq lock and enqueue to the 655 * put list if it succeeds, otherwise try to push onto the defer list if space. 656 */ 657 static int 658 sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m) 659 { 660 int rc; 661 662 if (!SFXGE_LINK_UP(txq->sc)) { 663 atomic_add_long(&txq->netdown_drops, 1); 664 return (ENETDOWN); 665 } 666 667 /* 668 * Try to grab the txq lock. If we are able to get the lock, 669 * the packet will be appended to the "get list" of the deferred 670 * packet list. Otherwise, it will be pushed on the "put list". 671 */ 672 if (SFXGE_TXQ_TRYLOCK(txq)) { 673 /* First swizzle put-list to get-list to keep order */ 674 sfxge_tx_qdpl_swizzle(txq); 675 676 rc = sfxge_tx_qdpl_put_locked(txq, m); 677 678 /* Try to service the list. */ 679 sfxge_tx_qdpl_service(txq); 680 /* Lock has been dropped. */ 681 } else { 682 rc = sfxge_tx_qdpl_put_unlocked(txq, m); 683 684 /* 685 * Try to grab the lock again. 686 * 687 * If we are able to get the lock, we need to process 688 * the deferred packet list. If we are not able to get 689 * the lock, another thread is processing the list. 690 */ 691 if ((rc == 0) && SFXGE_TXQ_TRYLOCK(txq)) { 692 sfxge_tx_qdpl_service(txq); 693 /* Lock has been dropped. */ 694 } 695 } 696 697 SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq); 698 699 return (rc); 700 } 701 702 static void 703 sfxge_tx_qdpl_flush(struct sfxge_txq *txq) 704 { 705 struct sfxge_tx_dpl *stdp = &txq->dpl; 706 struct mbuf *mbuf, *next; 707 708 SFXGE_TXQ_LOCK(txq); 709 710 sfxge_tx_qdpl_swizzle(txq); 711 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) { 712 next = mbuf->m_nextpkt; 713 m_freem(mbuf); 714 } 715 stdp->std_get = NULL; 716 stdp->std_get_count = 0; 717 stdp->std_get_non_tcp_count = 0; 718 stdp->std_getp = &stdp->std_get; 719 720 SFXGE_TXQ_UNLOCK(txq); 721 } 722 723 void 724 sfxge_if_qflush(struct ifnet *ifp) 725 { 726 struct sfxge_softc *sc; 727 unsigned int i; 728 729 sc = ifp->if_softc; 730 731 for (i = 0; i < sc->txq_count; i++) 732 sfxge_tx_qdpl_flush(sc->txq[i]); 733 } 734 735 #if SFXGE_TX_PARSE_EARLY 736 737 /* There is little space for user data in mbuf pkthdr, so we 738 * use l*hlen fields which are not used by the driver otherwise 739 * to store header offsets. 740 * The fields are 8-bit, but it's ok, no header may be longer than 255 bytes. 741 */ 742 743 744 #define TSO_MBUF_PROTO(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.sixteen[0]) 745 /* We abuse l5hlen here because PH_loc can hold only 64 bits of data */ 746 #define TSO_MBUF_FLAGS(_mbuf) ((_mbuf)->m_pkthdr.l5hlen) 747 #define TSO_MBUF_PACKETID(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.sixteen[1]) 748 #define TSO_MBUF_SEQNUM(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.thirtytwo[1]) 749 750 static void sfxge_parse_tx_packet(struct mbuf *mbuf) 751 { 752 struct ether_header *eh = mtod(mbuf, struct ether_header *); 753 const struct tcphdr *th; 754 struct tcphdr th_copy; 755 756 /* Find network protocol and header */ 757 TSO_MBUF_PROTO(mbuf) = eh->ether_type; 758 if (TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_VLAN)) { 759 struct ether_vlan_header *veh = 760 mtod(mbuf, struct ether_vlan_header *); 761 TSO_MBUF_PROTO(mbuf) = veh->evl_proto; 762 mbuf->m_pkthdr.l2hlen = sizeof(*veh); 763 } else { 764 mbuf->m_pkthdr.l2hlen = sizeof(*eh); 765 } 766 767 /* Find TCP header */ 768 if (TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_IP)) { 769 const struct ip *iph = (const struct ip *)mtodo(mbuf, mbuf->m_pkthdr.l2hlen); 770 771 KASSERT(iph->ip_p == IPPROTO_TCP, 772 ("TSO required on non-TCP packet")); 773 mbuf->m_pkthdr.l3hlen = mbuf->m_pkthdr.l2hlen + 4 * iph->ip_hl; 774 TSO_MBUF_PACKETID(mbuf) = iph->ip_id; 775 } else { 776 KASSERT(TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_IPV6), 777 ("TSO required on non-IP packet")); 778 KASSERT(((const struct ip6_hdr *)mtodo(mbuf, mbuf->m_pkthdr.l2hlen))->ip6_nxt == 779 IPPROTO_TCP, 780 ("TSO required on non-TCP packet")); 781 mbuf->m_pkthdr.l3hlen = mbuf->m_pkthdr.l2hlen + sizeof(struct ip6_hdr); 782 TSO_MBUF_PACKETID(mbuf) = 0; 783 } 784 785 KASSERT(mbuf->m_len >= mbuf->m_pkthdr.l3hlen, 786 ("network header is fragmented in mbuf")); 787 788 /* We need TCP header including flags (window is the next) */ 789 if (mbuf->m_len < mbuf->m_pkthdr.l3hlen + offsetof(struct tcphdr, th_win)) { 790 m_copydata(mbuf, mbuf->m_pkthdr.l3hlen, sizeof(th_copy), 791 (caddr_t)&th_copy); 792 th = &th_copy; 793 } else { 794 th = (const struct tcphdr *)mtodo(mbuf, mbuf->m_pkthdr.l3hlen); 795 } 796 797 mbuf->m_pkthdr.l4hlen = mbuf->m_pkthdr.l3hlen + 4 * th->th_off; 798 TSO_MBUF_SEQNUM(mbuf) = ntohl(th->th_seq); 799 800 /* These flags must not be duplicated */ 801 /* 802 * RST should not be duplicated as well, but FreeBSD kernel 803 * generates TSO packets with RST flag. So, do not assert 804 * its absence. 805 */ 806 KASSERT(!(th->th_flags & (TH_URG | TH_SYN)), 807 ("incompatible TCP flag 0x%x on TSO packet", 808 th->th_flags & (TH_URG | TH_SYN))); 809 TSO_MBUF_FLAGS(mbuf) = th->th_flags; 810 } 811 #endif 812 813 /* 814 * TX start -- called by the stack. 815 */ 816 int 817 sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) 818 { 819 struct sfxge_softc *sc; 820 struct sfxge_txq *txq; 821 int rc; 822 823 sc = (struct sfxge_softc *)ifp->if_softc; 824 825 /* 826 * Transmit may be called when interface is up from the kernel 827 * point of view, but not yet up (in progress) from the driver 828 * point of view. I.e. link aggregation bring up. 829 * Transmit may be called when interface is up from the driver 830 * point of view, but already down from the kernel point of 831 * view. I.e. Rx when interface shutdown is in progress. 832 */ 833 KASSERT((ifp->if_flags & IFF_UP) || (sc->if_flags & IFF_UP), 834 ("interface not up")); 835 836 /* Pick the desired transmit queue. */ 837 if (m->m_pkthdr.csum_flags & 838 (CSUM_DELAY_DATA | CSUM_TCP_IPV6 | CSUM_UDP_IPV6 | CSUM_TSO)) { 839 int index = 0; 840 841 #ifdef RSS 842 uint32_t bucket_id; 843 844 /* 845 * Select a TX queue which matches the corresponding 846 * RX queue for the hash in order to assign both 847 * TX and RX parts of the flow to the same CPU 848 */ 849 if (rss_m2bucket(m, &bucket_id) == 0) 850 index = bucket_id % (sc->txq_count - (SFXGE_TXQ_NTYPES - 1)); 851 #else 852 /* check if flowid is set */ 853 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 854 uint32_t hash = m->m_pkthdr.flowid; 855 uint32_t idx = hash % nitems(sc->rx_indir_table); 856 857 index = sc->rx_indir_table[idx]; 858 } 859 #endif 860 #if SFXGE_TX_PARSE_EARLY 861 if (m->m_pkthdr.csum_flags & CSUM_TSO) 862 sfxge_parse_tx_packet(m); 863 #endif 864 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index]; 865 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) { 866 txq = sc->txq[SFXGE_TXQ_IP_CKSUM]; 867 } else { 868 txq = sc->txq[SFXGE_TXQ_NON_CKSUM]; 869 } 870 871 rc = sfxge_tx_packet_add(txq, m); 872 if (rc != 0) 873 m_freem(m); 874 875 return (rc); 876 } 877 878 /* 879 * Software "TSO". Not quite as good as doing it in hardware, but 880 * still faster than segmenting in the stack. 881 */ 882 883 struct sfxge_tso_state { 884 /* Output position */ 885 unsigned out_len; /* Remaining length in current segment */ 886 unsigned seqnum; /* Current sequence number */ 887 unsigned packet_space; /* Remaining space in current packet */ 888 unsigned segs_space; /* Remaining number of DMA segments 889 for the packet (FATSOv2 only) */ 890 891 /* Input position */ 892 uint64_t dma_addr; /* DMA address of current position */ 893 unsigned in_len; /* Remaining length in current mbuf */ 894 895 const struct mbuf *mbuf; /* Input mbuf (head of chain) */ 896 u_short protocol; /* Network protocol (after VLAN decap) */ 897 ssize_t nh_off; /* Offset of network header */ 898 ssize_t tcph_off; /* Offset of TCP header */ 899 unsigned header_len; /* Number of bytes of header */ 900 unsigned seg_size; /* TCP segment size */ 901 int fw_assisted; /* Use FW-assisted TSO */ 902 u_short packet_id; /* IPv4 packet ID from the original packet */ 903 uint8_t tcp_flags; /* TCP flags */ 904 efx_desc_t header_desc; /* Precomputed header descriptor for 905 * FW-assisted TSO */ 906 }; 907 908 #if !SFXGE_TX_PARSE_EARLY 909 static const struct ip *tso_iph(const struct sfxge_tso_state *tso) 910 { 911 KASSERT(tso->protocol == htons(ETHERTYPE_IP), 912 ("tso_iph() in non-IPv4 state")); 913 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off); 914 } 915 916 static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso) 917 { 918 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 919 ("tso_ip6h() in non-IPv6 state")); 920 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off); 921 } 922 923 static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso) 924 { 925 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off); 926 } 927 #endif 928 929 930 /* Size of preallocated TSO header buffers. Larger blocks must be 931 * allocated from the heap. 932 */ 933 #define TSOH_STD_SIZE 128 934 935 /* At most half the descriptors in the queue at any time will refer to 936 * a TSO header buffer, since they must always be followed by a 937 * payload descriptor referring to an mbuf. 938 */ 939 #define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u) 940 #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) 941 #define TSOH_PAGE_COUNT(_txq_entries) \ 942 howmany(TSOH_COUNT(_txq_entries), TSOH_PER_PAGE) 943 944 static int tso_init(struct sfxge_txq *txq) 945 { 946 struct sfxge_softc *sc = txq->sc; 947 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries); 948 int i, rc; 949 950 /* Allocate TSO header buffers */ 951 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]), 952 M_SFXGE, M_WAITOK); 953 954 for (i = 0; i < tsoh_page_count; i++) { 955 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]); 956 if (rc != 0) 957 goto fail; 958 } 959 960 return (0); 961 962 fail: 963 while (i-- > 0) 964 sfxge_dma_free(&txq->tsoh_buffer[i]); 965 free(txq->tsoh_buffer, M_SFXGE); 966 txq->tsoh_buffer = NULL; 967 return (rc); 968 } 969 970 static void tso_fini(struct sfxge_txq *txq) 971 { 972 int i; 973 974 if (txq->tsoh_buffer != NULL) { 975 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++) 976 sfxge_dma_free(&txq->tsoh_buffer[i]); 977 free(txq->tsoh_buffer, M_SFXGE); 978 } 979 } 980 981 static void tso_start(struct sfxge_txq *txq, struct sfxge_tso_state *tso, 982 const bus_dma_segment_t *hdr_dma_seg, 983 struct mbuf *mbuf) 984 { 985 const efx_nic_cfg_t *encp = efx_nic_cfg_get(txq->sc->enp); 986 #if !SFXGE_TX_PARSE_EARLY 987 struct ether_header *eh = mtod(mbuf, struct ether_header *); 988 const struct tcphdr *th; 989 struct tcphdr th_copy; 990 #endif 991 992 tso->fw_assisted = txq->tso_fw_assisted; 993 tso->mbuf = mbuf; 994 995 /* Find network protocol and header */ 996 #if !SFXGE_TX_PARSE_EARLY 997 tso->protocol = eh->ether_type; 998 if (tso->protocol == htons(ETHERTYPE_VLAN)) { 999 struct ether_vlan_header *veh = 1000 mtod(mbuf, struct ether_vlan_header *); 1001 tso->protocol = veh->evl_proto; 1002 tso->nh_off = sizeof(*veh); 1003 } else { 1004 tso->nh_off = sizeof(*eh); 1005 } 1006 #else 1007 tso->protocol = TSO_MBUF_PROTO(mbuf); 1008 tso->nh_off = mbuf->m_pkthdr.l2hlen; 1009 tso->tcph_off = mbuf->m_pkthdr.l3hlen; 1010 tso->packet_id = ntohs(TSO_MBUF_PACKETID(mbuf)); 1011 #endif 1012 1013 #if !SFXGE_TX_PARSE_EARLY 1014 /* Find TCP header */ 1015 if (tso->protocol == htons(ETHERTYPE_IP)) { 1016 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP, 1017 ("TSO required on non-TCP packet")); 1018 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl; 1019 tso->packet_id = ntohs(tso_iph(tso)->ip_id); 1020 } else { 1021 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), 1022 ("TSO required on non-IP packet")); 1023 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP, 1024 ("TSO required on non-TCP packet")); 1025 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr); 1026 tso->packet_id = 0; 1027 } 1028 #endif 1029 1030 1031 if (tso->fw_assisted && 1032 __predict_false(tso->tcph_off > 1033 encp->enc_tx_tso_tcp_header_offset_limit)) { 1034 tso->fw_assisted = 0; 1035 } 1036 1037 1038 #if !SFXGE_TX_PARSE_EARLY 1039 KASSERT(mbuf->m_len >= tso->tcph_off, 1040 ("network header is fragmented in mbuf")); 1041 /* We need TCP header including flags (window is the next) */ 1042 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) { 1043 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy), 1044 (caddr_t)&th_copy); 1045 th = &th_copy; 1046 } else { 1047 th = tso_tcph(tso); 1048 } 1049 tso->header_len = tso->tcph_off + 4 * th->th_off; 1050 #else 1051 tso->header_len = mbuf->m_pkthdr.l4hlen; 1052 #endif 1053 tso->seg_size = mbuf->m_pkthdr.tso_segsz; 1054 1055 #if !SFXGE_TX_PARSE_EARLY 1056 tso->seqnum = ntohl(th->th_seq); 1057 1058 /* These flags must not be duplicated */ 1059 /* 1060 * RST should not be duplicated as well, but FreeBSD kernel 1061 * generates TSO packets with RST flag. So, do not assert 1062 * its absence. 1063 */ 1064 KASSERT(!(th->th_flags & (TH_URG | TH_SYN)), 1065 ("incompatible TCP flag 0x%x on TSO packet", 1066 th->th_flags & (TH_URG | TH_SYN))); 1067 tso->tcp_flags = th->th_flags; 1068 #else 1069 tso->seqnum = TSO_MBUF_SEQNUM(mbuf); 1070 tso->tcp_flags = TSO_MBUF_FLAGS(mbuf); 1071 #endif 1072 1073 tso->out_len = mbuf->m_pkthdr.len - tso->header_len; 1074 1075 if (tso->fw_assisted) { 1076 if (hdr_dma_seg->ds_len >= tso->header_len) 1077 efx_tx_qdesc_dma_create(txq->common, 1078 hdr_dma_seg->ds_addr, 1079 tso->header_len, 1080 B_FALSE, 1081 &tso->header_desc); 1082 else 1083 tso->fw_assisted = 0; 1084 } 1085 } 1086 1087 /* 1088 * tso_fill_packet_with_fragment - form descriptors for the current fragment 1089 * 1090 * Form descriptors for the current fragment, until we reach the end 1091 * of fragment or end-of-packet. Return 0 on success, 1 if not enough 1092 * space. 1093 */ 1094 static void tso_fill_packet_with_fragment(struct sfxge_txq *txq, 1095 struct sfxge_tso_state *tso) 1096 { 1097 efx_desc_t *desc; 1098 int n; 1099 uint64_t dma_addr = tso->dma_addr; 1100 boolean_t eop; 1101 1102 if (tso->in_len == 0 || tso->packet_space == 0) 1103 return; 1104 1105 KASSERT(tso->in_len > 0, ("TSO input length went negative")); 1106 KASSERT(tso->packet_space > 0, ("TSO packet space went negative")); 1107 1108 if (tso->fw_assisted & SFXGE_FATSOV2) { 1109 n = tso->in_len; 1110 tso->out_len -= n; 1111 tso->seqnum += n; 1112 tso->in_len = 0; 1113 if (n < tso->packet_space) { 1114 tso->packet_space -= n; 1115 tso->segs_space--; 1116 } else { 1117 tso->packet_space = tso->seg_size - 1118 (n - tso->packet_space) % tso->seg_size; 1119 tso->segs_space = 1120 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1 - 1121 (tso->packet_space != tso->seg_size); 1122 } 1123 } else { 1124 n = min(tso->in_len, tso->packet_space); 1125 tso->packet_space -= n; 1126 tso->out_len -= n; 1127 tso->dma_addr += n; 1128 tso->in_len -= n; 1129 } 1130 1131 /* 1132 * It is OK to use binary OR below to avoid extra branching 1133 * since all conditions may always be checked. 1134 */ 1135 eop = (tso->out_len == 0) | (tso->packet_space == 0) | 1136 (tso->segs_space == 0); 1137 1138 desc = &txq->pend_desc[txq->n_pend_desc++]; 1139 efx_tx_qdesc_dma_create(txq->common, dma_addr, n, eop, desc); 1140 } 1141 1142 /* Callback from bus_dmamap_load() for long TSO headers. */ 1143 static void tso_map_long_header(void *dma_addr_ret, 1144 bus_dma_segment_t *segs, int nseg, 1145 int error) 1146 { 1147 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) && 1148 __predict_true(nseg == 1)) ? 1149 segs->ds_addr : 0); 1150 } 1151 1152 /* 1153 * tso_start_new_packet - generate a new header and prepare for the new packet 1154 * 1155 * Generate a new header and prepare for the new packet. Return 0 on 1156 * success, or an error code if failed to alloc header. 1157 */ 1158 static int tso_start_new_packet(struct sfxge_txq *txq, 1159 struct sfxge_tso_state *tso, 1160 unsigned int *idp) 1161 { 1162 unsigned int id = *idp; 1163 struct tcphdr *tsoh_th; 1164 unsigned ip_length; 1165 caddr_t header; 1166 uint64_t dma_addr; 1167 bus_dmamap_t map; 1168 efx_desc_t *desc; 1169 int rc; 1170 1171 if (tso->fw_assisted) { 1172 if (tso->fw_assisted & SFXGE_FATSOV2) { 1173 /* Add 2 FATSOv2 option descriptors */ 1174 desc = &txq->pend_desc[txq->n_pend_desc]; 1175 efx_tx_qdesc_tso2_create(txq->common, 1176 tso->packet_id, 1177 tso->seqnum, 1178 tso->seg_size, 1179 desc, 1180 EFX_TX_FATSOV2_OPT_NDESCS); 1181 desc += EFX_TX_FATSOV2_OPT_NDESCS; 1182 txq->n_pend_desc += EFX_TX_FATSOV2_OPT_NDESCS; 1183 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); 1184 id = (id + EFX_TX_FATSOV2_OPT_NDESCS) & txq->ptr_mask; 1185 1186 tso->segs_space = 1187 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1; 1188 } else { 1189 uint8_t tcp_flags = tso->tcp_flags; 1190 1191 if (tso->out_len > tso->seg_size) 1192 tcp_flags &= ~(TH_FIN | TH_PUSH); 1193 1194 /* Add FATSOv1 option descriptor */ 1195 desc = &txq->pend_desc[txq->n_pend_desc++]; 1196 efx_tx_qdesc_tso_create(txq->common, 1197 tso->packet_id, 1198 tso->seqnum, 1199 tcp_flags, 1200 desc++); 1201 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); 1202 id = (id + 1) & txq->ptr_mask; 1203 1204 tso->seqnum += tso->seg_size; 1205 tso->segs_space = UINT_MAX; 1206 } 1207 1208 /* Header DMA descriptor */ 1209 *desc = tso->header_desc; 1210 txq->n_pend_desc++; 1211 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); 1212 id = (id + 1) & txq->ptr_mask; 1213 } else { 1214 /* Allocate a DMA-mapped header buffer. */ 1215 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) { 1216 unsigned int page_index = (id / 2) / TSOH_PER_PAGE; 1217 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE; 1218 1219 header = (txq->tsoh_buffer[page_index].esm_base + 1220 buf_index * TSOH_STD_SIZE); 1221 dma_addr = (txq->tsoh_buffer[page_index].esm_addr + 1222 buf_index * TSOH_STD_SIZE); 1223 map = txq->tsoh_buffer[page_index].esm_map; 1224 1225 KASSERT(txq->stmp[id].flags == 0, 1226 ("stmp flags are not 0")); 1227 } else { 1228 struct sfxge_tx_mapping *stmp = &txq->stmp[id]; 1229 1230 /* We cannot use bus_dmamem_alloc() as that may sleep */ 1231 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); 1232 if (__predict_false(!header)) 1233 return (ENOMEM); 1234 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, 1235 header, tso->header_len, 1236 tso_map_long_header, &dma_addr, 1237 BUS_DMA_NOWAIT); 1238 if (__predict_false(dma_addr == 0)) { 1239 if (rc == 0) { 1240 /* Succeeded but got >1 segment */ 1241 bus_dmamap_unload(txq->packet_dma_tag, 1242 stmp->map); 1243 rc = EINVAL; 1244 } 1245 free(header, M_SFXGE); 1246 return (rc); 1247 } 1248 map = stmp->map; 1249 1250 txq->tso_long_headers++; 1251 stmp->u.heap_buf = header; 1252 stmp->flags = TX_BUF_UNMAP; 1253 } 1254 1255 tsoh_th = (struct tcphdr *)(header + tso->tcph_off); 1256 1257 /* Copy and update the headers. */ 1258 m_copydata(tso->mbuf, 0, tso->header_len, header); 1259 1260 tsoh_th->th_seq = htonl(tso->seqnum); 1261 tso->seqnum += tso->seg_size; 1262 if (tso->out_len > tso->seg_size) { 1263 /* This packet will not finish the TSO burst. */ 1264 ip_length = tso->header_len - tso->nh_off + tso->seg_size; 1265 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH); 1266 } else { 1267 /* This packet will be the last in the TSO burst. */ 1268 ip_length = tso->header_len - tso->nh_off + tso->out_len; 1269 } 1270 1271 if (tso->protocol == htons(ETHERTYPE_IP)) { 1272 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off); 1273 tsoh_iph->ip_len = htons(ip_length); 1274 /* XXX We should increment ip_id, but FreeBSD doesn't 1275 * currently allocate extra IDs for multiple segments. 1276 */ 1277 } else { 1278 struct ip6_hdr *tsoh_iph = 1279 (struct ip6_hdr *)(header + tso->nh_off); 1280 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph)); 1281 } 1282 1283 /* Make the header visible to the hardware. */ 1284 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE); 1285 1286 /* Form a descriptor for this header. */ 1287 desc = &txq->pend_desc[txq->n_pend_desc++]; 1288 efx_tx_qdesc_dma_create(txq->common, 1289 dma_addr, 1290 tso->header_len, 1291 0, 1292 desc); 1293 id = (id + 1) & txq->ptr_mask; 1294 1295 tso->segs_space = UINT_MAX; 1296 } 1297 tso->packet_space = tso->seg_size; 1298 txq->tso_packets++; 1299 *idp = id; 1300 1301 return (0); 1302 } 1303 1304 static int 1305 sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, 1306 const bus_dma_segment_t *dma_seg, int n_dma_seg, 1307 int vlan_tagged) 1308 { 1309 struct sfxge_tso_state tso; 1310 unsigned int id; 1311 unsigned skipped = 0; 1312 1313 tso_start(txq, &tso, dma_seg, mbuf); 1314 1315 while (dma_seg->ds_len + skipped <= tso.header_len) { 1316 skipped += dma_seg->ds_len; 1317 --n_dma_seg; 1318 KASSERT(n_dma_seg, ("no payload found in TSO packet")); 1319 ++dma_seg; 1320 } 1321 tso.in_len = dma_seg->ds_len - (tso.header_len - skipped); 1322 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped); 1323 1324 id = (txq->added + vlan_tagged) & txq->ptr_mask; 1325 if (__predict_false(tso_start_new_packet(txq, &tso, &id))) 1326 return (-1); 1327 1328 while (1) { 1329 tso_fill_packet_with_fragment(txq, &tso); 1330 /* Exactly one DMA descriptor is added */ 1331 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); 1332 id = (id + 1) & txq->ptr_mask; 1333 1334 /* Move onto the next fragment? */ 1335 if (tso.in_len == 0) { 1336 --n_dma_seg; 1337 if (n_dma_seg == 0) 1338 break; 1339 ++dma_seg; 1340 tso.in_len = dma_seg->ds_len; 1341 tso.dma_addr = dma_seg->ds_addr; 1342 } 1343 1344 /* End of packet? */ 1345 if ((tso.packet_space == 0) | (tso.segs_space == 0)) { 1346 unsigned int n_fatso_opt_desc = 1347 (tso.fw_assisted & SFXGE_FATSOV2) ? 1348 EFX_TX_FATSOV2_OPT_NDESCS : 1349 (tso.fw_assisted & SFXGE_FATSOV1) ? 1 : 0; 1350 1351 /* If the queue is now full due to tiny MSS, 1352 * or we can't create another header, discard 1353 * the remainder of the input mbuf but do not 1354 * roll back the work we have done. 1355 */ 1356 if (txq->n_pend_desc + n_fatso_opt_desc + 1357 1 /* header */ + n_dma_seg > txq->max_pkt_desc) { 1358 txq->tso_pdrop_too_many++; 1359 break; 1360 } 1361 if (__predict_false(tso_start_new_packet(txq, &tso, 1362 &id))) { 1363 txq->tso_pdrop_no_rsrc++; 1364 break; 1365 } 1366 } 1367 } 1368 1369 txq->tso_bursts++; 1370 return (id); 1371 } 1372 1373 static void 1374 sfxge_tx_qunblock(struct sfxge_txq *txq) 1375 { 1376 struct sfxge_softc *sc; 1377 struct sfxge_evq *evq; 1378 1379 sc = txq->sc; 1380 evq = sc->evq[txq->evq_index]; 1381 1382 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); 1383 1384 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) 1385 return; 1386 1387 SFXGE_TXQ_LOCK(txq); 1388 1389 if (txq->blocked) { 1390 unsigned int level; 1391 1392 level = txq->added - txq->completed; 1393 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) { 1394 /* reaped must be in sync with blocked */ 1395 sfxge_tx_qreap(txq); 1396 txq->blocked = 0; 1397 } 1398 } 1399 1400 sfxge_tx_qdpl_service(txq); 1401 /* note: lock has been dropped */ 1402 } 1403 1404 void 1405 sfxge_tx_qflush_done(struct sfxge_txq *txq) 1406 { 1407 1408 txq->flush_state = SFXGE_FLUSH_DONE; 1409 } 1410 1411 static void 1412 sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index) 1413 { 1414 struct sfxge_txq *txq; 1415 struct sfxge_evq *evq; 1416 unsigned int count; 1417 1418 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 1419 1420 txq = sc->txq[index]; 1421 evq = sc->evq[txq->evq_index]; 1422 1423 SFXGE_EVQ_LOCK(evq); 1424 SFXGE_TXQ_LOCK(txq); 1425 1426 KASSERT(txq->init_state == SFXGE_TXQ_STARTED, 1427 ("txq->init_state != SFXGE_TXQ_STARTED")); 1428 1429 txq->init_state = SFXGE_TXQ_INITIALIZED; 1430 1431 if (txq->flush_state != SFXGE_FLUSH_DONE) { 1432 txq->flush_state = SFXGE_FLUSH_PENDING; 1433 1434 SFXGE_EVQ_UNLOCK(evq); 1435 SFXGE_TXQ_UNLOCK(txq); 1436 1437 /* Flush the transmit queue. */ 1438 if (efx_tx_qflush(txq->common) != 0) { 1439 log(LOG_ERR, "%s: Flushing Tx queue %u failed\n", 1440 device_get_nameunit(sc->dev), index); 1441 txq->flush_state = SFXGE_FLUSH_DONE; 1442 } else { 1443 count = 0; 1444 do { 1445 /* Spin for 100ms. */ 1446 DELAY(100000); 1447 if (txq->flush_state != SFXGE_FLUSH_PENDING) 1448 break; 1449 } while (++count < 20); 1450 } 1451 SFXGE_EVQ_LOCK(evq); 1452 SFXGE_TXQ_LOCK(txq); 1453 1454 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED, 1455 ("txq->flush_state == SFXGE_FLUSH_FAILED")); 1456 1457 if (txq->flush_state != SFXGE_FLUSH_DONE) { 1458 /* Flush timeout */ 1459 log(LOG_ERR, "%s: Cannot flush Tx queue %u\n", 1460 device_get_nameunit(sc->dev), index); 1461 txq->flush_state = SFXGE_FLUSH_DONE; 1462 } 1463 } 1464 1465 txq->blocked = 0; 1466 txq->pending = txq->added; 1467 1468 sfxge_tx_qcomplete(txq, evq); 1469 KASSERT(txq->completed == txq->added, 1470 ("txq->completed != txq->added")); 1471 1472 sfxge_tx_qreap(txq); 1473 KASSERT(txq->reaped == txq->completed, 1474 ("txq->reaped != txq->completed")); 1475 1476 txq->added = 0; 1477 txq->pending = 0; 1478 txq->completed = 0; 1479 txq->reaped = 0; 1480 1481 /* Destroy the common code transmit queue. */ 1482 efx_tx_qdestroy(txq->common); 1483 txq->common = NULL; 1484 1485 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1486 EFX_TXQ_NBUFS(sc->txq_entries)); 1487 1488 SFXGE_EVQ_UNLOCK(evq); 1489 SFXGE_TXQ_UNLOCK(txq); 1490 } 1491 1492 /* 1493 * Estimate maximum number of Tx descriptors required for TSO packet. 1494 * With minimum MSS and maximum mbuf length we might need more (even 1495 * than a ring-ful of descriptors), but this should not happen in 1496 * practice except due to deliberate attack. In that case we will 1497 * truncate the output at a packet boundary. 1498 */ 1499 static unsigned int 1500 sfxge_tx_max_pkt_desc(const struct sfxge_softc *sc, enum sfxge_txq_type type, 1501 unsigned int tso_fw_assisted) 1502 { 1503 /* One descriptor for every input fragment */ 1504 unsigned int max_descs = SFXGE_TX_MAPPING_MAX_SEG; 1505 unsigned int sw_tso_max_descs; 1506 unsigned int fa_tso_v1_max_descs = 0; 1507 unsigned int fa_tso_v2_max_descs = 0; 1508 1509 /* VLAN tagging Tx option descriptor may be required */ 1510 if (efx_nic_cfg_get(sc->enp)->enc_hw_tx_insert_vlan_enabled) 1511 max_descs++; 1512 1513 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) { 1514 /* 1515 * Plus header and payload descriptor for each output segment. 1516 * Minus one since header fragment is already counted. 1517 * Even if FATSO is used, we should be ready to fallback 1518 * to do it in the driver. 1519 */ 1520 sw_tso_max_descs = SFXGE_TSO_MAX_SEGS * 2 - 1; 1521 1522 /* FW assisted TSOv1 requires one more descriptor per segment 1523 * in comparison to SW TSO */ 1524 if (tso_fw_assisted & SFXGE_FATSOV1) 1525 fa_tso_v1_max_descs = 1526 sw_tso_max_descs + SFXGE_TSO_MAX_SEGS; 1527 1528 /* FW assisted TSOv2 requires 3 (2 FATSO plus header) extra 1529 * descriptors per superframe limited by number of DMA fetches 1530 * per packet. The first packet header is already counted. 1531 */ 1532 if (tso_fw_assisted & SFXGE_FATSOV2) { 1533 fa_tso_v2_max_descs = 1534 howmany(SFXGE_TX_MAPPING_MAX_SEG, 1535 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1) * 1536 (EFX_TX_FATSOV2_OPT_NDESCS + 1) - 1; 1537 } 1538 1539 max_descs += MAX(sw_tso_max_descs, 1540 MAX(fa_tso_v1_max_descs, fa_tso_v2_max_descs)); 1541 } 1542 1543 return (max_descs); 1544 } 1545 1546 static int 1547 sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index) 1548 { 1549 struct sfxge_txq *txq; 1550 efsys_mem_t *esmp; 1551 uint16_t flags; 1552 unsigned int tso_fw_assisted; 1553 struct sfxge_evq *evq; 1554 unsigned int desc_index; 1555 int rc; 1556 1557 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 1558 1559 txq = sc->txq[index]; 1560 esmp = &txq->mem; 1561 evq = sc->evq[txq->evq_index]; 1562 1563 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1564 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1565 KASSERT(evq->init_state == SFXGE_EVQ_STARTED, 1566 ("evq->init_state != SFXGE_EVQ_STARTED")); 1567 1568 /* Program the buffer table. */ 1569 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp, 1570 EFX_TXQ_NBUFS(sc->txq_entries))) != 0) 1571 return (rc); 1572 1573 /* Determine the kind of queue we are creating. */ 1574 tso_fw_assisted = 0; 1575 switch (txq->type) { 1576 case SFXGE_TXQ_NON_CKSUM: 1577 flags = 0; 1578 break; 1579 case SFXGE_TXQ_IP_CKSUM: 1580 flags = EFX_TXQ_CKSUM_IPV4; 1581 break; 1582 case SFXGE_TXQ_IP_TCP_UDP_CKSUM: 1583 flags = EFX_TXQ_CKSUM_IPV4 | EFX_TXQ_CKSUM_TCPUDP; 1584 tso_fw_assisted = sc->tso_fw_assisted; 1585 if (tso_fw_assisted & SFXGE_FATSOV2) 1586 flags |= EFX_TXQ_FATSOV2; 1587 break; 1588 default: 1589 KASSERT(0, ("Impossible TX queue")); 1590 flags = 0; 1591 break; 1592 } 1593 1594 /* Create the common code transmit queue. */ 1595 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp, 1596 sc->txq_entries, txq->buf_base_id, flags, evq->common, 1597 &txq->common, &desc_index)) != 0) { 1598 /* Retry if no FATSOv2 resources, otherwise fail */ 1599 if ((rc != ENOSPC) || (~flags & EFX_TXQ_FATSOV2)) 1600 goto fail; 1601 1602 /* Looks like all FATSOv2 contexts are used */ 1603 flags &= ~EFX_TXQ_FATSOV2; 1604 tso_fw_assisted &= ~SFXGE_FATSOV2; 1605 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp, 1606 sc->txq_entries, txq->buf_base_id, flags, evq->common, 1607 &txq->common, &desc_index)) != 0) 1608 goto fail; 1609 } 1610 1611 /* Initialise queue descriptor indexes */ 1612 txq->added = txq->pending = txq->completed = txq->reaped = desc_index; 1613 1614 SFXGE_TXQ_LOCK(txq); 1615 1616 /* Enable the transmit queue. */ 1617 efx_tx_qenable(txq->common); 1618 1619 txq->init_state = SFXGE_TXQ_STARTED; 1620 txq->flush_state = SFXGE_FLUSH_REQUIRED; 1621 txq->tso_fw_assisted = tso_fw_assisted; 1622 1623 txq->max_pkt_desc = sfxge_tx_max_pkt_desc(sc, txq->type, 1624 tso_fw_assisted); 1625 1626 txq->hw_vlan_tci = 0; 1627 1628 SFXGE_TXQ_UNLOCK(txq); 1629 1630 return (0); 1631 1632 fail: 1633 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id, 1634 EFX_TXQ_NBUFS(sc->txq_entries)); 1635 return (rc); 1636 } 1637 1638 void 1639 sfxge_tx_stop(struct sfxge_softc *sc) 1640 { 1641 int index; 1642 1643 index = sc->txq_count; 1644 while (--index >= 0) 1645 sfxge_tx_qstop(sc, index); 1646 1647 /* Tear down the transmit module */ 1648 efx_tx_fini(sc->enp); 1649 } 1650 1651 int 1652 sfxge_tx_start(struct sfxge_softc *sc) 1653 { 1654 int index; 1655 int rc; 1656 1657 /* Initialize the common code transmit module. */ 1658 if ((rc = efx_tx_init(sc->enp)) != 0) 1659 return (rc); 1660 1661 for (index = 0; index < sc->txq_count; index++) { 1662 if ((rc = sfxge_tx_qstart(sc, index)) != 0) 1663 goto fail; 1664 } 1665 1666 return (0); 1667 1668 fail: 1669 while (--index >= 0) 1670 sfxge_tx_qstop(sc, index); 1671 1672 efx_tx_fini(sc->enp); 1673 1674 return (rc); 1675 } 1676 1677 static int 1678 sfxge_txq_stat_init(struct sfxge_txq *txq, struct sysctl_oid *txq_node) 1679 { 1680 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(txq->sc->dev); 1681 struct sysctl_oid *stat_node; 1682 unsigned int id; 1683 1684 stat_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(txq_node), OID_AUTO, 1685 "stats", CTLFLAG_RD, NULL, 1686 "Tx queue statistics"); 1687 if (stat_node == NULL) 1688 return (ENOMEM); 1689 1690 for (id = 0; id < nitems(sfxge_tx_stats); id++) { 1691 SYSCTL_ADD_ULONG( 1692 ctx, SYSCTL_CHILDREN(stat_node), OID_AUTO, 1693 sfxge_tx_stats[id].name, CTLFLAG_RD | CTLFLAG_STATS, 1694 (unsigned long *)((caddr_t)txq + sfxge_tx_stats[id].offset), 1695 ""); 1696 } 1697 1698 return (0); 1699 } 1700 1701 /** 1702 * Destroy a transmit queue. 1703 */ 1704 static void 1705 sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index) 1706 { 1707 struct sfxge_txq *txq; 1708 unsigned int nmaps; 1709 1710 txq = sc->txq[index]; 1711 1712 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, 1713 ("txq->init_state != SFXGE_TXQ_INITIALIZED")); 1714 1715 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) 1716 tso_fini(txq); 1717 1718 /* Free the context arrays. */ 1719 free(txq->pend_desc, M_SFXGE); 1720 nmaps = sc->txq_entries; 1721 while (nmaps-- != 0) 1722 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1723 free(txq->stmp, M_SFXGE); 1724 1725 /* Release DMA memory mapping. */ 1726 sfxge_dma_free(&txq->mem); 1727 1728 sc->txq[index] = NULL; 1729 1730 SFXGE_TXQ_LOCK_DESTROY(txq); 1731 1732 free(txq, M_SFXGE); 1733 } 1734 1735 static int 1736 sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, 1737 enum sfxge_txq_type type, unsigned int evq_index) 1738 { 1739 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 1740 char name[16]; 1741 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 1742 struct sysctl_oid *txq_node; 1743 struct sfxge_txq *txq; 1744 struct sfxge_evq *evq; 1745 struct sfxge_tx_dpl *stdp; 1746 struct sysctl_oid *dpl_node; 1747 efsys_mem_t *esmp; 1748 unsigned int nmaps; 1749 int rc; 1750 1751 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK); 1752 txq->sc = sc; 1753 txq->entries = sc->txq_entries; 1754 txq->ptr_mask = txq->entries - 1; 1755 1756 sc->txq[txq_index] = txq; 1757 esmp = &txq->mem; 1758 1759 evq = sc->evq[evq_index]; 1760 1761 /* Allocate and zero DMA space for the descriptor ring. */ 1762 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0) 1763 return (rc); 1764 1765 /* Allocate buffer table entries. */ 1766 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries), 1767 &txq->buf_base_id); 1768 1769 /* Create a DMA tag for packet mappings. */ 1770 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 1771 encp->enc_tx_dma_desc_boundary, 1772 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL, 1773 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 1774 encp->enc_tx_dma_desc_size_max, 0, NULL, NULL, 1775 &txq->packet_dma_tag) != 0) { 1776 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n"); 1777 rc = ENOMEM; 1778 goto fail; 1779 } 1780 1781 /* Allocate pending descriptor array for batching writes. */ 1782 txq->pend_desc = malloc(sizeof(efx_desc_t) * sc->txq_entries, 1783 M_SFXGE, M_ZERO | M_WAITOK); 1784 1785 /* Allocate and initialise mbuf DMA mapping array. */ 1786 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries, 1787 M_SFXGE, M_ZERO | M_WAITOK); 1788 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) { 1789 rc = bus_dmamap_create(txq->packet_dma_tag, 0, 1790 &txq->stmp[nmaps].map); 1791 if (rc != 0) 1792 goto fail2; 1793 } 1794 1795 snprintf(name, sizeof(name), "%u", txq_index); 1796 txq_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(sc->txqs_node), 1797 OID_AUTO, name, CTLFLAG_RD, NULL, ""); 1798 if (txq_node == NULL) { 1799 rc = ENOMEM; 1800 goto fail_txq_node; 1801 } 1802 1803 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM && 1804 (rc = tso_init(txq)) != 0) 1805 goto fail3; 1806 1807 /* Initialize the deferred packet list. */ 1808 stdp = &txq->dpl; 1809 stdp->std_put_max = sfxge_tx_dpl_put_max; 1810 stdp->std_get_max = sfxge_tx_dpl_get_max; 1811 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max; 1812 stdp->std_getp = &stdp->std_get; 1813 1814 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index); 1815 1816 dpl_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(txq_node), OID_AUTO, 1817 "dpl", CTLFLAG_RD, NULL, 1818 "Deferred packet list statistics"); 1819 if (dpl_node == NULL) { 1820 rc = ENOMEM; 1821 goto fail_dpl_node; 1822 } 1823 1824 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1825 "get_count", CTLFLAG_RD | CTLFLAG_STATS, 1826 &stdp->std_get_count, 0, ""); 1827 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1828 "get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS, 1829 &stdp->std_get_non_tcp_count, 0, ""); 1830 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1831 "get_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1832 &stdp->std_get_hiwat, 0, ""); 1833 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO, 1834 "put_hiwat", CTLFLAG_RD | CTLFLAG_STATS, 1835 &stdp->std_put_hiwat, 0, ""); 1836 1837 rc = sfxge_txq_stat_init(txq, txq_node); 1838 if (rc != 0) 1839 goto fail_txq_stat_init; 1840 1841 txq->type = type; 1842 txq->evq_index = evq_index; 1843 txq->init_state = SFXGE_TXQ_INITIALIZED; 1844 1845 return (0); 1846 1847 fail_txq_stat_init: 1848 fail_dpl_node: 1849 fail3: 1850 fail_txq_node: 1851 free(txq->pend_desc, M_SFXGE); 1852 fail2: 1853 while (nmaps-- != 0) 1854 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); 1855 free(txq->stmp, M_SFXGE); 1856 bus_dma_tag_destroy(txq->packet_dma_tag); 1857 1858 fail: 1859 sfxge_dma_free(esmp); 1860 1861 return (rc); 1862 } 1863 1864 static int 1865 sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS) 1866 { 1867 struct sfxge_softc *sc = arg1; 1868 unsigned int id = arg2; 1869 unsigned long sum; 1870 unsigned int index; 1871 1872 /* Sum across all TX queues */ 1873 sum = 0; 1874 for (index = 0; index < sc->txq_count; index++) 1875 sum += *(unsigned long *)((caddr_t)sc->txq[index] + 1876 sfxge_tx_stats[id].offset); 1877 1878 return (SYSCTL_OUT(req, &sum, sizeof(sum))); 1879 } 1880 1881 static void 1882 sfxge_tx_stat_init(struct sfxge_softc *sc) 1883 { 1884 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 1885 struct sysctl_oid_list *stat_list; 1886 unsigned int id; 1887 1888 stat_list = SYSCTL_CHILDREN(sc->stats_node); 1889 1890 for (id = 0; id < nitems(sfxge_tx_stats); id++) { 1891 SYSCTL_ADD_PROC( 1892 ctx, stat_list, 1893 OID_AUTO, sfxge_tx_stats[id].name, 1894 CTLTYPE_ULONG|CTLFLAG_RD, 1895 sc, id, sfxge_tx_stat_handler, "LU", 1896 ""); 1897 } 1898 } 1899 1900 uint64_t 1901 sfxge_tx_get_drops(struct sfxge_softc *sc) 1902 { 1903 unsigned int index; 1904 uint64_t drops = 0; 1905 struct sfxge_txq *txq; 1906 1907 /* Sum across all TX queues */ 1908 for (index = 0; index < sc->txq_count; index++) { 1909 txq = sc->txq[index]; 1910 /* 1911 * In theory, txq->put_overflow and txq->netdown_drops 1912 * should use atomic operation and other should be 1913 * obtained under txq lock, but it is just statistics. 1914 */ 1915 drops += txq->drops + txq->get_overflow + 1916 txq->get_non_tcp_overflow + 1917 txq->put_overflow + txq->netdown_drops + 1918 txq->tso_pdrop_too_many + txq->tso_pdrop_no_rsrc; 1919 } 1920 return (drops); 1921 } 1922 1923 void 1924 sfxge_tx_fini(struct sfxge_softc *sc) 1925 { 1926 int index; 1927 1928 index = sc->txq_count; 1929 while (--index >= 0) 1930 sfxge_tx_qfini(sc, index); 1931 1932 sc->txq_count = 0; 1933 } 1934 1935 1936 int 1937 sfxge_tx_init(struct sfxge_softc *sc) 1938 { 1939 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 1940 struct sfxge_intr *intr; 1941 int index; 1942 int rc; 1943 1944 intr = &sc->intr; 1945 1946 KASSERT(intr->state == SFXGE_INTR_INITIALIZED, 1947 ("intr->state != SFXGE_INTR_INITIALIZED")); 1948 1949 if (sfxge_tx_dpl_get_max <= 0) { 1950 log(LOG_ERR, "%s=%d must be greater than 0", 1951 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max); 1952 rc = EINVAL; 1953 goto fail_tx_dpl_get_max; 1954 } 1955 if (sfxge_tx_dpl_get_non_tcp_max <= 0) { 1956 log(LOG_ERR, "%s=%d must be greater than 0", 1957 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, 1958 sfxge_tx_dpl_get_non_tcp_max); 1959 rc = EINVAL; 1960 goto fail_tx_dpl_get_non_tcp_max; 1961 } 1962 if (sfxge_tx_dpl_put_max < 0) { 1963 log(LOG_ERR, "%s=%d must be greater or equal to 0", 1964 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max); 1965 rc = EINVAL; 1966 goto fail_tx_dpl_put_max; 1967 } 1968 1969 sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc; 1970 1971 sc->tso_fw_assisted = sfxge_tso_fw_assisted; 1972 if ((~encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO) || 1973 (!encp->enc_fw_assisted_tso_enabled)) 1974 sc->tso_fw_assisted &= ~SFXGE_FATSOV1; 1975 if ((~encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO_V2) || 1976 (!encp->enc_fw_assisted_tso_v2_enabled)) 1977 sc->tso_fw_assisted &= ~SFXGE_FATSOV2; 1978 1979 sc->txqs_node = SYSCTL_ADD_NODE( 1980 device_get_sysctl_ctx(sc->dev), 1981 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 1982 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues"); 1983 if (sc->txqs_node == NULL) { 1984 rc = ENOMEM; 1985 goto fail_txq_node; 1986 } 1987 1988 /* Initialize the transmit queues */ 1989 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM, 1990 SFXGE_TXQ_NON_CKSUM, 0)) != 0) 1991 goto fail; 1992 1993 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM, 1994 SFXGE_TXQ_IP_CKSUM, 0)) != 0) 1995 goto fail2; 1996 1997 for (index = 0; 1998 index < sc->txq_count - SFXGE_TXQ_NTYPES + 1; 1999 index++) { 2000 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index, 2001 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0) 2002 goto fail3; 2003 } 2004 2005 sfxge_tx_stat_init(sc); 2006 2007 return (0); 2008 2009 fail3: 2010 while (--index >= 0) 2011 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index); 2012 2013 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM); 2014 2015 fail2: 2016 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM); 2017 2018 fail: 2019 fail_txq_node: 2020 sc->txq_count = 0; 2021 fail_tx_dpl_put_max: 2022 fail_tx_dpl_get_non_tcp_max: 2023 fail_tx_dpl_get_max: 2024 return (rc); 2025 } 2026