1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was developed in part by Philip Paeps under contract for 8 * Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * The views and conclusions contained in the software and documentation are 32 * those of the authors and should not be interpreted as representing official 33 * policies, either expressed or implied, of the FreeBSD Project. 34 */ 35 36 #include <sys/cdefs.h> 37 #include <sys/types.h> 38 #include <sys/limits.h> 39 #include <net/ethernet.h> 40 #include <net/if_dl.h> 41 42 #include "common/efx.h" 43 44 #include "sfxge.h" 45 46 #define SFXGE_PARAM_STATS_UPDATE_PERIOD_MS \ 47 SFXGE_PARAM(stats_update_period_ms) 48 static int sfxge_stats_update_period_ms = SFXGE_STATS_UPDATE_PERIOD_MS; 49 TUNABLE_INT(SFXGE_PARAM_STATS_UPDATE_PERIOD_MS, 50 &sfxge_stats_update_period_ms); 51 SYSCTL_INT(_hw_sfxge, OID_AUTO, stats_update_period_ms, CTLFLAG_RDTUN, 52 &sfxge_stats_update_period_ms, 0, 53 "netstat interface statistics update period in milliseconds"); 54 55 static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *); 56 57 static int 58 sfxge_mac_stat_update(struct sfxge_softc *sc) 59 { 60 struct sfxge_port *port = &sc->port; 61 efsys_mem_t *esmp = &(port->mac_stats.dma_buf); 62 clock_t now; 63 unsigned int min_ticks; 64 unsigned int count; 65 int rc; 66 67 SFXGE_PORT_LOCK_ASSERT_OWNED(port); 68 69 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) { 70 rc = 0; 71 goto out; 72 } 73 74 min_ticks = (unsigned int)hz * port->stats_update_period_ms / 1000; 75 76 now = ticks; 77 if ((unsigned int)(now - port->mac_stats.update_time) < min_ticks) { 78 rc = 0; 79 goto out; 80 } 81 82 port->mac_stats.update_time = now; 83 84 /* If we're unlucky enough to read statistics wduring the DMA, wait 85 * up to 10ms for it to finish (typically takes <500us) */ 86 for (count = 0; count < 100; ++count) { 87 EFSYS_PROBE1(wait, unsigned int, count); 88 89 /* Try to update the cached counters */ 90 if ((rc = efx_mac_stats_update(sc->enp, esmp, 91 port->mac_stats.decode_buf, NULL)) != EAGAIN) 92 goto out; 93 94 DELAY(100); 95 } 96 97 rc = ETIMEDOUT; 98 out: 99 return (rc); 100 } 101 102 uint64_t 103 sfxge_get_counter(if_t ifp, ift_counter c) 104 { 105 struct sfxge_softc *sc = if_getsoftc(ifp); 106 uint64_t *mac_stats; 107 uint64_t val; 108 109 SFXGE_PORT_LOCK(&sc->port); 110 111 /* Ignore error and use old values */ 112 (void)sfxge_mac_stat_update(sc); 113 114 mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf; 115 116 switch (c) { 117 case IFCOUNTER_IPACKETS: 118 val = mac_stats[EFX_MAC_RX_PKTS]; 119 break; 120 case IFCOUNTER_IERRORS: 121 val = mac_stats[EFX_MAC_RX_ERRORS]; 122 break; 123 case IFCOUNTER_OPACKETS: 124 val = mac_stats[EFX_MAC_TX_PKTS]; 125 break; 126 case IFCOUNTER_OERRORS: 127 val = mac_stats[EFX_MAC_TX_ERRORS]; 128 break; 129 case IFCOUNTER_COLLISIONS: 130 val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] + 131 mac_stats[EFX_MAC_TX_MULT_COL_PKTS] + 132 mac_stats[EFX_MAC_TX_EX_COL_PKTS] + 133 mac_stats[EFX_MAC_TX_LATE_COL_PKTS]; 134 break; 135 case IFCOUNTER_IBYTES: 136 val = mac_stats[EFX_MAC_RX_OCTETS]; 137 break; 138 case IFCOUNTER_OBYTES: 139 val = mac_stats[EFX_MAC_TX_OCTETS]; 140 break; 141 case IFCOUNTER_OMCASTS: 142 val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] + 143 mac_stats[EFX_MAC_TX_BRDCST_PKTS]; 144 break; 145 case IFCOUNTER_OQDROPS: 146 SFXGE_PORT_UNLOCK(&sc->port); 147 return (sfxge_tx_get_drops(sc)); 148 case IFCOUNTER_IMCASTS: 149 /* if_imcasts is maintained in net/if_ethersubr.c */ 150 case IFCOUNTER_IQDROPS: 151 /* if_iqdrops is maintained in net/if_ethersubr.c */ 152 case IFCOUNTER_NOPROTO: 153 /* if_noproto is maintained in net/if_ethersubr.c */ 154 default: 155 SFXGE_PORT_UNLOCK(&sc->port); 156 return (if_get_counter_default(ifp, c)); 157 } 158 159 SFXGE_PORT_UNLOCK(&sc->port); 160 161 return (val); 162 } 163 164 static int 165 sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS) 166 { 167 struct sfxge_softc *sc = arg1; 168 unsigned int id = arg2; 169 int rc; 170 uint64_t val; 171 172 SFXGE_PORT_LOCK(&sc->port); 173 if ((rc = sfxge_mac_stat_update(sc)) == 0) 174 val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id]; 175 SFXGE_PORT_UNLOCK(&sc->port); 176 177 if (rc == 0) 178 rc = SYSCTL_OUT(req, &val, sizeof(val)); 179 return (rc); 180 } 181 182 static void 183 sfxge_mac_stat_init(struct sfxge_softc *sc) 184 { 185 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 186 struct sysctl_oid_list *stat_list; 187 unsigned int id; 188 const char *name; 189 190 stat_list = SYSCTL_CHILDREN(sc->stats_node); 191 192 /* Initialise the named stats */ 193 for (id = 0; id < EFX_MAC_NSTATS; id++) { 194 name = efx_mac_stat_name(sc->enp, id); 195 SYSCTL_ADD_PROC(ctx, stat_list, OID_AUTO, name, 196 CTLTYPE_U64 | CTLFLAG_RD | CTLFLAG_MPSAFE, 197 sc, id, sfxge_mac_stat_handler, "Q", ""); 198 } 199 } 200 201 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 202 203 static unsigned int 204 sfxge_port_wanted_fc(struct sfxge_softc *sc) 205 { 206 struct ifmedia_entry *ifm = sc->media.ifm_cur; 207 208 if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO)) 209 return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE); 210 return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | 211 ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0)); 212 } 213 214 static unsigned int 215 sfxge_port_link_fc_ifm(struct sfxge_softc *sc) 216 { 217 unsigned int wanted_fc, link_fc; 218 219 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 220 return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) | 221 ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0); 222 } 223 224 #else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ 225 226 static unsigned int 227 sfxge_port_wanted_fc(struct sfxge_softc *sc) 228 { 229 return (sc->port.wanted_fc); 230 } 231 232 static unsigned int 233 sfxge_port_link_fc_ifm(struct sfxge_softc *sc) 234 { 235 return (0); 236 } 237 238 static int 239 sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS) 240 { 241 struct sfxge_softc *sc; 242 struct sfxge_port *port; 243 unsigned int fcntl; 244 int error; 245 246 sc = arg1; 247 port = &sc->port; 248 249 if (req->newptr != NULL) { 250 if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0) 251 return (error); 252 253 SFXGE_PORT_LOCK(port); 254 255 if (port->wanted_fc != fcntl) { 256 if (port->init_state == SFXGE_PORT_STARTED) 257 error = efx_mac_fcntl_set(sc->enp, 258 port->wanted_fc, 259 B_TRUE); 260 if (error == 0) 261 port->wanted_fc = fcntl; 262 } 263 264 SFXGE_PORT_UNLOCK(port); 265 } else { 266 SFXGE_PORT_LOCK(port); 267 fcntl = port->wanted_fc; 268 SFXGE_PORT_UNLOCK(port); 269 270 error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl)); 271 } 272 273 return (error); 274 } 275 276 static int 277 sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS) 278 { 279 struct sfxge_softc *sc; 280 struct sfxge_port *port; 281 unsigned int wanted_fc, link_fc; 282 283 sc = arg1; 284 port = &sc->port; 285 286 SFXGE_PORT_LOCK(port); 287 if (__predict_true(port->init_state == SFXGE_PORT_STARTED) && 288 SFXGE_LINK_UP(sc)) 289 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc); 290 else 291 link_fc = 0; 292 SFXGE_PORT_UNLOCK(port); 293 294 return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc))); 295 } 296 297 #endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */ 298 299 static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = { 300 [EFX_LINK_10HDX] = IF_Mbps(10), 301 [EFX_LINK_10FDX] = IF_Mbps(10), 302 [EFX_LINK_100HDX] = IF_Mbps(100), 303 [EFX_LINK_100FDX] = IF_Mbps(100), 304 [EFX_LINK_1000HDX] = IF_Gbps(1), 305 [EFX_LINK_1000FDX] = IF_Gbps(1), 306 [EFX_LINK_10000FDX] = IF_Gbps(10), 307 [EFX_LINK_25000FDX] = IF_Gbps(25), 308 [EFX_LINK_40000FDX] = IF_Gbps(40), 309 [EFX_LINK_50000FDX] = IF_Gbps(50), 310 [EFX_LINK_100000FDX] = IF_Gbps(100), 311 }; 312 313 void 314 sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode) 315 { 316 struct sfxge_port *port; 317 int link_state; 318 319 port = &sc->port; 320 321 if (port->link_mode == mode) 322 return; 323 324 port->link_mode = mode; 325 326 /* Push link state update to the OS */ 327 link_state = (SFXGE_LINK_UP(sc) ? LINK_STATE_UP : LINK_STATE_DOWN); 328 if_setbaudrate(sc->ifnet, sfxge_link_baudrate[port->link_mode]); 329 if_link_state_change(sc->ifnet, link_state); 330 } 331 332 static void 333 sfxge_mac_poll_work(void *arg, int npending) 334 { 335 struct sfxge_softc *sc; 336 efx_nic_t *enp; 337 struct sfxge_port *port; 338 efx_link_mode_t mode; 339 340 sc = (struct sfxge_softc *)arg; 341 enp = sc->enp; 342 port = &sc->port; 343 344 SFXGE_PORT_LOCK(port); 345 346 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) 347 goto done; 348 349 /* This may sleep waiting for MCDI completion */ 350 (void)efx_port_poll(enp, &mode); 351 sfxge_mac_link_update(sc, mode); 352 353 done: 354 SFXGE_PORT_UNLOCK(port); 355 } 356 357 static u_int 358 sfxge_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) 359 { 360 uint8_t *mcast_addr = arg; 361 362 if (cnt == EFX_MAC_MULTICAST_LIST_MAX) 363 return (0); 364 365 memcpy(mcast_addr + (cnt * EFX_MAC_ADDR_LEN), LLADDR(sdl), 366 EFX_MAC_ADDR_LEN); 367 368 return (1); 369 } 370 371 static int 372 sfxge_mac_multicast_list_set(struct sfxge_softc *sc) 373 { 374 if_t ifp = sc->ifnet; 375 struct sfxge_port *port = &sc->port; 376 int rc = 0; 377 378 mtx_assert(&port->lock, MA_OWNED); 379 380 port->mcast_count = if_foreach_llmaddr(ifp, sfxge_copy_maddr, 381 port->mcast_addrs); 382 if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) { 383 device_printf(sc->dev, "Too many multicast addresses\n"); 384 rc = EINVAL; 385 } 386 387 if (rc == 0) { 388 rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs, 389 port->mcast_count); 390 if (rc != 0) 391 device_printf(sc->dev, 392 "Cannot set multicast address list\n"); 393 } 394 395 return (rc); 396 } 397 398 static int 399 sfxge_mac_filter_set_locked(struct sfxge_softc *sc) 400 { 401 if_t ifp = sc->ifnet; 402 struct sfxge_port *port = &sc->port; 403 boolean_t all_mulcst; 404 int rc; 405 406 mtx_assert(&port->lock, MA_OWNED); 407 408 all_mulcst = !!(if_getflags(ifp) & (IFF_PROMISC | IFF_ALLMULTI)); 409 410 rc = sfxge_mac_multicast_list_set(sc); 411 /* Fallback to all multicast if cannot set multicast list */ 412 if (rc != 0) 413 all_mulcst = B_TRUE; 414 415 rc = efx_mac_filter_set(sc->enp, !!(if_getflags(ifp) & IFF_PROMISC), 416 (port->mcast_count > 0), all_mulcst, B_TRUE); 417 418 return (rc); 419 } 420 421 int 422 sfxge_mac_filter_set(struct sfxge_softc *sc) 423 { 424 struct sfxge_port *port = &sc->port; 425 int rc; 426 427 SFXGE_PORT_LOCK(port); 428 /* 429 * The function may be called without softc_lock held in the 430 * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler 431 * checks IFF_DRV_RUNNING flag which implies port started, but 432 * it is not guaranteed to remain. softc_lock shared lock can't 433 * be held in the case of these ioctls processing, since it 434 * results in failure where kernel complains that non-sleepable 435 * lock is held in sleeping thread. Both problems are repeatable 436 * on LAG with LACP proto bring up. 437 */ 438 if (__predict_true(port->init_state == SFXGE_PORT_STARTED)) 439 rc = sfxge_mac_filter_set_locked(sc); 440 else 441 rc = 0; 442 SFXGE_PORT_UNLOCK(port); 443 return (rc); 444 } 445 446 void 447 sfxge_port_stop(struct sfxge_softc *sc) 448 { 449 struct sfxge_port *port; 450 efx_nic_t *enp; 451 452 port = &sc->port; 453 enp = sc->enp; 454 455 SFXGE_PORT_LOCK(port); 456 457 KASSERT(port->init_state == SFXGE_PORT_STARTED, 458 ("port not started")); 459 460 port->init_state = SFXGE_PORT_INITIALIZED; 461 462 port->mac_stats.update_time = 0; 463 464 /* This may call MCDI */ 465 (void)efx_mac_drain(enp, B_TRUE); 466 467 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); 468 469 port->link_mode = EFX_LINK_UNKNOWN; 470 471 /* Destroy the common code port object. */ 472 efx_port_fini(enp); 473 474 efx_filter_fini(enp); 475 476 SFXGE_PORT_UNLOCK(port); 477 } 478 479 int 480 sfxge_port_start(struct sfxge_softc *sc) 481 { 482 uint8_t mac_addr[ETHER_ADDR_LEN]; 483 struct epoch_tracker et; 484 if_t ifp = sc->ifnet; 485 struct sfxge_port *port; 486 efx_nic_t *enp; 487 size_t pdu; 488 int rc; 489 uint32_t phy_cap_mask; 490 491 port = &sc->port; 492 enp = sc->enp; 493 494 SFXGE_PORT_LOCK(port); 495 496 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 497 ("port not initialized")); 498 499 /* Initialise the required filtering */ 500 if ((rc = efx_filter_init(enp)) != 0) 501 goto fail_filter_init; 502 503 /* Initialize the port object in the common code. */ 504 if ((rc = efx_port_init(sc->enp)) != 0) 505 goto fail; 506 507 /* Set the SDU */ 508 pdu = EFX_MAC_PDU(if_getmtu(ifp)); 509 if ((rc = efx_mac_pdu_set(enp, pdu)) != 0) 510 goto fail2; 511 512 if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE)) 513 != 0) 514 goto fail3; 515 516 /* Set the unicast address */ 517 NET_EPOCH_ENTER(et); 518 bcopy(if_getlladdr(ifp), mac_addr, sizeof(mac_addr)); 519 NET_EPOCH_EXIT(et); 520 if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0) 521 goto fail4; 522 523 sfxge_mac_filter_set_locked(sc); 524 525 /* Update MAC stats by DMA every period */ 526 if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 527 port->stats_update_period_ms, 528 B_FALSE)) != 0) 529 goto fail6; 530 531 if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) 532 goto fail8; 533 534 if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media, 535 &phy_cap_mask)) != 0) 536 goto fail9; 537 538 if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0) 539 goto fail10; 540 541 port->init_state = SFXGE_PORT_STARTED; 542 543 /* Single poll in case there were missing initial events */ 544 SFXGE_PORT_UNLOCK(port); 545 sfxge_mac_poll_work(sc, 0); 546 547 return (0); 548 549 fail10: 550 fail9: 551 (void)efx_mac_drain(enp, B_TRUE); 552 fail8: 553 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); 554 fail6: 555 fail4: 556 fail3: 557 558 fail2: 559 efx_port_fini(enp); 560 fail: 561 efx_filter_fini(enp); 562 fail_filter_init: 563 SFXGE_PORT_UNLOCK(port); 564 565 return (rc); 566 } 567 568 static int 569 sfxge_phy_stat_update(struct sfxge_softc *sc) 570 { 571 struct sfxge_port *port = &sc->port; 572 efsys_mem_t *esmp = &port->phy_stats.dma_buf; 573 clock_t now; 574 unsigned int count; 575 int rc; 576 577 SFXGE_PORT_LOCK_ASSERT_OWNED(port); 578 579 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) { 580 rc = 0; 581 goto out; 582 } 583 584 now = ticks; 585 if ((unsigned int)(now - port->phy_stats.update_time) < (unsigned int)hz) { 586 rc = 0; 587 goto out; 588 } 589 590 port->phy_stats.update_time = now; 591 592 /* If we're unlucky enough to read statistics wduring the DMA, wait 593 * up to 10ms for it to finish (typically takes <500us) */ 594 for (count = 0; count < 100; ++count) { 595 EFSYS_PROBE1(wait, unsigned int, count); 596 597 /* Synchronize the DMA memory for reading */ 598 bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, 599 BUS_DMASYNC_POSTREAD); 600 601 /* Try to update the cached counters */ 602 if ((rc = efx_phy_stats_update(sc->enp, esmp, 603 port->phy_stats.decode_buf)) != EAGAIN) 604 goto out; 605 606 DELAY(100); 607 } 608 609 rc = ETIMEDOUT; 610 out: 611 return (rc); 612 } 613 614 static int 615 sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS) 616 { 617 struct sfxge_softc *sc = arg1; 618 unsigned int id = arg2; 619 int rc; 620 uint32_t val; 621 622 SFXGE_PORT_LOCK(&sc->port); 623 if ((rc = sfxge_phy_stat_update(sc)) == 0) 624 val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id]; 625 SFXGE_PORT_UNLOCK(&sc->port); 626 627 if (rc == 0) 628 rc = SYSCTL_OUT(req, &val, sizeof(val)); 629 return (rc); 630 } 631 632 static void 633 sfxge_phy_stat_init(struct sfxge_softc *sc) 634 { 635 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 636 struct sysctl_oid_list *stat_list; 637 unsigned int id; 638 const char *name; 639 uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask; 640 641 stat_list = SYSCTL_CHILDREN(sc->stats_node); 642 643 /* Initialise the named stats */ 644 for (id = 0; id < EFX_PHY_NSTATS; id++) { 645 if (!(stat_mask & ((uint64_t)1 << id))) 646 continue; 647 name = efx_phy_stat_name(sc->enp, id); 648 SYSCTL_ADD_PROC(ctx, stat_list, OID_AUTO, name, 649 CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_MPSAFE, 650 sc, id, sfxge_phy_stat_handler, 651 id == EFX_PHY_STAT_OUI ? "IX" : "IU", ""); 652 } 653 } 654 655 void 656 sfxge_port_fini(struct sfxge_softc *sc) 657 { 658 struct sfxge_port *port; 659 efsys_mem_t *esmp; 660 661 port = &sc->port; 662 esmp = &port->mac_stats.dma_buf; 663 664 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, 665 ("Port not initialized")); 666 667 port->init_state = SFXGE_PORT_UNINITIALIZED; 668 669 port->link_mode = EFX_LINK_UNKNOWN; 670 671 /* Finish with PHY DMA memory */ 672 sfxge_dma_free(&port->phy_stats.dma_buf); 673 free(port->phy_stats.decode_buf, M_SFXGE); 674 675 sfxge_dma_free(esmp); 676 free(port->mac_stats.decode_buf, M_SFXGE); 677 678 SFXGE_PORT_LOCK_DESTROY(port); 679 680 port->sc = NULL; 681 } 682 683 static uint16_t 684 sfxge_port_stats_update_period_ms(struct sfxge_softc *sc) 685 { 686 int period_ms = sfxge_stats_update_period_ms; 687 688 if (period_ms < 0) { 689 device_printf(sc->dev, 690 "treat negative stats update period %d as 0 (disable)\n", 691 period_ms); 692 period_ms = 0; 693 } else if (period_ms > UINT16_MAX) { 694 device_printf(sc->dev, 695 "treat too big stats update period %d as %u\n", 696 period_ms, UINT16_MAX); 697 period_ms = UINT16_MAX; 698 } 699 700 return period_ms; 701 } 702 703 static int 704 sfxge_port_stats_update_period_ms_handler(SYSCTL_HANDLER_ARGS) 705 { 706 struct sfxge_softc *sc; 707 struct sfxge_port *port; 708 unsigned int period_ms; 709 int error; 710 711 sc = arg1; 712 port = &sc->port; 713 714 if (req->newptr != NULL) { 715 error = SYSCTL_IN(req, &period_ms, sizeof(period_ms)); 716 if (error != 0) 717 return (error); 718 719 if (period_ms > UINT16_MAX) 720 return (EINVAL); 721 722 SFXGE_PORT_LOCK(port); 723 724 if (port->stats_update_period_ms != period_ms) { 725 if (port->init_state == SFXGE_PORT_STARTED) 726 error = efx_mac_stats_periodic(sc->enp, 727 &port->mac_stats.dma_buf, 728 period_ms, B_FALSE); 729 if (error == 0) 730 port->stats_update_period_ms = period_ms; 731 } 732 733 SFXGE_PORT_UNLOCK(port); 734 } else { 735 SFXGE_PORT_LOCK(port); 736 period_ms = port->stats_update_period_ms; 737 SFXGE_PORT_UNLOCK(port); 738 739 error = SYSCTL_OUT(req, &period_ms, sizeof(period_ms)); 740 } 741 742 return (error); 743 } 744 745 int 746 sfxge_port_init(struct sfxge_softc *sc) 747 { 748 struct sfxge_port *port; 749 struct sysctl_ctx_list *sysctl_ctx; 750 struct sysctl_oid *sysctl_tree; 751 efsys_mem_t *mac_stats_buf, *phy_stats_buf; 752 uint32_t mac_nstats; 753 size_t mac_stats_size; 754 int rc; 755 756 port = &sc->port; 757 mac_stats_buf = &port->mac_stats.dma_buf; 758 phy_stats_buf = &port->phy_stats.dma_buf; 759 760 KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED, 761 ("Port already initialized")); 762 763 port->sc = sc; 764 765 SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev)); 766 767 DBGPRINT(sc->dev, "alloc PHY stats"); 768 port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t), 769 M_SFXGE, M_WAITOK | M_ZERO); 770 if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0) 771 goto fail; 772 sfxge_phy_stat_init(sc); 773 774 DBGPRINT(sc->dev, "init sysctl"); 775 sysctl_ctx = device_get_sysctl_ctx(sc->dev); 776 sysctl_tree = device_get_sysctl_tree(sc->dev); 777 778 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 779 /* If flow control cannot be configured or reported through 780 * ifmedia, provide sysctls for it. */ 781 port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; 782 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 783 "wanted_fc", CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 784 sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode"); 785 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 786 "link_fc", CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, 787 sfxge_port_link_fc_handler, "IU", "link flow control mode"); 788 #endif 789 790 DBGPRINT(sc->dev, "alloc MAC stats"); 791 port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t), 792 M_SFXGE, M_WAITOK | M_ZERO); 793 mac_nstats = efx_nic_cfg_get(sc->enp)->enc_mac_stats_nstats; 794 mac_stats_size = EFX_P2ROUNDUP(size_t, mac_nstats * sizeof(uint64_t), 795 EFX_BUF_SIZE); 796 if ((rc = sfxge_dma_alloc(sc, mac_stats_size, mac_stats_buf)) != 0) 797 goto fail2; 798 port->stats_update_period_ms = sfxge_port_stats_update_period_ms(sc); 799 sfxge_mac_stat_init(sc); 800 801 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, 802 "stats_update_period_ms", 803 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, 804 sfxge_port_stats_update_period_ms_handler, "IU", 805 "interface statistics refresh period"); 806 807 port->init_state = SFXGE_PORT_INITIALIZED; 808 809 DBGPRINT(sc->dev, "success"); 810 return (0); 811 812 fail2: 813 free(port->mac_stats.decode_buf, M_SFXGE); 814 sfxge_dma_free(phy_stats_buf); 815 fail: 816 free(port->phy_stats.decode_buf, M_SFXGE); 817 SFXGE_PORT_LOCK_DESTROY(port); 818 port->sc = NULL; 819 DBGPRINT(sc->dev, "failed %d", rc); 820 return (rc); 821 } 822 823 static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { 824 [EFX_PHY_MEDIA_CX4] = { 825 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4, 826 }, 827 [EFX_PHY_MEDIA_KX4] = { 828 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4, 829 }, 830 [EFX_PHY_MEDIA_XFP] = { 831 /* Don't know the module type, but assume SR for now. */ 832 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 833 }, 834 [EFX_PHY_MEDIA_QSFP_PLUS] = { 835 /* Don't know the module type, but assume SR for now. */ 836 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 837 [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR, 838 [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4, 839 [EFX_LINK_50000FDX] = IFM_ETHER | IFM_FDX | IFM_50G_SR, 840 [EFX_LINK_100000FDX] = IFM_ETHER | IFM_FDX | IFM_100G_SR2, 841 }, 842 [EFX_PHY_MEDIA_SFP_PLUS] = { 843 /* Don't know the module type, but assume SX/SR for now. */ 844 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX, 845 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, 846 [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR, 847 }, 848 [EFX_PHY_MEDIA_BASE_T] = { 849 [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T, 850 [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T, 851 [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX, 852 [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX, 853 [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T, 854 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T, 855 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T, 856 }, 857 }; 858 859 static void 860 sfxge_media_status(if_t ifp, struct ifmediareq *ifmr) 861 { 862 struct sfxge_softc *sc; 863 efx_phy_media_type_t medium_type; 864 efx_link_mode_t mode; 865 866 sc = if_getsoftc(ifp); 867 SFXGE_ADAPTER_LOCK(sc); 868 869 ifmr->ifm_status = IFM_AVALID; 870 ifmr->ifm_active = IFM_ETHER; 871 872 if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) { 873 ifmr->ifm_status |= IFM_ACTIVE; 874 875 efx_phy_media_type_get(sc->enp, &medium_type); 876 mode = sc->port.link_mode; 877 ifmr->ifm_active |= sfxge_link_mode[medium_type][mode]; 878 ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc); 879 } 880 881 SFXGE_ADAPTER_UNLOCK(sc); 882 } 883 884 static efx_phy_cap_type_t 885 sfxge_link_mode_to_phy_cap(efx_link_mode_t mode) 886 { 887 switch (mode) { 888 case EFX_LINK_10HDX: 889 return (EFX_PHY_CAP_10HDX); 890 case EFX_LINK_10FDX: 891 return (EFX_PHY_CAP_10FDX); 892 case EFX_LINK_100HDX: 893 return (EFX_PHY_CAP_100HDX); 894 case EFX_LINK_100FDX: 895 return (EFX_PHY_CAP_100FDX); 896 case EFX_LINK_1000HDX: 897 return (EFX_PHY_CAP_1000HDX); 898 case EFX_LINK_1000FDX: 899 return (EFX_PHY_CAP_1000FDX); 900 case EFX_LINK_10000FDX: 901 return (EFX_PHY_CAP_10000FDX); 902 case EFX_LINK_25000FDX: 903 return (EFX_PHY_CAP_25000FDX); 904 case EFX_LINK_40000FDX: 905 return (EFX_PHY_CAP_40000FDX); 906 case EFX_LINK_50000FDX: 907 return (EFX_PHY_CAP_50000FDX); 908 case EFX_LINK_100000FDX: 909 return (EFX_PHY_CAP_100000FDX); 910 default: 911 return (EFX_PHY_CAP_INVALID); 912 } 913 } 914 915 static int 916 sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask) 917 { 918 /* Get global options (duplex), type and subtype bits */ 919 int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK); 920 efx_phy_media_type_t medium_type; 921 boolean_t mode_found = B_FALSE; 922 uint32_t cap_mask, mode_cap_mask; 923 efx_link_mode_t mode; 924 efx_phy_cap_type_t phy_cap; 925 926 efx_phy_media_type_get(sc->enp, &medium_type); 927 if (medium_type >= nitems(sfxge_link_mode)) { 928 if_printf(sc->ifnet, "unexpected media type %d\n", medium_type); 929 return (EINVAL); 930 } 931 932 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); 933 934 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) { 935 if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) { 936 mode_found = B_TRUE; 937 break; 938 } 939 } 940 941 if (!mode_found) { 942 /* 943 * If media is not in the table, it must be IFM_AUTO. 944 */ 945 KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) && 946 ifmedia_masked == (IFM_ETHER | IFM_AUTO), 947 ("%s: no mode for media %#x", __func__, ifmedia)); 948 *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM)); 949 return (0); 950 } 951 952 phy_cap = sfxge_link_mode_to_phy_cap(mode); 953 if (phy_cap == EFX_PHY_CAP_INVALID) { 954 if_printf(sc->ifnet, 955 "cannot map link mode %d to phy capability\n", 956 mode); 957 return (EINVAL); 958 } 959 960 mode_cap_mask = (1 << phy_cap); 961 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); 962 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 963 if (ifmedia & IFM_ETH_RXPAUSE) 964 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); 965 if (!(ifmedia & IFM_ETH_TXPAUSE)) 966 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM); 967 #else 968 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); 969 #endif 970 971 *phy_cap_mask = mode_cap_mask; 972 return (0); 973 } 974 975 static int 976 sfxge_media_change(if_t ifp) 977 { 978 struct sfxge_softc *sc; 979 struct ifmedia_entry *ifm; 980 int rc; 981 uint32_t phy_cap_mask; 982 983 sc = if_getsoftc(ifp); 984 ifm = sc->media.ifm_cur; 985 986 SFXGE_ADAPTER_LOCK(sc); 987 988 if (!SFXGE_RUNNING(sc)) { 989 rc = 0; 990 goto out; 991 } 992 993 rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE); 994 if (rc != 0) 995 goto out; 996 997 if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0) 998 goto out; 999 1000 rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask); 1001 out: 1002 SFXGE_ADAPTER_UNLOCK(sc); 1003 1004 return (rc); 1005 } 1006 1007 int sfxge_port_ifmedia_init(struct sfxge_softc *sc) 1008 { 1009 efx_phy_media_type_t medium_type; 1010 uint32_t cap_mask, mode_cap_mask; 1011 efx_link_mode_t mode; 1012 efx_phy_cap_type_t phy_cap; 1013 int mode_ifm, best_mode_ifm = 0; 1014 int rc; 1015 1016 /* 1017 * We need port state to initialise the ifmedia list. 1018 * It requires initialized NIC what is already done in 1019 * sfxge_create() when resources are estimated. 1020 */ 1021 if ((rc = efx_filter_init(sc->enp)) != 0) 1022 goto out1; 1023 if ((rc = efx_port_init(sc->enp)) != 0) 1024 goto out2; 1025 1026 /* 1027 * Register ifconfig callbacks for querying and setting the 1028 * link mode and link status. 1029 */ 1030 ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change, 1031 sfxge_media_status); 1032 1033 /* 1034 * Map firmware medium type and capabilities to ifmedia types. 1035 * ifmedia does not distinguish between forcing the link mode 1036 * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T 1037 * require AN even if only one link mode is enabled, and for 1038 * 100BASE-TX it is useful even if the link mode is forced. 1039 * Therefore we never disable auto-negotiation. 1040 * 1041 * Also enable and advertise flow control by default. 1042 */ 1043 1044 efx_phy_media_type_get(sc->enp, &medium_type); 1045 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); 1046 1047 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) { 1048 phy_cap = sfxge_link_mode_to_phy_cap(mode); 1049 if (phy_cap == EFX_PHY_CAP_INVALID) 1050 continue; 1051 1052 mode_cap_mask = (1 << phy_cap); 1053 mode_ifm = sfxge_link_mode[medium_type][mode]; 1054 1055 if ((cap_mask & mode_cap_mask) && mode_ifm) { 1056 /* No flow-control */ 1057 ifmedia_add(&sc->media, mode_ifm, 0, NULL); 1058 1059 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS 1060 /* Respond-only. If using AN, we implicitly 1061 * offer symmetric as well, but that doesn't 1062 * mean we *have* to generate pause frames. 1063 */ 1064 mode_ifm |= IFM_ETH_RXPAUSE; 1065 ifmedia_add(&sc->media, mode_ifm, 0, NULL); 1066 1067 /* Symmetric */ 1068 mode_ifm |= IFM_ETH_TXPAUSE; 1069 ifmedia_add(&sc->media, mode_ifm, 0, NULL); 1070 #endif 1071 1072 /* Link modes are numbered in order of speed, 1073 * so assume the last one available is the best. 1074 */ 1075 best_mode_ifm = mode_ifm; 1076 } 1077 } 1078 1079 if (cap_mask & (1 << EFX_PHY_CAP_AN)) { 1080 /* Add autoselect mode. */ 1081 mode_ifm = IFM_ETHER | IFM_AUTO; 1082 ifmedia_add(&sc->media, mode_ifm, 0, NULL); 1083 best_mode_ifm = mode_ifm; 1084 } 1085 1086 if (best_mode_ifm != 0) 1087 ifmedia_set(&sc->media, best_mode_ifm); 1088 1089 /* Now discard port state until interface is started. */ 1090 efx_port_fini(sc->enp); 1091 out2: 1092 efx_filter_fini(sc->enp); 1093 out1: 1094 return (rc); 1095 } 1096