1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was developed in part by Philip Paeps under contract for 8 * Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * The views and conclusions contained in the software and documentation are 32 * those of the authors and should not be interpreted as representing official 33 * policies, either expressed or implied, of the FreeBSD Project. 34 */ 35 36 #include <sys/cdefs.h> 37 #include "opt_rss.h" 38 39 #include <sys/param.h> 40 #include <sys/kernel.h> 41 #include <sys/bus.h> 42 #include <sys/rman.h> 43 #include <sys/lock.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <sys/smp.h> 47 #include <sys/socket.h> 48 #include <sys/taskqueue.h> 49 #include <sys/sockio.h> 50 #include <sys/sysctl.h> 51 #include <sys/priv.h> 52 #include <sys/syslog.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 57 #include <net/ethernet.h> 58 #include <net/if.h> 59 #include <net/if_var.h> 60 #include <net/if_media.h> 61 #include <net/if_types.h> 62 63 #include <net/rss_config.h> 64 65 #include "common/efx.h" 66 67 #include "sfxge.h" 68 #include "sfxge_rx.h" 69 #include "sfxge_ioc.h" 70 #include "sfxge_version.h" 71 72 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ 73 IFCAP_RXCSUM | IFCAP_TXCSUM | \ 74 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ 75 IFCAP_TSO4 | IFCAP_TSO6 | \ 76 IFCAP_JUMBO_MTU | \ 77 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) 78 #define SFXGE_CAP_ENABLE SFXGE_CAP 79 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ 80 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) 81 82 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); 83 84 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 85 "SFXGE driver parameters"); 86 87 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring) 88 static int sfxge_rx_ring_entries = SFXGE_NDESCS; 89 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries); 90 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN, 91 &sfxge_rx_ring_entries, 0, 92 "Maximum number of descriptors in a receive ring"); 93 94 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring) 95 static int sfxge_tx_ring_entries = SFXGE_NDESCS; 96 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries); 97 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, 98 &sfxge_tx_ring_entries, 0, 99 "Maximum number of descriptors in a transmit ring"); 100 101 #define SFXGE_PARAM_RESTART_ATTEMPTS SFXGE_PARAM(restart_attempts) 102 static int sfxge_restart_attempts = 3; 103 TUNABLE_INT(SFXGE_PARAM_RESTART_ATTEMPTS, &sfxge_restart_attempts); 104 SYSCTL_INT(_hw_sfxge, OID_AUTO, restart_attempts, CTLFLAG_RDTUN, 105 &sfxge_restart_attempts, 0, 106 "Maximum number of attempts to bring interface up after reset"); 107 108 #if EFSYS_OPT_MCDI_LOGGING 109 #define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging) 110 static int sfxge_mcdi_logging = 0; 111 TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging); 112 #endif 113 114 static void 115 sfxge_reset(void *arg, int npending); 116 117 static int 118 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) 119 { 120 efx_drv_limits_t limits; 121 int rc; 122 unsigned int evq_max; 123 uint32_t evq_allocated; 124 uint32_t rxq_allocated; 125 uint32_t txq_allocated; 126 127 /* 128 * Limit the number of event queues to: 129 * - number of CPUs 130 * - hardwire maximum RSS channels 131 * - administratively specified maximum RSS channels 132 */ 133 #ifdef RSS 134 /* 135 * Avoid extra limitations so that the number of queues 136 * may be configured at administrator's will 137 */ 138 evq_max = MIN(MAX(rss_getnumbuckets(), 1), EFX_MAXRSS); 139 #else 140 evq_max = MIN(mp_ncpus, EFX_MAXRSS); 141 #endif 142 if (sc->max_rss_channels > 0) 143 evq_max = MIN(evq_max, sc->max_rss_channels); 144 145 memset(&limits, 0, sizeof(limits)); 146 147 limits.edl_min_evq_count = 1; 148 limits.edl_max_evq_count = evq_max; 149 limits.edl_min_txq_count = SFXGE_EVQ0_N_TXQ(sc); 150 limits.edl_max_txq_count = evq_max + SFXGE_EVQ0_N_TXQ(sc) - 1; 151 limits.edl_min_rxq_count = 1; 152 limits.edl_max_rxq_count = evq_max; 153 154 efx_nic_set_drv_limits(sc->enp, &limits); 155 156 if ((rc = efx_nic_init(sc->enp)) != 0) 157 return (rc); 158 159 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, 160 &txq_allocated); 161 if (rc != 0) { 162 efx_nic_fini(sc->enp); 163 return (rc); 164 } 165 166 KASSERT(txq_allocated >= SFXGE_EVQ0_N_TXQ(sc), 167 ("txq_allocated < %u", SFXGE_EVQ0_N_TXQ(sc))); 168 169 sc->evq_max = MIN(evq_allocated, evq_max); 170 sc->evq_max = MIN(rxq_allocated, sc->evq_max); 171 sc->evq_max = MIN(txq_allocated - (SFXGE_EVQ0_N_TXQ(sc) - 1), 172 sc->evq_max); 173 174 KASSERT(sc->evq_max <= evq_max, 175 ("allocated more than maximum requested")); 176 177 #ifdef RSS 178 if (sc->evq_max < rss_getnumbuckets()) 179 device_printf(sc->dev, "The number of allocated queues (%u) " 180 "is less than the number of RSS buckets (%u); " 181 "performance degradation might be observed", 182 sc->evq_max, rss_getnumbuckets()); 183 #endif 184 185 /* 186 * NIC is kept initialized in the case of success to be able to 187 * initialize port to find out media types. 188 */ 189 return (0); 190 } 191 192 static int 193 sfxge_set_drv_limits(struct sfxge_softc *sc) 194 { 195 efx_drv_limits_t limits; 196 197 memset(&limits, 0, sizeof(limits)); 198 199 /* Limits are strict since take into account initial estimation */ 200 limits.edl_min_evq_count = limits.edl_max_evq_count = 201 sc->intr.n_alloc; 202 limits.edl_min_txq_count = limits.edl_max_txq_count = 203 sc->intr.n_alloc + SFXGE_EVQ0_N_TXQ(sc) - 1; 204 limits.edl_min_rxq_count = limits.edl_max_rxq_count = 205 sc->intr.n_alloc; 206 207 return (efx_nic_set_drv_limits(sc->enp, &limits)); 208 } 209 210 static int 211 sfxge_start(struct sfxge_softc *sc) 212 { 213 int rc; 214 215 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 216 217 if (sc->init_state == SFXGE_STARTED) 218 return (0); 219 220 if (sc->init_state != SFXGE_REGISTERED) { 221 rc = EINVAL; 222 goto fail; 223 } 224 225 /* Set required resource limits */ 226 if ((rc = sfxge_set_drv_limits(sc)) != 0) 227 goto fail; 228 229 if ((rc = efx_nic_init(sc->enp)) != 0) 230 goto fail; 231 232 /* Start processing interrupts. */ 233 if ((rc = sfxge_intr_start(sc)) != 0) 234 goto fail2; 235 236 /* Start processing events. */ 237 if ((rc = sfxge_ev_start(sc)) != 0) 238 goto fail3; 239 240 /* Fire up the port. */ 241 if ((rc = sfxge_port_start(sc)) != 0) 242 goto fail4; 243 244 /* Start the receiver side. */ 245 if ((rc = sfxge_rx_start(sc)) != 0) 246 goto fail5; 247 248 /* Start the transmitter side. */ 249 if ((rc = sfxge_tx_start(sc)) != 0) 250 goto fail6; 251 252 sc->init_state = SFXGE_STARTED; 253 254 /* Tell the stack we're running. */ 255 if_setdrvflagbits(sc->ifnet, IFF_DRV_RUNNING, IFF_DRV_OACTIVE); 256 257 return (0); 258 259 fail6: 260 sfxge_rx_stop(sc); 261 262 fail5: 263 sfxge_port_stop(sc); 264 265 fail4: 266 sfxge_ev_stop(sc); 267 268 fail3: 269 sfxge_intr_stop(sc); 270 271 fail2: 272 efx_nic_fini(sc->enp); 273 274 fail: 275 device_printf(sc->dev, "sfxge_start: %d\n", rc); 276 277 return (rc); 278 } 279 280 static void 281 sfxge_if_init(void *arg) 282 { 283 struct sfxge_softc *sc; 284 285 sc = (struct sfxge_softc *)arg; 286 287 SFXGE_ADAPTER_LOCK(sc); 288 (void)sfxge_start(sc); 289 SFXGE_ADAPTER_UNLOCK(sc); 290 } 291 292 static void 293 sfxge_stop(struct sfxge_softc *sc) 294 { 295 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 296 297 if (sc->init_state != SFXGE_STARTED) 298 return; 299 300 sc->init_state = SFXGE_REGISTERED; 301 302 /* Stop the transmitter. */ 303 sfxge_tx_stop(sc); 304 305 /* Stop the receiver. */ 306 sfxge_rx_stop(sc); 307 308 /* Stop the port. */ 309 sfxge_port_stop(sc); 310 311 /* Stop processing events. */ 312 sfxge_ev_stop(sc); 313 314 /* Stop processing interrupts. */ 315 sfxge_intr_stop(sc); 316 317 efx_nic_fini(sc->enp); 318 319 if_setdrvflagbits(sc->ifnet, 0, IFF_DRV_RUNNING); 320 } 321 322 static int 323 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 324 { 325 efx_vpd_value_t value; 326 int rc = 0; 327 328 switch (ioc->u.vpd.op) { 329 case SFXGE_VPD_OP_GET_KEYWORD: 330 value.evv_tag = ioc->u.vpd.tag; 331 value.evv_keyword = ioc->u.vpd.keyword; 332 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); 333 if (rc != 0) 334 break; 335 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); 336 if (ioc->u.vpd.payload != 0) { 337 rc = copyout(value.evv_value, ioc->u.vpd.payload, 338 ioc->u.vpd.len); 339 } 340 break; 341 case SFXGE_VPD_OP_SET_KEYWORD: 342 if (ioc->u.vpd.len > sizeof(value.evv_value)) 343 return (EINVAL); 344 value.evv_tag = ioc->u.vpd.tag; 345 value.evv_keyword = ioc->u.vpd.keyword; 346 value.evv_length = ioc->u.vpd.len; 347 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); 348 if (rc != 0) 349 break; 350 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); 351 if (rc != 0) 352 break; 353 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); 354 if (rc != 0) 355 break; 356 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); 357 break; 358 default: 359 rc = EOPNOTSUPP; 360 break; 361 } 362 363 return (rc); 364 } 365 366 static int 367 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 368 { 369 switch (ioc->op) { 370 case SFXGE_MCDI_IOC: 371 return (sfxge_mcdi_ioctl(sc, ioc)); 372 case SFXGE_NVRAM_IOC: 373 return (sfxge_nvram_ioctl(sc, ioc)); 374 case SFXGE_VPD_IOC: 375 return (sfxge_vpd_ioctl(sc, ioc)); 376 default: 377 return (EOPNOTSUPP); 378 } 379 } 380 381 static int 382 sfxge_if_ioctl(if_t ifp, unsigned long command, caddr_t data) 383 { 384 struct sfxge_softc *sc; 385 struct ifreq *ifr; 386 sfxge_ioc_t ioc; 387 int error; 388 389 ifr = (struct ifreq *)data; 390 sc = if_getsoftc(ifp); 391 error = 0; 392 393 switch (command) { 394 case SIOCSIFFLAGS: 395 SFXGE_ADAPTER_LOCK(sc); 396 if (if_getflags(ifp) & IFF_UP) { 397 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 398 if ((if_getflags(ifp) ^ sc->if_flags) & 399 (IFF_PROMISC | IFF_ALLMULTI)) { 400 sfxge_mac_filter_set(sc); 401 } 402 } else 403 sfxge_start(sc); 404 } else 405 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 406 sfxge_stop(sc); 407 sc->if_flags = if_getflags(ifp); 408 SFXGE_ADAPTER_UNLOCK(sc); 409 break; 410 case SIOCSIFMTU: 411 if (ifr->ifr_mtu == if_getmtu(ifp)) { 412 /* Nothing to do */ 413 error = 0; 414 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) { 415 error = EINVAL; 416 } else if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) { 417 if_setmtu(ifp, ifr->ifr_mtu); 418 error = 0; 419 } else { 420 /* Restart required */ 421 SFXGE_ADAPTER_LOCK(sc); 422 sfxge_stop(sc); 423 if_setmtu(ifp, ifr->ifr_mtu); 424 error = sfxge_start(sc); 425 SFXGE_ADAPTER_UNLOCK(sc); 426 if (error != 0) { 427 if_setflagbits(ifp, 0, IFF_UP); 428 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); 429 if_down(ifp); 430 } 431 } 432 break; 433 case SIOCADDMULTI: 434 case SIOCDELMULTI: 435 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 436 sfxge_mac_filter_set(sc); 437 break; 438 case SIOCSIFCAP: 439 { 440 int reqcap = ifr->ifr_reqcap; 441 int capchg_mask; 442 443 SFXGE_ADAPTER_LOCK(sc); 444 445 /* Capabilities to be changed in accordance with request */ 446 capchg_mask = if_getcapenable(ifp) ^ reqcap; 447 448 /* 449 * The networking core already rejects attempts to 450 * enable capabilities we don't have. We still have 451 * to reject attempts to disable capabilities that we 452 * can't (yet) disable. 453 */ 454 KASSERT((reqcap & ~if_getcapabilities(ifp)) == 0, 455 ("Unsupported capabilities 0x%x requested 0x%x vs " 456 "supported 0x%x", 457 reqcap & ~if_getcapabilities(ifp), 458 reqcap , if_getcapabilities(ifp))); 459 if (capchg_mask & SFXGE_CAP_FIXED) { 460 error = EINVAL; 461 SFXGE_ADAPTER_UNLOCK(sc); 462 break; 463 } 464 465 /* Check request before any changes */ 466 if ((capchg_mask & IFCAP_TSO4) && 467 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { 468 error = EAGAIN; 469 SFXGE_ADAPTER_UNLOCK(sc); 470 if_printf(ifp, "enable txcsum before tso4\n"); 471 break; 472 } 473 if ((capchg_mask & IFCAP_TSO6) && 474 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { 475 error = EAGAIN; 476 SFXGE_ADAPTER_UNLOCK(sc); 477 if_printf(ifp, "enable txcsum6 before tso6\n"); 478 break; 479 } 480 481 if (reqcap & IFCAP_TXCSUM) { 482 if_sethwassistbits(ifp, (CSUM_IP | CSUM_TCP | CSUM_UDP), 0); 483 } else { 484 if_sethwassistbits(ifp, 0, (CSUM_IP | CSUM_TCP | CSUM_UDP)); 485 if (reqcap & IFCAP_TSO4) { 486 reqcap &= ~IFCAP_TSO4; 487 if_printf(ifp, 488 "tso4 disabled due to -txcsum\n"); 489 } 490 } 491 if (reqcap & IFCAP_TXCSUM_IPV6) { 492 if_sethwassistbits(ifp, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6), 0); 493 } else { 494 if_sethwassistbits(ifp, 0, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6)); 495 if (reqcap & IFCAP_TSO6) { 496 reqcap &= ~IFCAP_TSO6; 497 if_printf(ifp, 498 "tso6 disabled due to -txcsum6\n"); 499 } 500 } 501 502 /* 503 * The kernel takes both IFCAP_TSOx and CSUM_TSO into 504 * account before using TSO. So, we do not touch 505 * checksum flags when IFCAP_TSOx is modified. 506 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), 507 * but both bits are set in IPv4 and IPv6 mbufs. 508 */ 509 510 if_setcapenable(ifp, reqcap); 511 512 SFXGE_ADAPTER_UNLOCK(sc); 513 break; 514 } 515 case SIOCSIFMEDIA: 516 case SIOCGIFMEDIA: 517 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 518 break; 519 #ifdef SIOCGI2C 520 case SIOCGI2C: 521 { 522 struct ifi2creq i2c; 523 524 error = copyin(ifr_data_get_ptr(ifr), &i2c, sizeof(i2c)); 525 if (error != 0) 526 break; 527 528 if (i2c.len > sizeof(i2c.data)) { 529 error = EINVAL; 530 break; 531 } 532 533 SFXGE_ADAPTER_LOCK(sc); 534 error = efx_phy_module_get_info(sc->enp, i2c.dev_addr, 535 i2c.offset, i2c.len, 536 &i2c.data[0]); 537 SFXGE_ADAPTER_UNLOCK(sc); 538 if (error == 0) 539 error = copyout(&i2c, ifr_data_get_ptr(ifr), 540 sizeof(i2c)); 541 break; 542 } 543 #endif 544 case SIOCGPRIVATE_0: 545 error = priv_check(curthread, PRIV_DRIVER); 546 if (error != 0) 547 break; 548 error = copyin(ifr_data_get_ptr(ifr), &ioc, sizeof(ioc)); 549 if (error != 0) 550 return (error); 551 error = sfxge_private_ioctl(sc, &ioc); 552 if (error == 0) { 553 error = copyout(&ioc, ifr_data_get_ptr(ifr), 554 sizeof(ioc)); 555 } 556 break; 557 default: 558 error = ether_ioctl(ifp, command, data); 559 } 560 561 return (error); 562 } 563 564 static void 565 sfxge_ifnet_fini(if_t ifp) 566 { 567 struct sfxge_softc *sc = if_getsoftc(ifp); 568 569 SFXGE_ADAPTER_LOCK(sc); 570 sfxge_stop(sc); 571 SFXGE_ADAPTER_UNLOCK(sc); 572 573 ifmedia_removeall(&sc->media); 574 ether_ifdetach(ifp); 575 if_free(ifp); 576 } 577 578 static int 579 sfxge_ifnet_init(if_t ifp, struct sfxge_softc *sc) 580 { 581 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 582 device_t dev; 583 int rc; 584 585 dev = sc->dev; 586 sc->ifnet = ifp; 587 588 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 589 if_setinitfn(ifp, sfxge_if_init); 590 if_setsoftc(ifp, sc); 591 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 592 if_setioctlfn(ifp, sfxge_if_ioctl); 593 594 if_setcapabilities(ifp, SFXGE_CAP); 595 if_setcapenable(ifp, SFXGE_CAP_ENABLE); 596 if_sethwtsomax(ifp, SFXGE_TSO_MAX_SIZE); 597 if_sethwtsomaxsegcount(ifp, SFXGE_TX_MAPPING_MAX_SEG); 598 if_sethwtsomaxsegsize(ifp, PAGE_SIZE); 599 600 #ifdef SFXGE_LRO 601 if_setcapabilitiesbit(ifp, IFCAP_LRO, 0); 602 if_setcapenablebit(ifp, IFCAP_LRO, 0); 603 #endif 604 605 if (encp->enc_hw_tx_insert_vlan_enabled) { 606 if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWTAGGING, 0); 607 if_setcapenablebit(ifp, IFCAP_VLAN_HWTAGGING, 0); 608 } 609 if_sethwassistbits(ifp, CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | 610 CSUM_TCP_IPV6 | CSUM_UDP_IPV6, 0); 611 612 if_settransmitfn(ifp, sfxge_if_transmit); 613 if_setqflushfn(ifp, sfxge_if_qflush); 614 615 if_setgetcounterfn(ifp, sfxge_get_counter); 616 617 DBGPRINT(sc->dev, "ifmedia_init"); 618 if ((rc = sfxge_port_ifmedia_init(sc)) != 0) 619 return (rc); 620 621 ether_ifattach(ifp, encp->enc_mac_addr); 622 623 return (0); 624 } 625 626 void 627 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp) 628 { 629 KASSERT(sc->buffer_table_next + n <= 630 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit, 631 ("buffer table full")); 632 633 *idp = sc->buffer_table_next; 634 sc->buffer_table_next += n; 635 } 636 637 static int 638 sfxge_bar_init(struct sfxge_softc *sc) 639 { 640 efsys_bar_t *esbp = &sc->bar; 641 642 esbp->esb_rid = PCIR_BAR(sc->mem_bar); 643 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, 644 &esbp->esb_rid, RF_ACTIVE)) == NULL) { 645 device_printf(sc->dev, "Cannot allocate BAR region %d\n", 646 sc->mem_bar); 647 return (ENXIO); 648 } 649 esbp->esb_tag = rman_get_bustag(esbp->esb_res); 650 esbp->esb_handle = rman_get_bushandle(esbp->esb_res); 651 652 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev)); 653 654 return (0); 655 } 656 657 static void 658 sfxge_bar_fini(struct sfxge_softc *sc) 659 { 660 efsys_bar_t *esbp = &sc->bar; 661 662 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid, 663 esbp->esb_res); 664 SFXGE_BAR_LOCK_DESTROY(esbp); 665 } 666 667 static int 668 sfxge_create(struct sfxge_softc *sc) 669 { 670 device_t dev; 671 efx_nic_t *enp; 672 int error; 673 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))]; 674 #if EFSYS_OPT_MCDI_LOGGING 675 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))]; 676 #endif 677 678 dev = sc->dev; 679 680 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev)); 681 682 sc->max_rss_channels = 0; 683 snprintf(rss_param_name, sizeof(rss_param_name), 684 SFXGE_PARAM(%d.max_rss_channels), 685 (int)device_get_unit(dev)); 686 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels); 687 #if EFSYS_OPT_MCDI_LOGGING 688 sc->mcdi_logging = sfxge_mcdi_logging; 689 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name), 690 SFXGE_PARAM(%d.mcdi_logging), 691 (int)device_get_unit(dev)); 692 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging); 693 #endif 694 695 sc->stats_node = SYSCTL_ADD_NODE(device_get_sysctl_ctx(dev), 696 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", 697 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Statistics"); 698 if (sc->stats_node == NULL) { 699 error = ENOMEM; 700 goto fail; 701 } 702 703 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc); 704 705 (void) pci_enable_busmaster(dev); 706 707 /* Initialize DMA mappings. */ 708 DBGPRINT(sc->dev, "dma_init..."); 709 if ((error = sfxge_dma_init(sc)) != 0) 710 goto fail; 711 712 error = efx_family(pci_get_vendor(dev), pci_get_device(dev), 713 &sc->family, &sc->mem_bar); 714 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); 715 716 /* Map the device registers. */ 717 DBGPRINT(sc->dev, "bar_init..."); 718 if ((error = sfxge_bar_init(sc)) != 0) 719 goto fail; 720 721 DBGPRINT(sc->dev, "nic_create..."); 722 723 /* Create the common code nic object. */ 724 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, 725 device_get_nameunit(sc->dev), "nic"); 726 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc, 727 &sc->bar, &sc->enp_lock, &enp)) != 0) 728 goto fail3; 729 sc->enp = enp; 730 731 /* Initialize MCDI to talk to the microcontroller. */ 732 DBGPRINT(sc->dev, "mcdi_init..."); 733 if ((error = sfxge_mcdi_init(sc)) != 0) 734 goto fail4; 735 736 /* Probe the NIC and build the configuration data area. */ 737 DBGPRINT(sc->dev, "nic_probe..."); 738 if ((error = efx_nic_probe(enp, EFX_FW_VARIANT_DONT_CARE)) != 0) 739 goto fail5; 740 741 if (!ISP2(sfxge_rx_ring_entries) || 742 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || 743 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { 744 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 745 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, 746 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); 747 error = EINVAL; 748 goto fail_rx_ring_entries; 749 } 750 sc->rxq_entries = sfxge_rx_ring_entries; 751 752 if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC) 753 sc->txq_dynamic_cksum_toggle_supported = B_TRUE; 754 else 755 sc->txq_dynamic_cksum_toggle_supported = B_FALSE; 756 757 if (!ISP2(sfxge_tx_ring_entries) || 758 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || 759 (sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs)) { 760 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 761 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, 762 EFX_TXQ_MINNDESCS, efx_nic_cfg_get(enp)->enc_txq_max_ndescs); 763 error = EINVAL; 764 goto fail_tx_ring_entries; 765 } 766 sc->txq_entries = sfxge_tx_ring_entries; 767 768 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 769 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 770 OID_AUTO, "version", CTLFLAG_RD, 771 SFXGE_VERSION_STRING, 0, 772 "Driver version"); 773 774 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 775 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 776 OID_AUTO, "phy_type", CTLFLAG_RD, 777 NULL, efx_nic_cfg_get(enp)->enc_phy_type, 778 "PHY type"); 779 780 /* Initialize the NVRAM. */ 781 DBGPRINT(sc->dev, "nvram_init..."); 782 if ((error = efx_nvram_init(enp)) != 0) 783 goto fail6; 784 785 /* Initialize the VPD. */ 786 DBGPRINT(sc->dev, "vpd_init..."); 787 if ((error = efx_vpd_init(enp)) != 0) 788 goto fail7; 789 790 efx_mcdi_new_epoch(enp); 791 792 /* Reset the NIC. */ 793 DBGPRINT(sc->dev, "nic_reset..."); 794 if ((error = efx_nic_reset(enp)) != 0) 795 goto fail8; 796 797 /* Initialize buffer table allocation. */ 798 sc->buffer_table_next = 0; 799 800 /* 801 * Guarantee minimum and estimate maximum number of event queues 802 * to take it into account when MSI-X interrupts are allocated. 803 * It initializes NIC and keeps it initialized on success. 804 */ 805 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) 806 goto fail8; 807 808 /* Set up interrupts. */ 809 DBGPRINT(sc->dev, "intr_init..."); 810 if ((error = sfxge_intr_init(sc)) != 0) 811 goto fail9; 812 813 /* Initialize event processing state. */ 814 DBGPRINT(sc->dev, "ev_init..."); 815 if ((error = sfxge_ev_init(sc)) != 0) 816 goto fail11; 817 818 /* Initialize port state. */ 819 DBGPRINT(sc->dev, "port_init..."); 820 if ((error = sfxge_port_init(sc)) != 0) 821 goto fail12; 822 823 /* Initialize receive state. */ 824 DBGPRINT(sc->dev, "rx_init..."); 825 if ((error = sfxge_rx_init(sc)) != 0) 826 goto fail13; 827 828 /* Initialize transmit state. */ 829 DBGPRINT(sc->dev, "tx_init..."); 830 if ((error = sfxge_tx_init(sc)) != 0) 831 goto fail14; 832 833 sc->init_state = SFXGE_INITIALIZED; 834 835 DBGPRINT(sc->dev, "success"); 836 return (0); 837 838 fail14: 839 sfxge_rx_fini(sc); 840 841 fail13: 842 sfxge_port_fini(sc); 843 844 fail12: 845 sfxge_ev_fini(sc); 846 847 fail11: 848 sfxge_intr_fini(sc); 849 850 fail9: 851 efx_nic_fini(sc->enp); 852 853 fail8: 854 efx_vpd_fini(enp); 855 856 fail7: 857 efx_nvram_fini(enp); 858 859 fail6: 860 fail_tx_ring_entries: 861 fail_rx_ring_entries: 862 efx_nic_unprobe(enp); 863 864 fail5: 865 sfxge_mcdi_fini(sc); 866 867 fail4: 868 sc->enp = NULL; 869 efx_nic_destroy(enp); 870 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock); 871 872 fail3: 873 sfxge_bar_fini(sc); 874 (void) pci_disable_busmaster(sc->dev); 875 876 fail: 877 DBGPRINT(sc->dev, "failed %d", error); 878 sc->dev = NULL; 879 SFXGE_ADAPTER_LOCK_DESTROY(sc); 880 return (error); 881 } 882 883 static void 884 sfxge_destroy(struct sfxge_softc *sc) 885 { 886 efx_nic_t *enp; 887 888 /* Clean up transmit state. */ 889 sfxge_tx_fini(sc); 890 891 /* Clean up receive state. */ 892 sfxge_rx_fini(sc); 893 894 /* Clean up port state. */ 895 sfxge_port_fini(sc); 896 897 /* Clean up event processing state. */ 898 sfxge_ev_fini(sc); 899 900 /* Clean up interrupts. */ 901 sfxge_intr_fini(sc); 902 903 /* Tear down common code subsystems. */ 904 efx_nic_reset(sc->enp); 905 efx_vpd_fini(sc->enp); 906 efx_nvram_fini(sc->enp); 907 efx_nic_unprobe(sc->enp); 908 909 /* Tear down MCDI. */ 910 sfxge_mcdi_fini(sc); 911 912 /* Destroy common code context. */ 913 enp = sc->enp; 914 sc->enp = NULL; 915 efx_nic_destroy(enp); 916 917 /* Free DMA memory. */ 918 sfxge_dma_fini(sc); 919 920 /* Free mapped BARs. */ 921 sfxge_bar_fini(sc); 922 923 (void) pci_disable_busmaster(sc->dev); 924 925 taskqueue_drain(taskqueue_thread, &sc->task_reset); 926 927 /* Destroy the softc lock. */ 928 SFXGE_ADAPTER_LOCK_DESTROY(sc); 929 } 930 931 static int 932 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS) 933 { 934 struct sfxge_softc *sc = arg1; 935 efx_vpd_value_t value; 936 int rc; 937 938 value.evv_tag = arg2 >> 16; 939 value.evv_keyword = arg2 & 0xffff; 940 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) 941 != 0) 942 return (rc); 943 944 return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); 945 } 946 947 static void 948 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list, 949 efx_vpd_tag_t tag, const char *keyword) 950 { 951 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 952 efx_vpd_value_t value; 953 954 /* Check whether VPD tag/keyword is present */ 955 value.evv_tag = tag; 956 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]); 957 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0) 958 return; 959 960 SYSCTL_ADD_PROC(ctx, list, OID_AUTO, keyword, 961 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 962 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]), 963 sfxge_vpd_handler, "A", ""); 964 } 965 966 static int 967 sfxge_vpd_init(struct sfxge_softc *sc) 968 { 969 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 970 struct sysctl_oid *vpd_node; 971 struct sysctl_oid_list *vpd_list; 972 char keyword[3]; 973 efx_vpd_value_t value; 974 int rc; 975 976 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) { 977 /* 978 * Unprivileged functions deny VPD access. 979 * Simply skip VPD in this case. 980 */ 981 if (rc == EACCES) 982 goto done; 983 goto fail; 984 } 985 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK); 986 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0) 987 goto fail2; 988 989 /* Copy ID (product name) into device description, and log it. */ 990 value.evv_tag = EFX_VPD_ID; 991 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) { 992 value.evv_value[value.evv_length] = 0; 993 device_set_desc_copy(sc->dev, value.evv_value); 994 device_printf(sc->dev, "%s\n", value.evv_value); 995 } 996 997 vpd_node = SYSCTL_ADD_NODE(ctx, 998 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "vpd", 999 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Vital Product Data"); 1000 vpd_list = SYSCTL_CHILDREN(vpd_node); 1001 1002 /* Add sysctls for all expected and any vendor-defined keywords. */ 1003 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN"); 1004 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC"); 1005 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN"); 1006 keyword[0] = 'V'; 1007 keyword[2] = 0; 1008 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++) 1009 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1010 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) 1011 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1012 1013 done: 1014 return (0); 1015 1016 fail2: 1017 free(sc->vpd_data, M_SFXGE); 1018 fail: 1019 return (rc); 1020 } 1021 1022 static void 1023 sfxge_vpd_fini(struct sfxge_softc *sc) 1024 { 1025 free(sc->vpd_data, M_SFXGE); 1026 } 1027 1028 static void 1029 sfxge_reset(void *arg, int npending) 1030 { 1031 struct sfxge_softc *sc; 1032 int rc; 1033 unsigned attempt; 1034 1035 (void)npending; 1036 1037 sc = (struct sfxge_softc *)arg; 1038 1039 SFXGE_ADAPTER_LOCK(sc); 1040 1041 if (sc->init_state != SFXGE_STARTED) 1042 goto done; 1043 1044 sfxge_stop(sc); 1045 efx_nic_reset(sc->enp); 1046 for (attempt = 0; attempt < sfxge_restart_attempts; ++attempt) { 1047 if ((rc = sfxge_start(sc)) == 0) 1048 goto done; 1049 1050 device_printf(sc->dev, "start on reset failed (%d)\n", rc); 1051 DELAY(100000); 1052 } 1053 1054 device_printf(sc->dev, "reset failed; interface is now stopped\n"); 1055 1056 done: 1057 SFXGE_ADAPTER_UNLOCK(sc); 1058 } 1059 1060 void 1061 sfxge_schedule_reset(struct sfxge_softc *sc) 1062 { 1063 taskqueue_enqueue(taskqueue_thread, &sc->task_reset); 1064 } 1065 1066 static int 1067 sfxge_attach(device_t dev) 1068 { 1069 struct sfxge_softc *sc; 1070 if_t ifp; 1071 int error; 1072 1073 sc = device_get_softc(dev); 1074 sc->dev = dev; 1075 1076 /* Allocate ifnet. */ 1077 ifp = if_alloc(IFT_ETHER); 1078 sc->ifnet = ifp; 1079 1080 /* Initialize hardware. */ 1081 DBGPRINT(sc->dev, "create nic"); 1082 if ((error = sfxge_create(sc)) != 0) 1083 goto fail2; 1084 1085 /* Create the ifnet for the port. */ 1086 DBGPRINT(sc->dev, "init ifnet"); 1087 if ((error = sfxge_ifnet_init(ifp, sc)) != 0) 1088 goto fail3; 1089 1090 DBGPRINT(sc->dev, "init vpd"); 1091 if ((error = sfxge_vpd_init(sc)) != 0) 1092 goto fail4; 1093 1094 /* 1095 * NIC is initialized inside sfxge_create() and kept inialized 1096 * to be able to initialize port to discover media types in 1097 * sfxge_ifnet_init(). 1098 */ 1099 efx_nic_fini(sc->enp); 1100 1101 sc->init_state = SFXGE_REGISTERED; 1102 1103 DBGPRINT(sc->dev, "success"); 1104 return (0); 1105 1106 fail4: 1107 sfxge_ifnet_fini(ifp); 1108 fail3: 1109 efx_nic_fini(sc->enp); 1110 sfxge_destroy(sc); 1111 1112 fail2: 1113 if_free(sc->ifnet); 1114 DBGPRINT(sc->dev, "failed %d", error); 1115 return (error); 1116 } 1117 1118 static int 1119 sfxge_detach(device_t dev) 1120 { 1121 struct sfxge_softc *sc; 1122 1123 sc = device_get_softc(dev); 1124 1125 sfxge_vpd_fini(sc); 1126 1127 /* Destroy the ifnet. */ 1128 sfxge_ifnet_fini(sc->ifnet); 1129 1130 /* Tear down hardware. */ 1131 sfxge_destroy(sc); 1132 1133 return (0); 1134 } 1135 1136 static int 1137 sfxge_probe(device_t dev) 1138 { 1139 uint16_t pci_vendor_id; 1140 uint16_t pci_device_id; 1141 efx_family_t family; 1142 unsigned int mem_bar; 1143 int rc; 1144 1145 pci_vendor_id = pci_get_vendor(dev); 1146 pci_device_id = pci_get_device(dev); 1147 1148 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); 1149 rc = efx_family(pci_vendor_id, pci_device_id, &family, &mem_bar); 1150 if (rc != 0) { 1151 DBGPRINT(dev, "efx_family fail %d", rc); 1152 return (ENXIO); 1153 } 1154 1155 if (family == EFX_FAMILY_SIENA) { 1156 device_set_desc(dev, "Solarflare SFC9000 family"); 1157 return (0); 1158 } 1159 1160 if (family == EFX_FAMILY_HUNTINGTON) { 1161 device_set_desc(dev, "Solarflare SFC9100 family"); 1162 return (0); 1163 } 1164 1165 if (family == EFX_FAMILY_MEDFORD) { 1166 device_set_desc(dev, "Solarflare SFC9200 family"); 1167 return (0); 1168 } 1169 1170 if (family == EFX_FAMILY_MEDFORD2) { 1171 device_set_desc(dev, "Solarflare SFC9250 family"); 1172 return (0); 1173 } 1174 1175 DBGPRINT(dev, "impossible controller family %d", family); 1176 return (ENXIO); 1177 } 1178 1179 static device_method_t sfxge_methods[] = { 1180 DEVMETHOD(device_probe, sfxge_probe), 1181 DEVMETHOD(device_attach, sfxge_attach), 1182 DEVMETHOD(device_detach, sfxge_detach), 1183 1184 DEVMETHOD_END 1185 }; 1186 1187 static driver_t sfxge_driver = { 1188 "sfxge", 1189 sfxge_methods, 1190 sizeof(struct sfxge_softc) 1191 }; 1192 1193 DRIVER_MODULE(sfxge, pci, sfxge_driver, 0, 0); 1194