1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * This software was developed in part by Philip Paeps under contract for 8 * Solarflare Communications, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * The views and conclusions contained in the software and documentation are 32 * those of the authors and should not be interpreted as representing official 33 * policies, either expressed or implied, of the FreeBSD Project. 34 */ 35 36 #include <sys/cdefs.h> 37 #include "opt_rss.h" 38 39 #include <sys/param.h> 40 #include <sys/kernel.h> 41 #include <sys/bus.h> 42 #include <sys/rman.h> 43 #include <sys/lock.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <sys/smp.h> 47 #include <sys/socket.h> 48 #include <sys/taskqueue.h> 49 #include <sys/sockio.h> 50 #include <sys/sysctl.h> 51 #include <sys/priv.h> 52 #include <sys/syslog.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 57 #include <net/ethernet.h> 58 #include <net/if.h> 59 #include <net/if_var.h> 60 #include <net/if_media.h> 61 #include <net/if_types.h> 62 63 #ifdef RSS 64 #include <net/rss_config.h> 65 #endif 66 67 #include "common/efx.h" 68 69 #include "sfxge.h" 70 #include "sfxge_rx.h" 71 #include "sfxge_ioc.h" 72 #include "sfxge_version.h" 73 74 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ 75 IFCAP_RXCSUM | IFCAP_TXCSUM | \ 76 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ 77 IFCAP_TSO4 | IFCAP_TSO6 | \ 78 IFCAP_JUMBO_MTU | \ 79 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) 80 #define SFXGE_CAP_ENABLE SFXGE_CAP 81 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ 82 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) 83 84 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); 85 86 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 87 "SFXGE driver parameters"); 88 89 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring) 90 static int sfxge_rx_ring_entries = SFXGE_NDESCS; 91 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries); 92 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN, 93 &sfxge_rx_ring_entries, 0, 94 "Maximum number of descriptors in a receive ring"); 95 96 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring) 97 static int sfxge_tx_ring_entries = SFXGE_NDESCS; 98 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries); 99 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, 100 &sfxge_tx_ring_entries, 0, 101 "Maximum number of descriptors in a transmit ring"); 102 103 #define SFXGE_PARAM_RESTART_ATTEMPTS SFXGE_PARAM(restart_attempts) 104 static int sfxge_restart_attempts = 3; 105 TUNABLE_INT(SFXGE_PARAM_RESTART_ATTEMPTS, &sfxge_restart_attempts); 106 SYSCTL_INT(_hw_sfxge, OID_AUTO, restart_attempts, CTLFLAG_RDTUN, 107 &sfxge_restart_attempts, 0, 108 "Maximum number of attempts to bring interface up after reset"); 109 110 #if EFSYS_OPT_MCDI_LOGGING 111 #define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging) 112 static int sfxge_mcdi_logging = 0; 113 TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging); 114 #endif 115 116 static void 117 sfxge_reset(void *arg, int npending); 118 119 static int 120 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) 121 { 122 efx_drv_limits_t limits; 123 int rc; 124 unsigned int evq_max; 125 uint32_t evq_allocated; 126 uint32_t rxq_allocated; 127 uint32_t txq_allocated; 128 129 /* 130 * Limit the number of event queues to: 131 * - number of CPUs 132 * - hardwire maximum RSS channels 133 * - administratively specified maximum RSS channels 134 */ 135 #ifdef RSS 136 /* 137 * Avoid extra limitations so that the number of queues 138 * may be configured at administrator's will 139 */ 140 evq_max = MIN(MAX(rss_getnumbuckets(), 1), EFX_MAXRSS); 141 #else 142 evq_max = MIN(mp_ncpus, EFX_MAXRSS); 143 #endif 144 if (sc->max_rss_channels > 0) 145 evq_max = MIN(evq_max, sc->max_rss_channels); 146 147 memset(&limits, 0, sizeof(limits)); 148 149 limits.edl_min_evq_count = 1; 150 limits.edl_max_evq_count = evq_max; 151 limits.edl_min_txq_count = SFXGE_EVQ0_N_TXQ(sc); 152 limits.edl_max_txq_count = evq_max + SFXGE_EVQ0_N_TXQ(sc) - 1; 153 limits.edl_min_rxq_count = 1; 154 limits.edl_max_rxq_count = evq_max; 155 156 efx_nic_set_drv_limits(sc->enp, &limits); 157 158 if ((rc = efx_nic_init(sc->enp)) != 0) 159 return (rc); 160 161 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, 162 &txq_allocated); 163 if (rc != 0) { 164 efx_nic_fini(sc->enp); 165 return (rc); 166 } 167 168 KASSERT(txq_allocated >= SFXGE_EVQ0_N_TXQ(sc), 169 ("txq_allocated < %u", SFXGE_EVQ0_N_TXQ(sc))); 170 171 sc->evq_max = MIN(evq_allocated, evq_max); 172 sc->evq_max = MIN(rxq_allocated, sc->evq_max); 173 sc->evq_max = MIN(txq_allocated - (SFXGE_EVQ0_N_TXQ(sc) - 1), 174 sc->evq_max); 175 176 KASSERT(sc->evq_max <= evq_max, 177 ("allocated more than maximum requested")); 178 179 #ifdef RSS 180 if (sc->evq_max < rss_getnumbuckets()) 181 device_printf(sc->dev, "The number of allocated queues (%u) " 182 "is less than the number of RSS buckets (%u); " 183 "performance degradation might be observed", 184 sc->evq_max, rss_getnumbuckets()); 185 #endif 186 187 /* 188 * NIC is kept initialized in the case of success to be able to 189 * initialize port to find out media types. 190 */ 191 return (0); 192 } 193 194 static int 195 sfxge_set_drv_limits(struct sfxge_softc *sc) 196 { 197 efx_drv_limits_t limits; 198 199 memset(&limits, 0, sizeof(limits)); 200 201 /* Limits are strict since take into account initial estimation */ 202 limits.edl_min_evq_count = limits.edl_max_evq_count = 203 sc->intr.n_alloc; 204 limits.edl_min_txq_count = limits.edl_max_txq_count = 205 sc->intr.n_alloc + SFXGE_EVQ0_N_TXQ(sc) - 1; 206 limits.edl_min_rxq_count = limits.edl_max_rxq_count = 207 sc->intr.n_alloc; 208 209 return (efx_nic_set_drv_limits(sc->enp, &limits)); 210 } 211 212 static int 213 sfxge_start(struct sfxge_softc *sc) 214 { 215 int rc; 216 217 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 218 219 if (sc->init_state == SFXGE_STARTED) 220 return (0); 221 222 if (sc->init_state != SFXGE_REGISTERED) { 223 rc = EINVAL; 224 goto fail; 225 } 226 227 /* Set required resource limits */ 228 if ((rc = sfxge_set_drv_limits(sc)) != 0) 229 goto fail; 230 231 if ((rc = efx_nic_init(sc->enp)) != 0) 232 goto fail; 233 234 /* Start processing interrupts. */ 235 if ((rc = sfxge_intr_start(sc)) != 0) 236 goto fail2; 237 238 /* Start processing events. */ 239 if ((rc = sfxge_ev_start(sc)) != 0) 240 goto fail3; 241 242 /* Fire up the port. */ 243 if ((rc = sfxge_port_start(sc)) != 0) 244 goto fail4; 245 246 /* Start the receiver side. */ 247 if ((rc = sfxge_rx_start(sc)) != 0) 248 goto fail5; 249 250 /* Start the transmitter side. */ 251 if ((rc = sfxge_tx_start(sc)) != 0) 252 goto fail6; 253 254 sc->init_state = SFXGE_STARTED; 255 256 /* Tell the stack we're running. */ 257 if_setdrvflagbits(sc->ifnet, IFF_DRV_RUNNING, IFF_DRV_OACTIVE); 258 259 return (0); 260 261 fail6: 262 sfxge_rx_stop(sc); 263 264 fail5: 265 sfxge_port_stop(sc); 266 267 fail4: 268 sfxge_ev_stop(sc); 269 270 fail3: 271 sfxge_intr_stop(sc); 272 273 fail2: 274 efx_nic_fini(sc->enp); 275 276 fail: 277 device_printf(sc->dev, "sfxge_start: %d\n", rc); 278 279 return (rc); 280 } 281 282 static void 283 sfxge_if_init(void *arg) 284 { 285 struct sfxge_softc *sc; 286 287 sc = (struct sfxge_softc *)arg; 288 289 SFXGE_ADAPTER_LOCK(sc); 290 (void)sfxge_start(sc); 291 SFXGE_ADAPTER_UNLOCK(sc); 292 } 293 294 static void 295 sfxge_stop(struct sfxge_softc *sc) 296 { 297 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 298 299 if (sc->init_state != SFXGE_STARTED) 300 return; 301 302 sc->init_state = SFXGE_REGISTERED; 303 304 /* Stop the transmitter. */ 305 sfxge_tx_stop(sc); 306 307 /* Stop the receiver. */ 308 sfxge_rx_stop(sc); 309 310 /* Stop the port. */ 311 sfxge_port_stop(sc); 312 313 /* Stop processing events. */ 314 sfxge_ev_stop(sc); 315 316 /* Stop processing interrupts. */ 317 sfxge_intr_stop(sc); 318 319 efx_nic_fini(sc->enp); 320 321 if_setdrvflagbits(sc->ifnet, 0, IFF_DRV_RUNNING); 322 } 323 324 static int 325 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 326 { 327 efx_vpd_value_t value; 328 int rc = 0; 329 330 switch (ioc->u.vpd.op) { 331 case SFXGE_VPD_OP_GET_KEYWORD: 332 value.evv_tag = ioc->u.vpd.tag; 333 value.evv_keyword = ioc->u.vpd.keyword; 334 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); 335 if (rc != 0) 336 break; 337 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); 338 if (ioc->u.vpd.payload != 0) { 339 rc = copyout(value.evv_value, ioc->u.vpd.payload, 340 ioc->u.vpd.len); 341 } 342 break; 343 case SFXGE_VPD_OP_SET_KEYWORD: 344 if (ioc->u.vpd.len > sizeof(value.evv_value)) 345 return (EINVAL); 346 value.evv_tag = ioc->u.vpd.tag; 347 value.evv_keyword = ioc->u.vpd.keyword; 348 value.evv_length = ioc->u.vpd.len; 349 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); 350 if (rc != 0) 351 break; 352 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); 353 if (rc != 0) 354 break; 355 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); 356 if (rc != 0) 357 break; 358 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); 359 break; 360 default: 361 rc = EOPNOTSUPP; 362 break; 363 } 364 365 return (rc); 366 } 367 368 static int 369 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 370 { 371 switch (ioc->op) { 372 case SFXGE_MCDI_IOC: 373 return (sfxge_mcdi_ioctl(sc, ioc)); 374 case SFXGE_NVRAM_IOC: 375 return (sfxge_nvram_ioctl(sc, ioc)); 376 case SFXGE_VPD_IOC: 377 return (sfxge_vpd_ioctl(sc, ioc)); 378 default: 379 return (EOPNOTSUPP); 380 } 381 } 382 383 static int 384 sfxge_if_ioctl(if_t ifp, unsigned long command, caddr_t data) 385 { 386 struct sfxge_softc *sc; 387 struct ifreq *ifr; 388 sfxge_ioc_t ioc; 389 int error; 390 391 ifr = (struct ifreq *)data; 392 sc = if_getsoftc(ifp); 393 error = 0; 394 395 switch (command) { 396 case SIOCSIFFLAGS: 397 SFXGE_ADAPTER_LOCK(sc); 398 if (if_getflags(ifp) & IFF_UP) { 399 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 400 if ((if_getflags(ifp) ^ sc->if_flags) & 401 (IFF_PROMISC | IFF_ALLMULTI)) { 402 sfxge_mac_filter_set(sc); 403 } 404 } else 405 sfxge_start(sc); 406 } else 407 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 408 sfxge_stop(sc); 409 sc->if_flags = if_getflags(ifp); 410 SFXGE_ADAPTER_UNLOCK(sc); 411 break; 412 case SIOCSIFMTU: 413 if (ifr->ifr_mtu == if_getmtu(ifp)) { 414 /* Nothing to do */ 415 error = 0; 416 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) { 417 error = EINVAL; 418 } else if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) { 419 if_setmtu(ifp, ifr->ifr_mtu); 420 error = 0; 421 } else { 422 /* Restart required */ 423 SFXGE_ADAPTER_LOCK(sc); 424 sfxge_stop(sc); 425 if_setmtu(ifp, ifr->ifr_mtu); 426 error = sfxge_start(sc); 427 SFXGE_ADAPTER_UNLOCK(sc); 428 if (error != 0) { 429 if_setflagbits(ifp, 0, IFF_UP); 430 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); 431 if_down(ifp); 432 } 433 } 434 break; 435 case SIOCADDMULTI: 436 case SIOCDELMULTI: 437 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 438 sfxge_mac_filter_set(sc); 439 break; 440 case SIOCSIFCAP: 441 { 442 int reqcap = ifr->ifr_reqcap; 443 int capchg_mask; 444 445 SFXGE_ADAPTER_LOCK(sc); 446 447 /* Capabilities to be changed in accordance with request */ 448 capchg_mask = if_getcapenable(ifp) ^ reqcap; 449 450 /* 451 * The networking core already rejects attempts to 452 * enable capabilities we don't have. We still have 453 * to reject attempts to disable capabilities that we 454 * can't (yet) disable. 455 */ 456 KASSERT((reqcap & ~if_getcapabilities(ifp)) == 0, 457 ("Unsupported capabilities 0x%x requested 0x%x vs " 458 "supported 0x%x", 459 reqcap & ~if_getcapabilities(ifp), 460 reqcap , if_getcapabilities(ifp))); 461 if (capchg_mask & SFXGE_CAP_FIXED) { 462 error = EINVAL; 463 SFXGE_ADAPTER_UNLOCK(sc); 464 break; 465 } 466 467 /* Check request before any changes */ 468 if ((capchg_mask & IFCAP_TSO4) && 469 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { 470 error = EAGAIN; 471 SFXGE_ADAPTER_UNLOCK(sc); 472 if_printf(ifp, "enable txcsum before tso4\n"); 473 break; 474 } 475 if ((capchg_mask & IFCAP_TSO6) && 476 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { 477 error = EAGAIN; 478 SFXGE_ADAPTER_UNLOCK(sc); 479 if_printf(ifp, "enable txcsum6 before tso6\n"); 480 break; 481 } 482 483 if (reqcap & IFCAP_TXCSUM) { 484 if_sethwassistbits(ifp, (CSUM_IP | CSUM_TCP | CSUM_UDP), 0); 485 } else { 486 if_sethwassistbits(ifp, 0, (CSUM_IP | CSUM_TCP | CSUM_UDP)); 487 if (reqcap & IFCAP_TSO4) { 488 reqcap &= ~IFCAP_TSO4; 489 if_printf(ifp, 490 "tso4 disabled due to -txcsum\n"); 491 } 492 } 493 if (reqcap & IFCAP_TXCSUM_IPV6) { 494 if_sethwassistbits(ifp, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6), 0); 495 } else { 496 if_sethwassistbits(ifp, 0, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6)); 497 if (reqcap & IFCAP_TSO6) { 498 reqcap &= ~IFCAP_TSO6; 499 if_printf(ifp, 500 "tso6 disabled due to -txcsum6\n"); 501 } 502 } 503 504 /* 505 * The kernel takes both IFCAP_TSOx and CSUM_TSO into 506 * account before using TSO. So, we do not touch 507 * checksum flags when IFCAP_TSOx is modified. 508 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), 509 * but both bits are set in IPv4 and IPv6 mbufs. 510 */ 511 512 if_setcapenable(ifp, reqcap); 513 514 SFXGE_ADAPTER_UNLOCK(sc); 515 break; 516 } 517 case SIOCSIFMEDIA: 518 case SIOCGIFMEDIA: 519 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 520 break; 521 #ifdef SIOCGI2C 522 case SIOCGI2C: 523 { 524 struct ifi2creq i2c; 525 526 error = copyin(ifr_data_get_ptr(ifr), &i2c, sizeof(i2c)); 527 if (error != 0) 528 break; 529 530 if (i2c.len > sizeof(i2c.data)) { 531 error = EINVAL; 532 break; 533 } 534 535 SFXGE_ADAPTER_LOCK(sc); 536 error = efx_phy_module_get_info(sc->enp, i2c.dev_addr, 537 i2c.offset, i2c.len, 538 &i2c.data[0]); 539 SFXGE_ADAPTER_UNLOCK(sc); 540 if (error == 0) 541 error = copyout(&i2c, ifr_data_get_ptr(ifr), 542 sizeof(i2c)); 543 break; 544 } 545 #endif 546 case SIOCGPRIVATE_0: 547 error = priv_check(curthread, PRIV_DRIVER); 548 if (error != 0) 549 break; 550 error = copyin(ifr_data_get_ptr(ifr), &ioc, sizeof(ioc)); 551 if (error != 0) 552 return (error); 553 error = sfxge_private_ioctl(sc, &ioc); 554 if (error == 0) { 555 error = copyout(&ioc, ifr_data_get_ptr(ifr), 556 sizeof(ioc)); 557 } 558 break; 559 default: 560 error = ether_ioctl(ifp, command, data); 561 } 562 563 return (error); 564 } 565 566 static void 567 sfxge_ifnet_fini(if_t ifp) 568 { 569 struct sfxge_softc *sc = if_getsoftc(ifp); 570 571 SFXGE_ADAPTER_LOCK(sc); 572 sfxge_stop(sc); 573 SFXGE_ADAPTER_UNLOCK(sc); 574 575 ifmedia_removeall(&sc->media); 576 ether_ifdetach(ifp); 577 if_free(ifp); 578 } 579 580 static int 581 sfxge_ifnet_init(if_t ifp, struct sfxge_softc *sc) 582 { 583 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 584 device_t dev; 585 int rc; 586 587 dev = sc->dev; 588 sc->ifnet = ifp; 589 590 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 591 if_setinitfn(ifp, sfxge_if_init); 592 if_setsoftc(ifp, sc); 593 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 594 if_setioctlfn(ifp, sfxge_if_ioctl); 595 596 if_setcapabilities(ifp, SFXGE_CAP); 597 if_setcapenable(ifp, SFXGE_CAP_ENABLE); 598 if_sethwtsomax(ifp, SFXGE_TSO_MAX_SIZE); 599 if_sethwtsomaxsegcount(ifp, SFXGE_TX_MAPPING_MAX_SEG); 600 if_sethwtsomaxsegsize(ifp, PAGE_SIZE); 601 602 #ifdef SFXGE_LRO 603 if_setcapabilitiesbit(ifp, IFCAP_LRO, 0); 604 if_setcapenablebit(ifp, IFCAP_LRO, 0); 605 #endif 606 607 if (encp->enc_hw_tx_insert_vlan_enabled) { 608 if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWTAGGING, 0); 609 if_setcapenablebit(ifp, IFCAP_VLAN_HWTAGGING, 0); 610 } 611 if_sethwassistbits(ifp, CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | 612 CSUM_TCP_IPV6 | CSUM_UDP_IPV6, 0); 613 614 if_settransmitfn(ifp, sfxge_if_transmit); 615 if_setqflushfn(ifp, sfxge_if_qflush); 616 617 if_setgetcounterfn(ifp, sfxge_get_counter); 618 619 DBGPRINT(sc->dev, "ifmedia_init"); 620 if ((rc = sfxge_port_ifmedia_init(sc)) != 0) 621 return (rc); 622 623 ether_ifattach(ifp, encp->enc_mac_addr); 624 625 return (0); 626 } 627 628 void 629 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp) 630 { 631 KASSERT(sc->buffer_table_next + n <= 632 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit, 633 ("buffer table full")); 634 635 *idp = sc->buffer_table_next; 636 sc->buffer_table_next += n; 637 } 638 639 static int 640 sfxge_bar_init(struct sfxge_softc *sc) 641 { 642 efsys_bar_t *esbp = &sc->bar; 643 644 esbp->esb_rid = PCIR_BAR(sc->mem_bar); 645 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, 646 &esbp->esb_rid, RF_ACTIVE)) == NULL) { 647 device_printf(sc->dev, "Cannot allocate BAR region %d\n", 648 sc->mem_bar); 649 return (ENXIO); 650 } 651 esbp->esb_tag = rman_get_bustag(esbp->esb_res); 652 esbp->esb_handle = rman_get_bushandle(esbp->esb_res); 653 654 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev)); 655 656 return (0); 657 } 658 659 static void 660 sfxge_bar_fini(struct sfxge_softc *sc) 661 { 662 efsys_bar_t *esbp = &sc->bar; 663 664 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid, 665 esbp->esb_res); 666 SFXGE_BAR_LOCK_DESTROY(esbp); 667 } 668 669 static int 670 sfxge_create(struct sfxge_softc *sc) 671 { 672 device_t dev; 673 efx_nic_t *enp; 674 int error; 675 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))]; 676 #if EFSYS_OPT_MCDI_LOGGING 677 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))]; 678 #endif 679 680 dev = sc->dev; 681 682 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev)); 683 684 sc->max_rss_channels = 0; 685 snprintf(rss_param_name, sizeof(rss_param_name), 686 SFXGE_PARAM(%d.max_rss_channels), 687 (int)device_get_unit(dev)); 688 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels); 689 #if EFSYS_OPT_MCDI_LOGGING 690 sc->mcdi_logging = sfxge_mcdi_logging; 691 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name), 692 SFXGE_PARAM(%d.mcdi_logging), 693 (int)device_get_unit(dev)); 694 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging); 695 #endif 696 697 sc->stats_node = SYSCTL_ADD_NODE(device_get_sysctl_ctx(dev), 698 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", 699 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Statistics"); 700 if (sc->stats_node == NULL) { 701 error = ENOMEM; 702 goto fail; 703 } 704 705 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc); 706 707 (void) pci_enable_busmaster(dev); 708 709 /* Initialize DMA mappings. */ 710 DBGPRINT(sc->dev, "dma_init..."); 711 if ((error = sfxge_dma_init(sc)) != 0) 712 goto fail; 713 714 error = efx_family(pci_get_vendor(dev), pci_get_device(dev), 715 &sc->family, &sc->mem_bar); 716 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); 717 718 /* Map the device registers. */ 719 DBGPRINT(sc->dev, "bar_init..."); 720 if ((error = sfxge_bar_init(sc)) != 0) 721 goto fail; 722 723 DBGPRINT(sc->dev, "nic_create..."); 724 725 /* Create the common code nic object. */ 726 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, 727 device_get_nameunit(sc->dev), "nic"); 728 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc, 729 &sc->bar, &sc->enp_lock, &enp)) != 0) 730 goto fail3; 731 sc->enp = enp; 732 733 /* Initialize MCDI to talk to the microcontroller. */ 734 DBGPRINT(sc->dev, "mcdi_init..."); 735 if ((error = sfxge_mcdi_init(sc)) != 0) 736 goto fail4; 737 738 /* Probe the NIC and build the configuration data area. */ 739 DBGPRINT(sc->dev, "nic_probe..."); 740 if ((error = efx_nic_probe(enp, EFX_FW_VARIANT_DONT_CARE)) != 0) 741 goto fail5; 742 743 if (!ISP2(sfxge_rx_ring_entries) || 744 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || 745 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { 746 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 747 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, 748 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); 749 error = EINVAL; 750 goto fail_rx_ring_entries; 751 } 752 sc->rxq_entries = sfxge_rx_ring_entries; 753 754 if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC) 755 sc->txq_dynamic_cksum_toggle_supported = B_TRUE; 756 else 757 sc->txq_dynamic_cksum_toggle_supported = B_FALSE; 758 759 if (!ISP2(sfxge_tx_ring_entries) || 760 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || 761 (sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs)) { 762 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 763 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, 764 EFX_TXQ_MINNDESCS, efx_nic_cfg_get(enp)->enc_txq_max_ndescs); 765 error = EINVAL; 766 goto fail_tx_ring_entries; 767 } 768 sc->txq_entries = sfxge_tx_ring_entries; 769 770 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 771 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 772 OID_AUTO, "version", CTLFLAG_RD, 773 SFXGE_VERSION_STRING, 0, 774 "Driver version"); 775 776 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 777 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 778 OID_AUTO, "phy_type", CTLFLAG_RD, 779 NULL, efx_nic_cfg_get(enp)->enc_phy_type, 780 "PHY type"); 781 782 /* Initialize the NVRAM. */ 783 DBGPRINT(sc->dev, "nvram_init..."); 784 if ((error = efx_nvram_init(enp)) != 0) 785 goto fail6; 786 787 /* Initialize the VPD. */ 788 DBGPRINT(sc->dev, "vpd_init..."); 789 if ((error = efx_vpd_init(enp)) != 0) 790 goto fail7; 791 792 efx_mcdi_new_epoch(enp); 793 794 /* Reset the NIC. */ 795 DBGPRINT(sc->dev, "nic_reset..."); 796 if ((error = efx_nic_reset(enp)) != 0) 797 goto fail8; 798 799 /* Initialize buffer table allocation. */ 800 sc->buffer_table_next = 0; 801 802 /* 803 * Guarantee minimum and estimate maximum number of event queues 804 * to take it into account when MSI-X interrupts are allocated. 805 * It initializes NIC and keeps it initialized on success. 806 */ 807 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) 808 goto fail8; 809 810 /* Set up interrupts. */ 811 DBGPRINT(sc->dev, "intr_init..."); 812 if ((error = sfxge_intr_init(sc)) != 0) 813 goto fail9; 814 815 /* Initialize event processing state. */ 816 DBGPRINT(sc->dev, "ev_init..."); 817 if ((error = sfxge_ev_init(sc)) != 0) 818 goto fail11; 819 820 /* Initialize port state. */ 821 DBGPRINT(sc->dev, "port_init..."); 822 if ((error = sfxge_port_init(sc)) != 0) 823 goto fail12; 824 825 /* Initialize receive state. */ 826 DBGPRINT(sc->dev, "rx_init..."); 827 if ((error = sfxge_rx_init(sc)) != 0) 828 goto fail13; 829 830 /* Initialize transmit state. */ 831 DBGPRINT(sc->dev, "tx_init..."); 832 if ((error = sfxge_tx_init(sc)) != 0) 833 goto fail14; 834 835 sc->init_state = SFXGE_INITIALIZED; 836 837 DBGPRINT(sc->dev, "success"); 838 return (0); 839 840 fail14: 841 sfxge_rx_fini(sc); 842 843 fail13: 844 sfxge_port_fini(sc); 845 846 fail12: 847 sfxge_ev_fini(sc); 848 849 fail11: 850 sfxge_intr_fini(sc); 851 852 fail9: 853 efx_nic_fini(sc->enp); 854 855 fail8: 856 efx_vpd_fini(enp); 857 858 fail7: 859 efx_nvram_fini(enp); 860 861 fail6: 862 fail_tx_ring_entries: 863 fail_rx_ring_entries: 864 efx_nic_unprobe(enp); 865 866 fail5: 867 sfxge_mcdi_fini(sc); 868 869 fail4: 870 sc->enp = NULL; 871 efx_nic_destroy(enp); 872 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock); 873 874 fail3: 875 sfxge_bar_fini(sc); 876 (void) pci_disable_busmaster(sc->dev); 877 878 fail: 879 DBGPRINT(sc->dev, "failed %d", error); 880 sc->dev = NULL; 881 SFXGE_ADAPTER_LOCK_DESTROY(sc); 882 return (error); 883 } 884 885 static void 886 sfxge_destroy(struct sfxge_softc *sc) 887 { 888 efx_nic_t *enp; 889 890 /* Clean up transmit state. */ 891 sfxge_tx_fini(sc); 892 893 /* Clean up receive state. */ 894 sfxge_rx_fini(sc); 895 896 /* Clean up port state. */ 897 sfxge_port_fini(sc); 898 899 /* Clean up event processing state. */ 900 sfxge_ev_fini(sc); 901 902 /* Clean up interrupts. */ 903 sfxge_intr_fini(sc); 904 905 /* Tear down common code subsystems. */ 906 efx_nic_reset(sc->enp); 907 efx_vpd_fini(sc->enp); 908 efx_nvram_fini(sc->enp); 909 efx_nic_unprobe(sc->enp); 910 911 /* Tear down MCDI. */ 912 sfxge_mcdi_fini(sc); 913 914 /* Destroy common code context. */ 915 enp = sc->enp; 916 sc->enp = NULL; 917 efx_nic_destroy(enp); 918 919 /* Free DMA memory. */ 920 sfxge_dma_fini(sc); 921 922 /* Free mapped BARs. */ 923 sfxge_bar_fini(sc); 924 925 (void) pci_disable_busmaster(sc->dev); 926 927 taskqueue_drain(taskqueue_thread, &sc->task_reset); 928 929 /* Destroy the softc lock. */ 930 SFXGE_ADAPTER_LOCK_DESTROY(sc); 931 } 932 933 static int 934 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS) 935 { 936 struct sfxge_softc *sc = arg1; 937 efx_vpd_value_t value; 938 int rc; 939 940 value.evv_tag = arg2 >> 16; 941 value.evv_keyword = arg2 & 0xffff; 942 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) 943 != 0) 944 return (rc); 945 946 return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); 947 } 948 949 static void 950 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list, 951 efx_vpd_tag_t tag, const char *keyword) 952 { 953 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 954 efx_vpd_value_t value; 955 956 /* Check whether VPD tag/keyword is present */ 957 value.evv_tag = tag; 958 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]); 959 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0) 960 return; 961 962 SYSCTL_ADD_PROC(ctx, list, OID_AUTO, keyword, 963 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 964 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]), 965 sfxge_vpd_handler, "A", ""); 966 } 967 968 static int 969 sfxge_vpd_init(struct sfxge_softc *sc) 970 { 971 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 972 struct sysctl_oid *vpd_node; 973 struct sysctl_oid_list *vpd_list; 974 char keyword[3]; 975 efx_vpd_value_t value; 976 int rc; 977 978 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) { 979 /* 980 * Unprivileged functions deny VPD access. 981 * Simply skip VPD in this case. 982 */ 983 if (rc == EACCES) 984 goto done; 985 goto fail; 986 } 987 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK); 988 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0) 989 goto fail2; 990 991 /* Copy ID (product name) into device description, and log it. */ 992 value.evv_tag = EFX_VPD_ID; 993 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) { 994 value.evv_value[value.evv_length] = 0; 995 device_set_desc_copy(sc->dev, value.evv_value); 996 device_printf(sc->dev, "%s\n", value.evv_value); 997 } 998 999 vpd_node = SYSCTL_ADD_NODE(ctx, 1000 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "vpd", 1001 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Vital Product Data"); 1002 vpd_list = SYSCTL_CHILDREN(vpd_node); 1003 1004 /* Add sysctls for all expected and any vendor-defined keywords. */ 1005 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN"); 1006 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC"); 1007 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN"); 1008 keyword[0] = 'V'; 1009 keyword[2] = 0; 1010 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++) 1011 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1012 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) 1013 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 1014 1015 done: 1016 return (0); 1017 1018 fail2: 1019 free(sc->vpd_data, M_SFXGE); 1020 fail: 1021 return (rc); 1022 } 1023 1024 static void 1025 sfxge_vpd_fini(struct sfxge_softc *sc) 1026 { 1027 free(sc->vpd_data, M_SFXGE); 1028 } 1029 1030 static void 1031 sfxge_reset(void *arg, int npending) 1032 { 1033 struct sfxge_softc *sc; 1034 int rc; 1035 unsigned attempt; 1036 1037 (void)npending; 1038 1039 sc = (struct sfxge_softc *)arg; 1040 1041 SFXGE_ADAPTER_LOCK(sc); 1042 1043 if (sc->init_state != SFXGE_STARTED) 1044 goto done; 1045 1046 sfxge_stop(sc); 1047 efx_nic_reset(sc->enp); 1048 for (attempt = 0; attempt < sfxge_restart_attempts; ++attempt) { 1049 if ((rc = sfxge_start(sc)) == 0) 1050 goto done; 1051 1052 device_printf(sc->dev, "start on reset failed (%d)\n", rc); 1053 DELAY(100000); 1054 } 1055 1056 device_printf(sc->dev, "reset failed; interface is now stopped\n"); 1057 1058 done: 1059 SFXGE_ADAPTER_UNLOCK(sc); 1060 } 1061 1062 void 1063 sfxge_schedule_reset(struct sfxge_softc *sc) 1064 { 1065 taskqueue_enqueue(taskqueue_thread, &sc->task_reset); 1066 } 1067 1068 static int 1069 sfxge_attach(device_t dev) 1070 { 1071 struct sfxge_softc *sc; 1072 if_t ifp; 1073 int error; 1074 1075 sc = device_get_softc(dev); 1076 sc->dev = dev; 1077 1078 /* Allocate ifnet. */ 1079 ifp = if_alloc(IFT_ETHER); 1080 sc->ifnet = ifp; 1081 1082 /* Initialize hardware. */ 1083 DBGPRINT(sc->dev, "create nic"); 1084 if ((error = sfxge_create(sc)) != 0) 1085 goto fail2; 1086 1087 /* Create the ifnet for the port. */ 1088 DBGPRINT(sc->dev, "init ifnet"); 1089 if ((error = sfxge_ifnet_init(ifp, sc)) != 0) 1090 goto fail3; 1091 1092 DBGPRINT(sc->dev, "init vpd"); 1093 if ((error = sfxge_vpd_init(sc)) != 0) 1094 goto fail4; 1095 1096 /* 1097 * NIC is initialized inside sfxge_create() and kept inialized 1098 * to be able to initialize port to discover media types in 1099 * sfxge_ifnet_init(). 1100 */ 1101 efx_nic_fini(sc->enp); 1102 1103 sc->init_state = SFXGE_REGISTERED; 1104 1105 DBGPRINT(sc->dev, "success"); 1106 return (0); 1107 1108 fail4: 1109 sfxge_ifnet_fini(ifp); 1110 fail3: 1111 efx_nic_fini(sc->enp); 1112 sfxge_destroy(sc); 1113 1114 fail2: 1115 if_free(sc->ifnet); 1116 DBGPRINT(sc->dev, "failed %d", error); 1117 return (error); 1118 } 1119 1120 static int 1121 sfxge_detach(device_t dev) 1122 { 1123 struct sfxge_softc *sc; 1124 1125 sc = device_get_softc(dev); 1126 1127 sfxge_vpd_fini(sc); 1128 1129 /* Destroy the ifnet. */ 1130 sfxge_ifnet_fini(sc->ifnet); 1131 1132 /* Tear down hardware. */ 1133 sfxge_destroy(sc); 1134 1135 return (0); 1136 } 1137 1138 static int 1139 sfxge_probe(device_t dev) 1140 { 1141 uint16_t pci_vendor_id; 1142 uint16_t pci_device_id; 1143 efx_family_t family; 1144 unsigned int mem_bar; 1145 int rc; 1146 1147 pci_vendor_id = pci_get_vendor(dev); 1148 pci_device_id = pci_get_device(dev); 1149 1150 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); 1151 rc = efx_family(pci_vendor_id, pci_device_id, &family, &mem_bar); 1152 if (rc != 0) { 1153 DBGPRINT(dev, "efx_family fail %d", rc); 1154 return (ENXIO); 1155 } 1156 1157 if (family == EFX_FAMILY_SIENA) { 1158 device_set_desc(dev, "Solarflare SFC9000 family"); 1159 return (0); 1160 } 1161 1162 if (family == EFX_FAMILY_HUNTINGTON) { 1163 device_set_desc(dev, "Solarflare SFC9100 family"); 1164 return (0); 1165 } 1166 1167 if (family == EFX_FAMILY_MEDFORD) { 1168 device_set_desc(dev, "Solarflare SFC9200 family"); 1169 return (0); 1170 } 1171 1172 if (family == EFX_FAMILY_MEDFORD2) { 1173 device_set_desc(dev, "Solarflare SFC9250 family"); 1174 return (0); 1175 } 1176 1177 DBGPRINT(dev, "impossible controller family %d", family); 1178 return (ENXIO); 1179 } 1180 1181 static device_method_t sfxge_methods[] = { 1182 DEVMETHOD(device_probe, sfxge_probe), 1183 DEVMETHOD(device_attach, sfxge_attach), 1184 DEVMETHOD(device_detach, sfxge_detach), 1185 1186 DEVMETHOD_END 1187 }; 1188 1189 static driver_t sfxge_driver = { 1190 "sfxge", 1191 sfxge_methods, 1192 sizeof(struct sfxge_softc) 1193 }; 1194 1195 DRIVER_MODULE(sfxge, pci, sfxge_driver, 0, 0); 1196