1 /*- 2 * Copyright (c) 2010-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/kernel.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 #include <sys/lock.h> 42 #include <sys/module.h> 43 #include <sys/mutex.h> 44 #include <sys/smp.h> 45 #include <sys/socket.h> 46 #include <sys/taskqueue.h> 47 #include <sys/sockio.h> 48 #include <sys/sysctl.h> 49 #include <sys/priv.h> 50 #include <sys/syslog.h> 51 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcivar.h> 54 55 #include <net/ethernet.h> 56 #include <net/if.h> 57 #include <net/if_var.h> 58 #include <net/if_media.h> 59 #include <net/if_types.h> 60 61 #include "common/efx.h" 62 63 #include "sfxge.h" 64 #include "sfxge_rx.h" 65 #include "sfxge_ioc.h" 66 #include "sfxge_version.h" 67 68 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ 69 IFCAP_RXCSUM | IFCAP_TXCSUM | \ 70 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ 71 IFCAP_TSO4 | IFCAP_TSO6 | \ 72 IFCAP_JUMBO_MTU | \ 73 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) 74 #define SFXGE_CAP_ENABLE SFXGE_CAP 75 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ 76 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) 77 78 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); 79 80 81 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0, 82 "SFXGE driver parameters"); 83 84 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring) 85 static int sfxge_rx_ring_entries = SFXGE_NDESCS; 86 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries); 87 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN, 88 &sfxge_rx_ring_entries, 0, 89 "Maximum number of descriptors in a receive ring"); 90 91 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring) 92 static int sfxge_tx_ring_entries = SFXGE_NDESCS; 93 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries); 94 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, 95 &sfxge_tx_ring_entries, 0, 96 "Maximum number of descriptors in a transmit ring"); 97 98 #define SFXGE_PARAM_RESTART_ATTEMPTS SFXGE_PARAM(restart_attempts) 99 static int sfxge_restart_attempts = 3; 100 TUNABLE_INT(SFXGE_PARAM_RESTART_ATTEMPTS, &sfxge_restart_attempts); 101 SYSCTL_INT(_hw_sfxge, OID_AUTO, restart_attempts, CTLFLAG_RDTUN, 102 &sfxge_restart_attempts, 0, 103 "Maximum number of attempts to bring interface up after reset"); 104 105 #if EFSYS_OPT_MCDI_LOGGING 106 #define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging) 107 static int sfxge_mcdi_logging = 0; 108 TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging); 109 #endif 110 111 static void 112 sfxge_reset(void *arg, int npending); 113 114 static int 115 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) 116 { 117 efx_drv_limits_t limits; 118 int rc; 119 unsigned int evq_max; 120 uint32_t evq_allocated; 121 uint32_t rxq_allocated; 122 uint32_t txq_allocated; 123 124 /* 125 * Limit the number of event queues to: 126 * - number of CPUs 127 * - hardwire maximum RSS channels 128 * - administratively specified maximum RSS channels 129 */ 130 evq_max = MIN(mp_ncpus, EFX_MAXRSS); 131 if (sc->max_rss_channels > 0) 132 evq_max = MIN(evq_max, sc->max_rss_channels); 133 134 memset(&limits, 0, sizeof(limits)); 135 136 limits.edl_min_evq_count = 1; 137 limits.edl_max_evq_count = evq_max; 138 limits.edl_min_txq_count = SFXGE_TXQ_NTYPES; 139 limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1; 140 limits.edl_min_rxq_count = 1; 141 limits.edl_max_rxq_count = evq_max; 142 143 efx_nic_set_drv_limits(sc->enp, &limits); 144 145 if ((rc = efx_nic_init(sc->enp)) != 0) 146 return (rc); 147 148 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, 149 &txq_allocated); 150 if (rc != 0) { 151 efx_nic_fini(sc->enp); 152 return (rc); 153 } 154 155 KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES, 156 ("txq_allocated < SFXGE_TXQ_NTYPES")); 157 158 sc->evq_max = MIN(evq_allocated, evq_max); 159 sc->evq_max = MIN(rxq_allocated, sc->evq_max); 160 sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1), 161 sc->evq_max); 162 163 KASSERT(sc->evq_max <= evq_max, 164 ("allocated more than maximum requested")); 165 166 /* 167 * NIC is kept initialized in the case of success to be able to 168 * initialize port to find out media types. 169 */ 170 return (0); 171 } 172 173 static int 174 sfxge_set_drv_limits(struct sfxge_softc *sc) 175 { 176 efx_drv_limits_t limits; 177 178 memset(&limits, 0, sizeof(limits)); 179 180 /* Limits are strict since take into account initial estimation */ 181 limits.edl_min_evq_count = limits.edl_max_evq_count = 182 sc->intr.n_alloc; 183 limits.edl_min_txq_count = limits.edl_max_txq_count = 184 sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1; 185 limits.edl_min_rxq_count = limits.edl_max_rxq_count = 186 sc->intr.n_alloc; 187 188 return (efx_nic_set_drv_limits(sc->enp, &limits)); 189 } 190 191 static int 192 sfxge_start(struct sfxge_softc *sc) 193 { 194 int rc; 195 196 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 197 198 if (sc->init_state == SFXGE_STARTED) 199 return (0); 200 201 if (sc->init_state != SFXGE_REGISTERED) { 202 rc = EINVAL; 203 goto fail; 204 } 205 206 /* Set required resource limits */ 207 if ((rc = sfxge_set_drv_limits(sc)) != 0) 208 goto fail; 209 210 if ((rc = efx_nic_init(sc->enp)) != 0) 211 goto fail; 212 213 /* Start processing interrupts. */ 214 if ((rc = sfxge_intr_start(sc)) != 0) 215 goto fail2; 216 217 /* Start processing events. */ 218 if ((rc = sfxge_ev_start(sc)) != 0) 219 goto fail3; 220 221 /* Fire up the port. */ 222 if ((rc = sfxge_port_start(sc)) != 0) 223 goto fail4; 224 225 /* Start the receiver side. */ 226 if ((rc = sfxge_rx_start(sc)) != 0) 227 goto fail5; 228 229 /* Start the transmitter side. */ 230 if ((rc = sfxge_tx_start(sc)) != 0) 231 goto fail6; 232 233 sc->init_state = SFXGE_STARTED; 234 235 /* Tell the stack we're running. */ 236 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING; 237 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE; 238 239 return (0); 240 241 fail6: 242 sfxge_rx_stop(sc); 243 244 fail5: 245 sfxge_port_stop(sc); 246 247 fail4: 248 sfxge_ev_stop(sc); 249 250 fail3: 251 sfxge_intr_stop(sc); 252 253 fail2: 254 efx_nic_fini(sc->enp); 255 256 fail: 257 device_printf(sc->dev, "sfxge_start: %d\n", rc); 258 259 return (rc); 260 } 261 262 static void 263 sfxge_if_init(void *arg) 264 { 265 struct sfxge_softc *sc; 266 267 sc = (struct sfxge_softc *)arg; 268 269 SFXGE_ADAPTER_LOCK(sc); 270 (void)sfxge_start(sc); 271 SFXGE_ADAPTER_UNLOCK(sc); 272 } 273 274 static void 275 sfxge_stop(struct sfxge_softc *sc) 276 { 277 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); 278 279 if (sc->init_state != SFXGE_STARTED) 280 return; 281 282 sc->init_state = SFXGE_REGISTERED; 283 284 /* Stop the transmitter. */ 285 sfxge_tx_stop(sc); 286 287 /* Stop the receiver. */ 288 sfxge_rx_stop(sc); 289 290 /* Stop the port. */ 291 sfxge_port_stop(sc); 292 293 /* Stop processing events. */ 294 sfxge_ev_stop(sc); 295 296 /* Stop processing interrupts. */ 297 sfxge_intr_stop(sc); 298 299 efx_nic_fini(sc->enp); 300 301 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING; 302 } 303 304 305 static int 306 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 307 { 308 efx_vpd_value_t value; 309 int rc = 0; 310 311 switch (ioc->u.vpd.op) { 312 case SFXGE_VPD_OP_GET_KEYWORD: 313 value.evv_tag = ioc->u.vpd.tag; 314 value.evv_keyword = ioc->u.vpd.keyword; 315 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); 316 if (rc != 0) 317 break; 318 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); 319 if (ioc->u.vpd.payload != 0) { 320 rc = copyout(value.evv_value, ioc->u.vpd.payload, 321 ioc->u.vpd.len); 322 } 323 break; 324 case SFXGE_VPD_OP_SET_KEYWORD: 325 if (ioc->u.vpd.len > sizeof(value.evv_value)) 326 return (EINVAL); 327 value.evv_tag = ioc->u.vpd.tag; 328 value.evv_keyword = ioc->u.vpd.keyword; 329 value.evv_length = ioc->u.vpd.len; 330 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); 331 if (rc != 0) 332 break; 333 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); 334 if (rc != 0) 335 break; 336 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); 337 if (rc != 0) 338 break; 339 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); 340 break; 341 default: 342 rc = EOPNOTSUPP; 343 break; 344 } 345 346 return (rc); 347 } 348 349 static int 350 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) 351 { 352 switch (ioc->op) { 353 case SFXGE_MCDI_IOC: 354 return (sfxge_mcdi_ioctl(sc, ioc)); 355 case SFXGE_NVRAM_IOC: 356 return (sfxge_nvram_ioctl(sc, ioc)); 357 case SFXGE_VPD_IOC: 358 return (sfxge_vpd_ioctl(sc, ioc)); 359 default: 360 return (EOPNOTSUPP); 361 } 362 } 363 364 365 static int 366 sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) 367 { 368 struct sfxge_softc *sc; 369 struct ifreq *ifr; 370 sfxge_ioc_t ioc; 371 int error; 372 373 ifr = (struct ifreq *)data; 374 sc = ifp->if_softc; 375 error = 0; 376 377 switch (command) { 378 case SIOCSIFFLAGS: 379 SFXGE_ADAPTER_LOCK(sc); 380 if (ifp->if_flags & IFF_UP) { 381 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 382 if ((ifp->if_flags ^ sc->if_flags) & 383 (IFF_PROMISC | IFF_ALLMULTI)) { 384 sfxge_mac_filter_set(sc); 385 } 386 } else 387 sfxge_start(sc); 388 } else 389 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 390 sfxge_stop(sc); 391 sc->if_flags = ifp->if_flags; 392 SFXGE_ADAPTER_UNLOCK(sc); 393 break; 394 case SIOCSIFMTU: 395 if (ifr->ifr_mtu == ifp->if_mtu) { 396 /* Nothing to do */ 397 error = 0; 398 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) { 399 error = EINVAL; 400 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 401 ifp->if_mtu = ifr->ifr_mtu; 402 error = 0; 403 } else { 404 /* Restart required */ 405 SFXGE_ADAPTER_LOCK(sc); 406 sfxge_stop(sc); 407 ifp->if_mtu = ifr->ifr_mtu; 408 error = sfxge_start(sc); 409 SFXGE_ADAPTER_UNLOCK(sc); 410 if (error != 0) { 411 ifp->if_flags &= ~IFF_UP; 412 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 413 if_down(ifp); 414 } 415 } 416 break; 417 case SIOCADDMULTI: 418 case SIOCDELMULTI: 419 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 420 sfxge_mac_filter_set(sc); 421 break; 422 case SIOCSIFCAP: 423 { 424 int reqcap = ifr->ifr_reqcap; 425 int capchg_mask; 426 427 SFXGE_ADAPTER_LOCK(sc); 428 429 /* Capabilities to be changed in accordance with request */ 430 capchg_mask = ifp->if_capenable ^ reqcap; 431 432 /* 433 * The networking core already rejects attempts to 434 * enable capabilities we don't have. We still have 435 * to reject attempts to disable capabilities that we 436 * can't (yet) disable. 437 */ 438 KASSERT((reqcap & ~ifp->if_capabilities) == 0, 439 ("Unsupported capabilities 0x%x requested 0x%x vs " 440 "supported 0x%x", 441 reqcap & ~ifp->if_capabilities, 442 reqcap , ifp->if_capabilities)); 443 if (capchg_mask & SFXGE_CAP_FIXED) { 444 error = EINVAL; 445 SFXGE_ADAPTER_UNLOCK(sc); 446 break; 447 } 448 449 /* Check request before any changes */ 450 if ((capchg_mask & IFCAP_TSO4) && 451 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { 452 error = EAGAIN; 453 SFXGE_ADAPTER_UNLOCK(sc); 454 if_printf(ifp, "enable txcsum before tso4\n"); 455 break; 456 } 457 if ((capchg_mask & IFCAP_TSO6) && 458 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { 459 error = EAGAIN; 460 SFXGE_ADAPTER_UNLOCK(sc); 461 if_printf(ifp, "enable txcsum6 before tso6\n"); 462 break; 463 } 464 465 if (reqcap & IFCAP_TXCSUM) { 466 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP); 467 } else { 468 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP); 469 if (reqcap & IFCAP_TSO4) { 470 reqcap &= ~IFCAP_TSO4; 471 if_printf(ifp, 472 "tso4 disabled due to -txcsum\n"); 473 } 474 } 475 if (reqcap & IFCAP_TXCSUM_IPV6) { 476 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 477 } else { 478 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6); 479 if (reqcap & IFCAP_TSO6) { 480 reqcap &= ~IFCAP_TSO6; 481 if_printf(ifp, 482 "tso6 disabled due to -txcsum6\n"); 483 } 484 } 485 486 /* 487 * The kernel takes both IFCAP_TSOx and CSUM_TSO into 488 * account before using TSO. So, we do not touch 489 * checksum flags when IFCAP_TSOx is modified. 490 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), 491 * but both bits are set in IPv4 and IPv6 mbufs. 492 */ 493 494 ifp->if_capenable = reqcap; 495 496 SFXGE_ADAPTER_UNLOCK(sc); 497 break; 498 } 499 case SIOCSIFMEDIA: 500 case SIOCGIFMEDIA: 501 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 502 break; 503 case SIOCGPRIVATE_0: 504 error = priv_check(curthread, PRIV_DRIVER); 505 if (error != 0) 506 break; 507 error = copyin(ifr->ifr_data, &ioc, sizeof(ioc)); 508 if (error != 0) 509 return (error); 510 error = sfxge_private_ioctl(sc, &ioc); 511 if (error == 0) { 512 error = copyout(&ioc, ifr->ifr_data, sizeof(ioc)); 513 } 514 break; 515 default: 516 error = ether_ioctl(ifp, command, data); 517 } 518 519 return (error); 520 } 521 522 static void 523 sfxge_ifnet_fini(struct ifnet *ifp) 524 { 525 struct sfxge_softc *sc = ifp->if_softc; 526 527 SFXGE_ADAPTER_LOCK(sc); 528 sfxge_stop(sc); 529 SFXGE_ADAPTER_UNLOCK(sc); 530 531 ifmedia_removeall(&sc->media); 532 ether_ifdetach(ifp); 533 if_free(ifp); 534 } 535 536 static int 537 sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) 538 { 539 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); 540 device_t dev; 541 int rc; 542 543 dev = sc->dev; 544 sc->ifnet = ifp; 545 546 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 547 ifp->if_init = sfxge_if_init; 548 ifp->if_softc = sc; 549 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 550 ifp->if_ioctl = sfxge_if_ioctl; 551 552 ifp->if_capabilities = SFXGE_CAP; 553 ifp->if_capenable = SFXGE_CAP_ENABLE; 554 ifp->if_hw_tsomax = SFXGE_TSO_MAX_SIZE; 555 ifp->if_hw_tsomaxsegcount = SFXGE_TX_MAPPING_MAX_SEG; 556 ifp->if_hw_tsomaxsegsize = PAGE_SIZE; 557 558 #ifdef SFXGE_LRO 559 ifp->if_capabilities |= IFCAP_LRO; 560 ifp->if_capenable |= IFCAP_LRO; 561 #endif 562 563 if (encp->enc_hw_tx_insert_vlan_enabled) { 564 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 565 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING; 566 } 567 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | 568 CSUM_TCP_IPV6 | CSUM_UDP_IPV6; 569 570 ether_ifattach(ifp, encp->enc_mac_addr); 571 572 ifp->if_transmit = sfxge_if_transmit; 573 ifp->if_qflush = sfxge_if_qflush; 574 575 ifp->if_get_counter = sfxge_get_counter; 576 577 DBGPRINT(sc->dev, "ifmedia_init"); 578 if ((rc = sfxge_port_ifmedia_init(sc)) != 0) 579 goto fail; 580 581 return (0); 582 583 fail: 584 ether_ifdetach(sc->ifnet); 585 return (rc); 586 } 587 588 void 589 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp) 590 { 591 KASSERT(sc->buffer_table_next + n <= 592 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit, 593 ("buffer table full")); 594 595 *idp = sc->buffer_table_next; 596 sc->buffer_table_next += n; 597 } 598 599 static int 600 sfxge_bar_init(struct sfxge_softc *sc) 601 { 602 efsys_bar_t *esbp = &sc->bar; 603 604 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR); 605 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, 606 &esbp->esb_rid, RF_ACTIVE)) == NULL) { 607 device_printf(sc->dev, "Cannot allocate BAR region %d\n", 608 EFX_MEM_BAR); 609 return (ENXIO); 610 } 611 esbp->esb_tag = rman_get_bustag(esbp->esb_res); 612 esbp->esb_handle = rman_get_bushandle(esbp->esb_res); 613 614 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev)); 615 616 return (0); 617 } 618 619 static void 620 sfxge_bar_fini(struct sfxge_softc *sc) 621 { 622 efsys_bar_t *esbp = &sc->bar; 623 624 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid, 625 esbp->esb_res); 626 SFXGE_BAR_LOCK_DESTROY(esbp); 627 } 628 629 static int 630 sfxge_create(struct sfxge_softc *sc) 631 { 632 device_t dev; 633 efx_nic_t *enp; 634 int error; 635 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))]; 636 #if EFSYS_OPT_MCDI_LOGGING 637 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))]; 638 #endif 639 640 dev = sc->dev; 641 642 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev)); 643 644 sc->max_rss_channels = 0; 645 snprintf(rss_param_name, sizeof(rss_param_name), 646 SFXGE_PARAM(%d.max_rss_channels), 647 (int)device_get_unit(dev)); 648 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels); 649 #if EFSYS_OPT_MCDI_LOGGING 650 sc->mcdi_logging = sfxge_mcdi_logging; 651 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name), 652 SFXGE_PARAM(%d.mcdi_logging), 653 (int)device_get_unit(dev)); 654 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging); 655 #endif 656 657 sc->stats_node = SYSCTL_ADD_NODE( 658 device_get_sysctl_ctx(dev), 659 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 660 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics"); 661 if (sc->stats_node == NULL) { 662 error = ENOMEM; 663 goto fail; 664 } 665 666 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc); 667 668 (void) pci_enable_busmaster(dev); 669 670 /* Initialize DMA mappings. */ 671 DBGPRINT(sc->dev, "dma_init..."); 672 if ((error = sfxge_dma_init(sc)) != 0) 673 goto fail; 674 675 /* Map the device registers. */ 676 DBGPRINT(sc->dev, "bar_init..."); 677 if ((error = sfxge_bar_init(sc)) != 0) 678 goto fail; 679 680 error = efx_family(pci_get_vendor(dev), pci_get_device(dev), 681 &sc->family); 682 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); 683 684 DBGPRINT(sc->dev, "nic_create..."); 685 686 /* Create the common code nic object. */ 687 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, 688 device_get_nameunit(sc->dev), "nic"); 689 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc, 690 &sc->bar, &sc->enp_lock, &enp)) != 0) 691 goto fail3; 692 sc->enp = enp; 693 694 if (!ISP2(sfxge_rx_ring_entries) || 695 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || 696 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { 697 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 698 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, 699 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); 700 error = EINVAL; 701 goto fail_rx_ring_entries; 702 } 703 sc->rxq_entries = sfxge_rx_ring_entries; 704 705 if (!ISP2(sfxge_tx_ring_entries) || 706 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || 707 (sfxge_tx_ring_entries > EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)))) { 708 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", 709 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, 710 EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp))); 711 error = EINVAL; 712 goto fail_tx_ring_entries; 713 } 714 sc->txq_entries = sfxge_tx_ring_entries; 715 716 /* Initialize MCDI to talk to the microcontroller. */ 717 DBGPRINT(sc->dev, "mcdi_init..."); 718 if ((error = sfxge_mcdi_init(sc)) != 0) 719 goto fail4; 720 721 /* Probe the NIC and build the configuration data area. */ 722 DBGPRINT(sc->dev, "nic_probe..."); 723 if ((error = efx_nic_probe(enp)) != 0) 724 goto fail5; 725 726 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 727 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 728 OID_AUTO, "version", CTLFLAG_RD, 729 SFXGE_VERSION_STRING, 0, 730 "Driver version"); 731 732 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 733 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 734 OID_AUTO, "phy_type", CTLFLAG_RD, 735 NULL, efx_nic_cfg_get(enp)->enc_phy_type, 736 "PHY type"); 737 738 /* Initialize the NVRAM. */ 739 DBGPRINT(sc->dev, "nvram_init..."); 740 if ((error = efx_nvram_init(enp)) != 0) 741 goto fail6; 742 743 /* Initialize the VPD. */ 744 DBGPRINT(sc->dev, "vpd_init..."); 745 if ((error = efx_vpd_init(enp)) != 0) 746 goto fail7; 747 748 efx_mcdi_new_epoch(enp); 749 750 /* Reset the NIC. */ 751 DBGPRINT(sc->dev, "nic_reset..."); 752 if ((error = efx_nic_reset(enp)) != 0) 753 goto fail8; 754 755 /* Initialize buffer table allocation. */ 756 sc->buffer_table_next = 0; 757 758 /* 759 * Guarantee minimum and estimate maximum number of event queues 760 * to take it into account when MSI-X interrupts are allocated. 761 * It initializes NIC and keeps it initialized on success. 762 */ 763 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) 764 goto fail8; 765 766 /* Set up interrupts. */ 767 DBGPRINT(sc->dev, "intr_init..."); 768 if ((error = sfxge_intr_init(sc)) != 0) 769 goto fail9; 770 771 /* Initialize event processing state. */ 772 DBGPRINT(sc->dev, "ev_init..."); 773 if ((error = sfxge_ev_init(sc)) != 0) 774 goto fail11; 775 776 /* Initialize port state. */ 777 DBGPRINT(sc->dev, "port_init..."); 778 if ((error = sfxge_port_init(sc)) != 0) 779 goto fail12; 780 781 /* Initialize receive state. */ 782 DBGPRINT(sc->dev, "rx_init..."); 783 if ((error = sfxge_rx_init(sc)) != 0) 784 goto fail13; 785 786 /* Initialize transmit state. */ 787 DBGPRINT(sc->dev, "tx_init..."); 788 if ((error = sfxge_tx_init(sc)) != 0) 789 goto fail14; 790 791 sc->init_state = SFXGE_INITIALIZED; 792 793 DBGPRINT(sc->dev, "success"); 794 return (0); 795 796 fail14: 797 sfxge_rx_fini(sc); 798 799 fail13: 800 sfxge_port_fini(sc); 801 802 fail12: 803 sfxge_ev_fini(sc); 804 805 fail11: 806 sfxge_intr_fini(sc); 807 808 fail9: 809 efx_nic_fini(sc->enp); 810 811 fail8: 812 efx_vpd_fini(enp); 813 814 fail7: 815 efx_nvram_fini(enp); 816 817 fail6: 818 efx_nic_unprobe(enp); 819 820 fail5: 821 sfxge_mcdi_fini(sc); 822 823 fail4: 824 fail_tx_ring_entries: 825 fail_rx_ring_entries: 826 sc->enp = NULL; 827 efx_nic_destroy(enp); 828 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock); 829 830 fail3: 831 sfxge_bar_fini(sc); 832 (void) pci_disable_busmaster(sc->dev); 833 834 fail: 835 DBGPRINT(sc->dev, "failed %d", error); 836 sc->dev = NULL; 837 SFXGE_ADAPTER_LOCK_DESTROY(sc); 838 return (error); 839 } 840 841 static void 842 sfxge_destroy(struct sfxge_softc *sc) 843 { 844 efx_nic_t *enp; 845 846 /* Clean up transmit state. */ 847 sfxge_tx_fini(sc); 848 849 /* Clean up receive state. */ 850 sfxge_rx_fini(sc); 851 852 /* Clean up port state. */ 853 sfxge_port_fini(sc); 854 855 /* Clean up event processing state. */ 856 sfxge_ev_fini(sc); 857 858 /* Clean up interrupts. */ 859 sfxge_intr_fini(sc); 860 861 /* Tear down common code subsystems. */ 862 efx_nic_reset(sc->enp); 863 efx_vpd_fini(sc->enp); 864 efx_nvram_fini(sc->enp); 865 efx_nic_unprobe(sc->enp); 866 867 /* Tear down MCDI. */ 868 sfxge_mcdi_fini(sc); 869 870 /* Destroy common code context. */ 871 enp = sc->enp; 872 sc->enp = NULL; 873 efx_nic_destroy(enp); 874 875 /* Free DMA memory. */ 876 sfxge_dma_fini(sc); 877 878 /* Free mapped BARs. */ 879 sfxge_bar_fini(sc); 880 881 (void) pci_disable_busmaster(sc->dev); 882 883 taskqueue_drain(taskqueue_thread, &sc->task_reset); 884 885 /* Destroy the softc lock. */ 886 SFXGE_ADAPTER_LOCK_DESTROY(sc); 887 } 888 889 static int 890 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS) 891 { 892 struct sfxge_softc *sc = arg1; 893 efx_vpd_value_t value; 894 int rc; 895 896 value.evv_tag = arg2 >> 16; 897 value.evv_keyword = arg2 & 0xffff; 898 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) 899 != 0) 900 return (rc); 901 902 return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); 903 } 904 905 static void 906 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list, 907 efx_vpd_tag_t tag, const char *keyword) 908 { 909 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 910 efx_vpd_value_t value; 911 912 /* Check whether VPD tag/keyword is present */ 913 value.evv_tag = tag; 914 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]); 915 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0) 916 return; 917 918 SYSCTL_ADD_PROC( 919 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD, 920 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]), 921 sfxge_vpd_handler, "A", ""); 922 } 923 924 static int 925 sfxge_vpd_init(struct sfxge_softc *sc) 926 { 927 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); 928 struct sysctl_oid *vpd_node; 929 struct sysctl_oid_list *vpd_list; 930 char keyword[3]; 931 efx_vpd_value_t value; 932 int rc; 933 934 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) { 935 /* 936 * Unpriviledged functions deny VPD access. 937 * Simply skip VPD in this case. 938 */ 939 if (rc == EACCES) 940 goto done; 941 goto fail; 942 } 943 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK); 944 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0) 945 goto fail2; 946 947 /* Copy ID (product name) into device description, and log it. */ 948 value.evv_tag = EFX_VPD_ID; 949 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) { 950 value.evv_value[value.evv_length] = 0; 951 device_set_desc_copy(sc->dev, value.evv_value); 952 device_printf(sc->dev, "%s\n", value.evv_value); 953 } 954 955 vpd_node = SYSCTL_ADD_NODE( 956 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), 957 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data"); 958 vpd_list = SYSCTL_CHILDREN(vpd_node); 959 960 /* Add sysctls for all expected and any vendor-defined keywords. */ 961 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN"); 962 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC"); 963 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN"); 964 keyword[0] = 'V'; 965 keyword[2] = 0; 966 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++) 967 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 968 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) 969 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); 970 971 done: 972 return (0); 973 974 fail2: 975 free(sc->vpd_data, M_SFXGE); 976 fail: 977 return (rc); 978 } 979 980 static void 981 sfxge_vpd_fini(struct sfxge_softc *sc) 982 { 983 free(sc->vpd_data, M_SFXGE); 984 } 985 986 static void 987 sfxge_reset(void *arg, int npending) 988 { 989 struct sfxge_softc *sc; 990 int rc; 991 unsigned attempt; 992 993 (void)npending; 994 995 sc = (struct sfxge_softc *)arg; 996 997 SFXGE_ADAPTER_LOCK(sc); 998 999 if (sc->init_state != SFXGE_STARTED) 1000 goto done; 1001 1002 sfxge_stop(sc); 1003 efx_nic_reset(sc->enp); 1004 for (attempt = 0; attempt < sfxge_restart_attempts; ++attempt) { 1005 if ((rc = sfxge_start(sc)) == 0) 1006 goto done; 1007 1008 device_printf(sc->dev, "start on reset failed (%d)\n", rc); 1009 DELAY(100000); 1010 } 1011 1012 device_printf(sc->dev, "reset failed; interface is now stopped\n"); 1013 1014 done: 1015 SFXGE_ADAPTER_UNLOCK(sc); 1016 } 1017 1018 void 1019 sfxge_schedule_reset(struct sfxge_softc *sc) 1020 { 1021 taskqueue_enqueue(taskqueue_thread, &sc->task_reset); 1022 } 1023 1024 static int 1025 sfxge_attach(device_t dev) 1026 { 1027 struct sfxge_softc *sc; 1028 struct ifnet *ifp; 1029 int error; 1030 1031 sc = device_get_softc(dev); 1032 sc->dev = dev; 1033 1034 /* Allocate ifnet. */ 1035 ifp = if_alloc(IFT_ETHER); 1036 if (ifp == NULL) { 1037 device_printf(dev, "Couldn't allocate ifnet\n"); 1038 error = ENOMEM; 1039 goto fail; 1040 } 1041 sc->ifnet = ifp; 1042 1043 /* Initialize hardware. */ 1044 DBGPRINT(sc->dev, "create nic"); 1045 if ((error = sfxge_create(sc)) != 0) 1046 goto fail2; 1047 1048 /* Create the ifnet for the port. */ 1049 DBGPRINT(sc->dev, "init ifnet"); 1050 if ((error = sfxge_ifnet_init(ifp, sc)) != 0) 1051 goto fail3; 1052 1053 DBGPRINT(sc->dev, "init vpd"); 1054 if ((error = sfxge_vpd_init(sc)) != 0) 1055 goto fail4; 1056 1057 /* 1058 * NIC is initialized inside sfxge_create() and kept inialized 1059 * to be able to initialize port to discover media types in 1060 * sfxge_ifnet_init(). 1061 */ 1062 efx_nic_fini(sc->enp); 1063 1064 sc->init_state = SFXGE_REGISTERED; 1065 1066 DBGPRINT(sc->dev, "success"); 1067 return (0); 1068 1069 fail4: 1070 sfxge_ifnet_fini(ifp); 1071 fail3: 1072 efx_nic_fini(sc->enp); 1073 sfxge_destroy(sc); 1074 1075 fail2: 1076 if_free(sc->ifnet); 1077 1078 fail: 1079 DBGPRINT(sc->dev, "failed %d", error); 1080 return (error); 1081 } 1082 1083 static int 1084 sfxge_detach(device_t dev) 1085 { 1086 struct sfxge_softc *sc; 1087 1088 sc = device_get_softc(dev); 1089 1090 sfxge_vpd_fini(sc); 1091 1092 /* Destroy the ifnet. */ 1093 sfxge_ifnet_fini(sc->ifnet); 1094 1095 /* Tear down hardware. */ 1096 sfxge_destroy(sc); 1097 1098 return (0); 1099 } 1100 1101 static int 1102 sfxge_probe(device_t dev) 1103 { 1104 uint16_t pci_vendor_id; 1105 uint16_t pci_device_id; 1106 efx_family_t family; 1107 int rc; 1108 1109 pci_vendor_id = pci_get_vendor(dev); 1110 pci_device_id = pci_get_device(dev); 1111 1112 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); 1113 rc = efx_family(pci_vendor_id, pci_device_id, &family); 1114 if (rc != 0) { 1115 DBGPRINT(dev, "efx_family fail %d", rc); 1116 return (ENXIO); 1117 } 1118 1119 if (family == EFX_FAMILY_SIENA) { 1120 device_set_desc(dev, "Solarflare SFC9000 family"); 1121 return (0); 1122 } 1123 1124 if (family == EFX_FAMILY_HUNTINGTON) { 1125 device_set_desc(dev, "Solarflare SFC9100 family"); 1126 return (0); 1127 } 1128 1129 DBGPRINT(dev, "impossible controller family %d", family); 1130 return (ENXIO); 1131 } 1132 1133 static device_method_t sfxge_methods[] = { 1134 DEVMETHOD(device_probe, sfxge_probe), 1135 DEVMETHOD(device_attach, sfxge_attach), 1136 DEVMETHOD(device_detach, sfxge_detach), 1137 1138 DEVMETHOD_END 1139 }; 1140 1141 static devclass_t sfxge_devclass; 1142 1143 static driver_t sfxge_driver = { 1144 "sfxge", 1145 sfxge_methods, 1146 sizeof(struct sfxge_softc) 1147 }; 1148 1149 DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0); 1150