1 /*- 2 * Copyright (c) 2009-2016 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include "efx.h" 35 #include "efx_impl.h" 36 37 #if EFSYS_OPT_SIENA 38 39 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 40 41 __checkReturn efx_rc_t 42 siena_nvram_partn_size( 43 __in efx_nic_t *enp, 44 __in uint32_t partn, 45 __out size_t *sizep) 46 { 47 efx_rc_t rc; 48 49 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 50 rc = ENOTSUP; 51 goto fail1; 52 } 53 54 if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, 55 NULL, NULL, NULL)) != 0) { 56 goto fail2; 57 } 58 59 return (0); 60 61 fail2: 62 EFSYS_PROBE(fail2); 63 fail1: 64 EFSYS_PROBE1(fail1, efx_rc_t, rc); 65 66 return (rc); 67 } 68 69 __checkReturn efx_rc_t 70 siena_nvram_partn_lock( 71 __in efx_nic_t *enp, 72 __in uint32_t partn) 73 { 74 efx_rc_t rc; 75 76 if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) { 77 goto fail1; 78 } 79 80 return (0); 81 82 fail1: 83 EFSYS_PROBE1(fail1, efx_rc_t, rc); 84 85 return (rc); 86 } 87 88 __checkReturn efx_rc_t 89 siena_nvram_partn_read( 90 __in efx_nic_t *enp, 91 __in uint32_t partn, 92 __in unsigned int offset, 93 __out_bcount(size) caddr_t data, 94 __in size_t size) 95 { 96 size_t chunk; 97 efx_rc_t rc; 98 99 while (size > 0) { 100 chunk = MIN(size, SIENA_NVRAM_CHUNK); 101 102 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk, 103 MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) { 104 goto fail1; 105 } 106 107 size -= chunk; 108 data += chunk; 109 offset += chunk; 110 } 111 112 return (0); 113 114 fail1: 115 EFSYS_PROBE1(fail1, efx_rc_t, rc); 116 117 return (rc); 118 } 119 120 __checkReturn efx_rc_t 121 siena_nvram_partn_erase( 122 __in efx_nic_t *enp, 123 __in uint32_t partn, 124 __in unsigned int offset, 125 __in size_t size) 126 { 127 efx_rc_t rc; 128 129 if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) { 130 goto fail1; 131 } 132 133 return (0); 134 135 fail1: 136 EFSYS_PROBE1(fail1, efx_rc_t, rc); 137 138 return (rc); 139 } 140 141 __checkReturn efx_rc_t 142 siena_nvram_partn_write( 143 __in efx_nic_t *enp, 144 __in uint32_t partn, 145 __in unsigned int offset, 146 __out_bcount(size) caddr_t data, 147 __in size_t size) 148 { 149 size_t chunk; 150 efx_rc_t rc; 151 152 while (size > 0) { 153 chunk = MIN(size, SIENA_NVRAM_CHUNK); 154 155 if ((rc = efx_mcdi_nvram_write(enp, partn, offset, 156 data, chunk)) != 0) { 157 goto fail1; 158 } 159 160 size -= chunk; 161 data += chunk; 162 offset += chunk; 163 } 164 165 return (0); 166 167 fail1: 168 EFSYS_PROBE1(fail1, efx_rc_t, rc); 169 170 return (rc); 171 } 172 173 __checkReturn efx_rc_t 174 siena_nvram_partn_unlock( 175 __in efx_nic_t *enp, 176 __in uint32_t partn) 177 { 178 boolean_t reboot; 179 efx_rc_t rc; 180 181 /* 182 * Reboot into the new image only for PHYs. The driver has to 183 * explicitly cope with an MC reboot after a firmware update. 184 */ 185 reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 || 186 partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 || 187 partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO); 188 189 rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, NULL); 190 if (rc != 0) 191 goto fail1; 192 193 return (0); 194 195 fail1: 196 EFSYS_PROBE1(fail1, efx_rc_t, rc); 197 198 return (rc); 199 } 200 201 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 202 203 #if EFSYS_OPT_NVRAM 204 205 typedef struct siena_parttbl_entry_s { 206 unsigned int partn; 207 unsigned int port; 208 efx_nvram_type_t nvtype; 209 } siena_parttbl_entry_t; 210 211 static siena_parttbl_entry_t siena_parttbl[] = { 212 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY}, 213 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY}, 214 {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE}, 215 {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE}, 216 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN}, 217 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN}, 218 {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM}, 219 {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM}, 220 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG}, 221 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG}, 222 {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY}, 223 {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY}, 224 {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA}, 225 {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA}, 226 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP}, 227 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP}, 228 {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW}, 229 {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW}, 230 {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD}, 231 {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD}, 232 {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE}, 233 {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE} 234 }; 235 236 __checkReturn efx_rc_t 237 siena_nvram_type_to_partn( 238 __in efx_nic_t *enp, 239 __in efx_nvram_type_t type, 240 __out uint32_t *partnp) 241 { 242 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 243 unsigned int i; 244 245 EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); 246 EFSYS_ASSERT(partnp != NULL); 247 248 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 249 siena_parttbl_entry_t *entry = &siena_parttbl[i]; 250 251 if (entry->port == emip->emi_port && entry->nvtype == type) { 252 *partnp = entry->partn; 253 return (0); 254 } 255 } 256 257 return (ENOTSUP); 258 } 259 260 261 #if EFSYS_OPT_DIAG 262 263 __checkReturn efx_rc_t 264 siena_nvram_test( 265 __in efx_nic_t *enp) 266 { 267 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 268 siena_parttbl_entry_t *entry; 269 unsigned int i; 270 efx_rc_t rc; 271 272 /* 273 * Iterate over the list of supported partition types 274 * applicable to *this* port 275 */ 276 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 277 entry = &siena_parttbl[i]; 278 279 if (entry->port != emip->emi_port || 280 !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn))) 281 continue; 282 283 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) { 284 goto fail1; 285 } 286 } 287 288 return (0); 289 290 fail1: 291 EFSYS_PROBE1(fail1, efx_rc_t, rc); 292 293 return (rc); 294 } 295 296 #endif /* EFSYS_OPT_DIAG */ 297 298 299 #define SIENA_DYNAMIC_CFG_SIZE(_nitems) \ 300 (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \ 301 sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0]))) 302 303 __checkReturn efx_rc_t 304 siena_nvram_get_dynamic_cfg( 305 __in efx_nic_t *enp, 306 __in uint32_t partn, 307 __in boolean_t vpd, 308 __out siena_mc_dynamic_config_hdr_t **dcfgp, 309 __out size_t *sizep) 310 { 311 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 312 size_t size; 313 uint8_t cksum; 314 unsigned int vpd_offset; 315 unsigned int vpd_length; 316 unsigned int hdr_length; 317 unsigned int nversions; 318 unsigned int pos; 319 unsigned int region; 320 efx_rc_t rc; 321 322 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 || 323 partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1); 324 325 /* 326 * Allocate sufficient memory for the entire dynamiccfg area, even 327 * if we're not actually going to read in the VPD. 328 */ 329 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0) 330 goto fail1; 331 332 EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg); 333 if (dcfg == NULL) { 334 rc = ENOMEM; 335 goto fail2; 336 } 337 338 if ((rc = siena_nvram_partn_read(enp, partn, 0, 339 (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0) 340 goto fail3; 341 342 /* Verify the magic */ 343 if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0) 344 != SIENA_MC_DYNAMIC_CONFIG_MAGIC) 345 goto invalid1; 346 347 /* All future versions of the structure must be backwards compatible */ 348 EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0); 349 350 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 351 nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 352 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 353 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 354 355 /* Verify the hdr doesn't overflow the partn size */ 356 if (hdr_length > size || vpd_offset > size || vpd_length > size || 357 vpd_length + vpd_offset > size) 358 goto invalid2; 359 360 /* Verify the header has room for all it's versions */ 361 if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) || 362 hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions)) 363 goto invalid3; 364 365 /* 366 * Read the remaining portion of the dcfg, either including 367 * the whole of VPD (there is no vpd length in this structure, 368 * so we have to parse each tag), or just the dcfg header itself 369 */ 370 region = vpd ? vpd_offset + vpd_length : hdr_length; 371 if (region > SIENA_NVRAM_CHUNK) { 372 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK, 373 (caddr_t)dcfg + SIENA_NVRAM_CHUNK, 374 region - SIENA_NVRAM_CHUNK)) != 0) 375 goto fail4; 376 } 377 378 /* Verify checksum */ 379 cksum = 0; 380 for (pos = 0; pos < hdr_length; pos++) 381 cksum += ((uint8_t *)dcfg)[pos]; 382 if (cksum != 0) 383 goto invalid4; 384 385 goto done; 386 387 invalid4: 388 EFSYS_PROBE(invalid4); 389 invalid3: 390 EFSYS_PROBE(invalid3); 391 invalid2: 392 EFSYS_PROBE(invalid2); 393 invalid1: 394 EFSYS_PROBE(invalid1); 395 396 /* 397 * Construct a new "null" dcfg, with an empty version vector, 398 * and an empty VPD chunk trailing. This has the neat side effect 399 * of testing the exception paths in the write path. 400 */ 401 EFX_POPULATE_DWORD_1(dcfg->magic, 402 EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC); 403 EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg)); 404 EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0, 405 SIENA_MC_DYNAMIC_CONFIG_VERSION); 406 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 407 EFX_DWORD_0, sizeof (*dcfg)); 408 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0); 409 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0); 410 411 done: 412 *dcfgp = dcfg; 413 *sizep = size; 414 415 return (0); 416 417 fail4: 418 EFSYS_PROBE(fail4); 419 fail3: 420 EFSYS_PROBE(fail3); 421 422 EFSYS_KMEM_FREE(enp->en_esip, size, dcfg); 423 424 fail2: 425 EFSYS_PROBE(fail2); 426 fail1: 427 EFSYS_PROBE1(fail1, efx_rc_t, rc); 428 429 return (rc); 430 } 431 432 __checkReturn efx_rc_t 433 siena_nvram_get_subtype( 434 __in efx_nic_t *enp, 435 __in uint32_t partn, 436 __out uint32_t *subtypep) 437 { 438 efx_mcdi_req_t req; 439 uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN, 440 MC_CMD_GET_BOARD_CFG_OUT_LENMAX)]; 441 efx_word_t *fw_list; 442 efx_rc_t rc; 443 444 (void) memset(payload, 0, sizeof (payload)); 445 req.emr_cmd = MC_CMD_GET_BOARD_CFG; 446 req.emr_in_buf = payload; 447 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; 448 req.emr_out_buf = payload; 449 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX; 450 451 efx_mcdi_execute(enp, &req); 452 453 if (req.emr_rc != 0) { 454 rc = req.emr_rc; 455 goto fail1; 456 } 457 458 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 459 rc = EMSGSIZE; 460 goto fail2; 461 } 462 463 if (req.emr_out_length_used < 464 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST + 465 (partn + 1) * sizeof (efx_word_t)) { 466 rc = ENOENT; 467 goto fail3; 468 } 469 470 fw_list = MCDI_OUT2(req, efx_word_t, 471 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 472 *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0); 473 474 return (0); 475 476 fail3: 477 EFSYS_PROBE(fail3); 478 fail2: 479 EFSYS_PROBE(fail2); 480 fail1: 481 EFSYS_PROBE1(fail1, efx_rc_t, rc); 482 483 return (rc); 484 } 485 486 __checkReturn efx_rc_t 487 siena_nvram_partn_get_version( 488 __in efx_nic_t *enp, 489 __in uint32_t partn, 490 __out uint32_t *subtypep, 491 __out_ecount(4) uint16_t version[4]) 492 { 493 siena_mc_dynamic_config_hdr_t *dcfg; 494 siena_parttbl_entry_t *entry; 495 uint32_t dcfg_partn; 496 unsigned int i; 497 efx_rc_t rc; 498 499 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 500 rc = ENOTSUP; 501 goto fail1; 502 } 503 504 if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0) 505 goto fail2; 506 507 /* 508 * Some partitions are accessible from both ports (for instance BOOTROM) 509 * Find the highest version reported by all dcfg structures on ports 510 * that have access to this partition. 511 */ 512 version[0] = version[1] = version[2] = version[3] = 0; 513 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 514 siena_mc_fw_version_t *verp; 515 unsigned int nitems; 516 uint16_t temp[4]; 517 size_t length; 518 519 entry = &siena_parttbl[i]; 520 if (entry->partn != partn) 521 continue; 522 523 dcfg_partn = (entry->port == 1) 524 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 525 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 526 /* 527 * Ingore missing partitions on port 2, assuming they're due 528 * to to running on a single port part. 529 */ 530 if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) { 531 if (entry->port == 2) 532 continue; 533 } 534 535 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 536 B_FALSE, &dcfg, &length)) != 0) 537 goto fail3; 538 539 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, 540 EFX_DWORD_0); 541 if (nitems < entry->partn) 542 goto done; 543 544 verp = &dcfg->fw_version[partn]; 545 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0); 546 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0); 547 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0); 548 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0); 549 if (memcmp(version, temp, sizeof (temp)) < 0) 550 memcpy(version, temp, sizeof (temp)); 551 552 done: 553 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 554 } 555 556 return (0); 557 558 fail3: 559 EFSYS_PROBE(fail3); 560 fail2: 561 EFSYS_PROBE(fail2); 562 fail1: 563 EFSYS_PROBE1(fail1, efx_rc_t, rc); 564 565 return (rc); 566 } 567 568 __checkReturn efx_rc_t 569 siena_nvram_partn_rw_start( 570 __in efx_nic_t *enp, 571 __in uint32_t partn, 572 __out size_t *chunk_sizep) 573 { 574 efx_rc_t rc; 575 576 if ((rc = siena_nvram_partn_lock(enp, partn)) != 0) 577 goto fail1; 578 579 if (chunk_sizep != NULL) 580 *chunk_sizep = SIENA_NVRAM_CHUNK; 581 582 return (0); 583 584 fail1: 585 EFSYS_PROBE1(fail1, efx_rc_t, rc); 586 587 return (rc); 588 } 589 590 __checkReturn efx_rc_t 591 siena_nvram_partn_rw_finish( 592 __in efx_nic_t *enp, 593 __in uint32_t partn) 594 { 595 efx_rc_t rc; 596 597 if ((rc = siena_nvram_partn_unlock(enp, partn)) != 0) 598 goto fail1; 599 600 return (0); 601 602 fail1: 603 EFSYS_PROBE1(fail1, efx_rc_t, rc); 604 605 return (rc); 606 } 607 608 __checkReturn efx_rc_t 609 siena_nvram_partn_set_version( 610 __in efx_nic_t *enp, 611 __in uint32_t partn, 612 __in_ecount(4) uint16_t version[4]) 613 { 614 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 615 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 616 siena_mc_fw_version_t *fwverp; 617 uint32_t dcfg_partn; 618 size_t dcfg_size; 619 unsigned int hdr_length; 620 unsigned int vpd_length; 621 unsigned int vpd_offset; 622 unsigned int nitems; 623 unsigned int required_hdr_length; 624 unsigned int pos; 625 uint8_t cksum; 626 uint32_t subtype; 627 size_t length; 628 efx_rc_t rc; 629 630 dcfg_partn = (emip->emi_port == 1) 631 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 632 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 633 634 if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0) 635 goto fail1; 636 637 if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0) 638 goto fail2; 639 640 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 641 B_TRUE, &dcfg, &length)) != 0) 642 goto fail3; 643 644 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 645 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 646 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 647 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 648 649 /* 650 * NOTE: This function will blatt any fields trailing the version 651 * vector, or the VPD chunk. 652 */ 653 required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1); 654 if (required_hdr_length + vpd_length > length) { 655 rc = ENOSPC; 656 goto fail4; 657 } 658 659 if (vpd_offset < required_hdr_length) { 660 (void) memmove((caddr_t)dcfg + required_hdr_length, 661 (caddr_t)dcfg + vpd_offset, vpd_length); 662 vpd_offset = required_hdr_length; 663 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 664 EFX_DWORD_0, vpd_offset); 665 } 666 667 if (hdr_length < required_hdr_length) { 668 (void) memset((caddr_t)dcfg + hdr_length, 0, 669 required_hdr_length - hdr_length); 670 hdr_length = required_hdr_length; 671 EFX_POPULATE_WORD_1(dcfg->length, 672 EFX_WORD_0, hdr_length); 673 } 674 675 /* Get the subtype to insert into the fw_subtype array */ 676 if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0) 677 goto fail5; 678 679 /* Fill out the new version */ 680 fwverp = &dcfg->fw_version[partn]; 681 EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype); 682 EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]); 683 EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]); 684 EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]); 685 EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]); 686 687 /* Update the version count */ 688 if (nitems < partn + 1) { 689 nitems = partn + 1; 690 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, 691 EFX_DWORD_0, nitems); 692 } 693 694 /* Update the checksum */ 695 cksum = 0; 696 for (pos = 0; pos < hdr_length; pos++) 697 cksum += ((uint8_t *)dcfg)[pos]; 698 dcfg->csum.eb_u8[0] -= cksum; 699 700 /* Erase and write the new partition */ 701 if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0) 702 goto fail6; 703 704 /* Write out the new structure to nvram */ 705 if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0, 706 (caddr_t)dcfg, vpd_offset + vpd_length)) != 0) 707 goto fail7; 708 709 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 710 711 siena_nvram_partn_unlock(enp, dcfg_partn); 712 713 return (0); 714 715 fail7: 716 EFSYS_PROBE(fail7); 717 fail6: 718 EFSYS_PROBE(fail6); 719 fail5: 720 EFSYS_PROBE(fail5); 721 fail4: 722 EFSYS_PROBE(fail4); 723 724 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 725 fail3: 726 EFSYS_PROBE(fail3); 727 fail2: 728 EFSYS_PROBE(fail2); 729 fail1: 730 EFSYS_PROBE1(fail1, efx_rc_t, rc); 731 732 return (rc); 733 } 734 735 #endif /* EFSYS_OPT_NVRAM */ 736 737 #endif /* EFSYS_OPT_SIENA */ 738