1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * The views and conclusions contained in the software and documentation are 29 * those of the authors and should not be interpreted as representing official 30 * policies, either expressed or implied, of the FreeBSD Project. 31 */ 32 33 #include <sys/cdefs.h> 34 #include "efx.h" 35 #include "efx_impl.h" 36 37 #if EFSYS_OPT_SIENA 38 39 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 40 41 __checkReturn efx_rc_t 42 siena_nvram_partn_size( 43 __in efx_nic_t *enp, 44 __in uint32_t partn, 45 __out size_t *sizep) 46 { 47 efx_rc_t rc; 48 49 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 50 rc = ENOTSUP; 51 goto fail1; 52 } 53 54 if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, 55 NULL, NULL, NULL)) != 0) { 56 goto fail2; 57 } 58 59 return (0); 60 61 fail2: 62 EFSYS_PROBE(fail2); 63 fail1: 64 EFSYS_PROBE1(fail1, efx_rc_t, rc); 65 66 return (rc); 67 } 68 69 __checkReturn efx_rc_t 70 siena_nvram_partn_lock( 71 __in efx_nic_t *enp, 72 __in uint32_t partn) 73 { 74 efx_rc_t rc; 75 76 if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) { 77 goto fail1; 78 } 79 80 return (0); 81 82 fail1: 83 EFSYS_PROBE1(fail1, efx_rc_t, rc); 84 85 return (rc); 86 } 87 88 __checkReturn efx_rc_t 89 siena_nvram_partn_read( 90 __in efx_nic_t *enp, 91 __in uint32_t partn, 92 __in unsigned int offset, 93 __out_bcount(size) caddr_t data, 94 __in size_t size) 95 { 96 size_t chunk; 97 efx_rc_t rc; 98 99 while (size > 0) { 100 chunk = MIN(size, SIENA_NVRAM_CHUNK); 101 102 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk, 103 MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) { 104 goto fail1; 105 } 106 107 size -= chunk; 108 data += chunk; 109 offset += chunk; 110 } 111 112 return (0); 113 114 fail1: 115 EFSYS_PROBE1(fail1, efx_rc_t, rc); 116 117 return (rc); 118 } 119 120 __checkReturn efx_rc_t 121 siena_nvram_partn_erase( 122 __in efx_nic_t *enp, 123 __in uint32_t partn, 124 __in unsigned int offset, 125 __in size_t size) 126 { 127 efx_rc_t rc; 128 129 if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) { 130 goto fail1; 131 } 132 133 return (0); 134 135 fail1: 136 EFSYS_PROBE1(fail1, efx_rc_t, rc); 137 138 return (rc); 139 } 140 141 __checkReturn efx_rc_t 142 siena_nvram_partn_write( 143 __in efx_nic_t *enp, 144 __in uint32_t partn, 145 __in unsigned int offset, 146 __out_bcount(size) caddr_t data, 147 __in size_t size) 148 { 149 size_t chunk; 150 efx_rc_t rc; 151 152 while (size > 0) { 153 chunk = MIN(size, SIENA_NVRAM_CHUNK); 154 155 if ((rc = efx_mcdi_nvram_write(enp, partn, offset, 156 data, chunk)) != 0) { 157 goto fail1; 158 } 159 160 size -= chunk; 161 data += chunk; 162 offset += chunk; 163 } 164 165 return (0); 166 167 fail1: 168 EFSYS_PROBE1(fail1, efx_rc_t, rc); 169 170 return (rc); 171 } 172 173 __checkReturn efx_rc_t 174 siena_nvram_partn_unlock( 175 __in efx_nic_t *enp, 176 __in uint32_t partn, 177 __out_opt uint32_t *verify_resultp) 178 { 179 boolean_t reboot; 180 efx_rc_t rc; 181 182 /* 183 * Reboot into the new image only for PHYs. The driver has to 184 * explicitly cope with an MC reboot after a firmware update. 185 */ 186 reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 || 187 partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 || 188 partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO); 189 190 rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp); 191 if (rc != 0) 192 goto fail1; 193 194 return (0); 195 196 fail1: 197 EFSYS_PROBE1(fail1, efx_rc_t, rc); 198 199 return (rc); 200 } 201 202 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 203 204 #if EFSYS_OPT_NVRAM 205 206 typedef struct siena_parttbl_entry_s { 207 unsigned int partn; 208 unsigned int port; 209 efx_nvram_type_t nvtype; 210 } siena_parttbl_entry_t; 211 212 static siena_parttbl_entry_t siena_parttbl[] = { 213 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY}, 214 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY}, 215 {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE}, 216 {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE}, 217 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN}, 218 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN}, 219 {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM}, 220 {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM}, 221 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG}, 222 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG}, 223 {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY}, 224 {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY}, 225 {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA}, 226 {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA}, 227 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP}, 228 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP}, 229 {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW}, 230 {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW}, 231 {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD}, 232 {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD}, 233 {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE}, 234 {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE} 235 }; 236 237 __checkReturn efx_rc_t 238 siena_nvram_type_to_partn( 239 __in efx_nic_t *enp, 240 __in efx_nvram_type_t type, 241 __out uint32_t *partnp) 242 { 243 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 244 unsigned int i; 245 246 EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID); 247 EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); 248 EFSYS_ASSERT(partnp != NULL); 249 250 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 251 siena_parttbl_entry_t *entry = &siena_parttbl[i]; 252 253 if (entry->port == emip->emi_port && entry->nvtype == type) { 254 *partnp = entry->partn; 255 return (0); 256 } 257 } 258 259 return (ENOTSUP); 260 } 261 262 #if EFSYS_OPT_DIAG 263 264 __checkReturn efx_rc_t 265 siena_nvram_test( 266 __in efx_nic_t *enp) 267 { 268 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 269 siena_parttbl_entry_t *entry; 270 unsigned int i; 271 efx_rc_t rc; 272 273 /* 274 * Iterate over the list of supported partition types 275 * applicable to *this* port 276 */ 277 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 278 entry = &siena_parttbl[i]; 279 280 if (entry->port != emip->emi_port || 281 !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn))) 282 continue; 283 284 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) { 285 goto fail1; 286 } 287 } 288 289 return (0); 290 291 fail1: 292 EFSYS_PROBE1(fail1, efx_rc_t, rc); 293 294 return (rc); 295 } 296 297 #endif /* EFSYS_OPT_DIAG */ 298 299 #define SIENA_DYNAMIC_CFG_SIZE(_nitems) \ 300 (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \ 301 sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0]))) 302 303 __checkReturn efx_rc_t 304 siena_nvram_get_dynamic_cfg( 305 __in efx_nic_t *enp, 306 __in uint32_t partn, 307 __in boolean_t vpd, 308 __out siena_mc_dynamic_config_hdr_t **dcfgp, 309 __out size_t *sizep) 310 { 311 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 312 size_t size; 313 uint8_t cksum; 314 unsigned int vpd_offset; 315 unsigned int vpd_length; 316 unsigned int hdr_length; 317 unsigned int nversions; 318 unsigned int pos; 319 unsigned int region; 320 efx_rc_t rc; 321 322 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 || 323 partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1); 324 325 /* 326 * Allocate sufficient memory for the entire dynamiccfg area, even 327 * if we're not actually going to read in the VPD. 328 */ 329 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0) 330 goto fail1; 331 332 if (size < SIENA_NVRAM_CHUNK) { 333 rc = EINVAL; 334 goto fail2; 335 } 336 337 EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg); 338 if (dcfg == NULL) { 339 rc = ENOMEM; 340 goto fail3; 341 } 342 343 if ((rc = siena_nvram_partn_read(enp, partn, 0, 344 (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0) 345 goto fail4; 346 347 /* Verify the magic */ 348 if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0) 349 != SIENA_MC_DYNAMIC_CONFIG_MAGIC) 350 goto invalid1; 351 352 /* All future versions of the structure must be backwards compatible */ 353 EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0); 354 355 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 356 nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 357 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 358 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 359 360 /* Verify the hdr doesn't overflow the partn size */ 361 if (hdr_length > size || vpd_offset > size || vpd_length > size || 362 vpd_length + vpd_offset > size) 363 goto invalid2; 364 365 /* Verify the header has room for all it's versions */ 366 if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) || 367 hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions)) 368 goto invalid3; 369 370 /* 371 * Read the remaining portion of the dcfg, either including 372 * the whole of VPD (there is no vpd length in this structure, 373 * so we have to parse each tag), or just the dcfg header itself 374 */ 375 region = vpd ? vpd_offset + vpd_length : hdr_length; 376 if (region > SIENA_NVRAM_CHUNK) { 377 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK, 378 (caddr_t)dcfg + SIENA_NVRAM_CHUNK, 379 region - SIENA_NVRAM_CHUNK)) != 0) 380 goto fail5; 381 } 382 383 /* Verify checksum */ 384 cksum = 0; 385 for (pos = 0; pos < hdr_length; pos++) 386 cksum += ((uint8_t *)dcfg)[pos]; 387 if (cksum != 0) 388 goto invalid4; 389 390 goto done; 391 392 invalid4: 393 EFSYS_PROBE(invalid4); 394 invalid3: 395 EFSYS_PROBE(invalid3); 396 invalid2: 397 EFSYS_PROBE(invalid2); 398 invalid1: 399 EFSYS_PROBE(invalid1); 400 401 /* 402 * Construct a new "null" dcfg, with an empty version vector, 403 * and an empty VPD chunk trailing. This has the neat side effect 404 * of testing the exception paths in the write path. 405 */ 406 EFX_POPULATE_DWORD_1(dcfg->magic, 407 EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC); 408 EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg)); 409 EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0, 410 SIENA_MC_DYNAMIC_CONFIG_VERSION); 411 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 412 EFX_DWORD_0, sizeof (*dcfg)); 413 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0); 414 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0); 415 416 done: 417 *dcfgp = dcfg; 418 *sizep = size; 419 420 return (0); 421 422 fail5: 423 EFSYS_PROBE(fail5); 424 fail4: 425 EFSYS_PROBE(fail4); 426 427 EFSYS_KMEM_FREE(enp->en_esip, size, dcfg); 428 429 fail3: 430 EFSYS_PROBE(fail3); 431 fail2: 432 EFSYS_PROBE(fail2); 433 fail1: 434 EFSYS_PROBE1(fail1, efx_rc_t, rc); 435 436 return (rc); 437 } 438 439 __checkReturn efx_rc_t 440 siena_nvram_get_subtype( 441 __in efx_nic_t *enp, 442 __in uint32_t partn, 443 __out uint32_t *subtypep) 444 { 445 efx_mcdi_req_t req; 446 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN, 447 MC_CMD_GET_BOARD_CFG_OUT_LENMAX); 448 efx_word_t *fw_list; 449 efx_rc_t rc; 450 451 req.emr_cmd = MC_CMD_GET_BOARD_CFG; 452 req.emr_in_buf = payload; 453 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; 454 req.emr_out_buf = payload; 455 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX; 456 457 efx_mcdi_execute(enp, &req); 458 459 if (req.emr_rc != 0) { 460 rc = req.emr_rc; 461 goto fail1; 462 } 463 464 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 465 rc = EMSGSIZE; 466 goto fail2; 467 } 468 469 if (req.emr_out_length_used < 470 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST + 471 (partn + 1) * sizeof (efx_word_t)) { 472 rc = ENOENT; 473 goto fail3; 474 } 475 476 fw_list = MCDI_OUT2(req, efx_word_t, 477 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 478 *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0); 479 480 return (0); 481 482 fail3: 483 EFSYS_PROBE(fail3); 484 fail2: 485 EFSYS_PROBE(fail2); 486 fail1: 487 EFSYS_PROBE1(fail1, efx_rc_t, rc); 488 489 return (rc); 490 } 491 492 __checkReturn efx_rc_t 493 siena_nvram_partn_get_version( 494 __in efx_nic_t *enp, 495 __in uint32_t partn, 496 __out uint32_t *subtypep, 497 __out_ecount(4) uint16_t version[4]) 498 { 499 siena_mc_dynamic_config_hdr_t *dcfg; 500 siena_parttbl_entry_t *entry; 501 uint32_t dcfg_partn; 502 unsigned int i; 503 efx_rc_t rc; 504 505 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { 506 rc = ENOTSUP; 507 goto fail1; 508 } 509 510 if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0) 511 goto fail2; 512 513 /* 514 * Some partitions are accessible from both ports (for instance BOOTROM) 515 * Find the highest version reported by all dcfg structures on ports 516 * that have access to this partition. 517 */ 518 version[0] = version[1] = version[2] = version[3] = 0; 519 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { 520 siena_mc_fw_version_t *verp; 521 unsigned int nitems; 522 uint16_t temp[4]; 523 size_t length; 524 525 entry = &siena_parttbl[i]; 526 if (entry->partn != partn) 527 continue; 528 529 dcfg_partn = (entry->port == 1) 530 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 531 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 532 /* 533 * Ingore missing partitions on port 2, assuming they're due 534 * to running on a single port part. 535 */ 536 if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) { 537 if (entry->port == 2) 538 continue; 539 } 540 541 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 542 B_FALSE, &dcfg, &length)) != 0) 543 goto fail3; 544 545 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, 546 EFX_DWORD_0); 547 if (nitems < entry->partn) 548 goto done; 549 550 verp = &dcfg->fw_version[partn]; 551 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0); 552 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0); 553 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0); 554 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0); 555 if (memcmp(version, temp, sizeof (temp)) < 0) 556 memcpy(version, temp, sizeof (temp)); 557 558 done: 559 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 560 } 561 562 return (0); 563 564 fail3: 565 EFSYS_PROBE(fail3); 566 fail2: 567 EFSYS_PROBE(fail2); 568 fail1: 569 EFSYS_PROBE1(fail1, efx_rc_t, rc); 570 571 return (rc); 572 } 573 574 __checkReturn efx_rc_t 575 siena_nvram_partn_rw_start( 576 __in efx_nic_t *enp, 577 __in uint32_t partn, 578 __out size_t *chunk_sizep) 579 { 580 efx_rc_t rc; 581 582 if ((rc = siena_nvram_partn_lock(enp, partn)) != 0) 583 goto fail1; 584 585 if (chunk_sizep != NULL) 586 *chunk_sizep = SIENA_NVRAM_CHUNK; 587 588 return (0); 589 590 fail1: 591 EFSYS_PROBE1(fail1, efx_rc_t, rc); 592 593 return (rc); 594 } 595 596 __checkReturn efx_rc_t 597 siena_nvram_partn_rw_finish( 598 __in efx_nic_t *enp, 599 __in uint32_t partn, 600 __out_opt uint32_t *verify_resultp) 601 { 602 efx_rc_t rc; 603 604 if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0) 605 goto fail1; 606 607 return (0); 608 609 fail1: 610 EFSYS_PROBE1(fail1, efx_rc_t, rc); 611 612 return (rc); 613 } 614 615 __checkReturn efx_rc_t 616 siena_nvram_partn_set_version( 617 __in efx_nic_t *enp, 618 __in uint32_t partn, 619 __in_ecount(4) uint16_t version[4]) 620 { 621 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 622 siena_mc_dynamic_config_hdr_t *dcfg = NULL; 623 siena_mc_fw_version_t *fwverp; 624 uint32_t dcfg_partn; 625 size_t dcfg_size; 626 unsigned int hdr_length; 627 unsigned int vpd_length; 628 unsigned int vpd_offset; 629 unsigned int nitems; 630 unsigned int required_hdr_length; 631 unsigned int pos; 632 uint8_t cksum; 633 uint32_t subtype; 634 size_t length; 635 efx_rc_t rc; 636 637 dcfg_partn = (emip->emi_port == 1) 638 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 639 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1; 640 641 if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0) 642 goto fail1; 643 644 if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0) 645 goto fail2; 646 647 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, 648 B_TRUE, &dcfg, &length)) != 0) 649 goto fail3; 650 651 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); 652 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0); 653 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0); 654 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0); 655 656 /* 657 * NOTE: This function will blatt any fields trailing the version 658 * vector, or the VPD chunk. 659 */ 660 required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1); 661 if (required_hdr_length + vpd_length > length) { 662 rc = ENOSPC; 663 goto fail4; 664 } 665 666 if (vpd_offset < required_hdr_length) { 667 (void) memmove((caddr_t)dcfg + required_hdr_length, 668 (caddr_t)dcfg + vpd_offset, vpd_length); 669 vpd_offset = required_hdr_length; 670 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, 671 EFX_DWORD_0, vpd_offset); 672 } 673 674 if (hdr_length < required_hdr_length) { 675 (void) memset((caddr_t)dcfg + hdr_length, 0, 676 required_hdr_length - hdr_length); 677 hdr_length = required_hdr_length; 678 EFX_POPULATE_WORD_1(dcfg->length, 679 EFX_WORD_0, hdr_length); 680 } 681 682 /* Get the subtype to insert into the fw_subtype array */ 683 if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0) 684 goto fail5; 685 686 /* Fill out the new version */ 687 fwverp = &dcfg->fw_version[partn]; 688 EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype); 689 EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]); 690 EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]); 691 EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]); 692 EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]); 693 694 /* Update the version count */ 695 if (nitems < partn + 1) { 696 nitems = partn + 1; 697 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, 698 EFX_DWORD_0, nitems); 699 } 700 701 /* Update the checksum */ 702 cksum = 0; 703 for (pos = 0; pos < hdr_length; pos++) 704 cksum += ((uint8_t *)dcfg)[pos]; 705 dcfg->csum.eb_u8[0] -= cksum; 706 707 /* Erase and write the new partition */ 708 if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0) 709 goto fail6; 710 711 /* Write out the new structure to nvram */ 712 if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0, 713 (caddr_t)dcfg, vpd_offset + vpd_length)) != 0) 714 goto fail7; 715 716 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 717 718 siena_nvram_partn_unlock(enp, dcfg_partn, NULL); 719 720 return (0); 721 722 fail7: 723 EFSYS_PROBE(fail7); 724 fail6: 725 EFSYS_PROBE(fail6); 726 fail5: 727 EFSYS_PROBE(fail5); 728 fail4: 729 EFSYS_PROBE(fail4); 730 731 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg); 732 fail3: 733 EFSYS_PROBE(fail3); 734 fail2: 735 EFSYS_PROBE(fail2); 736 fail1: 737 EFSYS_PROBE1(fail1, efx_rc_t, rc); 738 739 return (rc); 740 } 741 742 #endif /* EFSYS_OPT_NVRAM */ 743 744 #endif /* EFSYS_OPT_SIENA */ 745