xref: /freebsd/sys/dev/sfxge/common/siena_mcdi.c (revision af6a5351a1fdb1130f18be6c782c4d48916eb971)
1 /*-
2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "efx.h"
35 #include "efx_impl.h"
36 
37 #if EFSYS_OPT_SIENA && EFSYS_OPT_MCDI
38 
39 #define	SIENA_MCDI_PDU(_emip)			\
40 	(((emip)->emi_port == 1)		\
41 	? MC_SMEM_P0_PDU_OFST >> 2		\
42 	: MC_SMEM_P1_PDU_OFST >> 2)
43 
44 #define	SIENA_MCDI_DOORBELL(_emip)		\
45 	(((emip)->emi_port == 1)		\
46 	? MC_SMEM_P0_DOORBELL_OFST >> 2		\
47 	: MC_SMEM_P1_DOORBELL_OFST >> 2)
48 
49 #define	SIENA_MCDI_STATUS(_emip)		\
50 	(((emip)->emi_port == 1)		\
51 	? MC_SMEM_P0_STATUS_OFST >> 2		\
52 	: MC_SMEM_P1_STATUS_OFST >> 2)
53 
54 
55 			void
56 siena_mcdi_send_request(
57 	__in			efx_nic_t *enp,
58 	__in_bcount(hdr_len)	void *hdrp,
59 	__in			size_t hdr_len,
60 	__in_bcount(sdu_len)	void *sdup,
61 	__in			size_t sdu_len)
62 {
63 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
64 	efx_dword_t dword;
65 	unsigned int pdur;
66 	unsigned int dbr;
67 	unsigned int pos;
68 
69 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
70 
71 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
72 	pdur = SIENA_MCDI_PDU(emip);
73 	dbr = SIENA_MCDI_DOORBELL(emip);
74 
75 	/* Write the header */
76 	EFSYS_ASSERT3U(hdr_len, ==, sizeof (efx_dword_t));
77 	dword = *(efx_dword_t *)hdrp;
78 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_TRUE);
79 
80 	/* Write the payload */
81 	for (pos = 0; pos < sdu_len; pos += sizeof (efx_dword_t)) {
82 		dword = *(efx_dword_t *)((uint8_t *)sdup + pos);
83 		EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM,
84 		    pdur + 1 + (pos >> 2), &dword, B_FALSE);
85 	}
86 
87 	/* Ring the doorbell */
88 	EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 0xd004be11);
89 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, dbr, &dword, B_FALSE);
90 }
91 
92 			efx_rc_t
93 siena_mcdi_poll_reboot(
94 	__in		efx_nic_t *enp)
95 {
96 #ifndef EFX_GRACEFUL_MC_REBOOT
97  	/*
98 	 * This function is not being used properly.
99 	 * Until its callers are fixed, it should always return 0.
100 	 */
101 	_NOTE(ARGUNUSED(enp))
102 	return (0);
103 #else
104 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
105 	unsigned int rebootr;
106 	efx_dword_t dword;
107 	uint32_t value;
108 
109 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
110 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
111 	rebootr = SIENA_MCDI_STATUS(emip);
112 
113 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
114 	value = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
115 
116 	if (value == 0)
117 		return (0);
118 
119 	EFX_ZERO_DWORD(dword);
120 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
121 
122 	if (value == MC_STATUS_DWORD_ASSERT)
123 		return (EINTR);
124 	else
125 		return (EIO);
126 #endif
127 }
128 
129 extern	__checkReturn	boolean_t
130 siena_mcdi_poll_response(
131 	__in		efx_nic_t *enp)
132 {
133 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
134 	efx_dword_t hdr;
135 	unsigned int pdur;
136 
137 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
138 	pdur = SIENA_MCDI_PDU(emip);
139 
140 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, pdur, &hdr, B_FALSE);
141 	return (EFX_DWORD_FIELD(hdr, MCDI_HEADER_RESPONSE) ? B_TRUE : B_FALSE);
142 }
143 
144 			void
145 siena_mcdi_read_response(
146 	__in			efx_nic_t *enp,
147 	__out_bcount(length)	void *bufferp,
148 	__in			size_t offset,
149 	__in			size_t length)
150 {
151 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
152 	unsigned int pdur;
153 	unsigned int pos;
154 	efx_dword_t data;
155 
156 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
157 	pdur = SIENA_MCDI_PDU(emip);
158 
159 	for (pos = 0; pos < length; pos += sizeof (efx_dword_t)) {
160 		EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM,
161 		    pdur + ((offset + pos) >> 2), &data, B_FALSE);
162 		memcpy((uint8_t *)bufferp + pos, &data,
163 		    MIN(sizeof (data), length - pos));
164 	}
165 }
166 
167 	__checkReturn	efx_rc_t
168 siena_mcdi_init(
169 	__in		efx_nic_t *enp,
170 	__in		const efx_mcdi_transport_t *mtp)
171 {
172 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
173 	efx_oword_t oword;
174 	unsigned int portnum;
175 	efx_rc_t rc;
176 
177 	_NOTE(ARGUNUSED(mtp))
178 
179 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
180 
181 	/* Determine the port number to use for MCDI */
182 	EFX_BAR_READO(enp, FR_AZ_CS_DEBUG_REG, &oword);
183 	portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM);
184 
185 	if (portnum == 0) {
186 		/* Presumably booted from ROM; only MCDI port 1 will work */
187 		emip->emi_port = 1;
188 	} else if (portnum <= 2) {
189 		emip->emi_port = portnum;
190 	} else {
191 		rc = EINVAL;
192 		goto fail1;
193 	}
194 
195 	/* Siena BootROM and firmware only support MCDIv1 */
196 	emip->emi_max_version = 1;
197 
198 	/*
199 	 * Wipe the atomic reboot status so subsequent MCDI requests succeed.
200 	 * BOOT_STATUS is preserved so eno_nic_probe() can boot out of the
201 	 * assertion handler.
202 	 */
203 	(void) siena_mcdi_poll_reboot(enp);
204 
205 	return (0);
206 
207 fail1:
208 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
209 
210 	return (rc);
211 }
212 
213 			void
214 siena_mcdi_fini(
215 	__in		efx_nic_t *enp)
216 {
217 	_NOTE(ARGUNUSED(enp))
218 }
219 
220 	__checkReturn	efx_rc_t
221 siena_mcdi_feature_supported(
222 	__in		efx_nic_t *enp,
223 	__in		efx_mcdi_feature_id_t id,
224 	__out		boolean_t *supportedp)
225 {
226 	efx_rc_t rc;
227 
228 	EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
229 
230 	switch (id) {
231 	case EFX_MCDI_FEATURE_FW_UPDATE:
232 	case EFX_MCDI_FEATURE_LINK_CONTROL:
233 	case EFX_MCDI_FEATURE_MACADDR_CHANGE:
234 	case EFX_MCDI_FEATURE_MAC_SPOOFING:
235 		*supportedp = B_TRUE;
236 		break;
237 	default:
238 		rc = ENOTSUP;
239 		goto fail1;
240 	}
241 
242 	return (0);
243 
244 fail1:
245 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
246 
247 	return (rc);
248 }
249 
250 /* Default timeout for MCDI command processing. */
251 #define	SIENA_MCDI_CMD_TIMEOUT_US	(10 * 1000 * 1000)
252 
253 			void
254 siena_mcdi_get_timeout(
255 	__in		efx_nic_t *enp,
256 	__in		efx_mcdi_req_t *emrp,
257 	__out		uint32_t *timeoutp)
258 {
259 	_NOTE(ARGUNUSED(enp, emrp))
260 
261 	*timeoutp = SIENA_MCDI_CMD_TIMEOUT_US;
262 }
263 
264 
265 #endif	/* EFSYS_OPT_SIENA && EFSYS_OPT_MCDI */
266