xref: /freebsd/sys/dev/sfxge/common/siena_mcdi.c (revision 1d386b48a555f61cb7325543adbbb5c3f3407a66)
1 /*-
2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 #include "efx.h"
33 #include "efx_impl.h"
34 
35 #if EFSYS_OPT_SIENA && EFSYS_OPT_MCDI
36 
37 #define	SIENA_MCDI_PDU(_emip)			\
38 	(((emip)->emi_port == 1)		\
39 	? MC_SMEM_P0_PDU_OFST >> 2		\
40 	: MC_SMEM_P1_PDU_OFST >> 2)
41 
42 #define	SIENA_MCDI_DOORBELL(_emip)		\
43 	(((emip)->emi_port == 1)		\
44 	? MC_SMEM_P0_DOORBELL_OFST >> 2		\
45 	: MC_SMEM_P1_DOORBELL_OFST >> 2)
46 
47 #define	SIENA_MCDI_STATUS(_emip)		\
48 	(((emip)->emi_port == 1)		\
49 	? MC_SMEM_P0_STATUS_OFST >> 2		\
50 	: MC_SMEM_P1_STATUS_OFST >> 2)
51 
52 			void
53 siena_mcdi_send_request(
54 	__in			efx_nic_t *enp,
55 	__in_bcount(hdr_len)	void *hdrp,
56 	__in			size_t hdr_len,
57 	__in_bcount(sdu_len)	void *sdup,
58 	__in			size_t sdu_len)
59 {
60 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
61 	efx_dword_t dword;
62 	unsigned int pdur;
63 	unsigned int dbr;
64 	unsigned int pos;
65 
66 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
67 
68 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
69 	pdur = SIENA_MCDI_PDU(emip);
70 	dbr = SIENA_MCDI_DOORBELL(emip);
71 
72 	/* Write the header */
73 	EFSYS_ASSERT3U(hdr_len, ==, sizeof (efx_dword_t));
74 	dword = *(efx_dword_t *)hdrp;
75 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_TRUE);
76 
77 	/* Write the payload */
78 	for (pos = 0; pos < sdu_len; pos += sizeof (efx_dword_t)) {
79 		dword = *(efx_dword_t *)((uint8_t *)sdup + pos);
80 		EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM,
81 		    pdur + 1 + (pos >> 2), &dword, B_FALSE);
82 	}
83 
84 	/* Ring the doorbell */
85 	EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 0xd004be11);
86 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, dbr, &dword, B_FALSE);
87 }
88 
89 			efx_rc_t
90 siena_mcdi_poll_reboot(
91 	__in		efx_nic_t *enp)
92 {
93 #ifndef EFX_GRACEFUL_MC_REBOOT
94  	/*
95 	 * This function is not being used properly.
96 	 * Until its callers are fixed, it should always return 0.
97 	 */
98 	_NOTE(ARGUNUSED(enp))
99 	return (0);
100 #else
101 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
102 	unsigned int rebootr;
103 	efx_dword_t dword;
104 	uint32_t value;
105 
106 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
107 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
108 	rebootr = SIENA_MCDI_STATUS(emip);
109 
110 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
111 	value = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
112 
113 	if (value == 0)
114 		return (0);
115 
116 	EFX_ZERO_DWORD(dword);
117 	EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE);
118 
119 	if (value == MC_STATUS_DWORD_ASSERT)
120 		return (EINTR);
121 	else
122 		return (EIO);
123 #endif
124 }
125 
126 extern	__checkReturn	boolean_t
127 siena_mcdi_poll_response(
128 	__in		efx_nic_t *enp)
129 {
130 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
131 	efx_dword_t hdr;
132 	unsigned int pdur;
133 
134 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
135 	pdur = SIENA_MCDI_PDU(emip);
136 
137 	EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, pdur, &hdr, B_FALSE);
138 	return (EFX_DWORD_FIELD(hdr, MCDI_HEADER_RESPONSE) ? B_TRUE : B_FALSE);
139 }
140 
141 			void
142 siena_mcdi_read_response(
143 	__in			efx_nic_t *enp,
144 	__out_bcount(length)	void *bufferp,
145 	__in			size_t offset,
146 	__in			size_t length)
147 {
148 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
149 	unsigned int pdur;
150 	unsigned int pos = 0;
151 	efx_dword_t data;
152 	size_t remaining = length;
153 
154 	EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2);
155 	pdur = SIENA_MCDI_PDU(emip);
156 
157 	while (remaining > 0) {
158 		size_t chunk = MIN(remaining, sizeof (data));
159 
160 		EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM,
161 		    pdur + ((offset + pos) >> 2), &data, B_FALSE);
162 		memcpy((uint8_t *)bufferp + pos, &data, chunk);
163 		pos += chunk;
164 		remaining -= chunk;
165 	}
166 }
167 
168 	__checkReturn	efx_rc_t
169 siena_mcdi_init(
170 	__in		efx_nic_t *enp,
171 	__in		const efx_mcdi_transport_t *mtp)
172 {
173 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
174 	efx_oword_t oword;
175 	unsigned int portnum;
176 	efx_rc_t rc;
177 
178 	_NOTE(ARGUNUSED(mtp))
179 
180 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA);
181 
182 	/* Determine the port number to use for MCDI */
183 	EFX_BAR_READO(enp, FR_AZ_CS_DEBUG_REG, &oword);
184 	portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM);
185 
186 	if (portnum == 0) {
187 		/* Presumably booted from ROM; only MCDI port 1 will work */
188 		emip->emi_port = 1;
189 	} else if (portnum <= 2) {
190 		emip->emi_port = portnum;
191 	} else {
192 		rc = EINVAL;
193 		goto fail1;
194 	}
195 
196 	/* Siena BootROM and firmware only support MCDIv1 */
197 	emip->emi_max_version = 1;
198 
199 	/*
200 	 * Wipe the atomic reboot status so subsequent MCDI requests succeed.
201 	 * BOOT_STATUS is preserved so eno_nic_probe() can boot out of the
202 	 * assertion handler.
203 	 */
204 	(void) siena_mcdi_poll_reboot(enp);
205 
206 	return (0);
207 
208 fail1:
209 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
210 
211 	return (rc);
212 }
213 
214 			void
215 siena_mcdi_fini(
216 	__in		efx_nic_t *enp)
217 {
218 	_NOTE(ARGUNUSED(enp))
219 }
220 
221 	__checkReturn	efx_rc_t
222 siena_mcdi_feature_supported(
223 	__in		efx_nic_t *enp,
224 	__in		efx_mcdi_feature_id_t id,
225 	__out		boolean_t *supportedp)
226 {
227 	efx_rc_t rc;
228 
229 	EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
230 
231 	switch (id) {
232 	case EFX_MCDI_FEATURE_FW_UPDATE:
233 	case EFX_MCDI_FEATURE_LINK_CONTROL:
234 	case EFX_MCDI_FEATURE_MACADDR_CHANGE:
235 	case EFX_MCDI_FEATURE_MAC_SPOOFING:
236 		*supportedp = B_TRUE;
237 		break;
238 	default:
239 		rc = ENOTSUP;
240 		goto fail1;
241 	}
242 
243 	return (0);
244 
245 fail1:
246 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
247 
248 	return (rc);
249 }
250 
251 /* Default timeout for MCDI command processing. */
252 #define	SIENA_MCDI_CMD_TIMEOUT_US	(10 * 1000 * 1000)
253 
254 			void
255 siena_mcdi_get_timeout(
256 	__in		efx_nic_t *enp,
257 	__in		efx_mcdi_req_t *emrp,
258 	__out		uint32_t *timeoutp)
259 {
260 	_NOTE(ARGUNUSED(enp, emrp))
261 
262 	*timeoutp = SIENA_MCDI_CMD_TIMEOUT_US;
263 }
264 
265 #endif	/* EFSYS_OPT_SIENA && EFSYS_OPT_MCDI */
266