1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * The views and conclusions contained in the software and documentation are 29 * those of the authors and should not be interpreted as representing official 30 * policies, either expressed or implied, of the FreeBSD Project. 31 * 32 * $FreeBSD$ 33 */ 34 35 #ifndef _SYS_SIENA_IMPL_H 36 #define _SYS_SIENA_IMPL_H 37 38 #include "efx.h" 39 #include "efx_regs.h" 40 #include "efx_mcdi.h" 41 #include "siena_flash.h" 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 #ifndef EFX_TXQ_DC_SIZE 48 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ 49 #endif 50 #ifndef EFX_RXQ_DC_SIZE 51 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ 52 #endif 53 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize)) 54 55 #define SIENA_NVRAM_CHUNK 0x80 56 57 58 extern __checkReturn efx_rc_t 59 siena_nic_probe( 60 __in efx_nic_t *enp); 61 62 extern __checkReturn efx_rc_t 63 siena_nic_reset( 64 __in efx_nic_t *enp); 65 66 extern __checkReturn efx_rc_t 67 siena_nic_init( 68 __in efx_nic_t *enp); 69 70 #if EFSYS_OPT_DIAG 71 72 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 73 74 typedef struct siena_register_set_s { 75 unsigned int address; 76 unsigned int step; 77 unsigned int rows; 78 efx_oword_t mask; 79 } siena_register_set_t; 80 81 extern __checkReturn efx_rc_t 82 siena_nic_register_test( 83 __in efx_nic_t *enp); 84 85 #endif /* EFSYS_OPT_DIAG */ 86 87 extern void 88 siena_nic_fini( 89 __in efx_nic_t *enp); 90 91 extern void 92 siena_nic_unprobe( 93 __in efx_nic_t *enp); 94 95 #define SIENA_SRAM_ROWS 0x12000 96 97 extern void 98 siena_sram_init( 99 __in efx_nic_t *enp); 100 101 #if EFSYS_OPT_DIAG 102 103 extern __checkReturn efx_rc_t 104 siena_sram_test( 105 __in efx_nic_t *enp, 106 __in efx_sram_pattern_fn_t func); 107 108 #endif /* EFSYS_OPT_DIAG */ 109 110 #if EFSYS_OPT_MCDI 111 112 extern __checkReturn efx_rc_t 113 siena_mcdi_init( 114 __in efx_nic_t *enp, 115 __in const efx_mcdi_transport_t *mtp); 116 117 extern void 118 siena_mcdi_send_request( 119 __in efx_nic_t *enp, 120 __in_bcount(hdr_len) void *hdrp, 121 __in size_t hdr_len, 122 __in_bcount(sdu_len) void *sdup, 123 __in size_t sdu_len); 124 125 extern __checkReturn boolean_t 126 siena_mcdi_poll_response( 127 __in efx_nic_t *enp); 128 129 extern void 130 siena_mcdi_read_response( 131 __in efx_nic_t *enp, 132 __out_bcount(length) void *bufferp, 133 __in size_t offset, 134 __in size_t length); 135 136 extern efx_rc_t 137 siena_mcdi_poll_reboot( 138 __in efx_nic_t *enp); 139 140 extern void 141 siena_mcdi_fini( 142 __in efx_nic_t *enp); 143 144 extern __checkReturn efx_rc_t 145 siena_mcdi_feature_supported( 146 __in efx_nic_t *enp, 147 __in efx_mcdi_feature_id_t id, 148 __out boolean_t *supportedp); 149 150 extern void 151 siena_mcdi_get_timeout( 152 __in efx_nic_t *enp, 153 __in efx_mcdi_req_t *emrp, 154 __out uint32_t *timeoutp); 155 156 #endif /* EFSYS_OPT_MCDI */ 157 158 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 159 160 extern __checkReturn efx_rc_t 161 siena_nvram_partn_lock( 162 __in efx_nic_t *enp, 163 __in uint32_t partn); 164 165 extern __checkReturn efx_rc_t 166 siena_nvram_partn_unlock( 167 __in efx_nic_t *enp, 168 __in uint32_t partn, 169 __out_opt uint32_t *verify_resultp); 170 171 extern __checkReturn efx_rc_t 172 siena_nvram_get_dynamic_cfg( 173 __in efx_nic_t *enp, 174 __in uint32_t partn, 175 __in boolean_t vpd, 176 __out siena_mc_dynamic_config_hdr_t **dcfgp, 177 __out size_t *sizep); 178 179 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 180 181 #if EFSYS_OPT_NVRAM 182 183 #if EFSYS_OPT_DIAG 184 185 extern __checkReturn efx_rc_t 186 siena_nvram_test( 187 __in efx_nic_t *enp); 188 189 #endif /* EFSYS_OPT_DIAG */ 190 191 extern __checkReturn efx_rc_t 192 siena_nvram_get_subtype( 193 __in efx_nic_t *enp, 194 __in uint32_t partn, 195 __out uint32_t *subtypep); 196 197 extern __checkReturn efx_rc_t 198 siena_nvram_type_to_partn( 199 __in efx_nic_t *enp, 200 __in efx_nvram_type_t type, 201 __out uint32_t *partnp); 202 203 extern __checkReturn efx_rc_t 204 siena_nvram_partn_size( 205 __in efx_nic_t *enp, 206 __in uint32_t partn, 207 __out size_t *sizep); 208 209 extern __checkReturn efx_rc_t 210 siena_nvram_partn_rw_start( 211 __in efx_nic_t *enp, 212 __in uint32_t partn, 213 __out size_t *chunk_sizep); 214 215 extern __checkReturn efx_rc_t 216 siena_nvram_partn_read( 217 __in efx_nic_t *enp, 218 __in uint32_t partn, 219 __in unsigned int offset, 220 __out_bcount(size) caddr_t data, 221 __in size_t size); 222 223 extern __checkReturn efx_rc_t 224 siena_nvram_partn_erase( 225 __in efx_nic_t *enp, 226 __in uint32_t partn, 227 __in unsigned int offset, 228 __in size_t size); 229 230 extern __checkReturn efx_rc_t 231 siena_nvram_partn_write( 232 __in efx_nic_t *enp, 233 __in uint32_t partn, 234 __in unsigned int offset, 235 __out_bcount(size) caddr_t data, 236 __in size_t size); 237 238 extern __checkReturn efx_rc_t 239 siena_nvram_partn_rw_finish( 240 __in efx_nic_t *enp, 241 __in uint32_t partn, 242 __out_opt uint32_t *verify_resultp); 243 244 extern __checkReturn efx_rc_t 245 siena_nvram_partn_get_version( 246 __in efx_nic_t *enp, 247 __in uint32_t partn, 248 __out uint32_t *subtypep, 249 __out_ecount(4) uint16_t version[4]); 250 251 extern __checkReturn efx_rc_t 252 siena_nvram_partn_set_version( 253 __in efx_nic_t *enp, 254 __in uint32_t partn, 255 __in_ecount(4) uint16_t version[4]); 256 257 #endif /* EFSYS_OPT_NVRAM */ 258 259 #if EFSYS_OPT_VPD 260 261 extern __checkReturn efx_rc_t 262 siena_vpd_init( 263 __in efx_nic_t *enp); 264 265 extern __checkReturn efx_rc_t 266 siena_vpd_size( 267 __in efx_nic_t *enp, 268 __out size_t *sizep); 269 270 extern __checkReturn efx_rc_t 271 siena_vpd_read( 272 __in efx_nic_t *enp, 273 __out_bcount(size) caddr_t data, 274 __in size_t size); 275 276 extern __checkReturn efx_rc_t 277 siena_vpd_verify( 278 __in efx_nic_t *enp, 279 __in_bcount(size) caddr_t data, 280 __in size_t size); 281 282 extern __checkReturn efx_rc_t 283 siena_vpd_reinit( 284 __in efx_nic_t *enp, 285 __in_bcount(size) caddr_t data, 286 __in size_t size); 287 288 extern __checkReturn efx_rc_t 289 siena_vpd_get( 290 __in efx_nic_t *enp, 291 __in_bcount(size) caddr_t data, 292 __in size_t size, 293 __inout efx_vpd_value_t *evvp); 294 295 extern __checkReturn efx_rc_t 296 siena_vpd_set( 297 __in efx_nic_t *enp, 298 __in_bcount(size) caddr_t data, 299 __in size_t size, 300 __in efx_vpd_value_t *evvp); 301 302 extern __checkReturn efx_rc_t 303 siena_vpd_next( 304 __in efx_nic_t *enp, 305 __in_bcount(size) caddr_t data, 306 __in size_t size, 307 __out efx_vpd_value_t *evvp, 308 __inout unsigned int *contp); 309 310 extern __checkReturn efx_rc_t 311 siena_vpd_write( 312 __in efx_nic_t *enp, 313 __in_bcount(size) caddr_t data, 314 __in size_t size); 315 316 extern void 317 siena_vpd_fini( 318 __in efx_nic_t *enp); 319 320 #endif /* EFSYS_OPT_VPD */ 321 322 typedef struct siena_link_state_s { 323 uint32_t sls_adv_cap_mask; 324 uint32_t sls_lp_cap_mask; 325 unsigned int sls_fcntl; 326 efx_link_mode_t sls_link_mode; 327 #if EFSYS_OPT_LOOPBACK 328 efx_loopback_type_t sls_loopback; 329 #endif 330 boolean_t sls_mac_up; 331 } siena_link_state_t; 332 333 extern void 334 siena_phy_link_ev( 335 __in efx_nic_t *enp, 336 __in efx_qword_t *eqp, 337 __out efx_link_mode_t *link_modep); 338 339 extern __checkReturn efx_rc_t 340 siena_phy_get_link( 341 __in efx_nic_t *enp, 342 __out siena_link_state_t *slsp); 343 344 extern __checkReturn efx_rc_t 345 siena_phy_power( 346 __in efx_nic_t *enp, 347 __in boolean_t on); 348 349 extern __checkReturn efx_rc_t 350 siena_phy_reconfigure( 351 __in efx_nic_t *enp); 352 353 extern __checkReturn efx_rc_t 354 siena_phy_verify( 355 __in efx_nic_t *enp); 356 357 extern __checkReturn efx_rc_t 358 siena_phy_oui_get( 359 __in efx_nic_t *enp, 360 __out uint32_t *ouip); 361 362 #if EFSYS_OPT_PHY_STATS 363 364 extern void 365 siena_phy_decode_stats( 366 __in efx_nic_t *enp, 367 __in uint32_t vmask, 368 __in_opt efsys_mem_t *esmp, 369 __out_opt uint64_t *smaskp, 370 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat); 371 372 extern __checkReturn efx_rc_t 373 siena_phy_stats_update( 374 __in efx_nic_t *enp, 375 __in efsys_mem_t *esmp, 376 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 377 378 #endif /* EFSYS_OPT_PHY_STATS */ 379 380 #if EFSYS_OPT_BIST 381 382 extern __checkReturn efx_rc_t 383 siena_phy_bist_start( 384 __in efx_nic_t *enp, 385 __in efx_bist_type_t type); 386 387 extern __checkReturn efx_rc_t 388 siena_phy_bist_poll( 389 __in efx_nic_t *enp, 390 __in efx_bist_type_t type, 391 __out efx_bist_result_t *resultp, 392 __out_opt __drv_when(count > 0, __notnull) 393 uint32_t *value_maskp, 394 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 395 unsigned long *valuesp, 396 __in size_t count); 397 398 extern void 399 siena_phy_bist_stop( 400 __in efx_nic_t *enp, 401 __in efx_bist_type_t type); 402 403 #endif /* EFSYS_OPT_BIST */ 404 405 extern __checkReturn efx_rc_t 406 siena_mac_poll( 407 __in efx_nic_t *enp, 408 __out efx_link_mode_t *link_modep); 409 410 extern __checkReturn efx_rc_t 411 siena_mac_up( 412 __in efx_nic_t *enp, 413 __out boolean_t *mac_upp); 414 415 extern __checkReturn efx_rc_t 416 siena_mac_reconfigure( 417 __in efx_nic_t *enp); 418 419 extern __checkReturn efx_rc_t 420 siena_mac_pdu_get( 421 __in efx_nic_t *enp, 422 __out size_t *pdu); 423 424 #if EFSYS_OPT_LOOPBACK 425 426 extern __checkReturn efx_rc_t 427 siena_mac_loopback_set( 428 __in efx_nic_t *enp, 429 __in efx_link_mode_t link_mode, 430 __in efx_loopback_type_t loopback_type); 431 432 #endif /* EFSYS_OPT_LOOPBACK */ 433 434 #if EFSYS_OPT_MAC_STATS 435 436 extern __checkReturn efx_rc_t 437 siena_mac_stats_get_mask( 438 __in efx_nic_t *enp, 439 __inout_bcount(mask_size) uint32_t *maskp, 440 __in size_t mask_size); 441 442 extern __checkReturn efx_rc_t 443 siena_mac_stats_update( 444 __in efx_nic_t *enp, 445 __in efsys_mem_t *esmp, 446 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 447 __inout_opt uint32_t *generationp); 448 449 #endif /* EFSYS_OPT_MAC_STATS */ 450 451 #ifdef __cplusplus 452 } 453 #endif 454 455 #endif /* _SYS_SIENA_IMPL_H */ 456