1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * The views and conclusions contained in the software and documentation are 29 * those of the authors and should not be interpreted as representing official 30 * policies, either expressed or implied, of the FreeBSD Project. 31 */ 32 33 #ifndef _SYS_SIENA_IMPL_H 34 #define _SYS_SIENA_IMPL_H 35 36 #include "efx.h" 37 #include "efx_regs.h" 38 #include "efx_mcdi.h" 39 #include "siena_flash.h" 40 41 #ifdef __cplusplus 42 extern "C" { 43 #endif 44 45 #ifndef EFX_TXQ_DC_SIZE 46 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ 47 #endif 48 #ifndef EFX_RXQ_DC_SIZE 49 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ 50 #endif 51 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize)) 52 53 #define SIENA_NVRAM_CHUNK 0x80 54 55 extern __checkReturn efx_rc_t 56 siena_nic_probe( 57 __in efx_nic_t *enp); 58 59 extern __checkReturn efx_rc_t 60 siena_nic_reset( 61 __in efx_nic_t *enp); 62 63 extern __checkReturn efx_rc_t 64 siena_nic_init( 65 __in efx_nic_t *enp); 66 67 #if EFSYS_OPT_DIAG 68 69 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 70 71 typedef struct siena_register_set_s { 72 unsigned int address; 73 unsigned int step; 74 unsigned int rows; 75 efx_oword_t mask; 76 } siena_register_set_t; 77 78 extern __checkReturn efx_rc_t 79 siena_nic_register_test( 80 __in efx_nic_t *enp); 81 82 #endif /* EFSYS_OPT_DIAG */ 83 84 extern void 85 siena_nic_fini( 86 __in efx_nic_t *enp); 87 88 extern void 89 siena_nic_unprobe( 90 __in efx_nic_t *enp); 91 92 #define SIENA_SRAM_ROWS 0x12000 93 94 extern void 95 siena_sram_init( 96 __in efx_nic_t *enp); 97 98 #if EFSYS_OPT_DIAG 99 100 extern __checkReturn efx_rc_t 101 siena_sram_test( 102 __in efx_nic_t *enp, 103 __in efx_sram_pattern_fn_t func); 104 105 #endif /* EFSYS_OPT_DIAG */ 106 107 #if EFSYS_OPT_MCDI 108 109 extern __checkReturn efx_rc_t 110 siena_mcdi_init( 111 __in efx_nic_t *enp, 112 __in const efx_mcdi_transport_t *mtp); 113 114 extern void 115 siena_mcdi_send_request( 116 __in efx_nic_t *enp, 117 __in_bcount(hdr_len) void *hdrp, 118 __in size_t hdr_len, 119 __in_bcount(sdu_len) void *sdup, 120 __in size_t sdu_len); 121 122 extern __checkReturn boolean_t 123 siena_mcdi_poll_response( 124 __in efx_nic_t *enp); 125 126 extern void 127 siena_mcdi_read_response( 128 __in efx_nic_t *enp, 129 __out_bcount(length) void *bufferp, 130 __in size_t offset, 131 __in size_t length); 132 133 extern efx_rc_t 134 siena_mcdi_poll_reboot( 135 __in efx_nic_t *enp); 136 137 extern void 138 siena_mcdi_fini( 139 __in efx_nic_t *enp); 140 141 extern __checkReturn efx_rc_t 142 siena_mcdi_feature_supported( 143 __in efx_nic_t *enp, 144 __in efx_mcdi_feature_id_t id, 145 __out boolean_t *supportedp); 146 147 extern void 148 siena_mcdi_get_timeout( 149 __in efx_nic_t *enp, 150 __in efx_mcdi_req_t *emrp, 151 __out uint32_t *timeoutp); 152 153 #endif /* EFSYS_OPT_MCDI */ 154 155 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 156 157 extern __checkReturn efx_rc_t 158 siena_nvram_partn_lock( 159 __in efx_nic_t *enp, 160 __in uint32_t partn); 161 162 extern __checkReturn efx_rc_t 163 siena_nvram_partn_unlock( 164 __in efx_nic_t *enp, 165 __in uint32_t partn, 166 __out_opt uint32_t *verify_resultp); 167 168 extern __checkReturn efx_rc_t 169 siena_nvram_get_dynamic_cfg( 170 __in efx_nic_t *enp, 171 __in uint32_t partn, 172 __in boolean_t vpd, 173 __out siena_mc_dynamic_config_hdr_t **dcfgp, 174 __out size_t *sizep); 175 176 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 177 178 #if EFSYS_OPT_NVRAM 179 180 #if EFSYS_OPT_DIAG 181 182 extern __checkReturn efx_rc_t 183 siena_nvram_test( 184 __in efx_nic_t *enp); 185 186 #endif /* EFSYS_OPT_DIAG */ 187 188 extern __checkReturn efx_rc_t 189 siena_nvram_get_subtype( 190 __in efx_nic_t *enp, 191 __in uint32_t partn, 192 __out uint32_t *subtypep); 193 194 extern __checkReturn efx_rc_t 195 siena_nvram_type_to_partn( 196 __in efx_nic_t *enp, 197 __in efx_nvram_type_t type, 198 __out uint32_t *partnp); 199 200 extern __checkReturn efx_rc_t 201 siena_nvram_partn_size( 202 __in efx_nic_t *enp, 203 __in uint32_t partn, 204 __out size_t *sizep); 205 206 extern __checkReturn efx_rc_t 207 siena_nvram_partn_rw_start( 208 __in efx_nic_t *enp, 209 __in uint32_t partn, 210 __out size_t *chunk_sizep); 211 212 extern __checkReturn efx_rc_t 213 siena_nvram_partn_read( 214 __in efx_nic_t *enp, 215 __in uint32_t partn, 216 __in unsigned int offset, 217 __out_bcount(size) caddr_t data, 218 __in size_t size); 219 220 extern __checkReturn efx_rc_t 221 siena_nvram_partn_erase( 222 __in efx_nic_t *enp, 223 __in uint32_t partn, 224 __in unsigned int offset, 225 __in size_t size); 226 227 extern __checkReturn efx_rc_t 228 siena_nvram_partn_write( 229 __in efx_nic_t *enp, 230 __in uint32_t partn, 231 __in unsigned int offset, 232 __out_bcount(size) caddr_t data, 233 __in size_t size); 234 235 extern __checkReturn efx_rc_t 236 siena_nvram_partn_rw_finish( 237 __in efx_nic_t *enp, 238 __in uint32_t partn, 239 __out_opt uint32_t *verify_resultp); 240 241 extern __checkReturn efx_rc_t 242 siena_nvram_partn_get_version( 243 __in efx_nic_t *enp, 244 __in uint32_t partn, 245 __out uint32_t *subtypep, 246 __out_ecount(4) uint16_t version[4]); 247 248 extern __checkReturn efx_rc_t 249 siena_nvram_partn_set_version( 250 __in efx_nic_t *enp, 251 __in uint32_t partn, 252 __in_ecount(4) uint16_t version[4]); 253 254 #endif /* EFSYS_OPT_NVRAM */ 255 256 #if EFSYS_OPT_VPD 257 258 extern __checkReturn efx_rc_t 259 siena_vpd_init( 260 __in efx_nic_t *enp); 261 262 extern __checkReturn efx_rc_t 263 siena_vpd_size( 264 __in efx_nic_t *enp, 265 __out size_t *sizep); 266 267 extern __checkReturn efx_rc_t 268 siena_vpd_read( 269 __in efx_nic_t *enp, 270 __out_bcount(size) caddr_t data, 271 __in size_t size); 272 273 extern __checkReturn efx_rc_t 274 siena_vpd_verify( 275 __in efx_nic_t *enp, 276 __in_bcount(size) caddr_t data, 277 __in size_t size); 278 279 extern __checkReturn efx_rc_t 280 siena_vpd_reinit( 281 __in efx_nic_t *enp, 282 __in_bcount(size) caddr_t data, 283 __in size_t size); 284 285 extern __checkReturn efx_rc_t 286 siena_vpd_get( 287 __in efx_nic_t *enp, 288 __in_bcount(size) caddr_t data, 289 __in size_t size, 290 __inout efx_vpd_value_t *evvp); 291 292 extern __checkReturn efx_rc_t 293 siena_vpd_set( 294 __in efx_nic_t *enp, 295 __in_bcount(size) caddr_t data, 296 __in size_t size, 297 __in efx_vpd_value_t *evvp); 298 299 extern __checkReturn efx_rc_t 300 siena_vpd_next( 301 __in efx_nic_t *enp, 302 __in_bcount(size) caddr_t data, 303 __in size_t size, 304 __out efx_vpd_value_t *evvp, 305 __inout unsigned int *contp); 306 307 extern __checkReturn efx_rc_t 308 siena_vpd_write( 309 __in efx_nic_t *enp, 310 __in_bcount(size) caddr_t data, 311 __in size_t size); 312 313 extern void 314 siena_vpd_fini( 315 __in efx_nic_t *enp); 316 317 #endif /* EFSYS_OPT_VPD */ 318 319 typedef struct siena_link_state_s { 320 uint32_t sls_adv_cap_mask; 321 uint32_t sls_lp_cap_mask; 322 unsigned int sls_fcntl; 323 efx_link_mode_t sls_link_mode; 324 #if EFSYS_OPT_LOOPBACK 325 efx_loopback_type_t sls_loopback; 326 #endif 327 boolean_t sls_mac_up; 328 } siena_link_state_t; 329 330 extern void 331 siena_phy_link_ev( 332 __in efx_nic_t *enp, 333 __in efx_qword_t *eqp, 334 __out efx_link_mode_t *link_modep); 335 336 extern __checkReturn efx_rc_t 337 siena_phy_get_link( 338 __in efx_nic_t *enp, 339 __out siena_link_state_t *slsp); 340 341 extern __checkReturn efx_rc_t 342 siena_phy_power( 343 __in efx_nic_t *enp, 344 __in boolean_t on); 345 346 extern __checkReturn efx_rc_t 347 siena_phy_reconfigure( 348 __in efx_nic_t *enp); 349 350 extern __checkReturn efx_rc_t 351 siena_phy_verify( 352 __in efx_nic_t *enp); 353 354 extern __checkReturn efx_rc_t 355 siena_phy_oui_get( 356 __in efx_nic_t *enp, 357 __out uint32_t *ouip); 358 359 #if EFSYS_OPT_PHY_STATS 360 361 extern void 362 siena_phy_decode_stats( 363 __in efx_nic_t *enp, 364 __in uint32_t vmask, 365 __in_opt efsys_mem_t *esmp, 366 __out_opt uint64_t *smaskp, 367 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat); 368 369 extern __checkReturn efx_rc_t 370 siena_phy_stats_update( 371 __in efx_nic_t *enp, 372 __in efsys_mem_t *esmp, 373 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 374 375 #endif /* EFSYS_OPT_PHY_STATS */ 376 377 #if EFSYS_OPT_BIST 378 379 extern __checkReturn efx_rc_t 380 siena_phy_bist_start( 381 __in efx_nic_t *enp, 382 __in efx_bist_type_t type); 383 384 extern __checkReturn efx_rc_t 385 siena_phy_bist_poll( 386 __in efx_nic_t *enp, 387 __in efx_bist_type_t type, 388 __out efx_bist_result_t *resultp, 389 __out_opt __drv_when(count > 0, __notnull) 390 uint32_t *value_maskp, 391 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 392 unsigned long *valuesp, 393 __in size_t count); 394 395 extern void 396 siena_phy_bist_stop( 397 __in efx_nic_t *enp, 398 __in efx_bist_type_t type); 399 400 #endif /* EFSYS_OPT_BIST */ 401 402 extern __checkReturn efx_rc_t 403 siena_mac_poll( 404 __in efx_nic_t *enp, 405 __out efx_link_mode_t *link_modep); 406 407 extern __checkReturn efx_rc_t 408 siena_mac_up( 409 __in efx_nic_t *enp, 410 __out boolean_t *mac_upp); 411 412 extern __checkReturn efx_rc_t 413 siena_mac_reconfigure( 414 __in efx_nic_t *enp); 415 416 extern __checkReturn efx_rc_t 417 siena_mac_pdu_get( 418 __in efx_nic_t *enp, 419 __out size_t *pdu); 420 421 #if EFSYS_OPT_LOOPBACK 422 423 extern __checkReturn efx_rc_t 424 siena_mac_loopback_set( 425 __in efx_nic_t *enp, 426 __in efx_link_mode_t link_mode, 427 __in efx_loopback_type_t loopback_type); 428 429 #endif /* EFSYS_OPT_LOOPBACK */ 430 431 #if EFSYS_OPT_MAC_STATS 432 433 extern __checkReturn efx_rc_t 434 siena_mac_stats_get_mask( 435 __in efx_nic_t *enp, 436 __inout_bcount(mask_size) uint32_t *maskp, 437 __in size_t mask_size); 438 439 extern __checkReturn efx_rc_t 440 siena_mac_stats_update( 441 __in efx_nic_t *enp, 442 __in efsys_mem_t *esmp, 443 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 444 __inout_opt uint32_t *generationp); 445 446 #endif /* EFSYS_OPT_MAC_STATS */ 447 448 #ifdef __cplusplus 449 } 450 #endif 451 452 #endif /* _SYS_SIENA_IMPL_H */ 453