1 /*- 2 * Copyright (c) 2012-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _SYS_HUNT_IMPL_H 34 #define _SYS_HUNT_IMPL_H 35 36 #include "efx.h" 37 #include "efx_regs.h" 38 #include "efx_regs_ef10.h" 39 #include "efx_mcdi.h" 40 41 #ifdef __cplusplus 42 extern "C" { 43 #endif 44 45 /* 46 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could 47 * possibly be increased, or the write size reported by newer firmware used 48 * instead. 49 */ 50 #define EF10_NVRAM_CHUNK 0x80 51 52 /* Alignment requirement for value written to RX WPTR: 53 * the WPTR must be aligned to an 8 descriptor boundary 54 */ 55 #define EF10_RX_WPTR_ALIGN 8 56 57 /* Invalid RSS context handle */ 58 #define EF10_RSS_CONTEXT_INVALID (0xffffffff) 59 60 61 /* EV */ 62 63 __checkReturn efx_rc_t 64 ef10_ev_init( 65 __in efx_nic_t *enp); 66 67 void 68 ef10_ev_fini( 69 __in efx_nic_t *enp); 70 71 __checkReturn efx_rc_t 72 ef10_ev_qcreate( 73 __in efx_nic_t *enp, 74 __in unsigned int index, 75 __in efsys_mem_t *esmp, 76 __in size_t n, 77 __in uint32_t id, 78 __in efx_evq_t *eep); 79 80 void 81 ef10_ev_qdestroy( 82 __in efx_evq_t *eep); 83 84 __checkReturn efx_rc_t 85 ef10_ev_qprime( 86 __in efx_evq_t *eep, 87 __in unsigned int count); 88 89 void 90 ef10_ev_qpost( 91 __in efx_evq_t *eep, 92 __in uint16_t data); 93 94 __checkReturn efx_rc_t 95 ef10_ev_qmoderate( 96 __in efx_evq_t *eep, 97 __in unsigned int us); 98 99 #if EFSYS_OPT_QSTATS 100 void 101 ef10_ev_qstats_update( 102 __in efx_evq_t *eep, 103 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat); 104 #endif /* EFSYS_OPT_QSTATS */ 105 106 void 107 ef10_ev_rxlabel_init( 108 __in efx_evq_t *eep, 109 __in efx_rxq_t *erp, 110 __in unsigned int label); 111 112 void 113 ef10_ev_rxlabel_fini( 114 __in efx_evq_t *eep, 115 __in unsigned int label); 116 117 /* INTR */ 118 119 __checkReturn efx_rc_t 120 ef10_intr_init( 121 __in efx_nic_t *enp, 122 __in efx_intr_type_t type, 123 __in efsys_mem_t *esmp); 124 125 void 126 ef10_intr_enable( 127 __in efx_nic_t *enp); 128 129 void 130 ef10_intr_disable( 131 __in efx_nic_t *enp); 132 133 void 134 ef10_intr_disable_unlocked( 135 __in efx_nic_t *enp); 136 137 __checkReturn efx_rc_t 138 ef10_intr_trigger( 139 __in efx_nic_t *enp, 140 __in unsigned int level); 141 142 void 143 ef10_intr_status_line( 144 __in efx_nic_t *enp, 145 __out boolean_t *fatalp, 146 __out uint32_t *qmaskp); 147 148 void 149 ef10_intr_status_message( 150 __in efx_nic_t *enp, 151 __in unsigned int message, 152 __out boolean_t *fatalp); 153 154 void 155 ef10_intr_fatal( 156 __in efx_nic_t *enp); 157 void 158 ef10_intr_fini( 159 __in efx_nic_t *enp); 160 161 /* NIC */ 162 163 extern __checkReturn efx_rc_t 164 ef10_nic_probe( 165 __in efx_nic_t *enp); 166 167 extern __checkReturn efx_rc_t 168 ef10_nic_set_drv_limits( 169 __inout efx_nic_t *enp, 170 __in efx_drv_limits_t *edlp); 171 172 extern __checkReturn efx_rc_t 173 ef10_nic_get_vi_pool( 174 __in efx_nic_t *enp, 175 __out uint32_t *vi_countp); 176 177 extern __checkReturn efx_rc_t 178 ef10_nic_get_bar_region( 179 __in efx_nic_t *enp, 180 __in efx_nic_region_t region, 181 __out uint32_t *offsetp, 182 __out size_t *sizep); 183 184 extern __checkReturn efx_rc_t 185 ef10_nic_reset( 186 __in efx_nic_t *enp); 187 188 extern __checkReturn efx_rc_t 189 ef10_nic_init( 190 __in efx_nic_t *enp); 191 192 #if EFSYS_OPT_DIAG 193 194 extern __checkReturn efx_rc_t 195 ef10_nic_register_test( 196 __in efx_nic_t *enp); 197 198 #endif /* EFSYS_OPT_DIAG */ 199 200 extern void 201 ef10_nic_fini( 202 __in efx_nic_t *enp); 203 204 extern void 205 ef10_nic_unprobe( 206 __in efx_nic_t *enp); 207 208 209 /* MAC */ 210 211 extern __checkReturn efx_rc_t 212 hunt_mac_poll( 213 __in efx_nic_t *enp, 214 __out efx_link_mode_t *link_modep); 215 216 extern __checkReturn efx_rc_t 217 hunt_mac_up( 218 __in efx_nic_t *enp, 219 __out boolean_t *mac_upp); 220 221 extern __checkReturn efx_rc_t 222 hunt_mac_addr_set( 223 __in efx_nic_t *enp); 224 225 extern __checkReturn efx_rc_t 226 hunt_mac_reconfigure( 227 __in efx_nic_t *enp); 228 229 extern __checkReturn efx_rc_t 230 hunt_mac_multicast_list_set( 231 __in efx_nic_t *enp); 232 233 extern __checkReturn efx_rc_t 234 hunt_mac_filter_default_rxq_set( 235 __in efx_nic_t *enp, 236 __in efx_rxq_t *erp, 237 __in boolean_t using_rss); 238 239 extern void 240 hunt_mac_filter_default_rxq_clear( 241 __in efx_nic_t *enp); 242 243 #if EFSYS_OPT_LOOPBACK 244 245 extern __checkReturn efx_rc_t 246 hunt_mac_loopback_set( 247 __in efx_nic_t *enp, 248 __in efx_link_mode_t link_mode, 249 __in efx_loopback_type_t loopback_type); 250 251 #endif /* EFSYS_OPT_LOOPBACK */ 252 253 #if EFSYS_OPT_MAC_STATS 254 255 extern __checkReturn efx_rc_t 256 hunt_mac_stats_update( 257 __in efx_nic_t *enp, 258 __in efsys_mem_t *esmp, 259 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 260 __inout_opt uint32_t *generationp); 261 262 #endif /* EFSYS_OPT_MAC_STATS */ 263 264 265 /* MCDI */ 266 267 #if EFSYS_OPT_MCDI 268 269 extern __checkReturn efx_rc_t 270 ef10_mcdi_init( 271 __in efx_nic_t *enp, 272 __in const efx_mcdi_transport_t *mtp); 273 274 extern void 275 ef10_mcdi_fini( 276 __in efx_nic_t *enp); 277 278 extern void 279 ef10_mcdi_request_copyin( 280 __in efx_nic_t *enp, 281 __in efx_mcdi_req_t *emrp, 282 __in unsigned int seq, 283 __in boolean_t ev_cpl, 284 __in boolean_t new_epoch); 285 286 extern __checkReturn boolean_t 287 ef10_mcdi_poll_response( 288 __in efx_nic_t *enp); 289 290 extern void 291 ef10_mcdi_read_response( 292 __in efx_nic_t *enp, 293 __out_bcount(length) void *bufferp, 294 __in size_t offset, 295 __in size_t length); 296 297 extern void 298 ef10_mcdi_request_copyout( 299 __in efx_nic_t *enp, 300 __in efx_mcdi_req_t *emrp); 301 302 extern efx_rc_t 303 ef10_mcdi_poll_reboot( 304 __in efx_nic_t *enp); 305 306 extern __checkReturn efx_rc_t 307 ef10_mcdi_feature_supported( 308 __in efx_nic_t *enp, 309 __in efx_mcdi_feature_id_t id, 310 __out boolean_t *supportedp); 311 312 #endif /* EFSYS_OPT_MCDI */ 313 314 /* NVRAM */ 315 316 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 317 318 extern __checkReturn efx_rc_t 319 ef10_nvram_buf_read_tlv( 320 __in efx_nic_t *enp, 321 __in_bcount(max_seg_size) caddr_t seg_data, 322 __in size_t max_seg_size, 323 __in uint32_t tag, 324 __deref_out_bcount_opt(*sizep) caddr_t *datap, 325 __out size_t *sizep); 326 327 extern __checkReturn efx_rc_t 328 ef10_nvram_buf_write_tlv( 329 __inout_bcount(partn_size) caddr_t partn_data, 330 __in size_t partn_size, 331 __in uint32_t tag, 332 __in_bcount(tag_size) caddr_t tag_data, 333 __in size_t tag_size, 334 __out size_t *total_lengthp); 335 336 extern __checkReturn efx_rc_t 337 ef10_nvram_partn_read_tlv( 338 __in efx_nic_t *enp, 339 __in uint32_t partn, 340 __in uint32_t tag, 341 __deref_out_bcount_opt(*sizep) caddr_t *datap, 342 __out size_t *sizep); 343 344 extern __checkReturn efx_rc_t 345 ef10_nvram_partn_write_tlv( 346 __in efx_nic_t *enp, 347 __in uint32_t partn, 348 __in uint32_t tag, 349 __in_bcount(size) caddr_t data, 350 __in size_t size); 351 352 extern __checkReturn efx_rc_t 353 ef10_nvram_partn_write_segment_tlv( 354 __in efx_nic_t *enp, 355 __in uint32_t partn, 356 __in uint32_t tag, 357 __in_bcount(size) caddr_t data, 358 __in size_t size, 359 __in boolean_t all_segments); 360 361 extern __checkReturn efx_rc_t 362 ef10_nvram_partn_size( 363 __in efx_nic_t *enp, 364 __in uint32_t partn, 365 __out size_t *sizep); 366 367 extern __checkReturn efx_rc_t 368 ef10_nvram_partn_lock( 369 __in efx_nic_t *enp, 370 __in uint32_t partn); 371 372 extern __checkReturn efx_rc_t 373 ef10_nvram_partn_read( 374 __in efx_nic_t *enp, 375 __in uint32_t partn, 376 __in unsigned int offset, 377 __out_bcount(size) caddr_t data, 378 __in size_t size); 379 380 extern __checkReturn efx_rc_t 381 ef10_nvram_partn_erase( 382 __in efx_nic_t *enp, 383 __in uint32_t partn, 384 __in unsigned int offset, 385 __in size_t size); 386 387 extern __checkReturn efx_rc_t 388 ef10_nvram_partn_write( 389 __in efx_nic_t *enp, 390 __in uint32_t partn, 391 __in unsigned int offset, 392 __out_bcount(size) caddr_t data, 393 __in size_t size); 394 395 extern void 396 ef10_nvram_partn_unlock( 397 __in efx_nic_t *enp, 398 __in uint32_t partn); 399 400 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ 401 402 #if EFSYS_OPT_NVRAM 403 404 #if EFSYS_OPT_DIAG 405 406 extern __checkReturn efx_rc_t 407 ef10_nvram_test( 408 __in efx_nic_t *enp); 409 410 #endif /* EFSYS_OPT_DIAG */ 411 412 extern __checkReturn efx_rc_t 413 ef10_nvram_size( 414 __in efx_nic_t *enp, 415 __in efx_nvram_type_t type, 416 __out size_t *sizep); 417 418 extern __checkReturn efx_rc_t 419 ef10_nvram_get_version( 420 __in efx_nic_t *enp, 421 __in efx_nvram_type_t type, 422 __out uint32_t *subtypep, 423 __out_ecount(4) uint16_t version[4]); 424 425 extern __checkReturn efx_rc_t 426 ef10_nvram_rw_start( 427 __in efx_nic_t *enp, 428 __in efx_nvram_type_t type, 429 __out size_t *pref_chunkp); 430 431 extern __checkReturn efx_rc_t 432 ef10_nvram_read_chunk( 433 __in efx_nic_t *enp, 434 __in efx_nvram_type_t type, 435 __in unsigned int offset, 436 __out_bcount(size) caddr_t data, 437 __in size_t size); 438 439 extern __checkReturn efx_rc_t 440 ef10_nvram_erase( 441 __in efx_nic_t *enp, 442 __in efx_nvram_type_t type); 443 444 extern __checkReturn efx_rc_t 445 ef10_nvram_write_chunk( 446 __in efx_nic_t *enp, 447 __in efx_nvram_type_t type, 448 __in unsigned int offset, 449 __in_bcount(size) caddr_t data, 450 __in size_t size); 451 452 extern void 453 ef10_nvram_rw_finish( 454 __in efx_nic_t *enp, 455 __in efx_nvram_type_t type); 456 457 extern __checkReturn efx_rc_t 458 ef10_nvram_partn_set_version( 459 __in efx_nic_t *enp, 460 __in uint32_t partn, 461 __in_ecount(4) uint16_t version[4]); 462 463 extern __checkReturn efx_rc_t 464 ef10_nvram_set_version( 465 __in efx_nic_t *enp, 466 __in efx_nvram_type_t type, 467 __in_ecount(4) uint16_t version[4]); 468 469 extern __checkReturn efx_rc_t 470 ef10_nvram_type_to_partn( 471 __in efx_nic_t *enp, 472 __in efx_nvram_type_t type, 473 __out uint32_t *partnp); 474 475 #endif /* EFSYS_OPT_NVRAM */ 476 477 478 /* PHY */ 479 480 typedef struct hunt_link_state_s { 481 uint32_t hls_adv_cap_mask; 482 uint32_t hls_lp_cap_mask; 483 unsigned int hls_fcntl; 484 efx_link_mode_t hls_link_mode; 485 #if EFSYS_OPT_LOOPBACK 486 efx_loopback_type_t hls_loopback; 487 #endif 488 boolean_t hls_mac_up; 489 } hunt_link_state_t; 490 491 extern void 492 hunt_phy_link_ev( 493 __in efx_nic_t *enp, 494 __in efx_qword_t *eqp, 495 __out efx_link_mode_t *link_modep); 496 497 extern __checkReturn efx_rc_t 498 hunt_phy_get_link( 499 __in efx_nic_t *enp, 500 __out hunt_link_state_t *hlsp); 501 502 extern __checkReturn efx_rc_t 503 hunt_phy_power( 504 __in efx_nic_t *enp, 505 __in boolean_t on); 506 507 extern __checkReturn efx_rc_t 508 hunt_phy_reconfigure( 509 __in efx_nic_t *enp); 510 511 extern __checkReturn efx_rc_t 512 hunt_phy_verify( 513 __in efx_nic_t *enp); 514 515 extern __checkReturn efx_rc_t 516 hunt_phy_oui_get( 517 __in efx_nic_t *enp, 518 __out uint32_t *ouip); 519 520 #if EFSYS_OPT_PHY_STATS 521 522 extern __checkReturn efx_rc_t 523 hunt_phy_stats_update( 524 __in efx_nic_t *enp, 525 __in efsys_mem_t *esmp, 526 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 527 528 #endif /* EFSYS_OPT_PHY_STATS */ 529 530 #if EFSYS_OPT_PHY_PROPS 531 532 #if EFSYS_OPT_NAMES 533 534 extern const char * 535 hunt_phy_prop_name( 536 __in efx_nic_t *enp, 537 __in unsigned int id); 538 539 #endif /* EFSYS_OPT_NAMES */ 540 541 extern __checkReturn efx_rc_t 542 hunt_phy_prop_get( 543 __in efx_nic_t *enp, 544 __in unsigned int id, 545 __in uint32_t flags, 546 __out uint32_t *valp); 547 548 extern __checkReturn efx_rc_t 549 hunt_phy_prop_set( 550 __in efx_nic_t *enp, 551 __in unsigned int id, 552 __in uint32_t val); 553 554 #endif /* EFSYS_OPT_PHY_PROPS */ 555 556 #if EFSYS_OPT_BIST 557 558 extern __checkReturn efx_rc_t 559 hunt_bist_enable_offline( 560 __in efx_nic_t *enp); 561 562 extern __checkReturn efx_rc_t 563 hunt_bist_start( 564 __in efx_nic_t *enp, 565 __in efx_bist_type_t type); 566 567 extern __checkReturn efx_rc_t 568 hunt_bist_poll( 569 __in efx_nic_t *enp, 570 __in efx_bist_type_t type, 571 __out efx_bist_result_t *resultp, 572 __out_opt __drv_when(count > 0, __notnull) 573 uint32_t *value_maskp, 574 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 575 unsigned long *valuesp, 576 __in size_t count); 577 578 extern void 579 hunt_bist_stop( 580 __in efx_nic_t *enp, 581 __in efx_bist_type_t type); 582 583 #endif /* EFSYS_OPT_BIST */ 584 585 586 /* SRAM */ 587 588 #if EFSYS_OPT_DIAG 589 590 extern __checkReturn efx_rc_t 591 ef10_sram_test( 592 __in efx_nic_t *enp, 593 __in efx_sram_pattern_fn_t func); 594 595 #endif /* EFSYS_OPT_DIAG */ 596 597 598 /* TX */ 599 600 extern __checkReturn efx_rc_t 601 ef10_tx_init( 602 __in efx_nic_t *enp); 603 604 extern void 605 ef10_tx_fini( 606 __in efx_nic_t *enp); 607 608 extern __checkReturn efx_rc_t 609 ef10_tx_qcreate( 610 __in efx_nic_t *enp, 611 __in unsigned int index, 612 __in unsigned int label, 613 __in efsys_mem_t *esmp, 614 __in size_t n, 615 __in uint32_t id, 616 __in uint16_t flags, 617 __in efx_evq_t *eep, 618 __in efx_txq_t *etp, 619 __out unsigned int *addedp); 620 621 extern void 622 ef10_tx_qdestroy( 623 __in efx_txq_t *etp); 624 625 extern __checkReturn efx_rc_t 626 ef10_tx_qpost( 627 __in efx_txq_t *etp, 628 __in_ecount(n) efx_buffer_t *eb, 629 __in unsigned int n, 630 __in unsigned int completed, 631 __inout unsigned int *addedp); 632 633 extern void 634 ef10_tx_qpush( 635 __in efx_txq_t *etp, 636 __in unsigned int added, 637 __in unsigned int pushed); 638 639 extern __checkReturn efx_rc_t 640 ef10_tx_qpace( 641 __in efx_txq_t *etp, 642 __in unsigned int ns); 643 644 extern __checkReturn efx_rc_t 645 ef10_tx_qflush( 646 __in efx_txq_t *etp); 647 648 extern void 649 ef10_tx_qenable( 650 __in efx_txq_t *etp); 651 652 extern __checkReturn efx_rc_t 653 ef10_tx_qpio_enable( 654 __in efx_txq_t *etp); 655 656 extern void 657 ef10_tx_qpio_disable( 658 __in efx_txq_t *etp); 659 660 extern __checkReturn efx_rc_t 661 ef10_tx_qpio_write( 662 __in efx_txq_t *etp, 663 __in_ecount(buf_length) uint8_t *buffer, 664 __in size_t buf_length, 665 __in size_t pio_buf_offset); 666 667 extern __checkReturn efx_rc_t 668 ef10_tx_qpio_post( 669 __in efx_txq_t *etp, 670 __in size_t pkt_length, 671 __in unsigned int completed, 672 __inout unsigned int *addedp); 673 674 extern __checkReturn efx_rc_t 675 ef10_tx_qdesc_post( 676 __in efx_txq_t *etp, 677 __in_ecount(n) efx_desc_t *ed, 678 __in unsigned int n, 679 __in unsigned int completed, 680 __inout unsigned int *addedp); 681 682 extern void 683 ef10_tx_qdesc_dma_create( 684 __in efx_txq_t *etp, 685 __in efsys_dma_addr_t addr, 686 __in size_t size, 687 __in boolean_t eop, 688 __out efx_desc_t *edp); 689 690 extern void 691 hunt_tx_qdesc_tso_create( 692 __in efx_txq_t *etp, 693 __in uint16_t ipv4_id, 694 __in uint32_t tcp_seq, 695 __in uint8_t tcp_flags, 696 __out efx_desc_t *edp); 697 698 extern void 699 ef10_tx_qdesc_vlantci_create( 700 __in efx_txq_t *etp, 701 __in uint16_t vlan_tci, 702 __out efx_desc_t *edp); 703 704 705 #if EFSYS_OPT_QSTATS 706 707 extern void 708 ef10_tx_qstats_update( 709 __in efx_txq_t *etp, 710 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat); 711 712 #endif /* EFSYS_OPT_QSTATS */ 713 714 /* PIO */ 715 716 /* Missing register definitions */ 717 #ifndef ER_DZ_TX_PIOBUF_OFST 718 #define ER_DZ_TX_PIOBUF_OFST 0x00001000 719 #endif 720 #ifndef ER_DZ_TX_PIOBUF_STEP 721 #define ER_DZ_TX_PIOBUF_STEP 8192 722 #endif 723 #ifndef ER_DZ_TX_PIOBUF_ROWS 724 #define ER_DZ_TX_PIOBUF_ROWS 2048 725 #endif 726 727 #ifndef ER_DZ_TX_PIOBUF_SIZE 728 #define ER_DZ_TX_PIOBUF_SIZE 2048 729 #endif 730 731 #define HUNT_PIOBUF_NBUFS (16) 732 #define HUNT_PIOBUF_SIZE (ER_DZ_TX_PIOBUF_SIZE) 733 734 #define HUNT_MIN_PIO_ALLOC_SIZE (HUNT_PIOBUF_SIZE / 32) 735 736 #define HUNT_LEGACY_PF_PRIVILEGE_MASK \ 737 (MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN | \ 738 MC_CMD_PRIVILEGE_MASK_IN_GRP_LINK | \ 739 MC_CMD_PRIVILEGE_MASK_IN_GRP_ONLOAD | \ 740 MC_CMD_PRIVILEGE_MASK_IN_GRP_PTP | \ 741 MC_CMD_PRIVILEGE_MASK_IN_GRP_INSECURE_FILTERS | \ 742 MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING | \ 743 MC_CMD_PRIVILEGE_MASK_IN_GRP_UNICAST | \ 744 MC_CMD_PRIVILEGE_MASK_IN_GRP_MULTICAST | \ 745 MC_CMD_PRIVILEGE_MASK_IN_GRP_BROADCAST | \ 746 MC_CMD_PRIVILEGE_MASK_IN_GRP_ALL_MULTICAST | \ 747 MC_CMD_PRIVILEGE_MASK_IN_GRP_PROMISCUOUS) 748 749 #define HUNT_LEGACY_VF_PRIVILEGE_MASK 0 750 751 typedef uint32_t efx_piobuf_handle_t; 752 753 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1) 754 755 extern __checkReturn efx_rc_t 756 ef10_nic_pio_alloc( 757 __inout efx_nic_t *enp, 758 __out uint32_t *bufnump, 759 __out efx_piobuf_handle_t *handlep, 760 __out uint32_t *blknump, 761 __out uint32_t *offsetp, 762 __out size_t *sizep); 763 764 extern __checkReturn efx_rc_t 765 ef10_nic_pio_free( 766 __inout efx_nic_t *enp, 767 __in uint32_t bufnum, 768 __in uint32_t blknum); 769 770 extern __checkReturn efx_rc_t 771 ef10_nic_pio_link( 772 __inout efx_nic_t *enp, 773 __in uint32_t vi_index, 774 __in efx_piobuf_handle_t handle); 775 776 extern __checkReturn efx_rc_t 777 ef10_nic_pio_unlink( 778 __inout efx_nic_t *enp, 779 __in uint32_t vi_index); 780 781 782 /* VPD */ 783 784 #if EFSYS_OPT_VPD 785 786 extern __checkReturn efx_rc_t 787 ef10_vpd_init( 788 __in efx_nic_t *enp); 789 790 extern __checkReturn efx_rc_t 791 ef10_vpd_size( 792 __in efx_nic_t *enp, 793 __out size_t *sizep); 794 795 extern __checkReturn efx_rc_t 796 ef10_vpd_read( 797 __in efx_nic_t *enp, 798 __out_bcount(size) caddr_t data, 799 __in size_t size); 800 801 extern __checkReturn efx_rc_t 802 ef10_vpd_verify( 803 __in efx_nic_t *enp, 804 __in_bcount(size) caddr_t data, 805 __in size_t size); 806 807 extern __checkReturn efx_rc_t 808 ef10_vpd_reinit( 809 __in efx_nic_t *enp, 810 __in_bcount(size) caddr_t data, 811 __in size_t size); 812 813 extern __checkReturn efx_rc_t 814 ef10_vpd_get( 815 __in efx_nic_t *enp, 816 __in_bcount(size) caddr_t data, 817 __in size_t size, 818 __inout efx_vpd_value_t *evvp); 819 820 extern __checkReturn efx_rc_t 821 ef10_vpd_set( 822 __in efx_nic_t *enp, 823 __in_bcount(size) caddr_t data, 824 __in size_t size, 825 __in efx_vpd_value_t *evvp); 826 827 extern __checkReturn efx_rc_t 828 ef10_vpd_next( 829 __in efx_nic_t *enp, 830 __in_bcount(size) caddr_t data, 831 __in size_t size, 832 __out efx_vpd_value_t *evvp, 833 __inout unsigned int *contp); 834 835 extern __checkReturn efx_rc_t 836 ef10_vpd_write( 837 __in efx_nic_t *enp, 838 __in_bcount(size) caddr_t data, 839 __in size_t size); 840 841 extern void 842 ef10_vpd_fini( 843 __in efx_nic_t *enp); 844 845 #endif /* EFSYS_OPT_VPD */ 846 847 848 /* RX */ 849 850 extern __checkReturn efx_rc_t 851 ef10_rx_init( 852 __in efx_nic_t *enp); 853 854 #if EFSYS_OPT_RX_SCATTER 855 extern __checkReturn efx_rc_t 856 ef10_rx_scatter_enable( 857 __in efx_nic_t *enp, 858 __in unsigned int buf_size); 859 #endif /* EFSYS_OPT_RX_SCATTER */ 860 861 862 #if EFSYS_OPT_RX_SCALE 863 864 extern __checkReturn efx_rc_t 865 ef10_rx_scale_mode_set( 866 __in efx_nic_t *enp, 867 __in efx_rx_hash_alg_t alg, 868 __in efx_rx_hash_type_t type, 869 __in boolean_t insert); 870 871 extern __checkReturn efx_rc_t 872 ef10_rx_scale_key_set( 873 __in efx_nic_t *enp, 874 __in_ecount(n) uint8_t *key, 875 __in size_t n); 876 877 extern __checkReturn efx_rc_t 878 ef10_rx_scale_tbl_set( 879 __in efx_nic_t *enp, 880 __in_ecount(n) unsigned int *table, 881 __in size_t n); 882 883 extern __checkReturn uint32_t 884 ef10_rx_prefix_hash( 885 __in efx_nic_t *enp, 886 __in efx_rx_hash_alg_t func, 887 __in uint8_t *buffer); 888 889 extern __checkReturn efx_rc_t 890 ef10_rx_prefix_pktlen( 891 __in efx_nic_t *enp, 892 __in uint8_t *buffer, 893 __out uint16_t *lengthp); 894 895 #endif /* EFSYS_OPT_RX_SCALE */ 896 897 extern void 898 ef10_rx_qpost( 899 __in efx_rxq_t *erp, 900 __in_ecount(n) efsys_dma_addr_t *addrp, 901 __in size_t size, 902 __in unsigned int n, 903 __in unsigned int completed, 904 __in unsigned int added); 905 906 extern void 907 ef10_rx_qpush( 908 __in efx_rxq_t *erp, 909 __in unsigned int added, 910 __inout unsigned int *pushedp); 911 912 extern __checkReturn efx_rc_t 913 ef10_rx_qflush( 914 __in efx_rxq_t *erp); 915 916 extern void 917 ef10_rx_qenable( 918 __in efx_rxq_t *erp); 919 920 extern __checkReturn efx_rc_t 921 ef10_rx_qcreate( 922 __in efx_nic_t *enp, 923 __in unsigned int index, 924 __in unsigned int label, 925 __in efx_rxq_type_t type, 926 __in efsys_mem_t *esmp, 927 __in size_t n, 928 __in uint32_t id, 929 __in efx_evq_t *eep, 930 __in efx_rxq_t *erp); 931 932 extern void 933 ef10_rx_qdestroy( 934 __in efx_rxq_t *erp); 935 936 extern void 937 ef10_rx_fini( 938 __in efx_nic_t *enp); 939 940 #if EFSYS_OPT_FILTER 941 942 typedef struct ef10_filter_handle_s { 943 uint32_t efh_lo; 944 uint32_t efh_hi; 945 } ef10_filter_handle_t; 946 947 typedef struct ef10_filter_entry_s { 948 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */ 949 ef10_filter_handle_t efe_handle; 950 } ef10_filter_entry_t; 951 952 /* 953 * BUSY flag indicates that an update is in progress. 954 * AUTO_OLD flag is used to mark and sweep MAC packet filters. 955 */ 956 #define EFX_EF10_FILTER_FLAG_BUSY 1U 957 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U 958 #define EFX_EF10_FILTER_FLAGS 3U 959 960 /* 961 * Size of the hash table used by the driver. Doesn't need to be the 962 * same size as the hardware's table. 963 */ 964 #define EFX_EF10_FILTER_TBL_ROWS 8192 965 966 /* Allow for the broadcast address to be added to the multicast list */ 967 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1) 968 969 typedef struct ef10_filter_table_s { 970 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS]; 971 efx_rxq_t * eft_default_rxq; 972 boolean_t eft_using_rss; 973 uint32_t eft_unicst_filter_index; 974 boolean_t eft_unicst_filter_set; 975 uint32_t eft_mulcst_filter_indexes[ 976 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX]; 977 uint32_t eft_mulcst_filter_count; 978 } ef10_filter_table_t; 979 980 __checkReturn efx_rc_t 981 ef10_filter_init( 982 __in efx_nic_t *enp); 983 984 void 985 ef10_filter_fini( 986 __in efx_nic_t *enp); 987 988 __checkReturn efx_rc_t 989 ef10_filter_restore( 990 __in efx_nic_t *enp); 991 992 __checkReturn efx_rc_t 993 ef10_filter_add( 994 __in efx_nic_t *enp, 995 __inout efx_filter_spec_t *spec, 996 __in boolean_t may_replace); 997 998 __checkReturn efx_rc_t 999 ef10_filter_delete( 1000 __in efx_nic_t *enp, 1001 __inout efx_filter_spec_t *spec); 1002 1003 extern __checkReturn efx_rc_t 1004 ef10_filter_supported_filters( 1005 __in efx_nic_t *enp, 1006 __out uint32_t *list, 1007 __out size_t *length); 1008 1009 extern __checkReturn efx_rc_t 1010 ef10_filter_reconfigure( 1011 __in efx_nic_t *enp, 1012 __in_ecount(6) uint8_t const *mac_addr, 1013 __in boolean_t all_unicst, 1014 __in boolean_t mulcst, 1015 __in boolean_t all_mulcst, 1016 __in boolean_t brdcst, 1017 __in_ecount(6*count) uint8_t const *addrs, 1018 __in int count); 1019 1020 extern void 1021 ef10_filter_get_default_rxq( 1022 __in efx_nic_t *enp, 1023 __out efx_rxq_t **erpp, 1024 __out boolean_t *using_rss); 1025 1026 extern void 1027 ef10_filter_default_rxq_set( 1028 __in efx_nic_t *enp, 1029 __in efx_rxq_t *erp, 1030 __in boolean_t using_rss); 1031 1032 extern void 1033 ef10_filter_default_rxq_clear( 1034 __in efx_nic_t *enp); 1035 1036 1037 #endif /* EFSYS_OPT_FILTER */ 1038 1039 extern __checkReturn efx_rc_t 1040 efx_mcdi_get_function_info( 1041 __in efx_nic_t *enp, 1042 __out uint32_t *pfp, 1043 __out_opt uint32_t *vfp); 1044 1045 extern __checkReturn efx_rc_t 1046 efx_mcdi_privilege_mask( 1047 __in efx_nic_t *enp, 1048 __in uint32_t pf, 1049 __in uint32_t vf, 1050 __out uint32_t *maskp); 1051 1052 #ifdef __cplusplus 1053 } 1054 #endif 1055 1056 #endif /* _SYS_HUNT_IMPL_H */ 1057