1 /*- 2 * Copyright (c) 2007-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include "efsys.h" 35 #include "efx.h" 36 #include "efx_types.h" 37 #include "efx_regs.h" 38 #include "efx_impl.h" 39 40 __checkReturn efx_rc_t 41 efx_sram_buf_tbl_set( 42 __in efx_nic_t *enp, 43 __in uint32_t id, 44 __in efsys_mem_t *esmp, 45 __in size_t n) 46 { 47 efx_qword_t qword; 48 uint32_t start = id; 49 uint32_t stop = start + n; 50 efsys_dma_addr_t addr; 51 efx_oword_t oword; 52 unsigned int count; 53 efx_rc_t rc; 54 55 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); 56 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); 57 58 #if EFSYS_OPT_HUNTINGTON 59 if (enp->en_family == EFX_FAMILY_HUNTINGTON) { 60 /* 61 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be 62 * pulled inside the Falcon/Siena queue create/destroy code, 63 * and then the original functions can be removed (see bug30834 64 * comment #1). But, for now, we just ensure that they are 65 * no-ops for Huntington, to allow bringing up existing drivers 66 * without modification. 67 */ 68 69 return (0); 70 } 71 #endif /* EFSYS_OPT_HUNTINGTON */ 72 73 if (stop >= EFX_BUF_TBL_SIZE) { 74 rc = EFBIG; 75 goto fail1; 76 } 77 78 /* Add the entries into the buffer table */ 79 addr = EFSYS_MEM_ADDR(esmp); 80 for (id = start; id != stop; id++) { 81 EFX_POPULATE_QWORD_5(qword, 82 FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0, 83 FRF_AZ_BUF_ADR_FBUF_DW0, 84 (uint32_t)((addr >> 12) & 0xffffffff), 85 FRF_AZ_BUF_ADR_FBUF_DW1, 86 (uint32_t)((addr >> 12) >> 32), 87 FRF_AZ_BUF_OWNER_ID_FBUF, 0); 88 89 EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL, 90 id, &qword); 91 92 addr += EFX_BUF_SIZE; 93 } 94 95 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1); 96 97 /* Flush the write buffer */ 98 EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1, 99 FRF_AZ_BUF_CLR_CMD, 0); 100 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); 101 102 /* Poll for the last entry being written to the buffer table */ 103 EFSYS_ASSERT3U(id, ==, stop); 104 addr -= EFX_BUF_SIZE; 105 106 count = 0; 107 do { 108 EFSYS_PROBE1(wait, unsigned int, count); 109 110 /* Spin for 1 ms */ 111 EFSYS_SPIN(1000); 112 113 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL, 114 id - 1, &qword); 115 116 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) == 117 (uint32_t)((addr >> 12) & 0xffffffff) && 118 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) == 119 (uint32_t)((addr >> 12) >> 32)) 120 goto verify; 121 122 } while (++count < 100); 123 124 rc = ETIMEDOUT; 125 goto fail2; 126 127 verify: 128 /* Verify the rest of the entries in the buffer table */ 129 while (--id != start) { 130 addr -= EFX_BUF_SIZE; 131 132 /* Read the buffer table entry */ 133 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL, 134 id - 1, &qword); 135 136 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) != 137 (uint32_t)((addr >> 12) & 0xffffffff) || 138 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) != 139 (uint32_t)((addr >> 12) >> 32)) { 140 rc = EFAULT; 141 goto fail3; 142 } 143 } 144 145 return (0); 146 147 fail3: 148 EFSYS_PROBE(fail3); 149 150 id = stop; 151 152 fail2: 153 EFSYS_PROBE(fail2); 154 155 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0, 156 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1, 157 FRF_AZ_BUF_CLR_START_ID, start); 158 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); 159 160 fail1: 161 EFSYS_PROBE1(fail1, efx_rc_t, rc); 162 163 return (rc); 164 } 165 166 void 167 efx_sram_buf_tbl_clear( 168 __in efx_nic_t *enp, 169 __in uint32_t id, 170 __in size_t n) 171 { 172 efx_oword_t oword; 173 uint32_t start = id; 174 uint32_t stop = start + n; 175 176 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); 177 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); 178 179 #if EFSYS_OPT_HUNTINGTON 180 if (enp->en_family == EFX_FAMILY_HUNTINGTON) { 181 /* 182 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be 183 * pulled inside the Falcon/Siena queue create/destroy code, 184 * and then the original functions can be removed (see bug30834 185 * comment #1). But, for now, we just ensure that they are 186 * no-ops for Huntington, to allow bringing up existing drivers 187 * without modification. 188 */ 189 190 return; 191 } 192 #endif /* EFSYS_OPT_HUNTINGTON */ 193 194 EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE); 195 196 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1); 197 198 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0, 199 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1, 200 FRF_AZ_BUF_CLR_START_ID, start); 201 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); 202 } 203 204 205 #if EFSYS_OPT_DIAG 206 207 static void 208 efx_sram_byte_increment_set( 209 __in size_t row, 210 __in boolean_t negate, 211 __out efx_qword_t *eqp) 212 { 213 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; 214 unsigned int index; 215 216 _NOTE(ARGUNUSED(negate)) 217 218 for (index = 0; index < sizeof (efx_qword_t); index++) 219 eqp->eq_u8[index] = offset + index; 220 } 221 222 static void 223 efx_sram_all_the_same_set( 224 __in size_t row, 225 __in boolean_t negate, 226 __out efx_qword_t *eqp) 227 { 228 _NOTE(ARGUNUSED(row)) 229 230 if (negate) 231 EFX_SET_QWORD(*eqp); 232 else 233 EFX_ZERO_QWORD(*eqp); 234 } 235 236 static void 237 efx_sram_bit_alternate_set( 238 __in size_t row, 239 __in boolean_t negate, 240 __out efx_qword_t *eqp) 241 { 242 _NOTE(ARGUNUSED(row)) 243 244 EFX_POPULATE_QWORD_2(*eqp, 245 EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa, 246 EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa); 247 } 248 249 static void 250 efx_sram_byte_alternate_set( 251 __in size_t row, 252 __in boolean_t negate, 253 __out efx_qword_t *eqp) 254 { 255 _NOTE(ARGUNUSED(row)) 256 257 EFX_POPULATE_QWORD_2(*eqp, 258 EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00, 259 EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00); 260 } 261 262 static void 263 efx_sram_byte_changing_set( 264 __in size_t row, 265 __in boolean_t negate, 266 __out efx_qword_t *eqp) 267 { 268 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; 269 unsigned int index; 270 271 for (index = 0; index < sizeof (efx_qword_t); index++) { 272 uint8_t byte; 273 274 if (offset / 256 == 0) 275 byte = (uint8_t)((offset % 257) % 256); 276 else 277 byte = (uint8_t)(~((offset - 8) % 257) % 256); 278 279 eqp->eq_u8[index] = (negate) ? ~byte : byte; 280 } 281 } 282 283 static void 284 efx_sram_bit_sweep_set( 285 __in size_t row, 286 __in boolean_t negate, 287 __out efx_qword_t *eqp) 288 { 289 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; 290 291 if (negate) { 292 EFX_SET_QWORD(*eqp); 293 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64); 294 } else { 295 EFX_ZERO_QWORD(*eqp); 296 EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64); 297 } 298 } 299 300 efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = { 301 efx_sram_byte_increment_set, 302 efx_sram_all_the_same_set, 303 efx_sram_bit_alternate_set, 304 efx_sram_byte_alternate_set, 305 efx_sram_byte_changing_set, 306 efx_sram_bit_sweep_set 307 }; 308 309 __checkReturn efx_rc_t 310 efx_sram_test( 311 __in efx_nic_t *enp, 312 __in efx_pattern_type_t type) 313 { 314 efx_nic_ops_t *enop = enp->en_enop; 315 efx_sram_pattern_fn_t func; 316 317 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); 318 319 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); 320 321 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); 322 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); 323 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); 324 325 /* Select pattern generator */ 326 EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES); 327 func = __efx_sram_pattern_fns[type]; 328 329 return (enop->eno_sram_test(enp, func)); 330 } 331 332 #endif /* EFSYS_OPT_DIAG */ 333