1e948693eSPhilip Paeps /*- 2718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3718cf2ccSPedro F. Giffuni * 4929c7febSAndrew Rybchenko * Copyright (c) 2007-2016 Solarflare Communications Inc. 53c838a9fSAndrew Rybchenko * All rights reserved. 6e948693eSPhilip Paeps * 7e948693eSPhilip Paeps * Redistribution and use in source and binary forms, with or without 83c838a9fSAndrew Rybchenko * modification, are permitted provided that the following conditions are met: 9e948693eSPhilip Paeps * 103c838a9fSAndrew Rybchenko * 1. Redistributions of source code must retain the above copyright notice, 113c838a9fSAndrew Rybchenko * this list of conditions and the following disclaimer. 123c838a9fSAndrew Rybchenko * 2. Redistributions in binary form must reproduce the above copyright notice, 133c838a9fSAndrew Rybchenko * this list of conditions and the following disclaimer in the documentation 143c838a9fSAndrew Rybchenko * and/or other materials provided with the distribution. 153c838a9fSAndrew Rybchenko * 163c838a9fSAndrew Rybchenko * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 173c838a9fSAndrew Rybchenko * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 183c838a9fSAndrew Rybchenko * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 193c838a9fSAndrew Rybchenko * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 203c838a9fSAndrew Rybchenko * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 213c838a9fSAndrew Rybchenko * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 223c838a9fSAndrew Rybchenko * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 233c838a9fSAndrew Rybchenko * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 243c838a9fSAndrew Rybchenko * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 253c838a9fSAndrew Rybchenko * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 263c838a9fSAndrew Rybchenko * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273c838a9fSAndrew Rybchenko * 283c838a9fSAndrew Rybchenko * The views and conclusions contained in the software and documentation are 293c838a9fSAndrew Rybchenko * those of the authors and should not be interpreted as representing official 303c838a9fSAndrew Rybchenko * policies, either expressed or implied, of the FreeBSD Project. 315dee87d7SPhilip Paeps * 325dee87d7SPhilip Paeps * $FreeBSD$ 33e948693eSPhilip Paeps */ 34e948693eSPhilip Paeps 35e948693eSPhilip Paeps #ifndef _SYS_EFX_IMPL_H 36e948693eSPhilip Paeps #define _SYS_EFX_IMPL_H 37e948693eSPhilip Paeps 38e948693eSPhilip Paeps #include "efx.h" 39e948693eSPhilip Paeps #include "efx_regs.h" 403c838a9fSAndrew Rybchenko #include "efx_regs_ef10.h" 413c838a9fSAndrew Rybchenko 423c838a9fSAndrew Rybchenko /* FIXME: Add definition for driver generated software events */ 433c838a9fSAndrew Rybchenko #ifndef ESE_DZ_EV_CODE_DRV_GEN_EV 443c838a9fSAndrew Rybchenko #define ESE_DZ_EV_CODE_DRV_GEN_EV FSE_AZ_EV_CODE_DRV_GEN_EV 453c838a9fSAndrew Rybchenko #endif 463c838a9fSAndrew Rybchenko 47e948693eSPhilip Paeps 48e948693eSPhilip Paeps #if EFSYS_OPT_SIENA 49e948693eSPhilip Paeps #include "siena_impl.h" 50e948693eSPhilip Paeps #endif /* EFSYS_OPT_SIENA */ 51e948693eSPhilip Paeps 523c838a9fSAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON 533c838a9fSAndrew Rybchenko #include "hunt_impl.h" 543c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_HUNTINGTON */ 553c838a9fSAndrew Rybchenko 565f5c71ccSAndrew Rybchenko #if EFSYS_OPT_MEDFORD 575f5c71ccSAndrew Rybchenko #include "medford_impl.h" 585f5c71ccSAndrew Rybchenko #endif /* EFSYS_OPT_MEDFORD */ 595f5c71ccSAndrew Rybchenko 605f5c71ccSAndrew Rybchenko #if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) 615f5c71ccSAndrew Rybchenko #include "ef10_impl.h" 625f5c71ccSAndrew Rybchenko #endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */ 635f5c71ccSAndrew Rybchenko 64e948693eSPhilip Paeps #ifdef __cplusplus 65e948693eSPhilip Paeps extern "C" { 66e948693eSPhilip Paeps #endif 67e948693eSPhilip Paeps 68e948693eSPhilip Paeps #define EFX_MOD_MCDI 0x00000001 69e948693eSPhilip Paeps #define EFX_MOD_PROBE 0x00000002 70e948693eSPhilip Paeps #define EFX_MOD_NVRAM 0x00000004 71e948693eSPhilip Paeps #define EFX_MOD_VPD 0x00000008 72e948693eSPhilip Paeps #define EFX_MOD_NIC 0x00000010 73e948693eSPhilip Paeps #define EFX_MOD_INTR 0x00000020 74e948693eSPhilip Paeps #define EFX_MOD_EV 0x00000040 75e948693eSPhilip Paeps #define EFX_MOD_RX 0x00000080 76e948693eSPhilip Paeps #define EFX_MOD_TX 0x00000100 77e948693eSPhilip Paeps #define EFX_MOD_PORT 0x00000200 78e948693eSPhilip Paeps #define EFX_MOD_MON 0x00000400 79e948693eSPhilip Paeps #define EFX_MOD_FILTER 0x00001000 80908ecfc6SAndrew Rybchenko #define EFX_MOD_LIC 0x00002000 81e948693eSPhilip Paeps 820c909247SAndrew Rybchenko #define EFX_RESET_PHY 0x00000001 830c909247SAndrew Rybchenko #define EFX_RESET_RXQ_ERR 0x00000002 840c909247SAndrew Rybchenko #define EFX_RESET_TXQ_ERR 0x00000004 85e948693eSPhilip Paeps 86e948693eSPhilip Paeps typedef enum efx_mac_type_e { 87e948693eSPhilip Paeps EFX_MAC_INVALID = 0, 88e948693eSPhilip Paeps EFX_MAC_SIENA, 893c838a9fSAndrew Rybchenko EFX_MAC_HUNTINGTON, 90c15d6d21SAndrew Rybchenko EFX_MAC_MEDFORD, 91e948693eSPhilip Paeps EFX_MAC_NTYPES 92e948693eSPhilip Paeps } efx_mac_type_t; 93e948693eSPhilip Paeps 943c838a9fSAndrew Rybchenko typedef struct efx_ev_ops_s { 95460cb568SAndrew Rybchenko efx_rc_t (*eevo_init)(efx_nic_t *); 963c838a9fSAndrew Rybchenko void (*eevo_fini)(efx_nic_t *); 97460cb568SAndrew Rybchenko efx_rc_t (*eevo_qcreate)(efx_nic_t *, unsigned int, 983c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, uint32_t, 99a3fe009aSAndrew Rybchenko uint32_t, uint32_t, efx_evq_t *); 1003c838a9fSAndrew Rybchenko void (*eevo_qdestroy)(efx_evq_t *); 101460cb568SAndrew Rybchenko efx_rc_t (*eevo_qprime)(efx_evq_t *, unsigned int); 1023c838a9fSAndrew Rybchenko void (*eevo_qpost)(efx_evq_t *, uint16_t); 103460cb568SAndrew Rybchenko efx_rc_t (*eevo_qmoderate)(efx_evq_t *, unsigned int); 1043c838a9fSAndrew Rybchenko #if EFSYS_OPT_QSTATS 1053c838a9fSAndrew Rybchenko void (*eevo_qstats_update)(efx_evq_t *, efsys_stat_t *); 1063c838a9fSAndrew Rybchenko #endif 1073c838a9fSAndrew Rybchenko } efx_ev_ops_t; 1083c838a9fSAndrew Rybchenko 1093c838a9fSAndrew Rybchenko typedef struct efx_tx_ops_s { 110460cb568SAndrew Rybchenko efx_rc_t (*etxo_init)(efx_nic_t *); 1113c838a9fSAndrew Rybchenko void (*etxo_fini)(efx_nic_t *); 112460cb568SAndrew Rybchenko efx_rc_t (*etxo_qcreate)(efx_nic_t *, 1133c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1143c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, 1153c838a9fSAndrew Rybchenko uint32_t, uint16_t, 1163c838a9fSAndrew Rybchenko efx_evq_t *, efx_txq_t *, 1173c838a9fSAndrew Rybchenko unsigned int *); 1183c838a9fSAndrew Rybchenko void (*etxo_qdestroy)(efx_txq_t *); 119460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpost)(efx_txq_t *, efx_buffer_t *, 1203c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1213c838a9fSAndrew Rybchenko unsigned int *); 1223c838a9fSAndrew Rybchenko void (*etxo_qpush)(efx_txq_t *, unsigned int, unsigned int); 123460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpace)(efx_txq_t *, unsigned int); 124460cb568SAndrew Rybchenko efx_rc_t (*etxo_qflush)(efx_txq_t *); 1253c838a9fSAndrew Rybchenko void (*etxo_qenable)(efx_txq_t *); 126460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_enable)(efx_txq_t *); 1273c838a9fSAndrew Rybchenko void (*etxo_qpio_disable)(efx_txq_t *); 128460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_write)(efx_txq_t *, uint8_t *, size_t, 1293c838a9fSAndrew Rybchenko size_t); 130460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_post)(efx_txq_t *, size_t, unsigned int, 1313c838a9fSAndrew Rybchenko unsigned int *); 132460cb568SAndrew Rybchenko efx_rc_t (*etxo_qdesc_post)(efx_txq_t *, efx_desc_t *, 1333c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1343c838a9fSAndrew Rybchenko unsigned int *); 1353c838a9fSAndrew Rybchenko void (*etxo_qdesc_dma_create)(efx_txq_t *, efsys_dma_addr_t, 1363c838a9fSAndrew Rybchenko size_t, boolean_t, 1373c838a9fSAndrew Rybchenko efx_desc_t *); 1383c838a9fSAndrew Rybchenko void (*etxo_qdesc_tso_create)(efx_txq_t *, uint16_t, 1393c838a9fSAndrew Rybchenko uint32_t, uint8_t, 1403c838a9fSAndrew Rybchenko efx_desc_t *); 1414ab49369SAndrew Rybchenko void (*etxo_qdesc_tso2_create)(efx_txq_t *, uint16_t, 1424ab49369SAndrew Rybchenko uint32_t, uint16_t, 1434ab49369SAndrew Rybchenko efx_desc_t *, int); 1443c838a9fSAndrew Rybchenko void (*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t, 1453c838a9fSAndrew Rybchenko efx_desc_t *); 1463c838a9fSAndrew Rybchenko #if EFSYS_OPT_QSTATS 1473c838a9fSAndrew Rybchenko void (*etxo_qstats_update)(efx_txq_t *, 1483c838a9fSAndrew Rybchenko efsys_stat_t *); 1493c838a9fSAndrew Rybchenko #endif 1503c838a9fSAndrew Rybchenko } efx_tx_ops_t; 1513c838a9fSAndrew Rybchenko 1523c838a9fSAndrew Rybchenko typedef struct efx_rx_ops_s { 153460cb568SAndrew Rybchenko efx_rc_t (*erxo_init)(efx_nic_t *); 1543c838a9fSAndrew Rybchenko void (*erxo_fini)(efx_nic_t *); 1553c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCATTER 156460cb568SAndrew Rybchenko efx_rc_t (*erxo_scatter_enable)(efx_nic_t *, unsigned int); 1573c838a9fSAndrew Rybchenko #endif 1583c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCALE 159e6d55a0bSAndrew Rybchenko efx_rc_t (*erxo_scale_context_alloc)(efx_nic_t *, 160e6d55a0bSAndrew Rybchenko efx_rx_scale_context_type_t, 161e6d55a0bSAndrew Rybchenko uint32_t, uint32_t *); 162e6d55a0bSAndrew Rybchenko efx_rc_t (*erxo_scale_context_free)(efx_nic_t *, uint32_t); 16382af879cSAndrew Rybchenko efx_rc_t (*erxo_scale_mode_set)(efx_nic_t *, uint32_t, 16482af879cSAndrew Rybchenko efx_rx_hash_alg_t, 1653c838a9fSAndrew Rybchenko efx_rx_hash_type_t, boolean_t); 16682af879cSAndrew Rybchenko efx_rc_t (*erxo_scale_key_set)(efx_nic_t *, uint32_t, 16782af879cSAndrew Rybchenko uint8_t *, size_t); 16882af879cSAndrew Rybchenko efx_rc_t (*erxo_scale_tbl_set)(efx_nic_t *, uint32_t, 16982af879cSAndrew Rybchenko unsigned int *, size_t); 1700badfd72SAndrew Rybchenko uint32_t (*erxo_prefix_hash)(efx_nic_t *, efx_rx_hash_alg_t, 1710badfd72SAndrew Rybchenko uint8_t *); 1720badfd72SAndrew Rybchenko #endif /* EFSYS_OPT_RX_SCALE */ 1730badfd72SAndrew Rybchenko efx_rc_t (*erxo_prefix_pktlen)(efx_nic_t *, uint8_t *, 1740badfd72SAndrew Rybchenko uint16_t *); 1753c838a9fSAndrew Rybchenko void (*erxo_qpost)(efx_rxq_t *, efsys_dma_addr_t *, size_t, 1763c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1773c838a9fSAndrew Rybchenko unsigned int); 1783c838a9fSAndrew Rybchenko void (*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *); 1798e0c4827SAndrew Rybchenko #if EFSYS_OPT_RX_PACKED_STREAM 1808e0c4827SAndrew Rybchenko void (*erxo_qpush_ps_credits)(efx_rxq_t *); 1818e0c4827SAndrew Rybchenko uint8_t * (*erxo_qps_packet_info)(efx_rxq_t *, uint8_t *, 1828e0c4827SAndrew Rybchenko uint32_t, uint32_t, 1838e0c4827SAndrew Rybchenko uint16_t *, uint32_t *, uint32_t *); 1848e0c4827SAndrew Rybchenko #endif 185460cb568SAndrew Rybchenko efx_rc_t (*erxo_qflush)(efx_rxq_t *); 1863c838a9fSAndrew Rybchenko void (*erxo_qenable)(efx_rxq_t *); 187460cb568SAndrew Rybchenko efx_rc_t (*erxo_qcreate)(efx_nic_t *enp, unsigned int, 1883c838a9fSAndrew Rybchenko unsigned int, efx_rxq_type_t, 1893c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, uint32_t, 1903c838a9fSAndrew Rybchenko efx_evq_t *, efx_rxq_t *); 1913c838a9fSAndrew Rybchenko void (*erxo_qdestroy)(efx_rxq_t *); 1923c838a9fSAndrew Rybchenko } efx_rx_ops_t; 1933c838a9fSAndrew Rybchenko 194e948693eSPhilip Paeps typedef struct efx_mac_ops_s { 195460cb568SAndrew Rybchenko efx_rc_t (*emo_poll)(efx_nic_t *, efx_link_mode_t *); 196460cb568SAndrew Rybchenko efx_rc_t (*emo_up)(efx_nic_t *, boolean_t *); 197460cb568SAndrew Rybchenko efx_rc_t (*emo_addr_set)(efx_nic_t *); 19808c5af79SAndrew Rybchenko efx_rc_t (*emo_pdu_set)(efx_nic_t *); 199d8484af2SAndrew Rybchenko efx_rc_t (*emo_pdu_get)(efx_nic_t *, size_t *); 200460cb568SAndrew Rybchenko efx_rc_t (*emo_reconfigure)(efx_nic_t *); 201460cb568SAndrew Rybchenko efx_rc_t (*emo_multicast_list_set)(efx_nic_t *); 202460cb568SAndrew Rybchenko efx_rc_t (*emo_filter_default_rxq_set)(efx_nic_t *, 2033c838a9fSAndrew Rybchenko efx_rxq_t *, boolean_t); 2043c838a9fSAndrew Rybchenko void (*emo_filter_default_rxq_clear)(efx_nic_t *); 205e948693eSPhilip Paeps #if EFSYS_OPT_LOOPBACK 206460cb568SAndrew Rybchenko efx_rc_t (*emo_loopback_set)(efx_nic_t *, efx_link_mode_t, 207e948693eSPhilip Paeps efx_loopback_type_t); 208e948693eSPhilip Paeps #endif /* EFSYS_OPT_LOOPBACK */ 209e948693eSPhilip Paeps #if EFSYS_OPT_MAC_STATS 21058a72cb2SAndrew Rybchenko efx_rc_t (*emo_stats_get_mask)(efx_nic_t *, uint32_t *, size_t); 21131e518b4SAndrew Rybchenko efx_rc_t (*emo_stats_clear)(efx_nic_t *); 212460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_upload)(efx_nic_t *, efsys_mem_t *); 213460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_periodic)(efx_nic_t *, efsys_mem_t *, 214e948693eSPhilip Paeps uint16_t, boolean_t); 215460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_update)(efx_nic_t *, efsys_mem_t *, 216e948693eSPhilip Paeps efsys_stat_t *, uint32_t *); 217e948693eSPhilip Paeps #endif /* EFSYS_OPT_MAC_STATS */ 218e948693eSPhilip Paeps } efx_mac_ops_t; 219e948693eSPhilip Paeps 220e948693eSPhilip Paeps typedef struct efx_phy_ops_s { 221460cb568SAndrew Rybchenko efx_rc_t (*epo_power)(efx_nic_t *, boolean_t); /* optional */ 222460cb568SAndrew Rybchenko efx_rc_t (*epo_reset)(efx_nic_t *); 223460cb568SAndrew Rybchenko efx_rc_t (*epo_reconfigure)(efx_nic_t *); 224460cb568SAndrew Rybchenko efx_rc_t (*epo_verify)(efx_nic_t *); 225460cb568SAndrew Rybchenko efx_rc_t (*epo_oui_get)(efx_nic_t *, uint32_t *); 226e948693eSPhilip Paeps #if EFSYS_OPT_PHY_STATS 227460cb568SAndrew Rybchenko efx_rc_t (*epo_stats_update)(efx_nic_t *, efsys_mem_t *, 228e948693eSPhilip Paeps uint32_t *); 229e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_STATS */ 2303c838a9fSAndrew Rybchenko #if EFSYS_OPT_BIST 231460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_enable_offline)(efx_nic_t *); 232460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_start)(efx_nic_t *, efx_bist_type_t); 233460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_poll)(efx_nic_t *, efx_bist_type_t, 2343c838a9fSAndrew Rybchenko efx_bist_result_t *, uint32_t *, 235e948693eSPhilip Paeps unsigned long *, size_t); 2363c838a9fSAndrew Rybchenko void (*epo_bist_stop)(efx_nic_t *, efx_bist_type_t); 2373c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_BIST */ 238e948693eSPhilip Paeps } efx_phy_ops_t; 239e948693eSPhilip Paeps 2403c838a9fSAndrew Rybchenko #if EFSYS_OPT_FILTER 2413c838a9fSAndrew Rybchenko typedef struct efx_filter_ops_s { 242460cb568SAndrew Rybchenko efx_rc_t (*efo_init)(efx_nic_t *); 2433c838a9fSAndrew Rybchenko void (*efo_fini)(efx_nic_t *); 244460cb568SAndrew Rybchenko efx_rc_t (*efo_restore)(efx_nic_t *); 245460cb568SAndrew Rybchenko efx_rc_t (*efo_add)(efx_nic_t *, efx_filter_spec_t *, 2463c838a9fSAndrew Rybchenko boolean_t may_replace); 247460cb568SAndrew Rybchenko efx_rc_t (*efo_delete)(efx_nic_t *, efx_filter_spec_t *); 24863492ab8SAndrew Rybchenko efx_rc_t (*efo_supported_filters)(efx_nic_t *, uint32_t *, 24963492ab8SAndrew Rybchenko size_t, size_t *); 250460cb568SAndrew Rybchenko efx_rc_t (*efo_reconfigure)(efx_nic_t *, uint8_t const *, boolean_t, 2513c838a9fSAndrew Rybchenko boolean_t, boolean_t, boolean_t, 25247cb5106SAndrew Rybchenko uint8_t const *, uint32_t); 2533c838a9fSAndrew Rybchenko } efx_filter_ops_t; 2543c838a9fSAndrew Rybchenko 255460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 2563c838a9fSAndrew Rybchenko efx_filter_reconfigure( 2573c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 2583c838a9fSAndrew Rybchenko __in_ecount(6) uint8_t const *mac_addr, 2593c838a9fSAndrew Rybchenko __in boolean_t all_unicst, 2603c838a9fSAndrew Rybchenko __in boolean_t mulcst, 2613c838a9fSAndrew Rybchenko __in boolean_t all_mulcst, 2623c838a9fSAndrew Rybchenko __in boolean_t brdcst, 2633c838a9fSAndrew Rybchenko __in_ecount(6*count) uint8_t const *addrs, 26447cb5106SAndrew Rybchenko __in uint32_t count); 2653c838a9fSAndrew Rybchenko 2663c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_FILTER */ 2673c838a9fSAndrew Rybchenko 2683c838a9fSAndrew Rybchenko 269e948693eSPhilip Paeps typedef struct efx_port_s { 270e948693eSPhilip Paeps efx_mac_type_t ep_mac_type; 271e948693eSPhilip Paeps uint32_t ep_phy_type; 272e948693eSPhilip Paeps uint8_t ep_port; 273e948693eSPhilip Paeps uint32_t ep_mac_pdu; 274e948693eSPhilip Paeps uint8_t ep_mac_addr[6]; 275e948693eSPhilip Paeps efx_link_mode_t ep_link_mode; 2763c838a9fSAndrew Rybchenko boolean_t ep_all_unicst; 2773c838a9fSAndrew Rybchenko boolean_t ep_mulcst; 2783c838a9fSAndrew Rybchenko boolean_t ep_all_mulcst; 279e948693eSPhilip Paeps boolean_t ep_brdcst; 280e948693eSPhilip Paeps unsigned int ep_fcntl; 281e948693eSPhilip Paeps boolean_t ep_fcntl_autoneg; 282e948693eSPhilip Paeps efx_oword_t ep_multicst_hash[2]; 2833c838a9fSAndrew Rybchenko uint8_t ep_mulcst_addr_list[EFX_MAC_ADDR_LEN * 2843c838a9fSAndrew Rybchenko EFX_MAC_MULTICAST_LIST_MAX]; 2853c838a9fSAndrew Rybchenko uint32_t ep_mulcst_addr_count; 286e948693eSPhilip Paeps #if EFSYS_OPT_LOOPBACK 287e948693eSPhilip Paeps efx_loopback_type_t ep_loopback_type; 288e948693eSPhilip Paeps efx_link_mode_t ep_loopback_link_mode; 289e948693eSPhilip Paeps #endif /* EFSYS_OPT_LOOPBACK */ 290e948693eSPhilip Paeps #if EFSYS_OPT_PHY_FLAGS 291e948693eSPhilip Paeps uint32_t ep_phy_flags; 292e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_FLAGS */ 293e948693eSPhilip Paeps #if EFSYS_OPT_PHY_LED_CONTROL 294e948693eSPhilip Paeps efx_phy_led_mode_t ep_phy_led_mode; 295e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_LED_CONTROL */ 296e948693eSPhilip Paeps efx_phy_media_type_t ep_fixed_port_type; 297e948693eSPhilip Paeps efx_phy_media_type_t ep_module_type; 298e948693eSPhilip Paeps uint32_t ep_adv_cap_mask; 299e948693eSPhilip Paeps uint32_t ep_lp_cap_mask; 300e948693eSPhilip Paeps uint32_t ep_default_adv_cap_mask; 301e948693eSPhilip Paeps uint32_t ep_phy_cap_mask; 302e948693eSPhilip Paeps boolean_t ep_mac_drain; 303e948693eSPhilip Paeps boolean_t ep_mac_stats_pending; 3043c838a9fSAndrew Rybchenko #if EFSYS_OPT_BIST 3053c838a9fSAndrew Rybchenko efx_bist_type_t ep_current_bist; 306e948693eSPhilip Paeps #endif 307ec831f7fSAndrew Rybchenko const efx_mac_ops_t *ep_emop; 308ec831f7fSAndrew Rybchenko const efx_phy_ops_t *ep_epop; 309e948693eSPhilip Paeps } efx_port_t; 310e948693eSPhilip Paeps 311e948693eSPhilip Paeps typedef struct efx_mon_ops_s { 312e948693eSPhilip Paeps #if EFSYS_OPT_MON_STATS 313460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_update)(efx_nic_t *, efsys_mem_t *, 314e948693eSPhilip Paeps efx_mon_stat_value_t *); 315e948693eSPhilip Paeps #endif /* EFSYS_OPT_MON_STATS */ 316e948693eSPhilip Paeps } efx_mon_ops_t; 317e948693eSPhilip Paeps 318e948693eSPhilip Paeps typedef struct efx_mon_s { 319e948693eSPhilip Paeps efx_mon_type_t em_type; 320ec831f7fSAndrew Rybchenko const efx_mon_ops_t *em_emop; 321e948693eSPhilip Paeps } efx_mon_t; 322e948693eSPhilip Paeps 3233c838a9fSAndrew Rybchenko typedef struct efx_intr_ops_s { 324460cb568SAndrew Rybchenko efx_rc_t (*eio_init)(efx_nic_t *, efx_intr_type_t, efsys_mem_t *); 3253c838a9fSAndrew Rybchenko void (*eio_enable)(efx_nic_t *); 3263c838a9fSAndrew Rybchenko void (*eio_disable)(efx_nic_t *); 3273c838a9fSAndrew Rybchenko void (*eio_disable_unlocked)(efx_nic_t *); 328460cb568SAndrew Rybchenko efx_rc_t (*eio_trigger)(efx_nic_t *, unsigned int); 3290c24a07eSAndrew Rybchenko void (*eio_status_line)(efx_nic_t *, boolean_t *, uint32_t *); 3300c24a07eSAndrew Rybchenko void (*eio_status_message)(efx_nic_t *, unsigned int, 3310c24a07eSAndrew Rybchenko boolean_t *); 3320c24a07eSAndrew Rybchenko void (*eio_fatal)(efx_nic_t *); 3333c838a9fSAndrew Rybchenko void (*eio_fini)(efx_nic_t *); 3343c838a9fSAndrew Rybchenko } efx_intr_ops_t; 3353c838a9fSAndrew Rybchenko 336e948693eSPhilip Paeps typedef struct efx_intr_s { 337ec831f7fSAndrew Rybchenko const efx_intr_ops_t *ei_eiop; 338e948693eSPhilip Paeps efsys_mem_t *ei_esmp; 3393c838a9fSAndrew Rybchenko efx_intr_type_t ei_type; 340e948693eSPhilip Paeps unsigned int ei_level; 341e948693eSPhilip Paeps } efx_intr_t; 342e948693eSPhilip Paeps 343e948693eSPhilip Paeps typedef struct efx_nic_ops_s { 344460cb568SAndrew Rybchenko efx_rc_t (*eno_probe)(efx_nic_t *); 345cfa023ebSAndrew Rybchenko efx_rc_t (*eno_board_cfg)(efx_nic_t *); 346460cb568SAndrew Rybchenko efx_rc_t (*eno_set_drv_limits)(efx_nic_t *, efx_drv_limits_t*); 347460cb568SAndrew Rybchenko efx_rc_t (*eno_reset)(efx_nic_t *); 348460cb568SAndrew Rybchenko efx_rc_t (*eno_init)(efx_nic_t *); 349460cb568SAndrew Rybchenko efx_rc_t (*eno_get_vi_pool)(efx_nic_t *, uint32_t *); 350460cb568SAndrew Rybchenko efx_rc_t (*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t, 3513c838a9fSAndrew Rybchenko uint32_t *, size_t *); 352e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 353460cb568SAndrew Rybchenko efx_rc_t (*eno_register_test)(efx_nic_t *); 354e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 355e948693eSPhilip Paeps void (*eno_fini)(efx_nic_t *); 356e948693eSPhilip Paeps void (*eno_unprobe)(efx_nic_t *); 357e948693eSPhilip Paeps } efx_nic_ops_t; 358e948693eSPhilip Paeps 3599ab060a7SAndrew Rybchenko #ifndef EFX_TXQ_LIMIT_TARGET 360e948693eSPhilip Paeps #define EFX_TXQ_LIMIT_TARGET 259 3619ab060a7SAndrew Rybchenko #endif 3629ab060a7SAndrew Rybchenko #ifndef EFX_RXQ_LIMIT_TARGET 36375ba9e1eSAndrew Rybchenko #define EFX_RXQ_LIMIT_TARGET 512 3649ab060a7SAndrew Rybchenko #endif 3659ab060a7SAndrew Rybchenko #ifndef EFX_TXQ_DC_SIZE 3669ab060a7SAndrew Rybchenko #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ 3679ab060a7SAndrew Rybchenko #endif 3689ab060a7SAndrew Rybchenko #ifndef EFX_RXQ_DC_SIZE 3699ab060a7SAndrew Rybchenko #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ 3709ab060a7SAndrew Rybchenko #endif 371e948693eSPhilip Paeps 372e948693eSPhilip Paeps #if EFSYS_OPT_FILTER 373e948693eSPhilip Paeps 374f7aa4b3dSAndrew Rybchenko typedef struct siena_filter_spec_s { 375f7aa4b3dSAndrew Rybchenko uint8_t sfs_type; 376f7aa4b3dSAndrew Rybchenko uint32_t sfs_flags; 377f7aa4b3dSAndrew Rybchenko uint32_t sfs_dmaq_id; 378f7aa4b3dSAndrew Rybchenko uint32_t sfs_dword[3]; 379f7aa4b3dSAndrew Rybchenko } siena_filter_spec_t; 3803c838a9fSAndrew Rybchenko 381f7aa4b3dSAndrew Rybchenko typedef enum siena_filter_type_e { 382f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_TCP_FULL, /* TCP/IPv4 {dIP,dTCP,sIP,sTCP} */ 383f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_TCP_WILD, /* TCP/IPv4 {dIP,dTCP, -, -} */ 384f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_UDP_FULL, /* UDP/IPv4 {dIP,dUDP,sIP,sUDP} */ 385f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_UDP_WILD, /* UDP/IPv4 {dIP,dUDP, -, -} */ 386f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_MAC_FULL, /* Ethernet {dMAC,VLAN} */ 387f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_RX_MAC_WILD, /* Ethernet {dMAC, -} */ 388e948693eSPhilip Paeps 389f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_TCP_FULL, /* TCP/IPv4 {dIP,dTCP,sIP,sTCP} */ 390f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_TCP_WILD, /* TCP/IPv4 { -, -,sIP,sTCP} */ 391f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_UDP_FULL, /* UDP/IPv4 {dIP,dTCP,sIP,sTCP} */ 392f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_UDP_WILD, /* UDP/IPv4 { -, -,sIP,sUDP} */ 393f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_MAC_FULL, /* Ethernet {sMAC,VLAN} */ 394f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TX_MAC_WILD, /* Ethernet {sMAC, -} */ 395e948693eSPhilip Paeps 396f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_NTYPES 397f7aa4b3dSAndrew Rybchenko } siena_filter_type_t; 398e948693eSPhilip Paeps 399f7aa4b3dSAndrew Rybchenko typedef enum siena_filter_tbl_id_e { 400f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TBL_RX_IP = 0, 401f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TBL_RX_MAC, 402f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TBL_TX_IP, 403f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_TBL_TX_MAC, 404f7aa4b3dSAndrew Rybchenko EFX_SIENA_FILTER_NTBLS 405f7aa4b3dSAndrew Rybchenko } siena_filter_tbl_id_t; 406e948693eSPhilip Paeps 407f7aa4b3dSAndrew Rybchenko typedef struct siena_filter_tbl_s { 408f7aa4b3dSAndrew Rybchenko int sft_size; /* number of entries */ 409f7aa4b3dSAndrew Rybchenko int sft_used; /* active count */ 410f7aa4b3dSAndrew Rybchenko uint32_t *sft_bitmap; /* active bitmap */ 411f7aa4b3dSAndrew Rybchenko siena_filter_spec_t *sft_spec; /* array of saved specs */ 412f7aa4b3dSAndrew Rybchenko } siena_filter_tbl_t; 413e948693eSPhilip Paeps 414f7aa4b3dSAndrew Rybchenko typedef struct siena_filter_s { 415f7aa4b3dSAndrew Rybchenko siena_filter_tbl_t sf_tbl[EFX_SIENA_FILTER_NTBLS]; 416f7aa4b3dSAndrew Rybchenko unsigned int sf_depth[EFX_SIENA_FILTER_NTYPES]; 417f7aa4b3dSAndrew Rybchenko } siena_filter_t; 418e948693eSPhilip Paeps 419e948693eSPhilip Paeps typedef struct efx_filter_s { 420e75412c9SAndrew Rybchenko #if EFSYS_OPT_SIENA 421f7aa4b3dSAndrew Rybchenko siena_filter_t *ef_siena_filter; 422e75412c9SAndrew Rybchenko #endif /* EFSYS_OPT_SIENA */ 4231289fe72SAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD 4241289fe72SAndrew Rybchenko ef10_filter_table_t *ef_ef10_filter_table; 4251289fe72SAndrew Rybchenko #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */ 426e948693eSPhilip Paeps } efx_filter_t; 427e948693eSPhilip Paeps 428e948693eSPhilip Paeps extern void 4291c159dbfSAndrew Rybchenko siena_filter_tbl_clear( 430e948693eSPhilip Paeps __in efx_nic_t *enp, 431f7aa4b3dSAndrew Rybchenko __in siena_filter_tbl_id_t tbl); 432e948693eSPhilip Paeps 433e948693eSPhilip Paeps #endif /* EFSYS_OPT_FILTER */ 434e948693eSPhilip Paeps 4353c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 4363c838a9fSAndrew Rybchenko 4373c838a9fSAndrew Rybchenko typedef struct efx_mcdi_ops_s { 438460cb568SAndrew Rybchenko efx_rc_t (*emco_init)(efx_nic_t *, const efx_mcdi_transport_t *); 439fd7501bfSAndrew Rybchenko void (*emco_send_request)(efx_nic_t *, void *, size_t, 440fd7501bfSAndrew Rybchenko void *, size_t); 441460cb568SAndrew Rybchenko efx_rc_t (*emco_poll_reboot)(efx_nic_t *); 442548ebee5SAndrew Rybchenko boolean_t (*emco_poll_response)(efx_nic_t *); 443548ebee5SAndrew Rybchenko void (*emco_read_response)(efx_nic_t *, void *, size_t, size_t); 4443c838a9fSAndrew Rybchenko void (*emco_fini)(efx_nic_t *); 4458a4fcbd4SAndrew Rybchenko efx_rc_t (*emco_feature_supported)(efx_nic_t *, 4468a4fcbd4SAndrew Rybchenko efx_mcdi_feature_id_t, boolean_t *); 4478a4fcbd4SAndrew Rybchenko void (*emco_get_timeout)(efx_nic_t *, efx_mcdi_req_t *, 4488a4fcbd4SAndrew Rybchenko uint32_t *); 4493c838a9fSAndrew Rybchenko } efx_mcdi_ops_t; 4503c838a9fSAndrew Rybchenko 4513c838a9fSAndrew Rybchenko typedef struct efx_mcdi_s { 452ec831f7fSAndrew Rybchenko const efx_mcdi_ops_t *em_emcop; 4533c838a9fSAndrew Rybchenko const efx_mcdi_transport_t *em_emtp; 4543c838a9fSAndrew Rybchenko efx_mcdi_iface_t em_emip; 4553c838a9fSAndrew Rybchenko } efx_mcdi_t; 4563c838a9fSAndrew Rybchenko 4573c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 4583c838a9fSAndrew Rybchenko 459e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM 460e948693eSPhilip Paeps typedef struct efx_nvram_ops_s { 461e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 462460cb568SAndrew Rybchenko efx_rc_t (*envo_test)(efx_nic_t *); 463e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 464bce88e31SAndrew Rybchenko efx_rc_t (*envo_type_to_partn)(efx_nic_t *, efx_nvram_type_t, 465bce88e31SAndrew Rybchenko uint32_t *); 46656bd83b0SAndrew Rybchenko efx_rc_t (*envo_partn_size)(efx_nic_t *, uint32_t, size_t *); 4675d846e87SAndrew Rybchenko efx_rc_t (*envo_partn_rw_start)(efx_nic_t *, uint32_t, size_t *); 4680afdf29cSAndrew Rybchenko efx_rc_t (*envo_partn_read)(efx_nic_t *, uint32_t, 4690afdf29cSAndrew Rybchenko unsigned int, caddr_t, size_t); 470b60ff840SAndrew Rybchenko efx_rc_t (*envo_partn_erase)(efx_nic_t *, uint32_t, 471b60ff840SAndrew Rybchenko unsigned int, size_t); 472134c4c4aSAndrew Rybchenko efx_rc_t (*envo_partn_write)(efx_nic_t *, uint32_t, 473134c4c4aSAndrew Rybchenko unsigned int, caddr_t, size_t); 474*a21b2f20SAndrew Rybchenko efx_rc_t (*envo_partn_rw_finish)(efx_nic_t *, uint32_t, 475*a21b2f20SAndrew Rybchenko uint32_t *); 47692187119SAndrew Rybchenko efx_rc_t (*envo_partn_get_version)(efx_nic_t *, uint32_t, 47792187119SAndrew Rybchenko uint32_t *, uint16_t *); 4786d0b856cSAndrew Rybchenko efx_rc_t (*envo_partn_set_version)(efx_nic_t *, uint32_t, 4796d0b856cSAndrew Rybchenko uint16_t *); 4805abce2b9SAndrew Rybchenko efx_rc_t (*envo_buffer_validate)(efx_nic_t *, uint32_t, 4815abce2b9SAndrew Rybchenko caddr_t, size_t); 482e948693eSPhilip Paeps } efx_nvram_ops_t; 483e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM */ 484e948693eSPhilip Paeps 485e948693eSPhilip Paeps #if EFSYS_OPT_VPD 486e948693eSPhilip Paeps typedef struct efx_vpd_ops_s { 487460cb568SAndrew Rybchenko efx_rc_t (*evpdo_init)(efx_nic_t *); 488460cb568SAndrew Rybchenko efx_rc_t (*evpdo_size)(efx_nic_t *, size_t *); 489460cb568SAndrew Rybchenko efx_rc_t (*evpdo_read)(efx_nic_t *, caddr_t, size_t); 490460cb568SAndrew Rybchenko efx_rc_t (*evpdo_verify)(efx_nic_t *, caddr_t, size_t); 491460cb568SAndrew Rybchenko efx_rc_t (*evpdo_reinit)(efx_nic_t *, caddr_t, size_t); 492460cb568SAndrew Rybchenko efx_rc_t (*evpdo_get)(efx_nic_t *, caddr_t, size_t, 493460cb568SAndrew Rybchenko efx_vpd_value_t *); 494460cb568SAndrew Rybchenko efx_rc_t (*evpdo_set)(efx_nic_t *, caddr_t, size_t, 495460cb568SAndrew Rybchenko efx_vpd_value_t *); 496460cb568SAndrew Rybchenko efx_rc_t (*evpdo_next)(efx_nic_t *, caddr_t, size_t, 497460cb568SAndrew Rybchenko efx_vpd_value_t *, unsigned int *); 498460cb568SAndrew Rybchenko efx_rc_t (*evpdo_write)(efx_nic_t *, caddr_t, size_t); 499e948693eSPhilip Paeps void (*evpdo_fini)(efx_nic_t *); 500e948693eSPhilip Paeps } efx_vpd_ops_t; 501e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 502e948693eSPhilip Paeps 5033c838a9fSAndrew Rybchenko #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 5043c838a9fSAndrew Rybchenko 505460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5063c838a9fSAndrew Rybchenko efx_mcdi_nvram_partitions( 5073c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5083c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5093c838a9fSAndrew Rybchenko __in size_t size, 5103c838a9fSAndrew Rybchenko __out unsigned int *npartnp); 5113c838a9fSAndrew Rybchenko 512460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5133c838a9fSAndrew Rybchenko efx_mcdi_nvram_metadata( 5143c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5153c838a9fSAndrew Rybchenko __in uint32_t partn, 5163c838a9fSAndrew Rybchenko __out uint32_t *subtypep, 5173c838a9fSAndrew Rybchenko __out_ecount(4) uint16_t version[4], 5183c838a9fSAndrew Rybchenko __out_bcount_opt(size) char *descp, 5193c838a9fSAndrew Rybchenko __in size_t size); 5203c838a9fSAndrew Rybchenko 521460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5223c838a9fSAndrew Rybchenko efx_mcdi_nvram_info( 5233c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5243c838a9fSAndrew Rybchenko __in uint32_t partn, 5253c838a9fSAndrew Rybchenko __out_opt size_t *sizep, 5263c838a9fSAndrew Rybchenko __out_opt uint32_t *addressp, 5279cb71b16SAndrew Rybchenko __out_opt uint32_t *erase_sizep, 5289cb71b16SAndrew Rybchenko __out_opt uint32_t *write_sizep); 5293c838a9fSAndrew Rybchenko 530460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5313c838a9fSAndrew Rybchenko efx_mcdi_nvram_update_start( 5323c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5333c838a9fSAndrew Rybchenko __in uint32_t partn); 5343c838a9fSAndrew Rybchenko 535460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5363c838a9fSAndrew Rybchenko efx_mcdi_nvram_read( 5373c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5383c838a9fSAndrew Rybchenko __in uint32_t partn, 5393c838a9fSAndrew Rybchenko __in uint32_t offset, 5403c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5419ad7e03fSAndrew Rybchenko __in size_t size, 5429ad7e03fSAndrew Rybchenko __in uint32_t mode); 5433c838a9fSAndrew Rybchenko 544460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5453c838a9fSAndrew Rybchenko efx_mcdi_nvram_erase( 5463c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5473c838a9fSAndrew Rybchenko __in uint32_t partn, 5483c838a9fSAndrew Rybchenko __in uint32_t offset, 5493c838a9fSAndrew Rybchenko __in size_t size); 5503c838a9fSAndrew Rybchenko 551460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5523c838a9fSAndrew Rybchenko efx_mcdi_nvram_write( 5533c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5543c838a9fSAndrew Rybchenko __in uint32_t partn, 5553c838a9fSAndrew Rybchenko __in uint32_t offset, 5563c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5573c838a9fSAndrew Rybchenko __in size_t size); 5583c838a9fSAndrew Rybchenko 559460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5603c838a9fSAndrew Rybchenko efx_mcdi_nvram_update_finish( 5613c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5623c838a9fSAndrew Rybchenko __in uint32_t partn, 563e9c123a5SAndrew Rybchenko __in boolean_t reboot, 564*a21b2f20SAndrew Rybchenko __out_opt uint32_t *verify_resultp); 5653c838a9fSAndrew Rybchenko 5663c838a9fSAndrew Rybchenko #if EFSYS_OPT_DIAG 5673c838a9fSAndrew Rybchenko 568460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5693c838a9fSAndrew Rybchenko efx_mcdi_nvram_test( 5703c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5713c838a9fSAndrew Rybchenko __in uint32_t partn); 5723c838a9fSAndrew Rybchenko 5733c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_DIAG */ 5743c838a9fSAndrew Rybchenko 5753c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 5763c838a9fSAndrew Rybchenko 5770c848230SAndrew Rybchenko #if EFSYS_OPT_LICENSING 5780c848230SAndrew Rybchenko 5790c848230SAndrew Rybchenko typedef struct efx_lic_ops_s { 5800c848230SAndrew Rybchenko efx_rc_t (*elo_update_licenses)(efx_nic_t *); 5810c848230SAndrew Rybchenko efx_rc_t (*elo_get_key_stats)(efx_nic_t *, efx_key_stats_t *); 5820c848230SAndrew Rybchenko efx_rc_t (*elo_app_state)(efx_nic_t *, uint64_t, boolean_t *); 5830c848230SAndrew Rybchenko efx_rc_t (*elo_get_id)(efx_nic_t *, size_t, uint32_t *, 5840c848230SAndrew Rybchenko size_t *, uint8_t *); 585fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_find_start) 586fc3a62cfSAndrew Rybchenko (efx_nic_t *, caddr_t, size_t, uint32_t *); 587fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_find_end)(efx_nic_t *, caddr_t, size_t, 588fc3a62cfSAndrew Rybchenko uint32_t, uint32_t *); 589fc3a62cfSAndrew Rybchenko boolean_t (*elo_find_key)(efx_nic_t *, caddr_t, size_t, 590fc3a62cfSAndrew Rybchenko uint32_t, uint32_t *, uint32_t *); 591fc3a62cfSAndrew Rybchenko boolean_t (*elo_validate_key)(efx_nic_t *, 592fc3a62cfSAndrew Rybchenko caddr_t, uint32_t); 593fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_read_key)(efx_nic_t *, 594fc3a62cfSAndrew Rybchenko caddr_t, size_t, uint32_t, uint32_t, 595fc3a62cfSAndrew Rybchenko caddr_t, size_t, uint32_t *); 596fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_write_key)(efx_nic_t *, 597fc3a62cfSAndrew Rybchenko caddr_t, size_t, uint32_t, 598fc3a62cfSAndrew Rybchenko caddr_t, uint32_t, uint32_t *); 599fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_delete_key)(efx_nic_t *, 600fc3a62cfSAndrew Rybchenko caddr_t, size_t, uint32_t, 601fc3a62cfSAndrew Rybchenko uint32_t, uint32_t, uint32_t *); 602fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_create_partition)(efx_nic_t *, 603fc3a62cfSAndrew Rybchenko caddr_t, size_t); 604fc3a62cfSAndrew Rybchenko efx_rc_t (*elo_finish_partition)(efx_nic_t *, 605fc3a62cfSAndrew Rybchenko caddr_t, size_t); 6060c848230SAndrew Rybchenko } efx_lic_ops_t; 6070c848230SAndrew Rybchenko 6080c848230SAndrew Rybchenko #endif 6090c848230SAndrew Rybchenko 6103c838a9fSAndrew Rybchenko typedef struct efx_drv_cfg_s { 6113c838a9fSAndrew Rybchenko uint32_t edc_min_vi_count; 6123c838a9fSAndrew Rybchenko uint32_t edc_max_vi_count; 6133c838a9fSAndrew Rybchenko 6143c838a9fSAndrew Rybchenko uint32_t edc_max_piobuf_count; 6153c838a9fSAndrew Rybchenko uint32_t edc_pio_alloc_size; 6163c838a9fSAndrew Rybchenko } efx_drv_cfg_t; 6173c838a9fSAndrew Rybchenko 618e948693eSPhilip Paeps struct efx_nic_s { 619e948693eSPhilip Paeps uint32_t en_magic; 620e948693eSPhilip Paeps efx_family_t en_family; 621e948693eSPhilip Paeps uint32_t en_features; 622e948693eSPhilip Paeps efsys_identifier_t *en_esip; 623e948693eSPhilip Paeps efsys_lock_t *en_eslp; 624e948693eSPhilip Paeps efsys_bar_t *en_esbp; 625e948693eSPhilip Paeps unsigned int en_mod_flags; 626e948693eSPhilip Paeps unsigned int en_reset_flags; 627e948693eSPhilip Paeps efx_nic_cfg_t en_nic_cfg; 6283c838a9fSAndrew Rybchenko efx_drv_cfg_t en_drv_cfg; 629e948693eSPhilip Paeps efx_port_t en_port; 630e948693eSPhilip Paeps efx_mon_t en_mon; 631e948693eSPhilip Paeps efx_intr_t en_intr; 632e948693eSPhilip Paeps uint32_t en_ev_qcount; 633e948693eSPhilip Paeps uint32_t en_rx_qcount; 634e948693eSPhilip Paeps uint32_t en_tx_qcount; 635ec831f7fSAndrew Rybchenko const efx_nic_ops_t *en_enop; 636ec831f7fSAndrew Rybchenko const efx_ev_ops_t *en_eevop; 637ec831f7fSAndrew Rybchenko const efx_tx_ops_t *en_etxop; 638ec831f7fSAndrew Rybchenko const efx_rx_ops_t *en_erxop; 639e948693eSPhilip Paeps #if EFSYS_OPT_FILTER 640e948693eSPhilip Paeps efx_filter_t en_filter; 641ec831f7fSAndrew Rybchenko const efx_filter_ops_t *en_efop; 642e948693eSPhilip Paeps #endif /* EFSYS_OPT_FILTER */ 6433c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 6443c838a9fSAndrew Rybchenko efx_mcdi_t en_mcdi; 6453c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 646e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM 647e948693eSPhilip Paeps efx_nvram_type_t en_nvram_locked; 648ec831f7fSAndrew Rybchenko const efx_nvram_ops_t *en_envop; 649e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM */ 650e948693eSPhilip Paeps #if EFSYS_OPT_VPD 651ec831f7fSAndrew Rybchenko const efx_vpd_ops_t *en_evpdop; 652e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 6533c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCALE 6543c838a9fSAndrew Rybchenko efx_rx_hash_support_t en_hash_support; 65539023729SAndrew Rybchenko efx_rx_scale_context_type_t en_rss_context_type; 6563c838a9fSAndrew Rybchenko uint32_t en_rss_context; 6573c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_RX_SCALE */ 6583c838a9fSAndrew Rybchenko uint32_t en_vport_id; 6590c848230SAndrew Rybchenko #if EFSYS_OPT_LICENSING 660ec831f7fSAndrew Rybchenko const efx_lic_ops_t *en_elop; 6615df3232cSAndrew Rybchenko boolean_t en_licensing_supported; 6620c848230SAndrew Rybchenko #endif 663e948693eSPhilip Paeps union { 664e948693eSPhilip Paeps #if EFSYS_OPT_SIENA 665e948693eSPhilip Paeps struct { 666e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 667e948693eSPhilip Paeps unsigned int enu_partn_mask; 668e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ 669e948693eSPhilip Paeps #if EFSYS_OPT_VPD 670e948693eSPhilip Paeps caddr_t enu_svpd; 671e948693eSPhilip Paeps size_t enu_svpd_length; 672e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 6733c838a9fSAndrew Rybchenko int enu_unused; 674e948693eSPhilip Paeps } siena; 675e948693eSPhilip Paeps #endif /* EFSYS_OPT_SIENA */ 676e7119ad9SAndrew Rybchenko int enu_unused; 677e948693eSPhilip Paeps } en_u; 678e7119ad9SAndrew Rybchenko #if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) 679e7119ad9SAndrew Rybchenko union en_arch { 680e7119ad9SAndrew Rybchenko struct { 681e7119ad9SAndrew Rybchenko int ena_vi_base; 682e7119ad9SAndrew Rybchenko int ena_vi_count; 683426f453bSAndrew Rybchenko int ena_vi_shift; 684e7119ad9SAndrew Rybchenko #if EFSYS_OPT_VPD 685e7119ad9SAndrew Rybchenko caddr_t ena_svpd; 686e7119ad9SAndrew Rybchenko size_t ena_svpd_length; 687e7119ad9SAndrew Rybchenko #endif /* EFSYS_OPT_VPD */ 688e7119ad9SAndrew Rybchenko efx_piobuf_handle_t ena_piobuf_handle[EF10_MAX_PIOBUF_NBUFS]; 689e7119ad9SAndrew Rybchenko uint32_t ena_piobuf_count; 690e7119ad9SAndrew Rybchenko uint32_t ena_pio_alloc_map[EF10_MAX_PIOBUF_NBUFS]; 691e7119ad9SAndrew Rybchenko uint32_t ena_pio_write_vi_base; 692e7119ad9SAndrew Rybchenko /* Memory BAR mapping regions */ 693e7119ad9SAndrew Rybchenko uint32_t ena_uc_mem_map_offset; 694e7119ad9SAndrew Rybchenko size_t ena_uc_mem_map_size; 695e7119ad9SAndrew Rybchenko uint32_t ena_wc_mem_map_offset; 696e7119ad9SAndrew Rybchenko size_t ena_wc_mem_map_size; 697e7119ad9SAndrew Rybchenko } ef10; 698e7119ad9SAndrew Rybchenko } en_arch; 699e7119ad9SAndrew Rybchenko #endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */ 700e948693eSPhilip Paeps }; 701e948693eSPhilip Paeps 702e948693eSPhilip Paeps 703e948693eSPhilip Paeps #define EFX_NIC_MAGIC 0x02121996 704e948693eSPhilip Paeps 705e948693eSPhilip Paeps typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *, 706e948693eSPhilip Paeps const efx_ev_callbacks_t *, void *); 707e948693eSPhilip Paeps 7083c838a9fSAndrew Rybchenko typedef struct efx_evq_rxq_state_s { 7093c838a9fSAndrew Rybchenko unsigned int eers_rx_read_ptr; 7103c838a9fSAndrew Rybchenko unsigned int eers_rx_mask; 7118e0c4827SAndrew Rybchenko #if EFSYS_OPT_RX_PACKED_STREAM 7128e0c4827SAndrew Rybchenko unsigned int eers_rx_stream_npackets; 7138e0c4827SAndrew Rybchenko boolean_t eers_rx_packed_stream; 7148e0c4827SAndrew Rybchenko unsigned int eers_rx_packed_stream_credits; 7158e0c4827SAndrew Rybchenko #endif 7163c838a9fSAndrew Rybchenko } efx_evq_rxq_state_t; 7173c838a9fSAndrew Rybchenko 718e948693eSPhilip Paeps struct efx_evq_s { 719e948693eSPhilip Paeps uint32_t ee_magic; 720e948693eSPhilip Paeps efx_nic_t *ee_enp; 721e948693eSPhilip Paeps unsigned int ee_index; 722e948693eSPhilip Paeps unsigned int ee_mask; 723e948693eSPhilip Paeps efsys_mem_t *ee_esmp; 724e948693eSPhilip Paeps #if EFSYS_OPT_QSTATS 725e948693eSPhilip Paeps uint32_t ee_stat[EV_NQSTATS]; 726e948693eSPhilip Paeps #endif /* EFSYS_OPT_QSTATS */ 7273c838a9fSAndrew Rybchenko 7283c838a9fSAndrew Rybchenko efx_ev_handler_t ee_rx; 7293c838a9fSAndrew Rybchenko efx_ev_handler_t ee_tx; 7303c838a9fSAndrew Rybchenko efx_ev_handler_t ee_driver; 7313c838a9fSAndrew Rybchenko efx_ev_handler_t ee_global; 7323c838a9fSAndrew Rybchenko efx_ev_handler_t ee_drv_gen; 7333c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 7343c838a9fSAndrew Rybchenko efx_ev_handler_t ee_mcdi; 7353c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 7363c838a9fSAndrew Rybchenko 7373c838a9fSAndrew Rybchenko efx_evq_rxq_state_t ee_rxq_state[EFX_EV_RX_NLABELS]; 73882d2a148SAndrew Rybchenko 73982d2a148SAndrew Rybchenko uint32_t ee_flags; 740e948693eSPhilip Paeps }; 741e948693eSPhilip Paeps 742e948693eSPhilip Paeps #define EFX_EVQ_MAGIC 0x08081997 743e948693eSPhilip Paeps 744af9078c3SAndrew Rybchenko #define EFX_EVQ_SIENA_TIMER_QUANTUM_NS 6144 /* 768 cycles */ 745e948693eSPhilip Paeps 746e948693eSPhilip Paeps struct efx_rxq_s { 747e948693eSPhilip Paeps uint32_t er_magic; 748e948693eSPhilip Paeps efx_nic_t *er_enp; 7493c838a9fSAndrew Rybchenko efx_evq_t *er_eep; 750e948693eSPhilip Paeps unsigned int er_index; 7513c838a9fSAndrew Rybchenko unsigned int er_label; 752e948693eSPhilip Paeps unsigned int er_mask; 753e948693eSPhilip Paeps efsys_mem_t *er_esmp; 754e948693eSPhilip Paeps }; 755e948693eSPhilip Paeps 756e948693eSPhilip Paeps #define EFX_RXQ_MAGIC 0x15022005 757e948693eSPhilip Paeps 758e948693eSPhilip Paeps struct efx_txq_s { 759e948693eSPhilip Paeps uint32_t et_magic; 760e948693eSPhilip Paeps efx_nic_t *et_enp; 761e948693eSPhilip Paeps unsigned int et_index; 762e948693eSPhilip Paeps unsigned int et_mask; 763e948693eSPhilip Paeps efsys_mem_t *et_esmp; 7643c838a9fSAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON 7653c838a9fSAndrew Rybchenko uint32_t et_pio_bufnum; 7663c838a9fSAndrew Rybchenko uint32_t et_pio_blknum; 7673c838a9fSAndrew Rybchenko uint32_t et_pio_write_offset; 7683c838a9fSAndrew Rybchenko uint32_t et_pio_offset; 7693c838a9fSAndrew Rybchenko size_t et_pio_size; 7703c838a9fSAndrew Rybchenko #endif 771e948693eSPhilip Paeps #if EFSYS_OPT_QSTATS 772e948693eSPhilip Paeps uint32_t et_stat[TX_NQSTATS]; 773e948693eSPhilip Paeps #endif /* EFSYS_OPT_QSTATS */ 774e948693eSPhilip Paeps }; 775e948693eSPhilip Paeps 776e948693eSPhilip Paeps #define EFX_TXQ_MAGIC 0x05092005 777e948693eSPhilip Paeps 778e948693eSPhilip Paeps #define EFX_MAC_ADDR_COPY(_dst, _src) \ 779e948693eSPhilip Paeps do { \ 780e948693eSPhilip Paeps (_dst)[0] = (_src)[0]; \ 781e948693eSPhilip Paeps (_dst)[1] = (_src)[1]; \ 782e948693eSPhilip Paeps (_dst)[2] = (_src)[2]; \ 783e948693eSPhilip Paeps (_dst)[3] = (_src)[3]; \ 784e948693eSPhilip Paeps (_dst)[4] = (_src)[4]; \ 785e948693eSPhilip Paeps (_dst)[5] = (_src)[5]; \ 786e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 787e948693eSPhilip Paeps } while (B_FALSE) 788e948693eSPhilip Paeps 7893c838a9fSAndrew Rybchenko #define EFX_MAC_BROADCAST_ADDR_SET(_dst) \ 7903c838a9fSAndrew Rybchenko do { \ 7913c838a9fSAndrew Rybchenko uint16_t *_d = (uint16_t *)(_dst); \ 7923c838a9fSAndrew Rybchenko _d[0] = 0xffff; \ 7933c838a9fSAndrew Rybchenko _d[1] = 0xffff; \ 7943c838a9fSAndrew Rybchenko _d[2] = 0xffff; \ 7953c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 7963c838a9fSAndrew Rybchenko } while (B_FALSE) 7973c838a9fSAndrew Rybchenko 798e948693eSPhilip Paeps #if EFSYS_OPT_CHECK_REG 799e948693eSPhilip Paeps #define EFX_CHECK_REG(_enp, _reg) \ 800e948693eSPhilip Paeps do { \ 8013c838a9fSAndrew Rybchenko const char *name = #_reg; \ 802e948693eSPhilip Paeps char min = name[4]; \ 803e948693eSPhilip Paeps char max = name[5]; \ 804e948693eSPhilip Paeps char rev; \ 805e948693eSPhilip Paeps \ 806e948693eSPhilip Paeps switch ((_enp)->en_family) { \ 807e948693eSPhilip Paeps case EFX_FAMILY_SIENA: \ 808e948693eSPhilip Paeps rev = 'C'; \ 809e948693eSPhilip Paeps break; \ 810e948693eSPhilip Paeps \ 8113c838a9fSAndrew Rybchenko case EFX_FAMILY_HUNTINGTON: \ 8123c838a9fSAndrew Rybchenko rev = 'D'; \ 8133c838a9fSAndrew Rybchenko break; \ 8143c838a9fSAndrew Rybchenko \ 81534f6ea29SAndrew Rybchenko case EFX_FAMILY_MEDFORD: \ 81634f6ea29SAndrew Rybchenko rev = 'E'; \ 81734f6ea29SAndrew Rybchenko break; \ 81834f6ea29SAndrew Rybchenko \ 819e948693eSPhilip Paeps default: \ 820e948693eSPhilip Paeps rev = '?'; \ 821e948693eSPhilip Paeps break; \ 822e948693eSPhilip Paeps } \ 823e948693eSPhilip Paeps \ 824e948693eSPhilip Paeps EFSYS_ASSERT3S(rev, >=, min); \ 825e948693eSPhilip Paeps EFSYS_ASSERT3S(rev, <=, max); \ 826e948693eSPhilip Paeps \ 827e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 828e948693eSPhilip Paeps } while (B_FALSE) 829e948693eSPhilip Paeps #else 830e948693eSPhilip Paeps #define EFX_CHECK_REG(_enp, _reg) do { \ 831e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 832e948693eSPhilip Paeps } while (B_FALSE) 833e948693eSPhilip Paeps #endif 834e948693eSPhilip Paeps 835e948693eSPhilip Paeps #define EFX_BAR_READD(_enp, _reg, _edp, _lock) \ 836e948693eSPhilip Paeps do { \ 837e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 838e948693eSPhilip Paeps EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST, \ 839e948693eSPhilip Paeps (_edp), (_lock)); \ 840e948693eSPhilip Paeps EFSYS_PROBE3(efx_bar_readd, const char *, #_reg, \ 841e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 842e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 843e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 844e948693eSPhilip Paeps } while (B_FALSE) 845e948693eSPhilip Paeps 846e948693eSPhilip Paeps #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock) \ 847e948693eSPhilip Paeps do { \ 848e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 849e948693eSPhilip Paeps EFSYS_PROBE3(efx_bar_writed, const char *, #_reg, \ 850e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 851e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 852e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST, \ 853e948693eSPhilip Paeps (_edp), (_lock)); \ 854e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 855e948693eSPhilip Paeps } while (B_FALSE) 856e948693eSPhilip Paeps 857e948693eSPhilip Paeps #define EFX_BAR_READQ(_enp, _reg, _eqp) \ 858e948693eSPhilip Paeps do { \ 859e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 860e948693eSPhilip Paeps EFSYS_BAR_READQ((_enp)->en_esbp, _reg ## _OFST, \ 861e948693eSPhilip Paeps (_eqp)); \ 862e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_readq, const char *, #_reg, \ 863e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 864e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 865e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 866e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 867e948693eSPhilip Paeps } while (B_FALSE) 868e948693eSPhilip Paeps 869e948693eSPhilip Paeps #define EFX_BAR_WRITEQ(_enp, _reg, _eqp) \ 870e948693eSPhilip Paeps do { \ 871e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 872e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_writeq, const char *, #_reg, \ 873e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 874e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 875e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 876e948693eSPhilip Paeps EFSYS_BAR_WRITEQ((_enp)->en_esbp, _reg ## _OFST, \ 877e948693eSPhilip Paeps (_eqp)); \ 878e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 879e948693eSPhilip Paeps } while (B_FALSE) 880e948693eSPhilip Paeps 881e948693eSPhilip Paeps #define EFX_BAR_READO(_enp, _reg, _eop) \ 882e948693eSPhilip Paeps do { \ 883e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 884e948693eSPhilip Paeps EFSYS_BAR_READO((_enp)->en_esbp, _reg ## _OFST, \ 885e948693eSPhilip Paeps (_eop), B_TRUE); \ 886e948693eSPhilip Paeps EFSYS_PROBE6(efx_bar_reado, const char *, #_reg, \ 887e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 888e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 889e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 890e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 891e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 892e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 893e948693eSPhilip Paeps } while (B_FALSE) 894e948693eSPhilip Paeps 895e948693eSPhilip Paeps #define EFX_BAR_WRITEO(_enp, _reg, _eop) \ 896e948693eSPhilip Paeps do { \ 897e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 898e948693eSPhilip Paeps EFSYS_PROBE6(efx_bar_writeo, const char *, #_reg, \ 899e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 900e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 901e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 902e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 903e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 904e948693eSPhilip Paeps EFSYS_BAR_WRITEO((_enp)->en_esbp, _reg ## _OFST, \ 905e948693eSPhilip Paeps (_eop), B_TRUE); \ 906e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 907e948693eSPhilip Paeps } while (B_FALSE) 908e948693eSPhilip Paeps 909e948693eSPhilip Paeps #define EFX_BAR_TBL_READD(_enp, _reg, _index, _edp, _lock) \ 910e948693eSPhilip Paeps do { \ 911e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 912e948693eSPhilip Paeps EFSYS_BAR_READD((_enp)->en_esbp, \ 913e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 914e948693eSPhilip Paeps (_edp), (_lock)); \ 915e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_readd, const char *, #_reg, \ 916e948693eSPhilip Paeps uint32_t, (_index), \ 917e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 918e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 919e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 920e948693eSPhilip Paeps } while (B_FALSE) 921e948693eSPhilip Paeps 922e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITED(_enp, _reg, _index, _edp, _lock) \ 923e948693eSPhilip Paeps do { \ 924e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 925e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 926e948693eSPhilip Paeps uint32_t, (_index), \ 927e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 928e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 929e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, \ 930e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 931e948693eSPhilip Paeps (_edp), (_lock)); \ 932e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 933e948693eSPhilip Paeps } while (B_FALSE) 934e948693eSPhilip Paeps 9353c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_WRITED2(_enp, _reg, _index, _edp, _lock) \ 9363c838a9fSAndrew Rybchenko do { \ 9373c838a9fSAndrew Rybchenko EFX_CHECK_REG((_enp), (_reg)); \ 9383c838a9fSAndrew Rybchenko EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 9393c838a9fSAndrew Rybchenko uint32_t, (_index), \ 9403c838a9fSAndrew Rybchenko uint32_t, _reg ## _OFST, \ 9413c838a9fSAndrew Rybchenko uint32_t, (_edp)->ed_u32[0]); \ 9423c838a9fSAndrew Rybchenko EFSYS_BAR_WRITED((_enp)->en_esbp, \ 9433c838a9fSAndrew Rybchenko (_reg ## _OFST + \ 9443c838a9fSAndrew Rybchenko (2 * sizeof (efx_dword_t)) + \ 9453c838a9fSAndrew Rybchenko ((_index) * _reg ## _STEP)), \ 9463c838a9fSAndrew Rybchenko (_edp), (_lock)); \ 9473c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 9483c838a9fSAndrew Rybchenko } while (B_FALSE) 9493c838a9fSAndrew Rybchenko 950e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITED3(_enp, _reg, _index, _edp, _lock) \ 951e948693eSPhilip Paeps do { \ 952e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 953e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 954e948693eSPhilip Paeps uint32_t, (_index), \ 955e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 956e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 957e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, \ 958e948693eSPhilip Paeps (_reg ## _OFST + \ 959e948693eSPhilip Paeps (3 * sizeof (efx_dword_t)) + \ 960e948693eSPhilip Paeps ((_index) * _reg ## _STEP)), \ 961e948693eSPhilip Paeps (_edp), (_lock)); \ 962e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 963e948693eSPhilip Paeps } while (B_FALSE) 964e948693eSPhilip Paeps 965e948693eSPhilip Paeps #define EFX_BAR_TBL_READQ(_enp, _reg, _index, _eqp) \ 966e948693eSPhilip Paeps do { \ 967e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 968e948693eSPhilip Paeps EFSYS_BAR_READQ((_enp)->en_esbp, \ 969e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 970e948693eSPhilip Paeps (_eqp)); \ 971e948693eSPhilip Paeps EFSYS_PROBE5(efx_bar_tbl_readq, const char *, #_reg, \ 972e948693eSPhilip Paeps uint32_t, (_index), \ 973e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 974e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 975e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 976e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 977e948693eSPhilip Paeps } while (B_FALSE) 978e948693eSPhilip Paeps 979e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITEQ(_enp, _reg, _index, _eqp) \ 980e948693eSPhilip Paeps do { \ 981e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 982e948693eSPhilip Paeps EFSYS_PROBE5(efx_bar_tbl_writeq, const char *, #_reg, \ 983e948693eSPhilip Paeps uint32_t, (_index), \ 984e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 985e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 986e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 987e948693eSPhilip Paeps EFSYS_BAR_WRITEQ((_enp)->en_esbp, \ 988e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 989e948693eSPhilip Paeps (_eqp)); \ 990e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 991e948693eSPhilip Paeps } while (B_FALSE) 992e948693eSPhilip Paeps 9933c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop, _lock) \ 994e948693eSPhilip Paeps do { \ 995e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 996e948693eSPhilip Paeps EFSYS_BAR_READO((_enp)->en_esbp, \ 997e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 9983c838a9fSAndrew Rybchenko (_eop), (_lock)); \ 999e948693eSPhilip Paeps EFSYS_PROBE7(efx_bar_tbl_reado, const char *, #_reg, \ 1000e948693eSPhilip Paeps uint32_t, (_index), \ 1001e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 1002e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 1003e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 1004e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 1005e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 1006e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 1007e948693eSPhilip Paeps } while (B_FALSE) 1008e948693eSPhilip Paeps 10093c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop, _lock) \ 1010e948693eSPhilip Paeps do { \ 1011e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 1012e948693eSPhilip Paeps EFSYS_PROBE7(efx_bar_tbl_writeo, const char *, #_reg, \ 1013e948693eSPhilip Paeps uint32_t, (_index), \ 1014e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 1015e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 1016e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 1017e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 1018e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 1019e948693eSPhilip Paeps EFSYS_BAR_WRITEO((_enp)->en_esbp, \ 1020e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 10213c838a9fSAndrew Rybchenko (_eop), (_lock)); \ 10223c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 10233c838a9fSAndrew Rybchenko } while (B_FALSE) 10243c838a9fSAndrew Rybchenko 10253c838a9fSAndrew Rybchenko /* 10263c838a9fSAndrew Rybchenko * Allow drivers to perform optimised 128-bit doorbell writes. 10273c838a9fSAndrew Rybchenko * The DMA descriptor pointers (RX_DESC_UPD and TX_DESC_UPD) are 10283c838a9fSAndrew Rybchenko * special-cased in the BIU on the Falcon/Siena and EF10 architectures to avoid 10293c838a9fSAndrew Rybchenko * the need for locking in the host, and are the only ones known to be safe to 10303c838a9fSAndrew Rybchenko * use 128-bites write with. 10313c838a9fSAndrew Rybchenko */ 10323c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_DOORBELL_WRITEO(_enp, _reg, _index, _eop) \ 10333c838a9fSAndrew Rybchenko do { \ 10343c838a9fSAndrew Rybchenko EFX_CHECK_REG((_enp), (_reg)); \ 10353c838a9fSAndrew Rybchenko EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo, \ 10363c838a9fSAndrew Rybchenko const char *, \ 10373c838a9fSAndrew Rybchenko #_reg, \ 10383c838a9fSAndrew Rybchenko uint32_t, (_index), \ 10393c838a9fSAndrew Rybchenko uint32_t, _reg ## _OFST, \ 10403c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[3], \ 10413c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[2], \ 10423c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[1], \ 10433c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[0]); \ 10443c838a9fSAndrew Rybchenko EFSYS_BAR_DOORBELL_WRITEO((_enp)->en_esbp, \ 10453c838a9fSAndrew Rybchenko (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 10463c838a9fSAndrew Rybchenko (_eop)); \ 10473c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 10483c838a9fSAndrew Rybchenko } while (B_FALSE) 10493c838a9fSAndrew Rybchenko 10503c838a9fSAndrew Rybchenko #define EFX_DMA_SYNC_QUEUE_FOR_DEVICE(_esmp, _entries, _wptr, _owptr) \ 10513c838a9fSAndrew Rybchenko do { \ 10523c838a9fSAndrew Rybchenko unsigned int _new = (_wptr); \ 10533c838a9fSAndrew Rybchenko unsigned int _old = (_owptr); \ 10543c838a9fSAndrew Rybchenko \ 10553c838a9fSAndrew Rybchenko if ((_new) >= (_old)) \ 10563c838a9fSAndrew Rybchenko EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ 10573c838a9fSAndrew Rybchenko (_old) * sizeof (efx_desc_t), \ 10583c838a9fSAndrew Rybchenko ((_new) - (_old)) * sizeof (efx_desc_t)); \ 10593c838a9fSAndrew Rybchenko else \ 10603c838a9fSAndrew Rybchenko /* \ 10613c838a9fSAndrew Rybchenko * It is cheaper to sync entire map than sync \ 10623c838a9fSAndrew Rybchenko * two parts especially when offset/size are \ 10633c838a9fSAndrew Rybchenko * ignored and entire map is synced in any case.\ 10643c838a9fSAndrew Rybchenko */ \ 10653c838a9fSAndrew Rybchenko EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ 10663c838a9fSAndrew Rybchenko 0, \ 10673c838a9fSAndrew Rybchenko (_entries) * sizeof (efx_desc_t)); \ 1068e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 1069e948693eSPhilip Paeps } while (B_FALSE) 1070e948693eSPhilip Paeps 1071460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 10723c838a9fSAndrew Rybchenko efx_nic_biu_test( 10733c838a9fSAndrew Rybchenko __in efx_nic_t *enp); 10743c838a9fSAndrew Rybchenko 1075460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1076e948693eSPhilip Paeps efx_mac_select( 1077e948693eSPhilip Paeps __in efx_nic_t *enp); 1078e948693eSPhilip Paeps 10793c838a9fSAndrew Rybchenko extern void 10803c838a9fSAndrew Rybchenko efx_mac_multicast_hash_compute( 10813c838a9fSAndrew Rybchenko __in_ecount(6*count) uint8_t const *addrs, 10823c838a9fSAndrew Rybchenko __in int count, 10833c838a9fSAndrew Rybchenko __out efx_oword_t *hash_low, 10843c838a9fSAndrew Rybchenko __out efx_oword_t *hash_high); 10853c838a9fSAndrew Rybchenko 1086460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1087e948693eSPhilip Paeps efx_phy_probe( 1088e948693eSPhilip Paeps __in efx_nic_t *enp); 1089e948693eSPhilip Paeps 1090e948693eSPhilip Paeps extern void 1091e948693eSPhilip Paeps efx_phy_unprobe( 1092e948693eSPhilip Paeps __in efx_nic_t *enp); 1093e948693eSPhilip Paeps 1094e948693eSPhilip Paeps #if EFSYS_OPT_VPD 1095e948693eSPhilip Paeps 1096e948693eSPhilip Paeps /* VPD utility functions */ 1097e948693eSPhilip Paeps 1098460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1099e948693eSPhilip Paeps efx_vpd_hunk_length( 1100e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1101e948693eSPhilip Paeps __in size_t size, 1102e948693eSPhilip Paeps __out size_t *lengthp); 1103e948693eSPhilip Paeps 1104460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1105e948693eSPhilip Paeps efx_vpd_hunk_verify( 1106e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1107e948693eSPhilip Paeps __in size_t size, 1108e948693eSPhilip Paeps __out_opt boolean_t *cksummedp); 1109e948693eSPhilip Paeps 1110460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1111e948693eSPhilip Paeps efx_vpd_hunk_reinit( 11123c838a9fSAndrew Rybchenko __in_bcount(size) caddr_t data, 1113e948693eSPhilip Paeps __in size_t size, 1114e948693eSPhilip Paeps __in boolean_t wantpid); 1115e948693eSPhilip Paeps 1116460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1117e948693eSPhilip Paeps efx_vpd_hunk_get( 1118e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1119e948693eSPhilip Paeps __in size_t size, 1120e948693eSPhilip Paeps __in efx_vpd_tag_t tag, 1121e948693eSPhilip Paeps __in efx_vpd_keyword_t keyword, 1122e948693eSPhilip Paeps __out unsigned int *payloadp, 1123e948693eSPhilip Paeps __out uint8_t *paylenp); 1124e948693eSPhilip Paeps 1125460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1126e948693eSPhilip Paeps efx_vpd_hunk_next( 1127e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1128e948693eSPhilip Paeps __in size_t size, 1129e948693eSPhilip Paeps __out efx_vpd_tag_t *tagp, 1130e948693eSPhilip Paeps __out efx_vpd_keyword_t *keyword, 113186ec4b85SAndrew Rybchenko __out_opt unsigned int *payloadp, 1132e948693eSPhilip Paeps __out_opt uint8_t *paylenp, 1133e948693eSPhilip Paeps __inout unsigned int *contp); 1134e948693eSPhilip Paeps 1135460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1136e948693eSPhilip Paeps efx_vpd_hunk_set( 1137e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1138e948693eSPhilip Paeps __in size_t size, 1139e948693eSPhilip Paeps __in efx_vpd_value_t *evvp); 1140e948693eSPhilip Paeps 1141e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 1142e948693eSPhilip Paeps 1143e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 1144e948693eSPhilip Paeps 11453c838a9fSAndrew Rybchenko extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 1146e948693eSPhilip Paeps 1147e948693eSPhilip Paeps typedef struct efx_register_set_s { 1148e948693eSPhilip Paeps unsigned int address; 1149e948693eSPhilip Paeps unsigned int step; 1150e948693eSPhilip Paeps unsigned int rows; 1151e948693eSPhilip Paeps efx_oword_t mask; 1152e948693eSPhilip Paeps } efx_register_set_t; 1153e948693eSPhilip Paeps 1154460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1155e948693eSPhilip Paeps efx_nic_test_registers( 1156e948693eSPhilip Paeps __in efx_nic_t *enp, 1157e948693eSPhilip Paeps __in efx_register_set_t *rsp, 1158e948693eSPhilip Paeps __in size_t count); 1159e948693eSPhilip Paeps 1160460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1161e948693eSPhilip Paeps efx_nic_test_tables( 1162e948693eSPhilip Paeps __in efx_nic_t *enp, 1163e948693eSPhilip Paeps __in efx_register_set_t *rsp, 1164e948693eSPhilip Paeps __in efx_pattern_type_t pattern, 1165e948693eSPhilip Paeps __in size_t count); 1166e948693eSPhilip Paeps 1167e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 1168e948693eSPhilip Paeps 11693c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 11703c838a9fSAndrew Rybchenko 1171460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 11723c838a9fSAndrew Rybchenko efx_mcdi_set_workaround( 11733c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 11743c838a9fSAndrew Rybchenko __in uint32_t type, 11753c838a9fSAndrew Rybchenko __in boolean_t enabled, 11763c838a9fSAndrew Rybchenko __out_opt uint32_t *flagsp); 11773c838a9fSAndrew Rybchenko 1178460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 11793c838a9fSAndrew Rybchenko efx_mcdi_get_workarounds( 11803c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 11813c838a9fSAndrew Rybchenko __out_opt uint32_t *implementedp, 11823c838a9fSAndrew Rybchenko __out_opt uint32_t *enabledp); 11833c838a9fSAndrew Rybchenko 11843c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 11853c838a9fSAndrew Rybchenko 118658a72cb2SAndrew Rybchenko #if EFSYS_OPT_MAC_STATS 118758a72cb2SAndrew Rybchenko 118858a72cb2SAndrew Rybchenko /* 118958a72cb2SAndrew Rybchenko * Closed range of stats (i.e. the first and the last are included). 119058a72cb2SAndrew Rybchenko * The last must be greater or equal (if the range is one item only) to 119158a72cb2SAndrew Rybchenko * the first. 119258a72cb2SAndrew Rybchenko */ 119358a72cb2SAndrew Rybchenko struct efx_mac_stats_range { 119458a72cb2SAndrew Rybchenko efx_mac_stat_t first; 119558a72cb2SAndrew Rybchenko efx_mac_stat_t last; 119658a72cb2SAndrew Rybchenko }; 119758a72cb2SAndrew Rybchenko 119858a72cb2SAndrew Rybchenko extern efx_rc_t 119958a72cb2SAndrew Rybchenko efx_mac_stats_mask_add_ranges( 120058a72cb2SAndrew Rybchenko __inout_bcount(mask_size) uint32_t *maskp, 120158a72cb2SAndrew Rybchenko __in size_t mask_size, 120258a72cb2SAndrew Rybchenko __in_ecount(rng_count) const struct efx_mac_stats_range *rngp, 120358a72cb2SAndrew Rybchenko __in unsigned int rng_count); 120458a72cb2SAndrew Rybchenko 120558a72cb2SAndrew Rybchenko #endif /* EFSYS_OPT_MAC_STATS */ 120658a72cb2SAndrew Rybchenko 1207e948693eSPhilip Paeps #ifdef __cplusplus 1208e948693eSPhilip Paeps } 1209e948693eSPhilip Paeps #endif 1210e948693eSPhilip Paeps 1211e948693eSPhilip Paeps #endif /* _SYS_EFX_IMPL_H */ 1212