1e948693eSPhilip Paeps /*- 23c838a9fSAndrew Rybchenko * Copyright (c) 2007-2015 Solarflare Communications Inc. 33c838a9fSAndrew Rybchenko * All rights reserved. 4e948693eSPhilip Paeps * 5e948693eSPhilip Paeps * Redistribution and use in source and binary forms, with or without 63c838a9fSAndrew Rybchenko * modification, are permitted provided that the following conditions are met: 7e948693eSPhilip Paeps * 83c838a9fSAndrew Rybchenko * 1. Redistributions of source code must retain the above copyright notice, 93c838a9fSAndrew Rybchenko * this list of conditions and the following disclaimer. 103c838a9fSAndrew Rybchenko * 2. Redistributions in binary form must reproduce the above copyright notice, 113c838a9fSAndrew Rybchenko * this list of conditions and the following disclaimer in the documentation 123c838a9fSAndrew Rybchenko * and/or other materials provided with the distribution. 133c838a9fSAndrew Rybchenko * 143c838a9fSAndrew Rybchenko * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 153c838a9fSAndrew Rybchenko * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 163c838a9fSAndrew Rybchenko * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 173c838a9fSAndrew Rybchenko * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 183c838a9fSAndrew Rybchenko * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 193c838a9fSAndrew Rybchenko * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 203c838a9fSAndrew Rybchenko * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 213c838a9fSAndrew Rybchenko * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 223c838a9fSAndrew Rybchenko * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 233c838a9fSAndrew Rybchenko * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 243c838a9fSAndrew Rybchenko * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 253c838a9fSAndrew Rybchenko * 263c838a9fSAndrew Rybchenko * The views and conclusions contained in the software and documentation are 273c838a9fSAndrew Rybchenko * those of the authors and should not be interpreted as representing official 283c838a9fSAndrew Rybchenko * policies, either expressed or implied, of the FreeBSD Project. 295dee87d7SPhilip Paeps * 305dee87d7SPhilip Paeps * $FreeBSD$ 31e948693eSPhilip Paeps */ 32e948693eSPhilip Paeps 33e948693eSPhilip Paeps #ifndef _SYS_EFX_IMPL_H 34e948693eSPhilip Paeps #define _SYS_EFX_IMPL_H 35e948693eSPhilip Paeps 36e948693eSPhilip Paeps #include "efsys.h" 37e948693eSPhilip Paeps #include "efx.h" 38e948693eSPhilip Paeps #include "efx_regs.h" 393c838a9fSAndrew Rybchenko #include "efx_regs_ef10.h" 403c838a9fSAndrew Rybchenko 413c838a9fSAndrew Rybchenko /* FIXME: Add definition for driver generated software events */ 423c838a9fSAndrew Rybchenko #ifndef ESE_DZ_EV_CODE_DRV_GEN_EV 433c838a9fSAndrew Rybchenko #define ESE_DZ_EV_CODE_DRV_GEN_EV FSE_AZ_EV_CODE_DRV_GEN_EV 443c838a9fSAndrew Rybchenko #endif 453c838a9fSAndrew Rybchenko 463c838a9fSAndrew Rybchenko #include "efx_check.h" 473c838a9fSAndrew Rybchenko 48e948693eSPhilip Paeps 49e948693eSPhilip Paeps #if EFSYS_OPT_FALCON 50e948693eSPhilip Paeps #include "falcon_impl.h" 51e948693eSPhilip Paeps #endif /* EFSYS_OPT_FALCON */ 52e948693eSPhilip Paeps 53e948693eSPhilip Paeps #if EFSYS_OPT_SIENA 54e948693eSPhilip Paeps #include "siena_impl.h" 55e948693eSPhilip Paeps #endif /* EFSYS_OPT_SIENA */ 56e948693eSPhilip Paeps 573c838a9fSAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON 583c838a9fSAndrew Rybchenko #include "hunt_impl.h" 593c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_HUNTINGTON */ 603c838a9fSAndrew Rybchenko 615f5c71ccSAndrew Rybchenko #if EFSYS_OPT_MEDFORD 625f5c71ccSAndrew Rybchenko #include "medford_impl.h" 635f5c71ccSAndrew Rybchenko #endif /* EFSYS_OPT_MEDFORD */ 645f5c71ccSAndrew Rybchenko 655f5c71ccSAndrew Rybchenko #if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) 665f5c71ccSAndrew Rybchenko #include "ef10_impl.h" 675f5c71ccSAndrew Rybchenko #endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */ 685f5c71ccSAndrew Rybchenko 69e948693eSPhilip Paeps #ifdef __cplusplus 70e948693eSPhilip Paeps extern "C" { 71e948693eSPhilip Paeps #endif 72e948693eSPhilip Paeps 73e948693eSPhilip Paeps #define EFX_MOD_MCDI 0x00000001 74e948693eSPhilip Paeps #define EFX_MOD_PROBE 0x00000002 75e948693eSPhilip Paeps #define EFX_MOD_NVRAM 0x00000004 76e948693eSPhilip Paeps #define EFX_MOD_VPD 0x00000008 77e948693eSPhilip Paeps #define EFX_MOD_NIC 0x00000010 78e948693eSPhilip Paeps #define EFX_MOD_INTR 0x00000020 79e948693eSPhilip Paeps #define EFX_MOD_EV 0x00000040 80e948693eSPhilip Paeps #define EFX_MOD_RX 0x00000080 81e948693eSPhilip Paeps #define EFX_MOD_TX 0x00000100 82e948693eSPhilip Paeps #define EFX_MOD_PORT 0x00000200 83e948693eSPhilip Paeps #define EFX_MOD_MON 0x00000400 84e948693eSPhilip Paeps #define EFX_MOD_WOL 0x00000800 85e948693eSPhilip Paeps #define EFX_MOD_FILTER 0x00001000 863c838a9fSAndrew Rybchenko #define EFX_MOD_PKTFILTER 0x00002000 870c848230SAndrew Rybchenko #define EFX_MOD_LIC 0x00004000 88e948693eSPhilip Paeps 89e948693eSPhilip Paeps #define EFX_RESET_MAC 0x00000001 90e948693eSPhilip Paeps #define EFX_RESET_PHY 0x00000002 913c838a9fSAndrew Rybchenko #define EFX_RESET_RXQ_ERR 0x00000004 923c838a9fSAndrew Rybchenko #define EFX_RESET_TXQ_ERR 0x00000008 93e948693eSPhilip Paeps 94e948693eSPhilip Paeps typedef enum efx_mac_type_e { 95e948693eSPhilip Paeps EFX_MAC_INVALID = 0, 96e948693eSPhilip Paeps EFX_MAC_FALCON_GMAC, 97e948693eSPhilip Paeps EFX_MAC_FALCON_XMAC, 98e948693eSPhilip Paeps EFX_MAC_SIENA, 993c838a9fSAndrew Rybchenko EFX_MAC_HUNTINGTON, 100c15d6d21SAndrew Rybchenko EFX_MAC_MEDFORD, 101e948693eSPhilip Paeps EFX_MAC_NTYPES 102e948693eSPhilip Paeps } efx_mac_type_t; 103e948693eSPhilip Paeps 1043c838a9fSAndrew Rybchenko typedef struct efx_ev_ops_s { 105460cb568SAndrew Rybchenko efx_rc_t (*eevo_init)(efx_nic_t *); 1063c838a9fSAndrew Rybchenko void (*eevo_fini)(efx_nic_t *); 107460cb568SAndrew Rybchenko efx_rc_t (*eevo_qcreate)(efx_nic_t *, unsigned int, 1083c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, uint32_t, 1093c838a9fSAndrew Rybchenko efx_evq_t *); 1103c838a9fSAndrew Rybchenko void (*eevo_qdestroy)(efx_evq_t *); 111460cb568SAndrew Rybchenko efx_rc_t (*eevo_qprime)(efx_evq_t *, unsigned int); 1123c838a9fSAndrew Rybchenko void (*eevo_qpost)(efx_evq_t *, uint16_t); 113460cb568SAndrew Rybchenko efx_rc_t (*eevo_qmoderate)(efx_evq_t *, unsigned int); 1143c838a9fSAndrew Rybchenko #if EFSYS_OPT_QSTATS 1153c838a9fSAndrew Rybchenko void (*eevo_qstats_update)(efx_evq_t *, efsys_stat_t *); 1163c838a9fSAndrew Rybchenko #endif 1173c838a9fSAndrew Rybchenko } efx_ev_ops_t; 1183c838a9fSAndrew Rybchenko 1193c838a9fSAndrew Rybchenko typedef struct efx_tx_ops_s { 120460cb568SAndrew Rybchenko efx_rc_t (*etxo_init)(efx_nic_t *); 1213c838a9fSAndrew Rybchenko void (*etxo_fini)(efx_nic_t *); 122460cb568SAndrew Rybchenko efx_rc_t (*etxo_qcreate)(efx_nic_t *, 1233c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1243c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, 1253c838a9fSAndrew Rybchenko uint32_t, uint16_t, 1263c838a9fSAndrew Rybchenko efx_evq_t *, efx_txq_t *, 1273c838a9fSAndrew Rybchenko unsigned int *); 1283c838a9fSAndrew Rybchenko void (*etxo_qdestroy)(efx_txq_t *); 129460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpost)(efx_txq_t *, efx_buffer_t *, 1303c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1313c838a9fSAndrew Rybchenko unsigned int *); 1323c838a9fSAndrew Rybchenko void (*etxo_qpush)(efx_txq_t *, unsigned int, unsigned int); 133460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpace)(efx_txq_t *, unsigned int); 134460cb568SAndrew Rybchenko efx_rc_t (*etxo_qflush)(efx_txq_t *); 1353c838a9fSAndrew Rybchenko void (*etxo_qenable)(efx_txq_t *); 136460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_enable)(efx_txq_t *); 1373c838a9fSAndrew Rybchenko void (*etxo_qpio_disable)(efx_txq_t *); 138460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_write)(efx_txq_t *,uint8_t *, size_t, 1393c838a9fSAndrew Rybchenko size_t); 140460cb568SAndrew Rybchenko efx_rc_t (*etxo_qpio_post)(efx_txq_t *, size_t, unsigned int, 1413c838a9fSAndrew Rybchenko unsigned int *); 142460cb568SAndrew Rybchenko efx_rc_t (*etxo_qdesc_post)(efx_txq_t *, efx_desc_t *, 1433c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1443c838a9fSAndrew Rybchenko unsigned int *); 1453c838a9fSAndrew Rybchenko void (*etxo_qdesc_dma_create)(efx_txq_t *, efsys_dma_addr_t, 1463c838a9fSAndrew Rybchenko size_t, boolean_t, 1473c838a9fSAndrew Rybchenko efx_desc_t *); 1483c838a9fSAndrew Rybchenko void (*etxo_qdesc_tso_create)(efx_txq_t *, uint16_t, 1493c838a9fSAndrew Rybchenko uint32_t, uint8_t, 1503c838a9fSAndrew Rybchenko efx_desc_t *); 1514ab49369SAndrew Rybchenko void (*etxo_qdesc_tso2_create)(efx_txq_t *, uint16_t, 1524ab49369SAndrew Rybchenko uint32_t, uint16_t, 1534ab49369SAndrew Rybchenko efx_desc_t *, int); 1543c838a9fSAndrew Rybchenko void (*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t, 1553c838a9fSAndrew Rybchenko efx_desc_t *); 1563c838a9fSAndrew Rybchenko #if EFSYS_OPT_QSTATS 1573c838a9fSAndrew Rybchenko void (*etxo_qstats_update)(efx_txq_t *, 1583c838a9fSAndrew Rybchenko efsys_stat_t *); 1593c838a9fSAndrew Rybchenko #endif 1603c838a9fSAndrew Rybchenko } efx_tx_ops_t; 1613c838a9fSAndrew Rybchenko 1623c838a9fSAndrew Rybchenko typedef struct efx_rx_ops_s { 163460cb568SAndrew Rybchenko efx_rc_t (*erxo_init)(efx_nic_t *); 1643c838a9fSAndrew Rybchenko void (*erxo_fini)(efx_nic_t *); 1653c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCATTER 166460cb568SAndrew Rybchenko efx_rc_t (*erxo_scatter_enable)(efx_nic_t *, unsigned int); 1673c838a9fSAndrew Rybchenko #endif 1683c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCALE 169460cb568SAndrew Rybchenko efx_rc_t (*erxo_scale_mode_set)(efx_nic_t *, efx_rx_hash_alg_t, 1703c838a9fSAndrew Rybchenko efx_rx_hash_type_t, boolean_t); 171460cb568SAndrew Rybchenko efx_rc_t (*erxo_scale_key_set)(efx_nic_t *, uint8_t *, size_t); 172460cb568SAndrew Rybchenko efx_rc_t (*erxo_scale_tbl_set)(efx_nic_t *, unsigned int *, 1733c838a9fSAndrew Rybchenko size_t); 1740badfd72SAndrew Rybchenko uint32_t (*erxo_prefix_hash)(efx_nic_t *, efx_rx_hash_alg_t, 1750badfd72SAndrew Rybchenko uint8_t *); 1760badfd72SAndrew Rybchenko #endif /* EFSYS_OPT_RX_SCALE */ 1770badfd72SAndrew Rybchenko efx_rc_t (*erxo_prefix_pktlen)(efx_nic_t *, uint8_t *, 1780badfd72SAndrew Rybchenko uint16_t *); 1793c838a9fSAndrew Rybchenko void (*erxo_qpost)(efx_rxq_t *, efsys_dma_addr_t *, size_t, 1803c838a9fSAndrew Rybchenko unsigned int, unsigned int, 1813c838a9fSAndrew Rybchenko unsigned int); 1823c838a9fSAndrew Rybchenko void (*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *); 183460cb568SAndrew Rybchenko efx_rc_t (*erxo_qflush)(efx_rxq_t *); 1843c838a9fSAndrew Rybchenko void (*erxo_qenable)(efx_rxq_t *); 185460cb568SAndrew Rybchenko efx_rc_t (*erxo_qcreate)(efx_nic_t *enp, unsigned int, 1863c838a9fSAndrew Rybchenko unsigned int, efx_rxq_type_t, 1873c838a9fSAndrew Rybchenko efsys_mem_t *, size_t, uint32_t, 1883c838a9fSAndrew Rybchenko efx_evq_t *, efx_rxq_t *); 1893c838a9fSAndrew Rybchenko void (*erxo_qdestroy)(efx_rxq_t *); 1903c838a9fSAndrew Rybchenko } efx_rx_ops_t; 1913c838a9fSAndrew Rybchenko 192e948693eSPhilip Paeps typedef struct efx_mac_ops_s { 193460cb568SAndrew Rybchenko efx_rc_t (*emo_reset)(efx_nic_t *); /* optional */ 194460cb568SAndrew Rybchenko efx_rc_t (*emo_poll)(efx_nic_t *, efx_link_mode_t *); 195460cb568SAndrew Rybchenko efx_rc_t (*emo_up)(efx_nic_t *, boolean_t *); 196460cb568SAndrew Rybchenko efx_rc_t (*emo_addr_set)(efx_nic_t *); 197460cb568SAndrew Rybchenko efx_rc_t (*emo_reconfigure)(efx_nic_t *); 198460cb568SAndrew Rybchenko efx_rc_t (*emo_multicast_list_set)(efx_nic_t *); 199460cb568SAndrew Rybchenko efx_rc_t (*emo_filter_default_rxq_set)(efx_nic_t *, 2003c838a9fSAndrew Rybchenko efx_rxq_t *, boolean_t); 2013c838a9fSAndrew Rybchenko void (*emo_filter_default_rxq_clear)(efx_nic_t *); 202e948693eSPhilip Paeps #if EFSYS_OPT_LOOPBACK 203460cb568SAndrew Rybchenko efx_rc_t (*emo_loopback_set)(efx_nic_t *, efx_link_mode_t, 204e948693eSPhilip Paeps efx_loopback_type_t); 205e948693eSPhilip Paeps #endif /* EFSYS_OPT_LOOPBACK */ 206e948693eSPhilip Paeps #if EFSYS_OPT_MAC_STATS 207460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_upload)(efx_nic_t *, efsys_mem_t *); 208460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_periodic)(efx_nic_t *, efsys_mem_t *, 209e948693eSPhilip Paeps uint16_t, boolean_t); 210460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_update)(efx_nic_t *, efsys_mem_t *, 211e948693eSPhilip Paeps efsys_stat_t *, uint32_t *); 212e948693eSPhilip Paeps #endif /* EFSYS_OPT_MAC_STATS */ 213e948693eSPhilip Paeps } efx_mac_ops_t; 214e948693eSPhilip Paeps 215e948693eSPhilip Paeps typedef struct efx_phy_ops_s { 216460cb568SAndrew Rybchenko efx_rc_t (*epo_power)(efx_nic_t *, boolean_t); /* optional */ 217460cb568SAndrew Rybchenko efx_rc_t (*epo_reset)(efx_nic_t *); 218460cb568SAndrew Rybchenko efx_rc_t (*epo_reconfigure)(efx_nic_t *); 219460cb568SAndrew Rybchenko efx_rc_t (*epo_verify)(efx_nic_t *); 220460cb568SAndrew Rybchenko efx_rc_t (*epo_uplink_check)(efx_nic_t *, 221e948693eSPhilip Paeps boolean_t *); /* optional */ 222460cb568SAndrew Rybchenko efx_rc_t (*epo_downlink_check)(efx_nic_t *, efx_link_mode_t *, 223e948693eSPhilip Paeps unsigned int *, uint32_t *); 224460cb568SAndrew Rybchenko efx_rc_t (*epo_oui_get)(efx_nic_t *, uint32_t *); 225e948693eSPhilip Paeps #if EFSYS_OPT_PHY_STATS 226460cb568SAndrew Rybchenko efx_rc_t (*epo_stats_update)(efx_nic_t *, efsys_mem_t *, 227e948693eSPhilip Paeps uint32_t *); 228e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_STATS */ 229e948693eSPhilip Paeps #if EFSYS_OPT_PHY_PROPS 230e948693eSPhilip Paeps #if EFSYS_OPT_NAMES 2313c838a9fSAndrew Rybchenko const char *(*epo_prop_name)(efx_nic_t *, unsigned int); 232e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_PROPS */ 233460cb568SAndrew Rybchenko efx_rc_t (*epo_prop_get)(efx_nic_t *, unsigned int, uint32_t, 234e948693eSPhilip Paeps uint32_t *); 235460cb568SAndrew Rybchenko efx_rc_t (*epo_prop_set)(efx_nic_t *, unsigned int, uint32_t); 236e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_PROPS */ 2373c838a9fSAndrew Rybchenko #if EFSYS_OPT_BIST 238460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_enable_offline)(efx_nic_t *); 239460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_start)(efx_nic_t *, efx_bist_type_t); 240460cb568SAndrew Rybchenko efx_rc_t (*epo_bist_poll)(efx_nic_t *, efx_bist_type_t, 2413c838a9fSAndrew Rybchenko efx_bist_result_t *, uint32_t *, 242e948693eSPhilip Paeps unsigned long *, size_t); 2433c838a9fSAndrew Rybchenko void (*epo_bist_stop)(efx_nic_t *, efx_bist_type_t); 2443c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_BIST */ 245e948693eSPhilip Paeps } efx_phy_ops_t; 246e948693eSPhilip Paeps 2473c838a9fSAndrew Rybchenko #if EFSYS_OPT_FILTER 2483c838a9fSAndrew Rybchenko typedef struct efx_filter_ops_s { 249460cb568SAndrew Rybchenko efx_rc_t (*efo_init)(efx_nic_t *); 2503c838a9fSAndrew Rybchenko void (*efo_fini)(efx_nic_t *); 251460cb568SAndrew Rybchenko efx_rc_t (*efo_restore)(efx_nic_t *); 252460cb568SAndrew Rybchenko efx_rc_t (*efo_add)(efx_nic_t *, efx_filter_spec_t *, 2533c838a9fSAndrew Rybchenko boolean_t may_replace); 254460cb568SAndrew Rybchenko efx_rc_t (*efo_delete)(efx_nic_t *, efx_filter_spec_t *); 255460cb568SAndrew Rybchenko efx_rc_t (*efo_supported_filters)(efx_nic_t *, uint32_t *, size_t *); 256460cb568SAndrew Rybchenko efx_rc_t (*efo_reconfigure)(efx_nic_t *, uint8_t const *, boolean_t, 2573c838a9fSAndrew Rybchenko boolean_t, boolean_t, boolean_t, 2583c838a9fSAndrew Rybchenko uint8_t const *, int); 2593c838a9fSAndrew Rybchenko } efx_filter_ops_t; 2603c838a9fSAndrew Rybchenko 261460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 2623c838a9fSAndrew Rybchenko efx_filter_reconfigure( 2633c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 2643c838a9fSAndrew Rybchenko __in_ecount(6) uint8_t const *mac_addr, 2653c838a9fSAndrew Rybchenko __in boolean_t all_unicst, 2663c838a9fSAndrew Rybchenko __in boolean_t mulcst, 2673c838a9fSAndrew Rybchenko __in boolean_t all_mulcst, 2683c838a9fSAndrew Rybchenko __in boolean_t brdcst, 2693c838a9fSAndrew Rybchenko __in_ecount(6*count) uint8_t const *addrs, 2703c838a9fSAndrew Rybchenko __in int count); 2713c838a9fSAndrew Rybchenko 2723c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_FILTER */ 2733c838a9fSAndrew Rybchenko 2743c838a9fSAndrew Rybchenko 275e948693eSPhilip Paeps typedef struct efx_port_s { 276e948693eSPhilip Paeps efx_mac_type_t ep_mac_type; 277e948693eSPhilip Paeps uint32_t ep_phy_type; 278e948693eSPhilip Paeps uint8_t ep_port; 279e948693eSPhilip Paeps uint32_t ep_mac_pdu; 280e948693eSPhilip Paeps uint8_t ep_mac_addr[6]; 281e948693eSPhilip Paeps efx_link_mode_t ep_link_mode; 2823c838a9fSAndrew Rybchenko boolean_t ep_all_unicst; 2833c838a9fSAndrew Rybchenko boolean_t ep_mulcst; 2843c838a9fSAndrew Rybchenko boolean_t ep_all_mulcst; 285e948693eSPhilip Paeps boolean_t ep_brdcst; 286e948693eSPhilip Paeps unsigned int ep_fcntl; 287e948693eSPhilip Paeps boolean_t ep_fcntl_autoneg; 288e948693eSPhilip Paeps efx_oword_t ep_multicst_hash[2]; 2893c838a9fSAndrew Rybchenko uint8_t ep_mulcst_addr_list[EFX_MAC_ADDR_LEN * 2903c838a9fSAndrew Rybchenko EFX_MAC_MULTICAST_LIST_MAX]; 2913c838a9fSAndrew Rybchenko uint32_t ep_mulcst_addr_count; 292e948693eSPhilip Paeps #if EFSYS_OPT_LOOPBACK 293e948693eSPhilip Paeps efx_loopback_type_t ep_loopback_type; 294e948693eSPhilip Paeps efx_link_mode_t ep_loopback_link_mode; 295e948693eSPhilip Paeps #endif /* EFSYS_OPT_LOOPBACK */ 296e948693eSPhilip Paeps #if EFSYS_OPT_PHY_FLAGS 297e948693eSPhilip Paeps uint32_t ep_phy_flags; 298e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_FLAGS */ 299e948693eSPhilip Paeps #if EFSYS_OPT_PHY_LED_CONTROL 300e948693eSPhilip Paeps efx_phy_led_mode_t ep_phy_led_mode; 301e948693eSPhilip Paeps #endif /* EFSYS_OPT_PHY_LED_CONTROL */ 302e948693eSPhilip Paeps efx_phy_media_type_t ep_fixed_port_type; 303e948693eSPhilip Paeps efx_phy_media_type_t ep_module_type; 304e948693eSPhilip Paeps uint32_t ep_adv_cap_mask; 305e948693eSPhilip Paeps uint32_t ep_lp_cap_mask; 306e948693eSPhilip Paeps uint32_t ep_default_adv_cap_mask; 307e948693eSPhilip Paeps uint32_t ep_phy_cap_mask; 308e948693eSPhilip Paeps #if EFSYS_OPT_PHY_TXC43128 || EFSYS_OPT_PHY_QT2025C 309e948693eSPhilip Paeps union { 310e948693eSPhilip Paeps struct { 311e948693eSPhilip Paeps unsigned int bug10934_count; 312e948693eSPhilip Paeps } ep_txc43128; 313e948693eSPhilip Paeps struct { 314e948693eSPhilip Paeps unsigned int bug17190_count; 315e948693eSPhilip Paeps } ep_qt2025c; 316e948693eSPhilip Paeps }; 317e948693eSPhilip Paeps #endif 318e948693eSPhilip Paeps boolean_t ep_mac_poll_needed; /* falcon only */ 319e948693eSPhilip Paeps boolean_t ep_mac_up; /* falcon only */ 320e948693eSPhilip Paeps uint32_t ep_fwver; /* falcon only */ 321e948693eSPhilip Paeps boolean_t ep_mac_drain; 322e948693eSPhilip Paeps boolean_t ep_mac_stats_pending; 3233c838a9fSAndrew Rybchenko #if EFSYS_OPT_BIST 3243c838a9fSAndrew Rybchenko efx_bist_type_t ep_current_bist; 325e948693eSPhilip Paeps #endif 326e948693eSPhilip Paeps efx_mac_ops_t *ep_emop; 327e948693eSPhilip Paeps efx_phy_ops_t *ep_epop; 328e948693eSPhilip Paeps } efx_port_t; 329e948693eSPhilip Paeps 330e948693eSPhilip Paeps typedef struct efx_mon_ops_s { 331460cb568SAndrew Rybchenko efx_rc_t (*emo_reset)(efx_nic_t *); 332460cb568SAndrew Rybchenko efx_rc_t (*emo_reconfigure)(efx_nic_t *); 333e948693eSPhilip Paeps #if EFSYS_OPT_MON_STATS 334460cb568SAndrew Rybchenko efx_rc_t (*emo_stats_update)(efx_nic_t *, efsys_mem_t *, 335e948693eSPhilip Paeps efx_mon_stat_value_t *); 336e948693eSPhilip Paeps #endif /* EFSYS_OPT_MON_STATS */ 337e948693eSPhilip Paeps } efx_mon_ops_t; 338e948693eSPhilip Paeps 339e948693eSPhilip Paeps typedef struct efx_mon_s { 340e948693eSPhilip Paeps efx_mon_type_t em_type; 341e948693eSPhilip Paeps efx_mon_ops_t *em_emop; 342e948693eSPhilip Paeps } efx_mon_t; 343e948693eSPhilip Paeps 3443c838a9fSAndrew Rybchenko typedef struct efx_intr_ops_s { 345460cb568SAndrew Rybchenko efx_rc_t (*eio_init)(efx_nic_t *, efx_intr_type_t, efsys_mem_t *); 3463c838a9fSAndrew Rybchenko void (*eio_enable)(efx_nic_t *); 3473c838a9fSAndrew Rybchenko void (*eio_disable)(efx_nic_t *); 3483c838a9fSAndrew Rybchenko void (*eio_disable_unlocked)(efx_nic_t *); 349460cb568SAndrew Rybchenko efx_rc_t (*eio_trigger)(efx_nic_t *, unsigned int); 3500c24a07eSAndrew Rybchenko void (*eio_status_line)(efx_nic_t *, boolean_t *, uint32_t *); 3510c24a07eSAndrew Rybchenko void (*eio_status_message)(efx_nic_t *, unsigned int, 3520c24a07eSAndrew Rybchenko boolean_t *); 3530c24a07eSAndrew Rybchenko void (*eio_fatal)(efx_nic_t *); 3543c838a9fSAndrew Rybchenko void (*eio_fini)(efx_nic_t *); 3553c838a9fSAndrew Rybchenko } efx_intr_ops_t; 3563c838a9fSAndrew Rybchenko 357e948693eSPhilip Paeps typedef struct efx_intr_s { 3583c838a9fSAndrew Rybchenko efx_intr_ops_t *ei_eiop; 359e948693eSPhilip Paeps efsys_mem_t *ei_esmp; 3603c838a9fSAndrew Rybchenko efx_intr_type_t ei_type; 361e948693eSPhilip Paeps unsigned int ei_level; 362e948693eSPhilip Paeps } efx_intr_t; 363e948693eSPhilip Paeps 364e948693eSPhilip Paeps typedef struct efx_nic_ops_s { 365460cb568SAndrew Rybchenko efx_rc_t (*eno_probe)(efx_nic_t *); 366cfa023ebSAndrew Rybchenko efx_rc_t (*eno_board_cfg)(efx_nic_t *); 367460cb568SAndrew Rybchenko efx_rc_t (*eno_set_drv_limits)(efx_nic_t *, efx_drv_limits_t*); 368460cb568SAndrew Rybchenko efx_rc_t (*eno_reset)(efx_nic_t *); 369460cb568SAndrew Rybchenko efx_rc_t (*eno_init)(efx_nic_t *); 370460cb568SAndrew Rybchenko efx_rc_t (*eno_get_vi_pool)(efx_nic_t *, uint32_t *); 371460cb568SAndrew Rybchenko efx_rc_t (*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t, 3723c838a9fSAndrew Rybchenko uint32_t *, size_t *); 373e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 374460cb568SAndrew Rybchenko efx_rc_t (*eno_sram_test)(efx_nic_t *, efx_sram_pattern_fn_t); 375460cb568SAndrew Rybchenko efx_rc_t (*eno_register_test)(efx_nic_t *); 376e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 377e948693eSPhilip Paeps void (*eno_fini)(efx_nic_t *); 378e948693eSPhilip Paeps void (*eno_unprobe)(efx_nic_t *); 379e948693eSPhilip Paeps } efx_nic_ops_t; 380e948693eSPhilip Paeps 3819ab060a7SAndrew Rybchenko #ifndef EFX_TXQ_LIMIT_TARGET 382e948693eSPhilip Paeps #define EFX_TXQ_LIMIT_TARGET 259 3839ab060a7SAndrew Rybchenko #endif 3849ab060a7SAndrew Rybchenko #ifndef EFX_RXQ_LIMIT_TARGET 38575ba9e1eSAndrew Rybchenko #define EFX_RXQ_LIMIT_TARGET 512 3869ab060a7SAndrew Rybchenko #endif 3879ab060a7SAndrew Rybchenko #ifndef EFX_TXQ_DC_SIZE 3889ab060a7SAndrew Rybchenko #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ 3899ab060a7SAndrew Rybchenko #endif 3909ab060a7SAndrew Rybchenko #ifndef EFX_RXQ_DC_SIZE 3919ab060a7SAndrew Rybchenko #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ 3929ab060a7SAndrew Rybchenko #endif 393e948693eSPhilip Paeps 394e948693eSPhilip Paeps #if EFSYS_OPT_FILTER 395e948693eSPhilip Paeps 3963c838a9fSAndrew Rybchenko typedef struct falconsiena_filter_spec_s { 3973c838a9fSAndrew Rybchenko uint8_t fsfs_type; 3983c838a9fSAndrew Rybchenko uint32_t fsfs_flags; 3993c838a9fSAndrew Rybchenko uint32_t fsfs_dmaq_id; 4003c838a9fSAndrew Rybchenko uint32_t fsfs_dword[3]; 4013c838a9fSAndrew Rybchenko } falconsiena_filter_spec_t; 4023c838a9fSAndrew Rybchenko 4033c838a9fSAndrew Rybchenko typedef enum falconsiena_filter_type_e { 4043c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_TCP_FULL, /* TCP/IPv4 4-tuple {dIP,dTCP,sIP,sTCP} */ 4053c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_TCP_WILD, /* TCP/IPv4 dest {dIP,dTCP, -, -} */ 4063c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_UDP_FULL, /* UDP/IPv4 4-tuple {dIP,dUDP,sIP,sUDP} */ 4073c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_UDP_WILD, /* UDP/IPv4 dest {dIP,dUDP, -, -} */ 408e948693eSPhilip Paeps 409e948693eSPhilip Paeps #if EFSYS_OPT_SIENA 4103c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_MAC_FULL, /* Ethernet {dMAC,VLAN} */ 4113c838a9fSAndrew Rybchenko EFX_FS_FILTER_RX_MAC_WILD, /* Ethernet {dMAC, -} */ 412e948693eSPhilip Paeps 4133c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_TCP_FULL, /* TCP/IPv4 {dIP,dTCP,sIP,sTCP} */ 4143c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_TCP_WILD, /* TCP/IPv4 { -, -,sIP,sTCP} */ 4153c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_UDP_FULL, /* UDP/IPv4 {dIP,dTCP,sIP,sTCP} */ 4163c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_UDP_WILD, /* UDP/IPv4 source (host, port) */ 417e948693eSPhilip Paeps 4183c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_MAC_FULL, /* Ethernet source (MAC address, VLAN ID) */ 4193c838a9fSAndrew Rybchenko EFX_FS_FILTER_TX_MAC_WILD, /* Ethernet source (MAC address) */ 420e948693eSPhilip Paeps #endif /* EFSYS_OPT_SIENA */ 421e948693eSPhilip Paeps 4223c838a9fSAndrew Rybchenko EFX_FS_FILTER_NTYPES 4233c838a9fSAndrew Rybchenko } falconsiena_filter_type_t; 424e948693eSPhilip Paeps 4253c838a9fSAndrew Rybchenko typedef enum falconsiena_filter_tbl_id_e { 4263c838a9fSAndrew Rybchenko EFX_FS_FILTER_TBL_RX_IP = 0, 4273c838a9fSAndrew Rybchenko EFX_FS_FILTER_TBL_RX_MAC, 4283c838a9fSAndrew Rybchenko EFX_FS_FILTER_TBL_TX_IP, 4293c838a9fSAndrew Rybchenko EFX_FS_FILTER_TBL_TX_MAC, 4303c838a9fSAndrew Rybchenko EFX_FS_FILTER_NTBLS 4313c838a9fSAndrew Rybchenko } falconsiena_filter_tbl_id_t; 432e948693eSPhilip Paeps 4333c838a9fSAndrew Rybchenko typedef struct falconsiena_filter_tbl_s { 4343c838a9fSAndrew Rybchenko int fsft_size; /* number of entries */ 4353c838a9fSAndrew Rybchenko int fsft_used; /* active count */ 4363c838a9fSAndrew Rybchenko uint32_t *fsft_bitmap; /* active bitmap */ 4373c838a9fSAndrew Rybchenko falconsiena_filter_spec_t *fsft_spec; /* array of saved specs */ 4383c838a9fSAndrew Rybchenko } falconsiena_filter_tbl_t; 4393c838a9fSAndrew Rybchenko 4403c838a9fSAndrew Rybchenko typedef struct falconsiena_filter_s { 4413c838a9fSAndrew Rybchenko falconsiena_filter_tbl_t fsf_tbl[EFX_FS_FILTER_NTBLS]; 4423c838a9fSAndrew Rybchenko unsigned int fsf_depth[EFX_FS_FILTER_NTYPES]; 4433c838a9fSAndrew Rybchenko } falconsiena_filter_t; 444e948693eSPhilip Paeps 445e948693eSPhilip Paeps typedef struct efx_filter_s { 4463c838a9fSAndrew Rybchenko #if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA 4473c838a9fSAndrew Rybchenko falconsiena_filter_t *ef_falconsiena_filter; 4483c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ 4491289fe72SAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD 4501289fe72SAndrew Rybchenko ef10_filter_table_t *ef_ef10_filter_table; 4511289fe72SAndrew Rybchenko #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */ 452e948693eSPhilip Paeps } efx_filter_t; 453e948693eSPhilip Paeps 454e948693eSPhilip Paeps extern void 4553c838a9fSAndrew Rybchenko falconsiena_filter_tbl_clear( 456e948693eSPhilip Paeps __in efx_nic_t *enp, 4573c838a9fSAndrew Rybchenko __in falconsiena_filter_tbl_id_t tbl); 458e948693eSPhilip Paeps 459e948693eSPhilip Paeps #endif /* EFSYS_OPT_FILTER */ 460e948693eSPhilip Paeps 4613c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 4623c838a9fSAndrew Rybchenko 4633c838a9fSAndrew Rybchenko typedef struct efx_mcdi_ops_s { 464460cb568SAndrew Rybchenko efx_rc_t (*emco_init)(efx_nic_t *, const efx_mcdi_transport_t *); 465fd7501bfSAndrew Rybchenko void (*emco_send_request)(efx_nic_t *, void *, size_t, 466fd7501bfSAndrew Rybchenko void *, size_t); 467460cb568SAndrew Rybchenko efx_rc_t (*emco_poll_reboot)(efx_nic_t *); 468548ebee5SAndrew Rybchenko boolean_t (*emco_poll_response)(efx_nic_t *); 469548ebee5SAndrew Rybchenko void (*emco_read_response)(efx_nic_t *, void *, size_t, size_t); 4703c838a9fSAndrew Rybchenko void (*emco_fini)(efx_nic_t *); 471af986c75SAndrew Rybchenko efx_rc_t (*emco_feature_supported)(efx_nic_t *, efx_mcdi_feature_id_t, boolean_t *); 4723c838a9fSAndrew Rybchenko } efx_mcdi_ops_t; 4733c838a9fSAndrew Rybchenko 4743c838a9fSAndrew Rybchenko typedef struct efx_mcdi_s { 4753c838a9fSAndrew Rybchenko efx_mcdi_ops_t *em_emcop; 4763c838a9fSAndrew Rybchenko const efx_mcdi_transport_t *em_emtp; 4773c838a9fSAndrew Rybchenko efx_mcdi_iface_t em_emip; 4783c838a9fSAndrew Rybchenko } efx_mcdi_t; 4793c838a9fSAndrew Rybchenko 4803c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 4813c838a9fSAndrew Rybchenko 482e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM 483e948693eSPhilip Paeps typedef struct efx_nvram_ops_s { 484e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 485460cb568SAndrew Rybchenko efx_rc_t (*envo_test)(efx_nic_t *); 486e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 487460cb568SAndrew Rybchenko efx_rc_t (*envo_get_version)(efx_nic_t *, efx_nvram_type_t, 488e948693eSPhilip Paeps uint32_t *, uint16_t *); 489460cb568SAndrew Rybchenko efx_rc_t (*envo_erase)(efx_nic_t *, efx_nvram_type_t); 490460cb568SAndrew Rybchenko efx_rc_t (*envo_write_chunk)(efx_nic_t *, efx_nvram_type_t, 491e948693eSPhilip Paeps unsigned int, caddr_t, size_t); 492e948693eSPhilip Paeps void (*envo_rw_finish)(efx_nic_t *, efx_nvram_type_t); 493460cb568SAndrew Rybchenko efx_rc_t (*envo_set_version)(efx_nic_t *, efx_nvram_type_t, 494460cb568SAndrew Rybchenko uint16_t *); 495e948693eSPhilip Paeps 496bce88e31SAndrew Rybchenko efx_rc_t (*envo_type_to_partn)(efx_nic_t *, efx_nvram_type_t, 497bce88e31SAndrew Rybchenko uint32_t *); 49856bd83b0SAndrew Rybchenko efx_rc_t (*envo_partn_size)(efx_nic_t *, uint32_t, size_t *); 4995d846e87SAndrew Rybchenko efx_rc_t (*envo_partn_rw_start)(efx_nic_t *, uint32_t, size_t *); 500*0afdf29cSAndrew Rybchenko efx_rc_t (*envo_partn_read)(efx_nic_t *, uint32_t, 501*0afdf29cSAndrew Rybchenko unsigned int, caddr_t, size_t); 502e948693eSPhilip Paeps } efx_nvram_ops_t; 503e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM */ 504e948693eSPhilip Paeps 505e948693eSPhilip Paeps #if EFSYS_OPT_VPD 506e948693eSPhilip Paeps typedef struct efx_vpd_ops_s { 507460cb568SAndrew Rybchenko efx_rc_t (*evpdo_init)(efx_nic_t *); 508460cb568SAndrew Rybchenko efx_rc_t (*evpdo_size)(efx_nic_t *, size_t *); 509460cb568SAndrew Rybchenko efx_rc_t (*evpdo_read)(efx_nic_t *, caddr_t, size_t); 510460cb568SAndrew Rybchenko efx_rc_t (*evpdo_verify)(efx_nic_t *, caddr_t, size_t); 511460cb568SAndrew Rybchenko efx_rc_t (*evpdo_reinit)(efx_nic_t *, caddr_t, size_t); 512460cb568SAndrew Rybchenko efx_rc_t (*evpdo_get)(efx_nic_t *, caddr_t, size_t, 513460cb568SAndrew Rybchenko efx_vpd_value_t *); 514460cb568SAndrew Rybchenko efx_rc_t (*evpdo_set)(efx_nic_t *, caddr_t, size_t, 515460cb568SAndrew Rybchenko efx_vpd_value_t *); 516460cb568SAndrew Rybchenko efx_rc_t (*evpdo_next)(efx_nic_t *, caddr_t, size_t, 517460cb568SAndrew Rybchenko efx_vpd_value_t *, unsigned int *); 518460cb568SAndrew Rybchenko efx_rc_t (*evpdo_write)(efx_nic_t *, caddr_t, size_t); 519e948693eSPhilip Paeps void (*evpdo_fini)(efx_nic_t *); 520e948693eSPhilip Paeps } efx_vpd_ops_t; 521e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 522e948693eSPhilip Paeps 5233c838a9fSAndrew Rybchenko #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM 5243c838a9fSAndrew Rybchenko 525460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5263c838a9fSAndrew Rybchenko efx_mcdi_nvram_partitions( 5273c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5283c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5293c838a9fSAndrew Rybchenko __in size_t size, 5303c838a9fSAndrew Rybchenko __out unsigned int *npartnp); 5313c838a9fSAndrew Rybchenko 532460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5333c838a9fSAndrew Rybchenko efx_mcdi_nvram_metadata( 5343c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5353c838a9fSAndrew Rybchenko __in uint32_t partn, 5363c838a9fSAndrew Rybchenko __out uint32_t *subtypep, 5373c838a9fSAndrew Rybchenko __out_ecount(4) uint16_t version[4], 5383c838a9fSAndrew Rybchenko __out_bcount_opt(size) char *descp, 5393c838a9fSAndrew Rybchenko __in size_t size); 5403c838a9fSAndrew Rybchenko 541460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5423c838a9fSAndrew Rybchenko efx_mcdi_nvram_info( 5433c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5443c838a9fSAndrew Rybchenko __in uint32_t partn, 5453c838a9fSAndrew Rybchenko __out_opt size_t *sizep, 5463c838a9fSAndrew Rybchenko __out_opt uint32_t *addressp, 5479cb71b16SAndrew Rybchenko __out_opt uint32_t *erase_sizep, 5489cb71b16SAndrew Rybchenko __out_opt uint32_t *write_sizep); 5493c838a9fSAndrew Rybchenko 550460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5513c838a9fSAndrew Rybchenko efx_mcdi_nvram_update_start( 5523c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5533c838a9fSAndrew Rybchenko __in uint32_t partn); 5543c838a9fSAndrew Rybchenko 555460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5563c838a9fSAndrew Rybchenko efx_mcdi_nvram_read( 5573c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5583c838a9fSAndrew Rybchenko __in uint32_t partn, 5593c838a9fSAndrew Rybchenko __in uint32_t offset, 5603c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5613c838a9fSAndrew Rybchenko __in size_t size); 5623c838a9fSAndrew Rybchenko 563460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5643c838a9fSAndrew Rybchenko efx_mcdi_nvram_erase( 5653c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5663c838a9fSAndrew Rybchenko __in uint32_t partn, 5673c838a9fSAndrew Rybchenko __in uint32_t offset, 5683c838a9fSAndrew Rybchenko __in size_t size); 5693c838a9fSAndrew Rybchenko 570460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5713c838a9fSAndrew Rybchenko efx_mcdi_nvram_write( 5723c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5733c838a9fSAndrew Rybchenko __in uint32_t partn, 5743c838a9fSAndrew Rybchenko __in uint32_t offset, 5753c838a9fSAndrew Rybchenko __out_bcount(size) caddr_t data, 5763c838a9fSAndrew Rybchenko __in size_t size); 5773c838a9fSAndrew Rybchenko 578460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5793c838a9fSAndrew Rybchenko efx_mcdi_nvram_update_finish( 5803c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5813c838a9fSAndrew Rybchenko __in uint32_t partn, 5823c838a9fSAndrew Rybchenko __in boolean_t reboot); 5833c838a9fSAndrew Rybchenko 5843c838a9fSAndrew Rybchenko #if EFSYS_OPT_DIAG 5853c838a9fSAndrew Rybchenko 586460cb568SAndrew Rybchenko __checkReturn efx_rc_t 5873c838a9fSAndrew Rybchenko efx_mcdi_nvram_test( 5883c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 5893c838a9fSAndrew Rybchenko __in uint32_t partn); 5903c838a9fSAndrew Rybchenko 5913c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_DIAG */ 5923c838a9fSAndrew Rybchenko 5933c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 5943c838a9fSAndrew Rybchenko 5950c848230SAndrew Rybchenko #if EFSYS_OPT_LICENSING 5960c848230SAndrew Rybchenko 5970c848230SAndrew Rybchenko typedef struct efx_lic_ops_s { 5980c848230SAndrew Rybchenko efx_rc_t (*elo_update_licenses)(efx_nic_t *); 5990c848230SAndrew Rybchenko efx_rc_t (*elo_get_key_stats)(efx_nic_t *, efx_key_stats_t *); 6000c848230SAndrew Rybchenko efx_rc_t (*elo_app_state)(efx_nic_t *, uint64_t, boolean_t *); 6010c848230SAndrew Rybchenko efx_rc_t (*elo_get_id)(efx_nic_t *, size_t, uint32_t *, 6020c848230SAndrew Rybchenko size_t *, uint8_t *); 6030c848230SAndrew Rybchenko } efx_lic_ops_t; 6040c848230SAndrew Rybchenko 6050c848230SAndrew Rybchenko #endif 6060c848230SAndrew Rybchenko 6073c838a9fSAndrew Rybchenko typedef struct efx_drv_cfg_s { 6083c838a9fSAndrew Rybchenko uint32_t edc_min_vi_count; 6093c838a9fSAndrew Rybchenko uint32_t edc_max_vi_count; 6103c838a9fSAndrew Rybchenko 6113c838a9fSAndrew Rybchenko uint32_t edc_max_piobuf_count; 6123c838a9fSAndrew Rybchenko uint32_t edc_pio_alloc_size; 6133c838a9fSAndrew Rybchenko } efx_drv_cfg_t; 6143c838a9fSAndrew Rybchenko 615e948693eSPhilip Paeps struct efx_nic_s { 616e948693eSPhilip Paeps uint32_t en_magic; 617e948693eSPhilip Paeps efx_family_t en_family; 618e948693eSPhilip Paeps uint32_t en_features; 619e948693eSPhilip Paeps efsys_identifier_t *en_esip; 620e948693eSPhilip Paeps efsys_lock_t *en_eslp; 621e948693eSPhilip Paeps efsys_bar_t *en_esbp; 622e948693eSPhilip Paeps unsigned int en_mod_flags; 623e948693eSPhilip Paeps unsigned int en_reset_flags; 624e948693eSPhilip Paeps efx_nic_cfg_t en_nic_cfg; 6253c838a9fSAndrew Rybchenko efx_drv_cfg_t en_drv_cfg; 626e948693eSPhilip Paeps efx_port_t en_port; 627e948693eSPhilip Paeps efx_mon_t en_mon; 628e948693eSPhilip Paeps efx_intr_t en_intr; 629e948693eSPhilip Paeps uint32_t en_ev_qcount; 630e948693eSPhilip Paeps uint32_t en_rx_qcount; 631e948693eSPhilip Paeps uint32_t en_tx_qcount; 632e948693eSPhilip Paeps efx_nic_ops_t *en_enop; 6333c838a9fSAndrew Rybchenko efx_ev_ops_t *en_eevop; 6343c838a9fSAndrew Rybchenko efx_tx_ops_t *en_etxop; 6353c838a9fSAndrew Rybchenko efx_rx_ops_t *en_erxop; 636e948693eSPhilip Paeps #if EFSYS_OPT_FILTER 637e948693eSPhilip Paeps efx_filter_t en_filter; 6383c838a9fSAndrew Rybchenko efx_filter_ops_t *en_efop; 639e948693eSPhilip Paeps #endif /* EFSYS_OPT_FILTER */ 6403c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 6413c838a9fSAndrew Rybchenko efx_mcdi_t en_mcdi; 6423c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 643e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM 644e948693eSPhilip Paeps efx_nvram_type_t en_nvram_locked; 645e948693eSPhilip Paeps efx_nvram_ops_t *en_envop; 646e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM */ 647e948693eSPhilip Paeps #if EFSYS_OPT_VPD 648e948693eSPhilip Paeps efx_vpd_ops_t *en_evpdop; 649e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 6503c838a9fSAndrew Rybchenko #if EFSYS_OPT_RX_SCALE 6513c838a9fSAndrew Rybchenko efx_rx_hash_support_t en_hash_support; 6523c838a9fSAndrew Rybchenko efx_rx_scale_support_t en_rss_support; 6533c838a9fSAndrew Rybchenko uint32_t en_rss_context; 6543c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_RX_SCALE */ 6553c838a9fSAndrew Rybchenko uint32_t en_vport_id; 6560c848230SAndrew Rybchenko #if EFSYS_OPT_LICENSING 6570c848230SAndrew Rybchenko efx_lic_ops_t *en_elop; 6580c848230SAndrew Rybchenko #endif 659e948693eSPhilip Paeps union { 660e948693eSPhilip Paeps #if EFSYS_OPT_FALCON 661e948693eSPhilip Paeps struct { 662e948693eSPhilip Paeps falcon_spi_dev_t enu_fsd[FALCON_SPI_NTYPES]; 663e948693eSPhilip Paeps falcon_i2c_t enu_fip; 664e948693eSPhilip Paeps boolean_t enu_i2c_locked; 665e948693eSPhilip Paeps #if EFSYS_OPT_FALCON_NIC_CFG_OVERRIDE 666e948693eSPhilip Paeps const uint8_t *enu_forced_cfg; 667e948693eSPhilip Paeps #endif /* EFSYS_OPT_FALCON_NIC_CFG_OVERRIDE */ 668e948693eSPhilip Paeps uint8_t enu_mon_devid; 669e948693eSPhilip Paeps #if EFSYS_OPT_PCIE_TUNE 670e948693eSPhilip Paeps unsigned int enu_nlanes; 671e948693eSPhilip Paeps #endif /* EFSYS_OPT_PCIE_TUNE */ 672e948693eSPhilip Paeps uint16_t enu_board_rev; 673e948693eSPhilip Paeps boolean_t enu_internal_sram; 674e948693eSPhilip Paeps uint8_t enu_sram_num_bank; 675e948693eSPhilip Paeps uint8_t enu_sram_bank_size; 676e948693eSPhilip Paeps } falcon; 677e948693eSPhilip Paeps #endif /* EFSYS_OPT_FALCON */ 678e948693eSPhilip Paeps #if EFSYS_OPT_SIENA 679e948693eSPhilip Paeps struct { 680e948693eSPhilip Paeps #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 681e948693eSPhilip Paeps unsigned int enu_partn_mask; 682e948693eSPhilip Paeps #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ 683e948693eSPhilip Paeps #if EFSYS_OPT_VPD 684e948693eSPhilip Paeps caddr_t enu_svpd; 685e948693eSPhilip Paeps size_t enu_svpd_length; 686e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 6873c838a9fSAndrew Rybchenko int enu_unused; 688e948693eSPhilip Paeps } siena; 689e948693eSPhilip Paeps #endif /* EFSYS_OPT_SIENA */ 690e7119ad9SAndrew Rybchenko int enu_unused; 691e948693eSPhilip Paeps } en_u; 692e7119ad9SAndrew Rybchenko #if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) 693e7119ad9SAndrew Rybchenko union en_arch { 694e7119ad9SAndrew Rybchenko struct { 695e7119ad9SAndrew Rybchenko int ena_vi_base; 696e7119ad9SAndrew Rybchenko int ena_vi_count; 697426f453bSAndrew Rybchenko int ena_vi_shift; 698e7119ad9SAndrew Rybchenko #if EFSYS_OPT_VPD 699e7119ad9SAndrew Rybchenko caddr_t ena_svpd; 700e7119ad9SAndrew Rybchenko size_t ena_svpd_length; 701e7119ad9SAndrew Rybchenko #endif /* EFSYS_OPT_VPD */ 702e7119ad9SAndrew Rybchenko efx_piobuf_handle_t ena_piobuf_handle[EF10_MAX_PIOBUF_NBUFS]; 703e7119ad9SAndrew Rybchenko uint32_t ena_piobuf_count; 704e7119ad9SAndrew Rybchenko uint32_t ena_pio_alloc_map[EF10_MAX_PIOBUF_NBUFS]; 705e7119ad9SAndrew Rybchenko uint32_t ena_pio_write_vi_base; 706e7119ad9SAndrew Rybchenko /* Memory BAR mapping regions */ 707e7119ad9SAndrew Rybchenko uint32_t ena_uc_mem_map_offset; 708e7119ad9SAndrew Rybchenko size_t ena_uc_mem_map_size; 709e7119ad9SAndrew Rybchenko uint32_t ena_wc_mem_map_offset; 710e7119ad9SAndrew Rybchenko size_t ena_wc_mem_map_size; 711e7119ad9SAndrew Rybchenko } ef10; 712e7119ad9SAndrew Rybchenko } en_arch; 713e7119ad9SAndrew Rybchenko #endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */ 714e948693eSPhilip Paeps }; 715e948693eSPhilip Paeps 716e948693eSPhilip Paeps 717e948693eSPhilip Paeps #define EFX_NIC_MAGIC 0x02121996 718e948693eSPhilip Paeps 719e948693eSPhilip Paeps typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *, 720e948693eSPhilip Paeps const efx_ev_callbacks_t *, void *); 721e948693eSPhilip Paeps 7223c838a9fSAndrew Rybchenko typedef struct efx_evq_rxq_state_s { 7233c838a9fSAndrew Rybchenko unsigned int eers_rx_read_ptr; 7243c838a9fSAndrew Rybchenko unsigned int eers_rx_mask; 7253c838a9fSAndrew Rybchenko } efx_evq_rxq_state_t; 7263c838a9fSAndrew Rybchenko 727e948693eSPhilip Paeps struct efx_evq_s { 728e948693eSPhilip Paeps uint32_t ee_magic; 729e948693eSPhilip Paeps efx_nic_t *ee_enp; 730e948693eSPhilip Paeps unsigned int ee_index; 731e948693eSPhilip Paeps unsigned int ee_mask; 732e948693eSPhilip Paeps efsys_mem_t *ee_esmp; 733e948693eSPhilip Paeps #if EFSYS_OPT_QSTATS 734e948693eSPhilip Paeps uint32_t ee_stat[EV_NQSTATS]; 735e948693eSPhilip Paeps #endif /* EFSYS_OPT_QSTATS */ 7363c838a9fSAndrew Rybchenko 7373c838a9fSAndrew Rybchenko efx_ev_handler_t ee_rx; 7383c838a9fSAndrew Rybchenko efx_ev_handler_t ee_tx; 7393c838a9fSAndrew Rybchenko efx_ev_handler_t ee_driver; 7403c838a9fSAndrew Rybchenko efx_ev_handler_t ee_global; 7413c838a9fSAndrew Rybchenko efx_ev_handler_t ee_drv_gen; 7423c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 7433c838a9fSAndrew Rybchenko efx_ev_handler_t ee_mcdi; 7443c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 7453c838a9fSAndrew Rybchenko 7463c838a9fSAndrew Rybchenko efx_evq_rxq_state_t ee_rxq_state[EFX_EV_RX_NLABELS]; 747e948693eSPhilip Paeps }; 748e948693eSPhilip Paeps 749e948693eSPhilip Paeps #define EFX_EVQ_MAGIC 0x08081997 750e948693eSPhilip Paeps 751af9078c3SAndrew Rybchenko #define EFX_EVQ_FALCON_TIMER_QUANTUM_NS 4968 /* 621 cycles */ 752af9078c3SAndrew Rybchenko #define EFX_EVQ_SIENA_TIMER_QUANTUM_NS 6144 /* 768 cycles */ 753e948693eSPhilip Paeps 754e948693eSPhilip Paeps struct efx_rxq_s { 755e948693eSPhilip Paeps uint32_t er_magic; 756e948693eSPhilip Paeps efx_nic_t *er_enp; 7573c838a9fSAndrew Rybchenko efx_evq_t *er_eep; 758e948693eSPhilip Paeps unsigned int er_index; 7593c838a9fSAndrew Rybchenko unsigned int er_label; 760e948693eSPhilip Paeps unsigned int er_mask; 761e948693eSPhilip Paeps efsys_mem_t *er_esmp; 762e948693eSPhilip Paeps }; 763e948693eSPhilip Paeps 764e948693eSPhilip Paeps #define EFX_RXQ_MAGIC 0x15022005 765e948693eSPhilip Paeps 766e948693eSPhilip Paeps struct efx_txq_s { 767e948693eSPhilip Paeps uint32_t et_magic; 768e948693eSPhilip Paeps efx_nic_t *et_enp; 769e948693eSPhilip Paeps unsigned int et_index; 770e948693eSPhilip Paeps unsigned int et_mask; 771e948693eSPhilip Paeps efsys_mem_t *et_esmp; 7723c838a9fSAndrew Rybchenko #if EFSYS_OPT_HUNTINGTON 7733c838a9fSAndrew Rybchenko uint32_t et_pio_bufnum; 7743c838a9fSAndrew Rybchenko uint32_t et_pio_blknum; 7753c838a9fSAndrew Rybchenko uint32_t et_pio_write_offset; 7763c838a9fSAndrew Rybchenko uint32_t et_pio_offset; 7773c838a9fSAndrew Rybchenko size_t et_pio_size; 7783c838a9fSAndrew Rybchenko #endif 779e948693eSPhilip Paeps #if EFSYS_OPT_QSTATS 780e948693eSPhilip Paeps uint32_t et_stat[TX_NQSTATS]; 781e948693eSPhilip Paeps #endif /* EFSYS_OPT_QSTATS */ 782e948693eSPhilip Paeps }; 783e948693eSPhilip Paeps 784e948693eSPhilip Paeps #define EFX_TXQ_MAGIC 0x05092005 785e948693eSPhilip Paeps 786e948693eSPhilip Paeps #define EFX_MAC_ADDR_COPY(_dst, _src) \ 787e948693eSPhilip Paeps do { \ 788e948693eSPhilip Paeps (_dst)[0] = (_src)[0]; \ 789e948693eSPhilip Paeps (_dst)[1] = (_src)[1]; \ 790e948693eSPhilip Paeps (_dst)[2] = (_src)[2]; \ 791e948693eSPhilip Paeps (_dst)[3] = (_src)[3]; \ 792e948693eSPhilip Paeps (_dst)[4] = (_src)[4]; \ 793e948693eSPhilip Paeps (_dst)[5] = (_src)[5]; \ 794e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 795e948693eSPhilip Paeps } while (B_FALSE) 796e948693eSPhilip Paeps 7973c838a9fSAndrew Rybchenko #define EFX_MAC_BROADCAST_ADDR_SET(_dst) \ 7983c838a9fSAndrew Rybchenko do { \ 7993c838a9fSAndrew Rybchenko uint16_t *_d = (uint16_t *)(_dst); \ 8003c838a9fSAndrew Rybchenko _d[0] = 0xffff; \ 8013c838a9fSAndrew Rybchenko _d[1] = 0xffff; \ 8023c838a9fSAndrew Rybchenko _d[2] = 0xffff; \ 8033c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 8043c838a9fSAndrew Rybchenko } while (B_FALSE) 8053c838a9fSAndrew Rybchenko 806e948693eSPhilip Paeps #if EFSYS_OPT_CHECK_REG 807e948693eSPhilip Paeps #define EFX_CHECK_REG(_enp, _reg) \ 808e948693eSPhilip Paeps do { \ 8093c838a9fSAndrew Rybchenko const char *name = #_reg; \ 810e948693eSPhilip Paeps char min = name[4]; \ 811e948693eSPhilip Paeps char max = name[5]; \ 812e948693eSPhilip Paeps char rev; \ 813e948693eSPhilip Paeps \ 814e948693eSPhilip Paeps switch ((_enp)->en_family) { \ 815e948693eSPhilip Paeps case EFX_FAMILY_FALCON: \ 816e948693eSPhilip Paeps rev = 'B'; \ 817e948693eSPhilip Paeps break; \ 818e948693eSPhilip Paeps \ 819e948693eSPhilip Paeps case EFX_FAMILY_SIENA: \ 820e948693eSPhilip Paeps rev = 'C'; \ 821e948693eSPhilip Paeps break; \ 822e948693eSPhilip Paeps \ 8233c838a9fSAndrew Rybchenko case EFX_FAMILY_HUNTINGTON: \ 8243c838a9fSAndrew Rybchenko rev = 'D'; \ 8253c838a9fSAndrew Rybchenko break; \ 8263c838a9fSAndrew Rybchenko \ 82734f6ea29SAndrew Rybchenko case EFX_FAMILY_MEDFORD: \ 82834f6ea29SAndrew Rybchenko rev = 'E'; \ 82934f6ea29SAndrew Rybchenko break; \ 83034f6ea29SAndrew Rybchenko \ 831e948693eSPhilip Paeps default: \ 832e948693eSPhilip Paeps rev = '?'; \ 833e948693eSPhilip Paeps break; \ 834e948693eSPhilip Paeps } \ 835e948693eSPhilip Paeps \ 836e948693eSPhilip Paeps EFSYS_ASSERT3S(rev, >=, min); \ 837e948693eSPhilip Paeps EFSYS_ASSERT3S(rev, <=, max); \ 838e948693eSPhilip Paeps \ 839e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 840e948693eSPhilip Paeps } while (B_FALSE) 841e948693eSPhilip Paeps #else 842e948693eSPhilip Paeps #define EFX_CHECK_REG(_enp, _reg) do { \ 843e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 844e948693eSPhilip Paeps } while(B_FALSE) 845e948693eSPhilip Paeps #endif 846e948693eSPhilip Paeps 847e948693eSPhilip Paeps #define EFX_BAR_READD(_enp, _reg, _edp, _lock) \ 848e948693eSPhilip Paeps do { \ 849e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 850e948693eSPhilip Paeps EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST, \ 851e948693eSPhilip Paeps (_edp), (_lock)); \ 852e948693eSPhilip Paeps EFSYS_PROBE3(efx_bar_readd, const char *, #_reg, \ 853e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 854e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 855e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 856e948693eSPhilip Paeps } while (B_FALSE) 857e948693eSPhilip Paeps 858e948693eSPhilip Paeps #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock) \ 859e948693eSPhilip Paeps do { \ 860e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 861e948693eSPhilip Paeps EFSYS_PROBE3(efx_bar_writed, const char *, #_reg, \ 862e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 863e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 864e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST, \ 865e948693eSPhilip Paeps (_edp), (_lock)); \ 866e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 867e948693eSPhilip Paeps } while (B_FALSE) 868e948693eSPhilip Paeps 869e948693eSPhilip Paeps #define EFX_BAR_READQ(_enp, _reg, _eqp) \ 870e948693eSPhilip Paeps do { \ 871e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 872e948693eSPhilip Paeps EFSYS_BAR_READQ((_enp)->en_esbp, _reg ## _OFST, \ 873e948693eSPhilip Paeps (_eqp)); \ 874e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_readq, const char *, #_reg, \ 875e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 876e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 877e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 878e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 879e948693eSPhilip Paeps } while (B_FALSE) 880e948693eSPhilip Paeps 881e948693eSPhilip Paeps #define EFX_BAR_WRITEQ(_enp, _reg, _eqp) \ 882e948693eSPhilip Paeps do { \ 883e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 884e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_writeq, const char *, #_reg, \ 885e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 886e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 887e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 888e948693eSPhilip Paeps EFSYS_BAR_WRITEQ((_enp)->en_esbp, _reg ## _OFST, \ 889e948693eSPhilip Paeps (_eqp)); \ 890e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 891e948693eSPhilip Paeps } while (B_FALSE) 892e948693eSPhilip Paeps 893e948693eSPhilip Paeps #define EFX_BAR_READO(_enp, _reg, _eop) \ 894e948693eSPhilip Paeps do { \ 895e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 896e948693eSPhilip Paeps EFSYS_BAR_READO((_enp)->en_esbp, _reg ## _OFST, \ 897e948693eSPhilip Paeps (_eop), B_TRUE); \ 898e948693eSPhilip Paeps EFSYS_PROBE6(efx_bar_reado, const char *, #_reg, \ 899e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 900e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 901e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 902e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 903e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 904e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 905e948693eSPhilip Paeps } while (B_FALSE) 906e948693eSPhilip Paeps 907e948693eSPhilip Paeps #define EFX_BAR_WRITEO(_enp, _reg, _eop) \ 908e948693eSPhilip Paeps do { \ 909e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 910e948693eSPhilip Paeps EFSYS_PROBE6(efx_bar_writeo, const char *, #_reg, \ 911e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 912e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 913e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 914e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 915e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 916e948693eSPhilip Paeps EFSYS_BAR_WRITEO((_enp)->en_esbp, _reg ## _OFST, \ 917e948693eSPhilip Paeps (_eop), B_TRUE); \ 918e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 919e948693eSPhilip Paeps } while (B_FALSE) 920e948693eSPhilip Paeps 921e948693eSPhilip Paeps #define EFX_BAR_TBL_READD(_enp, _reg, _index, _edp, _lock) \ 922e948693eSPhilip Paeps do { \ 923e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 924e948693eSPhilip Paeps EFSYS_BAR_READD((_enp)->en_esbp, \ 925e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 926e948693eSPhilip Paeps (_edp), (_lock)); \ 927e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_readd, const char *, #_reg, \ 928e948693eSPhilip Paeps uint32_t, (_index), \ 929e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 930e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 931e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 932e948693eSPhilip Paeps } while (B_FALSE) 933e948693eSPhilip Paeps 934e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITED(_enp, _reg, _index, _edp, _lock) \ 935e948693eSPhilip Paeps do { \ 936e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 937e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 938e948693eSPhilip Paeps uint32_t, (_index), \ 939e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 940e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 941e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, \ 942e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 943e948693eSPhilip Paeps (_edp), (_lock)); \ 944e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 945e948693eSPhilip Paeps } while (B_FALSE) 946e948693eSPhilip Paeps 9473c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_WRITED2(_enp, _reg, _index, _edp, _lock) \ 9483c838a9fSAndrew Rybchenko do { \ 9493c838a9fSAndrew Rybchenko EFX_CHECK_REG((_enp), (_reg)); \ 9503c838a9fSAndrew Rybchenko EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 9513c838a9fSAndrew Rybchenko uint32_t, (_index), \ 9523c838a9fSAndrew Rybchenko uint32_t, _reg ## _OFST, \ 9533c838a9fSAndrew Rybchenko uint32_t, (_edp)->ed_u32[0]); \ 9543c838a9fSAndrew Rybchenko EFSYS_BAR_WRITED((_enp)->en_esbp, \ 9553c838a9fSAndrew Rybchenko (_reg ## _OFST + \ 9563c838a9fSAndrew Rybchenko (2 * sizeof (efx_dword_t)) + \ 9573c838a9fSAndrew Rybchenko ((_index) * _reg ## _STEP)), \ 9583c838a9fSAndrew Rybchenko (_edp), (_lock)); \ 9593c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 9603c838a9fSAndrew Rybchenko } while (B_FALSE) 9613c838a9fSAndrew Rybchenko 962e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITED3(_enp, _reg, _index, _edp, _lock) \ 963e948693eSPhilip Paeps do { \ 964e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 965e948693eSPhilip Paeps EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ 966e948693eSPhilip Paeps uint32_t, (_index), \ 967e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 968e948693eSPhilip Paeps uint32_t, (_edp)->ed_u32[0]); \ 969e948693eSPhilip Paeps EFSYS_BAR_WRITED((_enp)->en_esbp, \ 970e948693eSPhilip Paeps (_reg ## _OFST + \ 971e948693eSPhilip Paeps (3 * sizeof (efx_dword_t)) + \ 972e948693eSPhilip Paeps ((_index) * _reg ## _STEP)), \ 973e948693eSPhilip Paeps (_edp), (_lock)); \ 974e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 975e948693eSPhilip Paeps } while (B_FALSE) 976e948693eSPhilip Paeps 977e948693eSPhilip Paeps #define EFX_BAR_TBL_READQ(_enp, _reg, _index, _eqp) \ 978e948693eSPhilip Paeps do { \ 979e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 980e948693eSPhilip Paeps EFSYS_BAR_READQ((_enp)->en_esbp, \ 981e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 982e948693eSPhilip Paeps (_eqp)); \ 983e948693eSPhilip Paeps EFSYS_PROBE5(efx_bar_tbl_readq, const char *, #_reg, \ 984e948693eSPhilip Paeps uint32_t, (_index), \ 985e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 986e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 987e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 988e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 989e948693eSPhilip Paeps } while (B_FALSE) 990e948693eSPhilip Paeps 991e948693eSPhilip Paeps #define EFX_BAR_TBL_WRITEQ(_enp, _reg, _index, _eqp) \ 992e948693eSPhilip Paeps do { \ 993e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 994e948693eSPhilip Paeps EFSYS_PROBE5(efx_bar_tbl_writeq, const char *, #_reg, \ 995e948693eSPhilip Paeps uint32_t, (_index), \ 996e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 997e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[1], \ 998e948693eSPhilip Paeps uint32_t, (_eqp)->eq_u32[0]); \ 999e948693eSPhilip Paeps EFSYS_BAR_WRITEQ((_enp)->en_esbp, \ 1000e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 1001e948693eSPhilip Paeps (_eqp)); \ 1002e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 1003e948693eSPhilip Paeps } while (B_FALSE) 1004e948693eSPhilip Paeps 10053c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop, _lock) \ 1006e948693eSPhilip Paeps do { \ 1007e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 1008e948693eSPhilip Paeps EFSYS_BAR_READO((_enp)->en_esbp, \ 1009e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 10103c838a9fSAndrew Rybchenko (_eop), (_lock)); \ 1011e948693eSPhilip Paeps EFSYS_PROBE7(efx_bar_tbl_reado, const char *, #_reg, \ 1012e948693eSPhilip Paeps uint32_t, (_index), \ 1013e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 1014e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 1015e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 1016e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 1017e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 1018e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 1019e948693eSPhilip Paeps } while (B_FALSE) 1020e948693eSPhilip Paeps 10213c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop, _lock) \ 1022e948693eSPhilip Paeps do { \ 1023e948693eSPhilip Paeps EFX_CHECK_REG((_enp), (_reg)); \ 1024e948693eSPhilip Paeps EFSYS_PROBE7(efx_bar_tbl_writeo, const char *, #_reg, \ 1025e948693eSPhilip Paeps uint32_t, (_index), \ 1026e948693eSPhilip Paeps uint32_t, _reg ## _OFST, \ 1027e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[3], \ 1028e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[2], \ 1029e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[1], \ 1030e948693eSPhilip Paeps uint32_t, (_eop)->eo_u32[0]); \ 1031e948693eSPhilip Paeps EFSYS_BAR_WRITEO((_enp)->en_esbp, \ 1032e948693eSPhilip Paeps (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 10333c838a9fSAndrew Rybchenko (_eop), (_lock)); \ 10343c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 10353c838a9fSAndrew Rybchenko } while (B_FALSE) 10363c838a9fSAndrew Rybchenko 10373c838a9fSAndrew Rybchenko /* 10383c838a9fSAndrew Rybchenko * Allow drivers to perform optimised 128-bit doorbell writes. 10393c838a9fSAndrew Rybchenko * The DMA descriptor pointers (RX_DESC_UPD and TX_DESC_UPD) are 10403c838a9fSAndrew Rybchenko * special-cased in the BIU on the Falcon/Siena and EF10 architectures to avoid 10413c838a9fSAndrew Rybchenko * the need for locking in the host, and are the only ones known to be safe to 10423c838a9fSAndrew Rybchenko * use 128-bites write with. 10433c838a9fSAndrew Rybchenko */ 10443c838a9fSAndrew Rybchenko #define EFX_BAR_TBL_DOORBELL_WRITEO(_enp, _reg, _index, _eop) \ 10453c838a9fSAndrew Rybchenko do { \ 10463c838a9fSAndrew Rybchenko EFX_CHECK_REG((_enp), (_reg)); \ 10473c838a9fSAndrew Rybchenko EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo, \ 10483c838a9fSAndrew Rybchenko const char *, \ 10493c838a9fSAndrew Rybchenko #_reg, \ 10503c838a9fSAndrew Rybchenko uint32_t, (_index), \ 10513c838a9fSAndrew Rybchenko uint32_t, _reg ## _OFST, \ 10523c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[3], \ 10533c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[2], \ 10543c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[1], \ 10553c838a9fSAndrew Rybchenko uint32_t, (_eop)->eo_u32[0]); \ 10563c838a9fSAndrew Rybchenko EFSYS_BAR_DOORBELL_WRITEO((_enp)->en_esbp, \ 10573c838a9fSAndrew Rybchenko (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ 10583c838a9fSAndrew Rybchenko (_eop)); \ 10593c838a9fSAndrew Rybchenko _NOTE(CONSTANTCONDITION) \ 10603c838a9fSAndrew Rybchenko } while (B_FALSE) 10613c838a9fSAndrew Rybchenko 10623c838a9fSAndrew Rybchenko #define EFX_DMA_SYNC_QUEUE_FOR_DEVICE(_esmp, _entries, _wptr, _owptr) \ 10633c838a9fSAndrew Rybchenko do { \ 10643c838a9fSAndrew Rybchenko unsigned int _new = (_wptr); \ 10653c838a9fSAndrew Rybchenko unsigned int _old = (_owptr); \ 10663c838a9fSAndrew Rybchenko \ 10673c838a9fSAndrew Rybchenko if ((_new) >= (_old)) \ 10683c838a9fSAndrew Rybchenko EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ 10693c838a9fSAndrew Rybchenko (_old) * sizeof (efx_desc_t), \ 10703c838a9fSAndrew Rybchenko ((_new) - (_old)) * sizeof (efx_desc_t)); \ 10713c838a9fSAndrew Rybchenko else \ 10723c838a9fSAndrew Rybchenko /* \ 10733c838a9fSAndrew Rybchenko * It is cheaper to sync entire map than sync \ 10743c838a9fSAndrew Rybchenko * two parts especially when offset/size are \ 10753c838a9fSAndrew Rybchenko * ignored and entire map is synced in any case.\ 10763c838a9fSAndrew Rybchenko */ \ 10773c838a9fSAndrew Rybchenko EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ 10783c838a9fSAndrew Rybchenko 0, \ 10793c838a9fSAndrew Rybchenko (_entries) * sizeof (efx_desc_t)); \ 1080e948693eSPhilip Paeps _NOTE(CONSTANTCONDITION) \ 1081e948693eSPhilip Paeps } while (B_FALSE) 1082e948693eSPhilip Paeps 1083460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 10843c838a9fSAndrew Rybchenko efx_nic_biu_test( 10853c838a9fSAndrew Rybchenko __in efx_nic_t *enp); 10863c838a9fSAndrew Rybchenko 1087460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1088e948693eSPhilip Paeps efx_mac_select( 1089e948693eSPhilip Paeps __in efx_nic_t *enp); 1090e948693eSPhilip Paeps 10913c838a9fSAndrew Rybchenko extern void 10923c838a9fSAndrew Rybchenko efx_mac_multicast_hash_compute( 10933c838a9fSAndrew Rybchenko __in_ecount(6*count) uint8_t const *addrs, 10943c838a9fSAndrew Rybchenko __in int count, 10953c838a9fSAndrew Rybchenko __out efx_oword_t *hash_low, 10963c838a9fSAndrew Rybchenko __out efx_oword_t *hash_high); 10973c838a9fSAndrew Rybchenko 1098460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1099e948693eSPhilip Paeps efx_phy_probe( 1100e948693eSPhilip Paeps __in efx_nic_t *enp); 1101e948693eSPhilip Paeps 1102e948693eSPhilip Paeps extern void 1103e948693eSPhilip Paeps efx_phy_unprobe( 1104e948693eSPhilip Paeps __in efx_nic_t *enp); 1105e948693eSPhilip Paeps 1106e948693eSPhilip Paeps #if EFSYS_OPT_VPD 1107e948693eSPhilip Paeps 1108e948693eSPhilip Paeps /* VPD utility functions */ 1109e948693eSPhilip Paeps 1110460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1111e948693eSPhilip Paeps efx_vpd_hunk_length( 1112e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1113e948693eSPhilip Paeps __in size_t size, 1114e948693eSPhilip Paeps __out size_t *lengthp); 1115e948693eSPhilip Paeps 1116460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1117e948693eSPhilip Paeps efx_vpd_hunk_verify( 1118e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1119e948693eSPhilip Paeps __in size_t size, 1120e948693eSPhilip Paeps __out_opt boolean_t *cksummedp); 1121e948693eSPhilip Paeps 1122460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1123e948693eSPhilip Paeps efx_vpd_hunk_reinit( 11243c838a9fSAndrew Rybchenko __in_bcount(size) caddr_t data, 1125e948693eSPhilip Paeps __in size_t size, 1126e948693eSPhilip Paeps __in boolean_t wantpid); 1127e948693eSPhilip Paeps 1128460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1129e948693eSPhilip Paeps efx_vpd_hunk_get( 1130e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1131e948693eSPhilip Paeps __in size_t size, 1132e948693eSPhilip Paeps __in efx_vpd_tag_t tag, 1133e948693eSPhilip Paeps __in efx_vpd_keyword_t keyword, 1134e948693eSPhilip Paeps __out unsigned int *payloadp, 1135e948693eSPhilip Paeps __out uint8_t *paylenp); 1136e948693eSPhilip Paeps 1137460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1138e948693eSPhilip Paeps efx_vpd_hunk_next( 1139e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1140e948693eSPhilip Paeps __in size_t size, 1141e948693eSPhilip Paeps __out efx_vpd_tag_t *tagp, 1142e948693eSPhilip Paeps __out efx_vpd_keyword_t *keyword, 114386ec4b85SAndrew Rybchenko __out_opt unsigned int *payloadp, 1144e948693eSPhilip Paeps __out_opt uint8_t *paylenp, 1145e948693eSPhilip Paeps __inout unsigned int *contp); 1146e948693eSPhilip Paeps 1147460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1148e948693eSPhilip Paeps efx_vpd_hunk_set( 1149e948693eSPhilip Paeps __in_bcount(size) caddr_t data, 1150e948693eSPhilip Paeps __in size_t size, 1151e948693eSPhilip Paeps __in efx_vpd_value_t *evvp); 1152e948693eSPhilip Paeps 1153e948693eSPhilip Paeps #endif /* EFSYS_OPT_VPD */ 1154e948693eSPhilip Paeps 1155e948693eSPhilip Paeps #if EFSYS_OPT_DIAG 1156e948693eSPhilip Paeps 11573c838a9fSAndrew Rybchenko extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 1158e948693eSPhilip Paeps 1159e948693eSPhilip Paeps typedef struct efx_register_set_s { 1160e948693eSPhilip Paeps unsigned int address; 1161e948693eSPhilip Paeps unsigned int step; 1162e948693eSPhilip Paeps unsigned int rows; 1163e948693eSPhilip Paeps efx_oword_t mask; 1164e948693eSPhilip Paeps } efx_register_set_t; 1165e948693eSPhilip Paeps 1166460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1167e948693eSPhilip Paeps efx_nic_test_registers( 1168e948693eSPhilip Paeps __in efx_nic_t *enp, 1169e948693eSPhilip Paeps __in efx_register_set_t *rsp, 1170e948693eSPhilip Paeps __in size_t count); 1171e948693eSPhilip Paeps 1172460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 1173e948693eSPhilip Paeps efx_nic_test_tables( 1174e948693eSPhilip Paeps __in efx_nic_t *enp, 1175e948693eSPhilip Paeps __in efx_register_set_t *rsp, 1176e948693eSPhilip Paeps __in efx_pattern_type_t pattern, 1177e948693eSPhilip Paeps __in size_t count); 1178e948693eSPhilip Paeps 1179e948693eSPhilip Paeps #endif /* EFSYS_OPT_DIAG */ 1180e948693eSPhilip Paeps 11813c838a9fSAndrew Rybchenko #if EFSYS_OPT_MCDI 11823c838a9fSAndrew Rybchenko 1183460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 11843c838a9fSAndrew Rybchenko efx_mcdi_set_workaround( 11853c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 11863c838a9fSAndrew Rybchenko __in uint32_t type, 11873c838a9fSAndrew Rybchenko __in boolean_t enabled, 11883c838a9fSAndrew Rybchenko __out_opt uint32_t *flagsp); 11893c838a9fSAndrew Rybchenko 1190460cb568SAndrew Rybchenko extern __checkReturn efx_rc_t 11913c838a9fSAndrew Rybchenko efx_mcdi_get_workarounds( 11923c838a9fSAndrew Rybchenko __in efx_nic_t *enp, 11933c838a9fSAndrew Rybchenko __out_opt uint32_t *implementedp, 11943c838a9fSAndrew Rybchenko __out_opt uint32_t *enabledp); 11953c838a9fSAndrew Rybchenko 11963c838a9fSAndrew Rybchenko #endif /* EFSYS_OPT_MCDI */ 11973c838a9fSAndrew Rybchenko 1198e948693eSPhilip Paeps #ifdef __cplusplus 1199e948693eSPhilip Paeps } 1200e948693eSPhilip Paeps #endif 1201e948693eSPhilip Paeps 1202e948693eSPhilip Paeps #endif /* _SYS_EFX_IMPL_H */ 1203