xref: /freebsd/sys/dev/sfxge/common/ef10_phy.c (revision efe3b0de1438e7a8473d92f2be57072394559e3c)
1 /*-
2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  *    this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright notice,
11  *    this list of conditions and the following disclaimer in the documentation
12  *    and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * The views and conclusions contained in the software and documentation are
27  * those of the authors and should not be interpreted as representing official
28  * policies, either expressed or implied, of the FreeBSD Project.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include "efx.h"
35 #include "efx_impl.h"
36 
37 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
38 
39 static			void
40 mcdi_phy_decode_cap(
41 	__in		uint32_t mcdi_cap,
42 	__out		uint32_t *maskp)
43 {
44 	uint32_t mask;
45 
46 	mask = 0;
47 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
48 		mask |= (1 << EFX_PHY_CAP_10HDX);
49 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
50 		mask |= (1 << EFX_PHY_CAP_10FDX);
51 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
52 		mask |= (1 << EFX_PHY_CAP_100HDX);
53 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
54 		mask |= (1 << EFX_PHY_CAP_100FDX);
55 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
56 		mask |= (1 << EFX_PHY_CAP_1000HDX);
57 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
58 		mask |= (1 << EFX_PHY_CAP_1000FDX);
59 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
60 		mask |= (1 << EFX_PHY_CAP_10000FDX);
61 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
62 		mask |= (1 << EFX_PHY_CAP_40000FDX);
63 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
64 		mask |= (1 << EFX_PHY_CAP_PAUSE);
65 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
66 		mask |= (1 << EFX_PHY_CAP_ASYM);
67 	if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
68 		mask |= (1 << EFX_PHY_CAP_AN);
69 
70 	*maskp = mask;
71 }
72 
73 static			void
74 mcdi_phy_decode_link_mode(
75 	__in		efx_nic_t *enp,
76 	__in		uint32_t link_flags,
77 	__in		unsigned int speed,
78 	__in		unsigned int fcntl,
79 	__out		efx_link_mode_t *link_modep,
80 	__out		unsigned int *fcntlp)
81 {
82 	boolean_t fd = !!(link_flags &
83 		    (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
84 	boolean_t up = !!(link_flags &
85 		    (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
86 
87 	_NOTE(ARGUNUSED(enp))
88 
89 	if (!up)
90 		*link_modep = EFX_LINK_DOWN;
91 	else if (speed == 40000 && fd)
92 		*link_modep = EFX_LINK_40000FDX;
93 	else if (speed == 10000 && fd)
94 		*link_modep = EFX_LINK_10000FDX;
95 	else if (speed == 1000)
96 		*link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
97 	else if (speed == 100)
98 		*link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
99 	else if (speed == 10)
100 		*link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
101 	else
102 		*link_modep = EFX_LINK_UNKNOWN;
103 
104 	if (fcntl == MC_CMD_FCNTL_OFF)
105 		*fcntlp = 0;
106 	else if (fcntl == MC_CMD_FCNTL_RESPOND)
107 		*fcntlp = EFX_FCNTL_RESPOND;
108 	else if (fcntl == MC_CMD_FCNTL_GENERATE)
109 		*fcntlp = EFX_FCNTL_GENERATE;
110 	else if (fcntl == MC_CMD_FCNTL_BIDIR)
111 		*fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
112 	else {
113 		EFSYS_PROBE1(mc_pcol_error, int, fcntl);
114 		*fcntlp = 0;
115 	}
116 }
117 
118 
119 			void
120 ef10_phy_link_ev(
121 	__in		efx_nic_t *enp,
122 	__in		efx_qword_t *eqp,
123 	__out		efx_link_mode_t *link_modep)
124 {
125 	efx_port_t *epp = &(enp->en_port);
126 	unsigned int link_flags;
127 	unsigned int speed;
128 	unsigned int fcntl;
129 	efx_link_mode_t link_mode;
130 	uint32_t lp_cap_mask;
131 
132 	/*
133 	 * Convert the LINKCHANGE speed enumeration into mbit/s, in the
134 	 * same way as GET_LINK encodes the speed
135 	 */
136 	switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) {
137 	case MCDI_EVENT_LINKCHANGE_SPEED_100M:
138 		speed = 100;
139 		break;
140 	case MCDI_EVENT_LINKCHANGE_SPEED_1G:
141 		speed = 1000;
142 		break;
143 	case MCDI_EVENT_LINKCHANGE_SPEED_10G:
144 		speed = 10000;
145 		break;
146 	case MCDI_EVENT_LINKCHANGE_SPEED_40G:
147 		speed = 40000;
148 		break;
149 	default:
150 		speed = 0;
151 		break;
152 	}
153 
154 	link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
155 	mcdi_phy_decode_link_mode(enp, link_flags, speed,
156 				    MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
157 				    &link_mode, &fcntl);
158 	mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
159 			    &lp_cap_mask);
160 
161 	/*
162 	 * It's safe to update ep_lp_cap_mask without the driver's port lock
163 	 * because presumably any concurrently running efx_port_poll() is
164 	 * only going to arrive at the same value.
165 	 *
166 	 * ep_fcntl has two meanings. It's either the link common fcntl
167 	 * (if the PHY supports AN), or it's the forced link state. If
168 	 * the former, it's safe to update the value for the same reason as
169 	 * for ep_lp_cap_mask. If the latter, then just ignore the value,
170 	 * because we can race with efx_mac_fcntl_set().
171 	 */
172 	epp->ep_lp_cap_mask = lp_cap_mask;
173 	epp->ep_fcntl = fcntl;
174 
175 	*link_modep = link_mode;
176 }
177 
178 	__checkReturn	efx_rc_t
179 ef10_phy_power(
180 	__in		efx_nic_t *enp,
181 	__in		boolean_t power)
182 {
183 	efx_rc_t rc;
184 
185 	if (!power)
186 		return (0);
187 
188 	/* Check if the PHY is a zombie */
189 	if ((rc = ef10_phy_verify(enp)) != 0)
190 		goto fail1;
191 
192 	enp->en_reset_flags |= EFX_RESET_PHY;
193 
194 	return (0);
195 
196 fail1:
197 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
198 
199 	return (rc);
200 }
201 
202 	__checkReturn	efx_rc_t
203 ef10_phy_get_link(
204 	__in		efx_nic_t *enp,
205 	__out		ef10_link_state_t *elsp)
206 {
207 	efx_mcdi_req_t req;
208 	uint8_t payload[MAX(MC_CMD_GET_LINK_IN_LEN,
209 			    MC_CMD_GET_LINK_OUT_LEN)];
210 	efx_rc_t rc;
211 
212 	(void) memset(payload, 0, sizeof (payload));
213 	req.emr_cmd = MC_CMD_GET_LINK;
214 	req.emr_in_buf = payload;
215 	req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
216 	req.emr_out_buf = payload;
217 	req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
218 
219 	efx_mcdi_execute(enp, &req);
220 
221 	if (req.emr_rc != 0) {
222 		rc = req.emr_rc;
223 		goto fail1;
224 	}
225 
226 	if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
227 		rc = EMSGSIZE;
228 		goto fail2;
229 	}
230 
231 	mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
232 			    &elsp->els_adv_cap_mask);
233 	mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
234 			    &elsp->els_lp_cap_mask);
235 
236 	mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
237 			    MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
238 			    MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
239 			    &elsp->els_link_mode, &elsp->els_fcntl);
240 
241 #if EFSYS_OPT_LOOPBACK
242 	/* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */
243 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF);
244 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA);
245 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC);
246 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII);
247 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS);
248 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI);
249 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII);
250 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII);
251 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR);
252 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI);
253 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR);
254 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR);
255 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR);
256 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR);
257 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY);
258 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS);
259 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS);
260 	EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD);
261 
262 	elsp->els_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
263 #endif	/* EFSYS_OPT_LOOPBACK */
264 
265 	elsp->els_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
266 
267 	return (0);
268 
269 fail2:
270 	EFSYS_PROBE(fail2);
271 fail1:
272 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
273 
274 	return (rc);
275 }
276 
277 	__checkReturn	efx_rc_t
278 ef10_phy_reconfigure(
279 	__in		efx_nic_t *enp)
280 {
281 	efx_port_t *epp = &(enp->en_port);
282 	efx_mcdi_req_t req;
283 	uint8_t payload[MAX(MC_CMD_SET_LINK_IN_LEN,
284 			    MC_CMD_SET_LINK_OUT_LEN)];
285 	uint32_t cap_mask;
286 	unsigned int led_mode;
287 	unsigned int speed;
288 	boolean_t supported;
289 	efx_rc_t rc;
290 
291 	if ((rc = efx_mcdi_link_control_supported(enp, &supported)) != 0)
292 		goto fail1;
293 	if (supported == B_FALSE)
294 		goto out;
295 
296 	(void) memset(payload, 0, sizeof (payload));
297 	req.emr_cmd = MC_CMD_SET_LINK;
298 	req.emr_in_buf = payload;
299 	req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
300 	req.emr_out_buf = payload;
301 	req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN;
302 
303 	cap_mask = epp->ep_adv_cap_mask;
304 	MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
305 		PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
306 		PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
307 		PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
308 		PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
309 		PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
310 		PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
311 		PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
312 		PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
313 		PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
314 		PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
315 	/* Too many fields for for POPULATE macros, so insert this afterwards */
316 	MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
317 	    PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);
318 
319 #if EFSYS_OPT_LOOPBACK
320 	MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
321 		    epp->ep_loopback_type);
322 	switch (epp->ep_loopback_link_mode) {
323 	case EFX_LINK_100FDX:
324 		speed = 100;
325 		break;
326 	case EFX_LINK_1000FDX:
327 		speed = 1000;
328 		break;
329 	case EFX_LINK_10000FDX:
330 		speed = 10000;
331 		break;
332 	case EFX_LINK_40000FDX:
333 		speed = 40000;
334 		break;
335 	default:
336 		speed = 0;
337 	}
338 #else
339 	MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
340 	speed = 0;
341 #endif	/* EFSYS_OPT_LOOPBACK */
342 	MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
343 
344 #if EFSYS_OPT_PHY_FLAGS
345 	MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
346 #else
347 	MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
348 #endif	/* EFSYS_OPT_PHY_FLAGS */
349 
350 	efx_mcdi_execute(enp, &req);
351 
352 	if (req.emr_rc != 0) {
353 		rc = req.emr_rc;
354 		goto fail2;
355 	}
356 
357 	/* And set the blink mode */
358 	(void) memset(payload, 0, sizeof (payload));
359 	req.emr_cmd = MC_CMD_SET_ID_LED;
360 	req.emr_in_buf = payload;
361 	req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
362 	req.emr_out_buf = payload;
363 	req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN;
364 
365 #if EFSYS_OPT_PHY_LED_CONTROL
366 	switch (epp->ep_phy_led_mode) {
367 	case EFX_PHY_LED_DEFAULT:
368 		led_mode = MC_CMD_LED_DEFAULT;
369 		break;
370 	case EFX_PHY_LED_OFF:
371 		led_mode = MC_CMD_LED_OFF;
372 		break;
373 	case EFX_PHY_LED_ON:
374 		led_mode = MC_CMD_LED_ON;
375 		break;
376 	default:
377 		EFSYS_ASSERT(0);
378 		led_mode = MC_CMD_LED_DEFAULT;
379 	}
380 
381 	MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
382 #else
383 	MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
384 #endif	/* EFSYS_OPT_PHY_LED_CONTROL */
385 
386 	efx_mcdi_execute(enp, &req);
387 
388 	if (req.emr_rc != 0) {
389 		rc = req.emr_rc;
390 		goto fail3;
391 	}
392 out:
393 	return (0);
394 
395 fail3:
396 	EFSYS_PROBE(fail3);
397 fail2:
398 	EFSYS_PROBE(fail2);
399 fail1:
400 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
401 
402 	return (rc);
403 }
404 
405 	__checkReturn	efx_rc_t
406 ef10_phy_verify(
407 	__in		efx_nic_t *enp)
408 {
409 	efx_mcdi_req_t req;
410 	uint8_t payload[MAX(MC_CMD_GET_PHY_STATE_IN_LEN,
411 			    MC_CMD_GET_PHY_STATE_OUT_LEN)];
412 	uint32_t state;
413 	efx_rc_t rc;
414 
415 	(void) memset(payload, 0, sizeof (payload));
416 	req.emr_cmd = MC_CMD_GET_PHY_STATE;
417 	req.emr_in_buf = payload;
418 	req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN;
419 	req.emr_out_buf = payload;
420 	req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN;
421 
422 	efx_mcdi_execute(enp, &req);
423 
424 	if (req.emr_rc != 0) {
425 		rc = req.emr_rc;
426 		goto fail1;
427 	}
428 
429 	if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
430 		rc = EMSGSIZE;
431 		goto fail2;
432 	}
433 
434 	state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
435 	if (state != MC_CMD_PHY_STATE_OK) {
436 		if (state != MC_CMD_PHY_STATE_ZOMBIE)
437 			EFSYS_PROBE1(mc_pcol_error, int, state);
438 		rc = ENOTACTIVE;
439 		goto fail3;
440 	}
441 
442 	return (0);
443 
444 fail3:
445 	EFSYS_PROBE(fail3);
446 fail2:
447 	EFSYS_PROBE(fail2);
448 fail1:
449 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
450 
451 	return (rc);
452 }
453 
454 	__checkReturn	efx_rc_t
455 ef10_phy_oui_get(
456 	__in		efx_nic_t *enp,
457 	__out		uint32_t *ouip)
458 {
459 	_NOTE(ARGUNUSED(enp, ouip))
460 
461 	return (ENOTSUP);
462 }
463 
464 #if EFSYS_OPT_PHY_STATS
465 
466 	__checkReturn				efx_rc_t
467 ef10_phy_stats_update(
468 	__in					efx_nic_t *enp,
469 	__in					efsys_mem_t *esmp,
470 	__inout_ecount(EFX_PHY_NSTATS)		uint32_t *stat)
471 {
472 	/* TBD: no stats support in firmware yet */
473 	_NOTE(ARGUNUSED(enp, esmp))
474 	memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat));
475 
476 	return (0);
477 }
478 
479 #endif	/* EFSYS_OPT_PHY_STATS */
480 
481 #if EFSYS_OPT_BIST
482 
483 	__checkReturn		efx_rc_t
484 ef10_bist_enable_offline(
485 	__in			efx_nic_t *enp)
486 {
487 	efx_rc_t rc;
488 
489 	if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)
490 		goto fail1;
491 
492 	return (0);
493 
494 fail1:
495 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
496 
497 	return (rc);
498 }
499 
500 	__checkReturn		efx_rc_t
501 ef10_bist_start(
502 	__in			efx_nic_t *enp,
503 	__in			efx_bist_type_t type)
504 {
505 	efx_rc_t rc;
506 
507 	if ((rc = efx_mcdi_bist_start(enp, type)) != 0)
508 		goto fail1;
509 
510 	return (0);
511 
512 fail1:
513 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
514 
515 	return (rc);
516 }
517 
518 	__checkReturn		efx_rc_t
519 ef10_bist_poll(
520 	__in			efx_nic_t *enp,
521 	__in			efx_bist_type_t type,
522 	__out			efx_bist_result_t *resultp,
523 	__out_opt __drv_when(count > 0, __notnull)
524 	uint32_t *value_maskp,
525 	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
526 	unsigned long *valuesp,
527 	__in			size_t count)
528 {
529 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
530 	efx_mcdi_req_t req;
531 	uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN,
532 			    MCDI_CTL_SDU_LEN_MAX)];
533 	uint32_t value_mask = 0;
534 	uint32_t result;
535 	efx_rc_t rc;
536 
537 	_NOTE(ARGUNUSED(type))
538 
539 	(void) memset(payload, 0, sizeof (payload));
540 	req.emr_cmd = MC_CMD_POLL_BIST;
541 	req.emr_in_buf = payload;
542 	req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
543 	req.emr_out_buf = payload;
544 	req.emr_out_length = MCDI_CTL_SDU_LEN_MAX;
545 
546 	efx_mcdi_execute(enp, &req);
547 
548 	if (req.emr_rc != 0) {
549 		rc = req.emr_rc;
550 		goto fail1;
551 	}
552 
553 	if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
554 		rc = EMSGSIZE;
555 		goto fail2;
556 	}
557 
558 	if (count > 0)
559 		(void) memset(valuesp, '\0', count * sizeof (unsigned long));
560 
561 	result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
562 
563 	if (result == MC_CMD_POLL_BIST_FAILED &&
564 	    req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&
565 	    count > EFX_BIST_MEM_ECC_FATAL) {
566 		if (valuesp != NULL) {
567 			valuesp[EFX_BIST_MEM_TEST] =
568 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);
569 			valuesp[EFX_BIST_MEM_ADDR] =
570 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);
571 			valuesp[EFX_BIST_MEM_BUS] =
572 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);
573 			valuesp[EFX_BIST_MEM_EXPECT] =
574 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);
575 			valuesp[EFX_BIST_MEM_ACTUAL] =
576 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);
577 			valuesp[EFX_BIST_MEM_ECC] =
578 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);
579 			valuesp[EFX_BIST_MEM_ECC_PARITY] =
580 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);
581 			valuesp[EFX_BIST_MEM_ECC_FATAL] =
582 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);
583 		}
584 		value_mask |= (1 << EFX_BIST_MEM_TEST) |
585 		    (1 << EFX_BIST_MEM_ADDR) |
586 		    (1 << EFX_BIST_MEM_BUS) |
587 		    (1 << EFX_BIST_MEM_EXPECT) |
588 		    (1 << EFX_BIST_MEM_ACTUAL) |
589 		    (1 << EFX_BIST_MEM_ECC) |
590 		    (1 << EFX_BIST_MEM_ECC_PARITY) |
591 		    (1 << EFX_BIST_MEM_ECC_FATAL);
592 	} else if (result == MC_CMD_POLL_BIST_FAILED &&
593 	    encp->enc_phy_type == EFX_PHY_XFI_FARMI &&
594 	    req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
595 	    count > EFX_BIST_FAULT_CODE) {
596 		if (valuesp != NULL)
597 			valuesp[EFX_BIST_FAULT_CODE] =
598 			    MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
599 		value_mask |= 1 << EFX_BIST_FAULT_CODE;
600 	}
601 
602 	if (value_maskp != NULL)
603 		*value_maskp = value_mask;
604 
605 	EFSYS_ASSERT(resultp != NULL);
606 	if (result == MC_CMD_POLL_BIST_RUNNING)
607 		*resultp = EFX_BIST_RESULT_RUNNING;
608 	else if (result == MC_CMD_POLL_BIST_PASSED)
609 		*resultp = EFX_BIST_RESULT_PASSED;
610 	else
611 		*resultp = EFX_BIST_RESULT_FAILED;
612 
613 	return (0);
614 
615 fail2:
616 	EFSYS_PROBE(fail2);
617 fail1:
618 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
619 
620 	return (rc);
621 }
622 
623 			void
624 ef10_bist_stop(
625 	__in		efx_nic_t *enp,
626 	__in		efx_bist_type_t type)
627 {
628 	/* There is no way to stop BIST on EF10. */
629 	_NOTE(ARGUNUSED(enp, type))
630 }
631 
632 #endif	/* EFSYS_OPT_BIST */
633 
634 #endif	/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
635