xref: /freebsd/sys/dev/sdhci/sdhci_pci.c (revision 0f34084f95f70116d2f38cf7053f0afcea4b5e4f)
1d6b3aaf8SOleksandr Tymoshenko /*-
2d6b3aaf8SOleksandr Tymoshenko  * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3d6b3aaf8SOleksandr Tymoshenko  * All rights reserved.
4d6b3aaf8SOleksandr Tymoshenko  *
5d6b3aaf8SOleksandr Tymoshenko  * Redistribution and use in source and binary forms, with or without
6d6b3aaf8SOleksandr Tymoshenko  * modification, are permitted provided that the following conditions
7d6b3aaf8SOleksandr Tymoshenko  * are met:
8d6b3aaf8SOleksandr Tymoshenko  * 1. Redistributions of source code must retain the above copyright
9d6b3aaf8SOleksandr Tymoshenko  *    notice, this list of conditions and the following disclaimer.
10d6b3aaf8SOleksandr Tymoshenko  * 2. Redistributions in binary form must reproduce the above copyright
11d6b3aaf8SOleksandr Tymoshenko  *    notice, this list of conditions and the following disclaimer in the
12d6b3aaf8SOleksandr Tymoshenko  *    documentation and/or other materials provided with the distribution.
13d6b3aaf8SOleksandr Tymoshenko  *
14d6b3aaf8SOleksandr Tymoshenko  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15d6b3aaf8SOleksandr Tymoshenko  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16d6b3aaf8SOleksandr Tymoshenko  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17d6b3aaf8SOleksandr Tymoshenko  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18d6b3aaf8SOleksandr Tymoshenko  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19d6b3aaf8SOleksandr Tymoshenko  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20d6b3aaf8SOleksandr Tymoshenko  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21d6b3aaf8SOleksandr Tymoshenko  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22d6b3aaf8SOleksandr Tymoshenko  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23d6b3aaf8SOleksandr Tymoshenko  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24d6b3aaf8SOleksandr Tymoshenko  */
25d6b3aaf8SOleksandr Tymoshenko 
26d6b3aaf8SOleksandr Tymoshenko #include <sys/cdefs.h>
27d6b3aaf8SOleksandr Tymoshenko __FBSDID("$FreeBSD$");
28d6b3aaf8SOleksandr Tymoshenko 
29d6b3aaf8SOleksandr Tymoshenko #include <sys/param.h>
30d6b3aaf8SOleksandr Tymoshenko #include <sys/systm.h>
31d6b3aaf8SOleksandr Tymoshenko #include <sys/bus.h>
32d6b3aaf8SOleksandr Tymoshenko #include <sys/kernel.h>
33d6b3aaf8SOleksandr Tymoshenko #include <sys/lock.h>
34d6b3aaf8SOleksandr Tymoshenko #include <sys/module.h>
35d6b3aaf8SOleksandr Tymoshenko #include <sys/mutex.h>
36d6b3aaf8SOleksandr Tymoshenko #include <sys/resource.h>
37d6b3aaf8SOleksandr Tymoshenko #include <sys/rman.h>
38d6b3aaf8SOleksandr Tymoshenko #include <sys/sysctl.h>
39d6b3aaf8SOleksandr Tymoshenko #include <sys/taskqueue.h>
40d6b3aaf8SOleksandr Tymoshenko 
41d6b3aaf8SOleksandr Tymoshenko #include <dev/pci/pcireg.h>
42d6b3aaf8SOleksandr Tymoshenko #include <dev/pci/pcivar.h>
43d6b3aaf8SOleksandr Tymoshenko 
44d6b3aaf8SOleksandr Tymoshenko #include <machine/bus.h>
45d6b3aaf8SOleksandr Tymoshenko #include <machine/resource.h>
46d6b3aaf8SOleksandr Tymoshenko 
47d6b3aaf8SOleksandr Tymoshenko #include <dev/mmc/bridge.h>
48d6b3aaf8SOleksandr Tymoshenko 
49b440e965SMarius Strobl #include <dev/sdhci/sdhci.h>
50b440e965SMarius Strobl 
51d6b3aaf8SOleksandr Tymoshenko #include "mmcbr_if.h"
52d6b3aaf8SOleksandr Tymoshenko #include "sdhci_if.h"
53d6b3aaf8SOleksandr Tymoshenko 
54d6b3aaf8SOleksandr Tymoshenko /*
55d6b3aaf8SOleksandr Tymoshenko  * PCI registers
56d6b3aaf8SOleksandr Tymoshenko  */
57d6b3aaf8SOleksandr Tymoshenko #define	PCI_SDHCI_IFPIO			0x00
58d6b3aaf8SOleksandr Tymoshenko #define	PCI_SDHCI_IFDMA			0x01
59d6b3aaf8SOleksandr Tymoshenko #define	PCI_SDHCI_IFVENDOR		0x02
60d6b3aaf8SOleksandr Tymoshenko 
61d6b3aaf8SOleksandr Tymoshenko #define	PCI_SLOT_INFO			0x40	/* 8 bits */
62d6b3aaf8SOleksandr Tymoshenko #define	PCI_SLOT_INFO_SLOTS(x)		(((x >> 4) & 7) + 1)
63d6b3aaf8SOleksandr Tymoshenko #define	PCI_SLOT_INFO_FIRST_BAR(x)	((x) & 7)
64d6b3aaf8SOleksandr Tymoshenko 
65d6b3aaf8SOleksandr Tymoshenko /*
66d6b3aaf8SOleksandr Tymoshenko  * RICOH specific PCI registers
67d6b3aaf8SOleksandr Tymoshenko  */
68d6b3aaf8SOleksandr Tymoshenko #define	SDHC_PCI_MODE_KEY		0xf9
69d6b3aaf8SOleksandr Tymoshenko #define	SDHC_PCI_MODE			0x150
70d6b3aaf8SOleksandr Tymoshenko #define	SDHC_PCI_MODE_SD20		0x10
71d6b3aaf8SOleksandr Tymoshenko #define	SDHC_PCI_BASE_FREQ_KEY		0xfc
72d6b3aaf8SOleksandr Tymoshenko #define	SDHC_PCI_BASE_FREQ		0xe1
73d6b3aaf8SOleksandr Tymoshenko 
74d6b3aaf8SOleksandr Tymoshenko static const struct sdhci_device {
75d6b3aaf8SOleksandr Tymoshenko 	uint32_t	model;
76d6b3aaf8SOleksandr Tymoshenko 	uint16_t	subvendor;
77f0d2731dSMarius Strobl 	const char	*desc;
78d6b3aaf8SOleksandr Tymoshenko 	u_int		quirks;
79d6b3aaf8SOleksandr Tymoshenko } sdhci_devices[] = {
80d6b3aaf8SOleksandr Tymoshenko 	{ 0x08221180,	0xffff,	"RICOH R5C822 SD",
81d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_FORCE_DMA },
82c2262647SMarius Strobl 	{ 0xe8221180,	0xffff,	"RICOH R5CE822 SD",
83c2262647SMarius Strobl 	    SDHCI_QUIRK_FORCE_DMA |
84c2262647SMarius Strobl 	    SDHCI_QUIRK_LOWER_FREQUENCY },
85d6b3aaf8SOleksandr Tymoshenko 	{ 0xe8231180,	0xffff,	"RICOH R5CE823 SD",
86d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_LOWER_FREQUENCY },
87d6b3aaf8SOleksandr Tymoshenko 	{ 0x8034104c,	0xffff, "TI XX21/XX11 SD",
88d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_FORCE_DMA },
89d6b3aaf8SOleksandr Tymoshenko 	{ 0x05501524,	0xffff, "ENE CB712 SD",
90d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_BROKEN_TIMINGS },
91d6b3aaf8SOleksandr Tymoshenko 	{ 0x05511524,	0xffff, "ENE CB712 SD 2",
92d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_BROKEN_TIMINGS },
93d6b3aaf8SOleksandr Tymoshenko 	{ 0x07501524,	0xffff, "ENE CB714 SD",
94d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_RESET_ON_IOS |
95d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_BROKEN_TIMINGS },
96d6b3aaf8SOleksandr Tymoshenko 	{ 0x07511524,	0xffff, "ENE CB714 SD 2",
97d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_RESET_ON_IOS |
98d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_BROKEN_TIMINGS },
99d6b3aaf8SOleksandr Tymoshenko 	{ 0x410111ab,	0xffff, "Marvell CaFe SD",
100d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_INCR_TIMEOUT_CONTROL },
101d6b3aaf8SOleksandr Tymoshenko 	{ 0x2381197B,	0xffff,	"JMicron JMB38X SD",
102d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_32BIT_DMA_SIZE |
103d6b3aaf8SOleksandr Tymoshenko 	    SDHCI_QUIRK_RESET_AFTER_REQUEST },
10493efdc63SAdrian Chadd 	{ 0x16bc14e4,	0xffff,	"Broadcom BCM577xx SDXC/MMC Card Reader",
10593efdc63SAdrian Chadd 	    SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC },
106a2832f9fSMarius Strobl 	{ 0x0f148086,	0xffff,	"Intel Bay Trail eMMC 4.5 Controller",
107a2832f9fSMarius Strobl 	    SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
10872dec079SMarius Strobl 	    SDHCI_QUIRK_INTEL_POWER_UP_RESET |
109*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
110*0f34084fSMarius Strobl 	    SDHCI_QUIRK_MMC_DDR52 |
111*0f34084fSMarius Strobl 	    SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
112*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN},
11372dec079SMarius Strobl 	{ 0x0f158086,	0xffff,	"Intel Bay Trail SDXC Controller",
114*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
115*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
116a2832f9fSMarius Strobl 	{ 0x0f508086,	0xffff,	"Intel Bay Trail eMMC 4.5 Controller",
117a2832f9fSMarius Strobl 	    SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
11872dec079SMarius Strobl 	    SDHCI_QUIRK_INTEL_POWER_UP_RESET |
119*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
120*0f34084fSMarius Strobl 	    SDHCI_QUIRK_MMC_DDR52 |
121*0f34084fSMarius Strobl 	    SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
122*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
123a2832f9fSMarius Strobl 	{ 0x22948086,	0xffff,	"Intel Braswell eMMC 4.5.1 Controller",
124a2832f9fSMarius Strobl 	    SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
125a2832f9fSMarius Strobl 	    SDHCI_QUIRK_DATA_TIMEOUT_1MHZ |
12672dec079SMarius Strobl 	    SDHCI_QUIRK_INTEL_POWER_UP_RESET |
127*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
128*0f34084fSMarius Strobl 	    SDHCI_QUIRK_MMC_DDR52 |
129*0f34084fSMarius Strobl 	    SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
130*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
13172dec079SMarius Strobl 	{ 0x22968086,	0xffff,	"Intel Braswell SDXC Controller",
132*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
133*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
13472dec079SMarius Strobl 	{ 0x5aca8086,	0xffff,	"Intel Apollo Lake SDXC Controller",
135*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
136*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
137a2832f9fSMarius Strobl 	{ 0x5acc8086,	0xffff,	"Intel Apollo Lake eMMC 5.0 Controller",
138a2832f9fSMarius Strobl 	    SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE |
13972dec079SMarius Strobl 	    SDHCI_QUIRK_INTEL_POWER_UP_RESET |
140*0f34084fSMarius Strobl 	    SDHCI_QUIRK_WAIT_WHILE_BUSY |
141*0f34084fSMarius Strobl 	    SDHCI_QUIRK_MMC_DDR52 |
142*0f34084fSMarius Strobl 	    SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
143*0f34084fSMarius Strobl 	    SDHCI_QUIRK_PRESET_VALUE_BROKEN },
144d6b3aaf8SOleksandr Tymoshenko 	{ 0,		0xffff,	NULL,
145d6b3aaf8SOleksandr Tymoshenko 	    0 }
146d6b3aaf8SOleksandr Tymoshenko };
147d6b3aaf8SOleksandr Tymoshenko 
148d6b3aaf8SOleksandr Tymoshenko struct sdhci_pci_softc {
149d6b3aaf8SOleksandr Tymoshenko 	u_int		quirks;		/* Chip specific quirks */
150d6b3aaf8SOleksandr Tymoshenko 	struct resource *irq_res;	/* IRQ resource */
151d6b3aaf8SOleksandr Tymoshenko 	void		*intrhand;	/* Interrupt handle */
152d6b3aaf8SOleksandr Tymoshenko 
153d6b3aaf8SOleksandr Tymoshenko 	int		num_slots;	/* Number of slots on this controller */
154d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_slot slots[6];
155d6b3aaf8SOleksandr Tymoshenko 	struct resource	*mem_res[6];	/* Memory resource */
156a2832f9fSMarius Strobl 	uint8_t		cfg_freq;	/* Saved frequency */
157a2832f9fSMarius Strobl 	uint8_t		cfg_mode;	/* Saved mode */
158d6b3aaf8SOleksandr Tymoshenko };
159d6b3aaf8SOleksandr Tymoshenko 
160f0d2731dSMarius Strobl static int sdhci_enable_msi = 1;
161f0d2731dSMarius Strobl SYSCTL_INT(_hw_sdhci, OID_AUTO, enable_msi, CTLFLAG_RDTUN, &sdhci_enable_msi,
162f0d2731dSMarius Strobl     0, "Enable MSI interrupts");
163d6b3aaf8SOleksandr Tymoshenko 
164d6b3aaf8SOleksandr Tymoshenko static uint8_t
165c11bbc7dSMarius Strobl sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off)
166d6b3aaf8SOleksandr Tymoshenko {
167d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
168d6b3aaf8SOleksandr Tymoshenko 
169d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
170d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
171d6b3aaf8SOleksandr Tymoshenko 	return bus_read_1(sc->mem_res[slot->num], off);
172d6b3aaf8SOleksandr Tymoshenko }
173d6b3aaf8SOleksandr Tymoshenko 
174d6b3aaf8SOleksandr Tymoshenko static void
175c11bbc7dSMarius Strobl sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot __unused,
176c11bbc7dSMarius Strobl     bus_size_t off, uint8_t val)
177d6b3aaf8SOleksandr Tymoshenko {
178d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
179d6b3aaf8SOleksandr Tymoshenko 
180d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
181d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
182d6b3aaf8SOleksandr Tymoshenko 	bus_write_1(sc->mem_res[slot->num], off, val);
183d6b3aaf8SOleksandr Tymoshenko }
184d6b3aaf8SOleksandr Tymoshenko 
185d6b3aaf8SOleksandr Tymoshenko static uint16_t
186c11bbc7dSMarius Strobl sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off)
187d6b3aaf8SOleksandr Tymoshenko {
188d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
189d6b3aaf8SOleksandr Tymoshenko 
190d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
191d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
192d6b3aaf8SOleksandr Tymoshenko 	return bus_read_2(sc->mem_res[slot->num], off);
193d6b3aaf8SOleksandr Tymoshenko }
194d6b3aaf8SOleksandr Tymoshenko 
195d6b3aaf8SOleksandr Tymoshenko static void
196c11bbc7dSMarius Strobl sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot __unused,
197c11bbc7dSMarius Strobl     bus_size_t off, uint16_t val)
198d6b3aaf8SOleksandr Tymoshenko {
199d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
200d6b3aaf8SOleksandr Tymoshenko 
201d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
202d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
203d6b3aaf8SOleksandr Tymoshenko 	bus_write_2(sc->mem_res[slot->num], off, val);
204d6b3aaf8SOleksandr Tymoshenko }
205d6b3aaf8SOleksandr Tymoshenko 
206d6b3aaf8SOleksandr Tymoshenko static uint32_t
207c11bbc7dSMarius Strobl sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot __unused, bus_size_t off)
208d6b3aaf8SOleksandr Tymoshenko {
209d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
210d6b3aaf8SOleksandr Tymoshenko 
211d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
212d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
213d6b3aaf8SOleksandr Tymoshenko 	return bus_read_4(sc->mem_res[slot->num], off);
214d6b3aaf8SOleksandr Tymoshenko }
215d6b3aaf8SOleksandr Tymoshenko 
216d6b3aaf8SOleksandr Tymoshenko static void
217c11bbc7dSMarius Strobl sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot __unused,
218c11bbc7dSMarius Strobl     bus_size_t off, uint32_t val)
219d6b3aaf8SOleksandr Tymoshenko {
220d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
221d6b3aaf8SOleksandr Tymoshenko 
222d6b3aaf8SOleksandr Tymoshenko 	bus_barrier(sc->mem_res[slot->num], 0, 0xFF,
223d6b3aaf8SOleksandr Tymoshenko 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
224d6b3aaf8SOleksandr Tymoshenko 	bus_write_4(sc->mem_res[slot->num], off, val);
225d6b3aaf8SOleksandr Tymoshenko }
226d6b3aaf8SOleksandr Tymoshenko 
227d6b3aaf8SOleksandr Tymoshenko static void
228c11bbc7dSMarius Strobl sdhci_pci_read_multi_4(device_t dev, struct sdhci_slot *slot __unused,
229d6b3aaf8SOleksandr Tymoshenko     bus_size_t off, uint32_t *data, bus_size_t count)
230d6b3aaf8SOleksandr Tymoshenko {
231d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
232d6b3aaf8SOleksandr Tymoshenko 
233d6b3aaf8SOleksandr Tymoshenko 	bus_read_multi_stream_4(sc->mem_res[slot->num], off, data, count);
234d6b3aaf8SOleksandr Tymoshenko }
235d6b3aaf8SOleksandr Tymoshenko 
236d6b3aaf8SOleksandr Tymoshenko static void
237c11bbc7dSMarius Strobl sdhci_pci_write_multi_4(device_t dev, struct sdhci_slot *slot __unused,
238d6b3aaf8SOleksandr Tymoshenko     bus_size_t off, uint32_t *data, bus_size_t count)
239d6b3aaf8SOleksandr Tymoshenko {
240d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
241d6b3aaf8SOleksandr Tymoshenko 
242d6b3aaf8SOleksandr Tymoshenko 	bus_write_multi_stream_4(sc->mem_res[slot->num], off, data, count);
243d6b3aaf8SOleksandr Tymoshenko }
244d6b3aaf8SOleksandr Tymoshenko 
245d6b3aaf8SOleksandr Tymoshenko static void sdhci_pci_intr(void *arg);
246d6b3aaf8SOleksandr Tymoshenko 
247d6b3aaf8SOleksandr Tymoshenko static void
248d6b3aaf8SOleksandr Tymoshenko sdhci_lower_frequency(device_t dev)
249d6b3aaf8SOleksandr Tymoshenko {
250c2262647SMarius Strobl 	struct sdhci_pci_softc *sc = device_get_softc(dev);
251d6b3aaf8SOleksandr Tymoshenko 
252c2262647SMarius Strobl 	/*
253c2262647SMarius Strobl 	 * Enable SD2.0 mode.
254c2262647SMarius Strobl 	 * NB: for RICOH R5CE823, this changes the PCI device ID to 0xe822.
255c2262647SMarius Strobl 	 */
256d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);
257c2262647SMarius Strobl 	sc->cfg_mode = pci_read_config(dev, SDHC_PCI_MODE, 1);
258d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1);
259d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);
260d6b3aaf8SOleksandr Tymoshenko 
261d6b3aaf8SOleksandr Tymoshenko 	/*
262d6b3aaf8SOleksandr Tymoshenko 	 * Some SD/MMC cards don't work with the default base
263c2262647SMarius Strobl 	 * clock frequency of 200 MHz.  Lower it to 50 MHz.
264d6b3aaf8SOleksandr Tymoshenko 	 */
265d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);
266c2262647SMarius Strobl 	sc->cfg_freq = pci_read_config(dev, SDHC_PCI_BASE_FREQ, 1);
267d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1);
268d6b3aaf8SOleksandr Tymoshenko 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);
269d6b3aaf8SOleksandr Tymoshenko }
270d6b3aaf8SOleksandr Tymoshenko 
271c2262647SMarius Strobl static void
272c2262647SMarius Strobl sdhci_restore_frequency(device_t dev)
273c2262647SMarius Strobl {
274c2262647SMarius Strobl 	struct sdhci_pci_softc *sc = device_get_softc(dev);
275c2262647SMarius Strobl 
276c2262647SMarius Strobl 	/* Restore mode. */
277c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);
278c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_MODE, sc->cfg_mode, 1);
279c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);
280c2262647SMarius Strobl 
281c2262647SMarius Strobl 	/* Restore frequency. */
282c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);
283c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_BASE_FREQ, sc->cfg_freq, 1);
284c2262647SMarius Strobl 	pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);
285c2262647SMarius Strobl }
286c2262647SMarius Strobl 
287d6b3aaf8SOleksandr Tymoshenko static int
288d6b3aaf8SOleksandr Tymoshenko sdhci_pci_probe(device_t dev)
289d6b3aaf8SOleksandr Tymoshenko {
290d6b3aaf8SOleksandr Tymoshenko 	uint32_t model;
291d6b3aaf8SOleksandr Tymoshenko 	uint16_t subvendor;
292d6b3aaf8SOleksandr Tymoshenko 	uint8_t class, subclass;
293d6b3aaf8SOleksandr Tymoshenko 	int i, result;
294d6b3aaf8SOleksandr Tymoshenko 
295d6b3aaf8SOleksandr Tymoshenko 	model = (uint32_t)pci_get_device(dev) << 16;
296d6b3aaf8SOleksandr Tymoshenko 	model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
297d6b3aaf8SOleksandr Tymoshenko 	subvendor = pci_get_subvendor(dev);
298d6b3aaf8SOleksandr Tymoshenko 	class = pci_get_class(dev);
299d6b3aaf8SOleksandr Tymoshenko 	subclass = pci_get_subclass(dev);
300d6b3aaf8SOleksandr Tymoshenko 
301d6b3aaf8SOleksandr Tymoshenko 	result = ENXIO;
302d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; sdhci_devices[i].model != 0; i++) {
303d6b3aaf8SOleksandr Tymoshenko 		if (sdhci_devices[i].model == model &&
304d6b3aaf8SOleksandr Tymoshenko 		    (sdhci_devices[i].subvendor == 0xffff ||
305d6b3aaf8SOleksandr Tymoshenko 		    sdhci_devices[i].subvendor == subvendor)) {
306d6b3aaf8SOleksandr Tymoshenko 			device_set_desc(dev, sdhci_devices[i].desc);
307d6b3aaf8SOleksandr Tymoshenko 			result = BUS_PROBE_DEFAULT;
308d6b3aaf8SOleksandr Tymoshenko 			break;
309d6b3aaf8SOleksandr Tymoshenko 		}
310d6b3aaf8SOleksandr Tymoshenko 	}
311d6b3aaf8SOleksandr Tymoshenko 	if (result == ENXIO && class == PCIC_BASEPERIPH &&
312d6b3aaf8SOleksandr Tymoshenko 	    subclass == PCIS_BASEPERIPH_SDHC) {
313d6b3aaf8SOleksandr Tymoshenko 		device_set_desc(dev, "Generic SD HCI");
314d6b3aaf8SOleksandr Tymoshenko 		result = BUS_PROBE_GENERIC;
315d6b3aaf8SOleksandr Tymoshenko 	}
316d6b3aaf8SOleksandr Tymoshenko 
317d6b3aaf8SOleksandr Tymoshenko 	return (result);
318d6b3aaf8SOleksandr Tymoshenko }
319d6b3aaf8SOleksandr Tymoshenko 
320d6b3aaf8SOleksandr Tymoshenko static int
321d6b3aaf8SOleksandr Tymoshenko sdhci_pci_attach(device_t dev)
322d6b3aaf8SOleksandr Tymoshenko {
323d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
3247e6ccea3SMarius Strobl 	struct sdhci_slot *slot;
325d6b3aaf8SOleksandr Tymoshenko 	uint32_t model;
326d6b3aaf8SOleksandr Tymoshenko 	uint16_t subvendor;
327f0d2731dSMarius Strobl 	int bar, err, rid, slots, i;
328d6b3aaf8SOleksandr Tymoshenko 
329d6b3aaf8SOleksandr Tymoshenko 	model = (uint32_t)pci_get_device(dev) << 16;
330d6b3aaf8SOleksandr Tymoshenko 	model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
331d6b3aaf8SOleksandr Tymoshenko 	subvendor = pci_get_subvendor(dev);
332d6b3aaf8SOleksandr Tymoshenko 	/* Apply chip specific quirks. */
333d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; sdhci_devices[i].model != 0; i++) {
334d6b3aaf8SOleksandr Tymoshenko 		if (sdhci_devices[i].model == model &&
335d6b3aaf8SOleksandr Tymoshenko 		    (sdhci_devices[i].subvendor == 0xffff ||
336d6b3aaf8SOleksandr Tymoshenko 		    sdhci_devices[i].subvendor == subvendor)) {
337d6b3aaf8SOleksandr Tymoshenko 			sc->quirks = sdhci_devices[i].quirks;
338d6b3aaf8SOleksandr Tymoshenko 			break;
339d6b3aaf8SOleksandr Tymoshenko 		}
340d6b3aaf8SOleksandr Tymoshenko 	}
341*0f34084fSMarius Strobl 	sc->quirks &= ~sdhci_quirk_clear;
342*0f34084fSMarius Strobl 	sc->quirks |= sdhci_quirk_set;
343d6b3aaf8SOleksandr Tymoshenko 	/* Some controllers need to be bumped into the right mode. */
344d6b3aaf8SOleksandr Tymoshenko 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
345d6b3aaf8SOleksandr Tymoshenko 		sdhci_lower_frequency(dev);
346d6b3aaf8SOleksandr Tymoshenko 	/* Read slots info from PCI registers. */
347d6b3aaf8SOleksandr Tymoshenko 	slots = pci_read_config(dev, PCI_SLOT_INFO, 1);
348d6b3aaf8SOleksandr Tymoshenko 	bar = PCI_SLOT_INFO_FIRST_BAR(slots);
349d6b3aaf8SOleksandr Tymoshenko 	slots = PCI_SLOT_INFO_SLOTS(slots);
350d6b3aaf8SOleksandr Tymoshenko 	if (slots > 6 || bar > 5) {
351d6b3aaf8SOleksandr Tymoshenko 		device_printf(dev, "Incorrect slots information (%d, %d).\n",
352d6b3aaf8SOleksandr Tymoshenko 		    slots, bar);
353d6b3aaf8SOleksandr Tymoshenko 		return (EINVAL);
354d6b3aaf8SOleksandr Tymoshenko 	}
355d6b3aaf8SOleksandr Tymoshenko 	/* Allocate IRQ. */
356f0d2731dSMarius Strobl 	i = 1;
357f0d2731dSMarius Strobl 	rid = 0;
358f0d2731dSMarius Strobl 	if (sdhci_enable_msi != 0 && pci_alloc_msi(dev, &i) == 0)
359f0d2731dSMarius Strobl 		rid = 1;
360f0d2731dSMarius Strobl 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
361f0d2731dSMarius Strobl 		RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
362d6b3aaf8SOleksandr Tymoshenko 	if (sc->irq_res == NULL) {
363d6b3aaf8SOleksandr Tymoshenko 		device_printf(dev, "Can't allocate IRQ\n");
364f0d2731dSMarius Strobl 		pci_release_msi(dev);
365d6b3aaf8SOleksandr Tymoshenko 		return (ENOMEM);
366d6b3aaf8SOleksandr Tymoshenko 	}
367d6b3aaf8SOleksandr Tymoshenko 	/* Scan all slots. */
368d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; i < slots; i++) {
3697e6ccea3SMarius Strobl 		slot = &sc->slots[sc->num_slots];
370d6b3aaf8SOleksandr Tymoshenko 
371d6b3aaf8SOleksandr Tymoshenko 		/* Allocate memory. */
372f0d2731dSMarius Strobl 		rid = PCIR_BAR(bar + i);
373eff83876SJustin Hibbits 		sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
374eff83876SJustin Hibbits 		    &rid, RF_ACTIVE);
375d6b3aaf8SOleksandr Tymoshenko 		if (sc->mem_res[i] == NULL) {
3761bacf3beSMarius Strobl 			device_printf(dev,
3771bacf3beSMarius Strobl 			    "Can't allocate memory for slot %d\n", i);
378d6b3aaf8SOleksandr Tymoshenko 			continue;
379d6b3aaf8SOleksandr Tymoshenko 		}
380d6b3aaf8SOleksandr Tymoshenko 
38193efdc63SAdrian Chadd 		slot->quirks = sc->quirks;
38293efdc63SAdrian Chadd 
383d6b3aaf8SOleksandr Tymoshenko 		if (sdhci_init_slot(dev, slot, i) != 0)
384d6b3aaf8SOleksandr Tymoshenko 			continue;
385d6b3aaf8SOleksandr Tymoshenko 
386d6b3aaf8SOleksandr Tymoshenko 		sc->num_slots++;
387d6b3aaf8SOleksandr Tymoshenko 	}
388d6b3aaf8SOleksandr Tymoshenko 	device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);
389d6b3aaf8SOleksandr Tymoshenko 	/* Activate the interrupt */
390d6b3aaf8SOleksandr Tymoshenko 	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
391d6b3aaf8SOleksandr Tymoshenko 	    NULL, sdhci_pci_intr, sc, &sc->intrhand);
392d6b3aaf8SOleksandr Tymoshenko 	if (err)
393d6b3aaf8SOleksandr Tymoshenko 		device_printf(dev, "Can't setup IRQ\n");
394d6b3aaf8SOleksandr Tymoshenko 	pci_enable_busmaster(dev);
395d6b3aaf8SOleksandr Tymoshenko 	/* Process cards detection. */
3967e6ccea3SMarius Strobl 	for (i = 0; i < sc->num_slots; i++)
3977e6ccea3SMarius Strobl 		sdhci_start_slot(&sc->slots[i]);
398d6b3aaf8SOleksandr Tymoshenko 
399d6b3aaf8SOleksandr Tymoshenko 	return (0);
400d6b3aaf8SOleksandr Tymoshenko }
401d6b3aaf8SOleksandr Tymoshenko 
402d6b3aaf8SOleksandr Tymoshenko static int
403d6b3aaf8SOleksandr Tymoshenko sdhci_pci_detach(device_t dev)
404d6b3aaf8SOleksandr Tymoshenko {
405d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
406d6b3aaf8SOleksandr Tymoshenko 	int i;
407d6b3aaf8SOleksandr Tymoshenko 
408d6b3aaf8SOleksandr Tymoshenko 	bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
409d6b3aaf8SOleksandr Tymoshenko 	bus_release_resource(dev, SYS_RES_IRQ,
410f0d2731dSMarius Strobl 	    rman_get_rid(sc->irq_res), sc->irq_res);
411f0d2731dSMarius Strobl 	pci_release_msi(dev);
412d6b3aaf8SOleksandr Tymoshenko 
413d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; i < sc->num_slots; i++) {
4147e6ccea3SMarius Strobl 		sdhci_cleanup_slot(&sc->slots[i]);
415d6b3aaf8SOleksandr Tymoshenko 		bus_release_resource(dev, SYS_RES_MEMORY,
416f0d2731dSMarius Strobl 		    rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
417d6b3aaf8SOleksandr Tymoshenko 	}
418c2262647SMarius Strobl 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
419c2262647SMarius Strobl 		sdhci_restore_frequency(dev);
420c2262647SMarius Strobl 	return (0);
421c2262647SMarius Strobl }
422c2262647SMarius Strobl 
423c2262647SMarius Strobl static int
424c2262647SMarius Strobl sdhci_pci_shutdown(device_t dev)
425c2262647SMarius Strobl {
426c2262647SMarius Strobl 	struct sdhci_pci_softc *sc = device_get_softc(dev);
427c2262647SMarius Strobl 
428c2262647SMarius Strobl 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
429c2262647SMarius Strobl 		sdhci_restore_frequency(dev);
430d6b3aaf8SOleksandr Tymoshenko 	return (0);
431d6b3aaf8SOleksandr Tymoshenko }
432d6b3aaf8SOleksandr Tymoshenko 
433d6b3aaf8SOleksandr Tymoshenko static int
434d6b3aaf8SOleksandr Tymoshenko sdhci_pci_suspend(device_t dev)
435d6b3aaf8SOleksandr Tymoshenko {
436d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
437d6b3aaf8SOleksandr Tymoshenko 	int i, err;
438d6b3aaf8SOleksandr Tymoshenko 
439d6b3aaf8SOleksandr Tymoshenko 	err = bus_generic_suspend(dev);
440d6b3aaf8SOleksandr Tymoshenko 	if (err)
441d6b3aaf8SOleksandr Tymoshenko 		return (err);
442d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; i < sc->num_slots; i++)
443d6b3aaf8SOleksandr Tymoshenko 		sdhci_generic_suspend(&sc->slots[i]);
444d6b3aaf8SOleksandr Tymoshenko 	return (0);
445d6b3aaf8SOleksandr Tymoshenko }
446d6b3aaf8SOleksandr Tymoshenko 
447d6b3aaf8SOleksandr Tymoshenko static int
448d6b3aaf8SOleksandr Tymoshenko sdhci_pci_resume(device_t dev)
449d6b3aaf8SOleksandr Tymoshenko {
450d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = device_get_softc(dev);
451220adb04SEdward Tomasz Napierala 	int i, err;
452d6b3aaf8SOleksandr Tymoshenko 
453d6b3aaf8SOleksandr Tymoshenko 	for (i = 0; i < sc->num_slots; i++)
454d6b3aaf8SOleksandr Tymoshenko 		sdhci_generic_resume(&sc->slots[i]);
455220adb04SEdward Tomasz Napierala 	err = bus_generic_resume(dev);
456220adb04SEdward Tomasz Napierala 	if (err)
457220adb04SEdward Tomasz Napierala 		return (err);
458220adb04SEdward Tomasz Napierala 	if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
459220adb04SEdward Tomasz Napierala 		sdhci_lower_frequency(dev);
460220adb04SEdward Tomasz Napierala 	return (0);
461d6b3aaf8SOleksandr Tymoshenko }
462d6b3aaf8SOleksandr Tymoshenko 
463d6b3aaf8SOleksandr Tymoshenko static void
464d6b3aaf8SOleksandr Tymoshenko sdhci_pci_intr(void *arg)
465d6b3aaf8SOleksandr Tymoshenko {
466d6b3aaf8SOleksandr Tymoshenko 	struct sdhci_pci_softc *sc = (struct sdhci_pci_softc *)arg;
467d6b3aaf8SOleksandr Tymoshenko 	int i;
468d6b3aaf8SOleksandr Tymoshenko 
4697e6ccea3SMarius Strobl 	for (i = 0; i < sc->num_slots; i++)
4707e6ccea3SMarius Strobl 		sdhci_generic_intr(&sc->slots[i]);
471d6b3aaf8SOleksandr Tymoshenko }
472d6b3aaf8SOleksandr Tymoshenko 
473d6b3aaf8SOleksandr Tymoshenko static device_method_t sdhci_methods[] = {
474d6b3aaf8SOleksandr Tymoshenko 	/* device_if */
475d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(device_probe,		sdhci_pci_probe),
476d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(device_attach,	sdhci_pci_attach),
477d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(device_detach,	sdhci_pci_detach),
478c2262647SMarius Strobl 	DEVMETHOD(device_shutdown,	sdhci_pci_shutdown),
479d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(device_suspend,	sdhci_pci_suspend),
480d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(device_resume,	sdhci_pci_resume),
481d6b3aaf8SOleksandr Tymoshenko 
482d6b3aaf8SOleksandr Tymoshenko 	/* Bus interface */
483d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(bus_read_ivar,	sdhci_generic_read_ivar),
484d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(bus_write_ivar,	sdhci_generic_write_ivar),
485d6b3aaf8SOleksandr Tymoshenko 
486d6b3aaf8SOleksandr Tymoshenko 	/* mmcbr_if */
487d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(mmcbr_update_ios,	sdhci_generic_update_ios),
488*0f34084fSMarius Strobl 	DEVMETHOD(mmcbr_switch_vccq,	sdhci_generic_switch_vccq),
489d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(mmcbr_request,	sdhci_generic_request),
490d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(mmcbr_get_ro,		sdhci_generic_get_ro),
491d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(mmcbr_acquire_host,   sdhci_generic_acquire_host),
492d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(mmcbr_release_host,   sdhci_generic_release_host),
493d6b3aaf8SOleksandr Tymoshenko 
494*0f34084fSMarius Strobl 	/* SDHCI accessors */
495d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_read_1,		sdhci_pci_read_1),
496d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_read_2,		sdhci_pci_read_2),
497d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_read_4,		sdhci_pci_read_4),
498d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_read_multi_4,	sdhci_pci_read_multi_4),
499d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_write_1,	sdhci_pci_write_1),
500d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_write_2,	sdhci_pci_write_2),
501d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_write_4,	sdhci_pci_write_4),
502d6b3aaf8SOleksandr Tymoshenko 	DEVMETHOD(sdhci_write_multi_4,	sdhci_pci_write_multi_4),
503*0f34084fSMarius Strobl 	DEVMETHOD(sdhci_set_uhs_timing,	sdhci_generic_set_uhs_timing),
504d6b3aaf8SOleksandr Tymoshenko 
50561bfd867SSofian Brabez 	DEVMETHOD_END
506d6b3aaf8SOleksandr Tymoshenko };
507d6b3aaf8SOleksandr Tymoshenko 
508d6b3aaf8SOleksandr Tymoshenko static driver_t sdhci_pci_driver = {
509d6b3aaf8SOleksandr Tymoshenko 	"sdhci_pci",
510d6b3aaf8SOleksandr Tymoshenko 	sdhci_methods,
511d6b3aaf8SOleksandr Tymoshenko 	sizeof(struct sdhci_pci_softc),
512d6b3aaf8SOleksandr Tymoshenko };
513d6b3aaf8SOleksandr Tymoshenko static devclass_t sdhci_pci_devclass;
514d6b3aaf8SOleksandr Tymoshenko 
515f0d2731dSMarius Strobl DRIVER_MODULE(sdhci_pci, pci, sdhci_pci_driver, sdhci_pci_devclass, NULL,
516f0d2731dSMarius Strobl     NULL);
517d6b3aaf8SOleksandr Tymoshenko MODULE_DEPEND(sdhci_pci, sdhci, 1, 1, 1);
51855dae242SMarius Strobl MMC_DECLARE_BRIDGE(sdhci_pci);
519