1 /*- 2 * Copyright (c) 2012 Thomas Skibo 3 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* Generic driver to attach sdhci controllers on simplebus. 28 * Derived mainly from sdhci_pci.c 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/lock.h> 39 #include <sys/module.h> 40 #include <sys/mutex.h> 41 #include <sys/resource.h> 42 #include <sys/rman.h> 43 #include <sys/sysctl.h> 44 #include <sys/taskqueue.h> 45 46 #include <machine/bus.h> 47 #include <machine/resource.h> 48 49 #include <dev/fdt/fdt_common.h> 50 #include <dev/ofw/ofw_bus.h> 51 #include <dev/ofw/ofw_bus_subr.h> 52 53 #include <dev/mmc/bridge.h> 54 55 #include <dev/sdhci/sdhci.h> 56 57 #include "mmcbr_if.h" 58 #include "sdhci_if.h" 59 60 #define MAX_SLOTS 6 61 62 struct sdhci_fdt_softc { 63 device_t dev; /* Controller device */ 64 u_int quirks; /* Chip specific quirks */ 65 u_int caps; /* If we override SDHCI_CAPABILITIES */ 66 uint32_t max_clk; /* Max possible freq */ 67 struct resource *irq_res; /* IRQ resource */ 68 void *intrhand; /* Interrupt handle */ 69 70 int num_slots; /* Number of slots on this controller*/ 71 struct sdhci_slot slots[MAX_SLOTS]; 72 struct resource *mem_res[MAX_SLOTS]; /* Memory resource */ 73 }; 74 75 static uint8_t 76 sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) 77 { 78 struct sdhci_fdt_softc *sc = device_get_softc(dev); 79 80 return (bus_read_1(sc->mem_res[slot->num], off)); 81 } 82 83 static void 84 sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, 85 uint8_t val) 86 { 87 struct sdhci_fdt_softc *sc = device_get_softc(dev); 88 89 bus_write_1(sc->mem_res[slot->num], off, val); 90 } 91 92 static uint16_t 93 sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) 94 { 95 struct sdhci_fdt_softc *sc = device_get_softc(dev); 96 97 return (bus_read_2(sc->mem_res[slot->num], off)); 98 } 99 100 static void 101 sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, 102 uint16_t val) 103 { 104 struct sdhci_fdt_softc *sc = device_get_softc(dev); 105 106 bus_write_2(sc->mem_res[slot->num], off, val); 107 } 108 109 static uint32_t 110 sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) 111 { 112 struct sdhci_fdt_softc *sc = device_get_softc(dev); 113 114 return (bus_read_4(sc->mem_res[slot->num], off)); 115 } 116 117 static void 118 sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, 119 uint32_t val) 120 { 121 struct sdhci_fdt_softc *sc = device_get_softc(dev); 122 123 bus_write_4(sc->mem_res[slot->num], off, val); 124 } 125 126 static void 127 sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot, 128 bus_size_t off, uint32_t *data, bus_size_t count) 129 { 130 struct sdhci_fdt_softc *sc = device_get_softc(dev); 131 132 bus_read_multi_4(sc->mem_res[slot->num], off, data, count); 133 } 134 135 static void 136 sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot, 137 bus_size_t off, uint32_t *data, bus_size_t count) 138 { 139 struct sdhci_fdt_softc *sc = device_get_softc(dev); 140 141 bus_write_multi_4(sc->mem_res[slot->num], off, data, count); 142 } 143 144 static void 145 sdhci_fdt_intr(void *arg) 146 { 147 struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg; 148 int i; 149 150 for (i = 0; i < sc->num_slots; i++) 151 sdhci_generic_intr(&sc->slots[i]); 152 } 153 154 static int 155 sdhci_fdt_probe(device_t dev) 156 { 157 struct sdhci_fdt_softc *sc = device_get_softc(dev); 158 phandle_t node; 159 pcell_t cid; 160 161 sc->quirks = 0; 162 sc->num_slots = 1; 163 sc->max_clk = 0; 164 165 if (!ofw_bus_status_okay(dev)) 166 return (ENXIO); 167 168 if (ofw_bus_is_compatible(dev, "sdhci_generic")) { 169 device_set_desc(dev, "generic fdt SDHCI controller"); 170 } else if (ofw_bus_is_compatible(dev, "xlnx,zy7_sdhci")) { 171 sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; 172 device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller"); 173 } else 174 return (ENXIO); 175 176 node = ofw_bus_get_node(dev); 177 178 /* Allow dts to patch quirks, slots, and max-frequency. */ 179 if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0) 180 sc->quirks = cid; 181 if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0) 182 sc->num_slots = cid; 183 if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0) 184 sc->max_clk = cid; 185 186 return (0); 187 } 188 189 static int 190 sdhci_fdt_attach(device_t dev) 191 { 192 struct sdhci_fdt_softc *sc = device_get_softc(dev); 193 struct sdhci_slot *slot; 194 int err, slots, rid, i; 195 196 sc->dev = dev; 197 198 /* Allocate IRQ. */ 199 rid = 0; 200 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 201 RF_ACTIVE); 202 if (sc->irq_res == NULL) { 203 device_printf(dev, "Can't allocate IRQ\n"); 204 return (ENOMEM); 205 } 206 207 /* Scan all slots. */ 208 slots = sc->num_slots; /* number of slots determined in probe(). */ 209 sc->num_slots = 0; 210 for (i = 0; i < slots; i++) { 211 slot = &sc->slots[sc->num_slots]; 212 213 /* Allocate memory. */ 214 rid = 0; 215 sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 216 &rid, RF_ACTIVE); 217 if (sc->mem_res[i] == NULL) { 218 device_printf(dev, 219 "Can't allocate memory for slot %d\n", i); 220 continue; 221 } 222 223 slot->quirks = sc->quirks; 224 slot->caps = sc->caps; 225 slot->max_clk = sc->max_clk; 226 227 if (sdhci_init_slot(dev, slot, i) != 0) 228 continue; 229 230 sc->num_slots++; 231 } 232 device_printf(dev, "%d slot(s) allocated\n", sc->num_slots); 233 234 /* Activate the interrupt */ 235 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 236 NULL, sdhci_fdt_intr, sc, &sc->intrhand); 237 if (err) { 238 device_printf(dev, "Cannot setup IRQ\n"); 239 return (err); 240 } 241 242 /* Process cards detection. */ 243 for (i = 0; i < sc->num_slots; i++) 244 sdhci_start_slot(&sc->slots[i]); 245 246 return (0); 247 } 248 249 static int 250 sdhci_fdt_detach(device_t dev) 251 { 252 struct sdhci_fdt_softc *sc = device_get_softc(dev); 253 int i; 254 255 bus_generic_detach(dev); 256 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 257 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), 258 sc->irq_res); 259 260 for (i = 0; i < sc->num_slots; i++) { 261 sdhci_cleanup_slot(&sc->slots[i]); 262 bus_release_resource(dev, SYS_RES_MEMORY, 263 rman_get_rid(sc->mem_res[i]), sc->mem_res[i]); 264 } 265 266 return (0); 267 } 268 269 static device_method_t sdhci_fdt_methods[] = { 270 /* device_if */ 271 DEVMETHOD(device_probe, sdhci_fdt_probe), 272 DEVMETHOD(device_attach, sdhci_fdt_attach), 273 DEVMETHOD(device_detach, sdhci_fdt_detach), 274 275 /* Bus interface */ 276 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), 277 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), 278 279 /* mmcbr_if */ 280 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios), 281 DEVMETHOD(mmcbr_request, sdhci_generic_request), 282 DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro), 283 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), 284 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), 285 286 /* SDHCI registers accessors */ 287 DEVMETHOD(sdhci_read_1, sdhci_fdt_read_1), 288 DEVMETHOD(sdhci_read_2, sdhci_fdt_read_2), 289 DEVMETHOD(sdhci_read_4, sdhci_fdt_read_4), 290 DEVMETHOD(sdhci_read_multi_4, sdhci_fdt_read_multi_4), 291 DEVMETHOD(sdhci_write_1, sdhci_fdt_write_1), 292 DEVMETHOD(sdhci_write_2, sdhci_fdt_write_2), 293 DEVMETHOD(sdhci_write_4, sdhci_fdt_write_4), 294 DEVMETHOD(sdhci_write_multi_4, sdhci_fdt_write_multi_4), 295 296 DEVMETHOD_END 297 }; 298 299 static driver_t sdhci_fdt_driver = { 300 "sdhci_fdt", 301 sdhci_fdt_methods, 302 sizeof(struct sdhci_fdt_softc), 303 }; 304 static devclass_t sdhci_fdt_devclass; 305 306 DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass, 307 NULL, NULL); 308 MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1); 309 MMC_DECLARE_BRIDGE(sdhci_fdt); 310