1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012 Thomas Skibo 5 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* Generic driver to attach sdhci controllers on simplebus. 30 * Derived mainly from sdhci_pci.c 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/lock.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <sys/resource.h> 44 #include <sys/rman.h> 45 #include <sys/sysctl.h> 46 #include <sys/taskqueue.h> 47 48 #include <machine/bus.h> 49 #include <machine/resource.h> 50 51 #include <dev/fdt/fdt_common.h> 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/mmc/bridge.h> 56 57 #include <dev/sdhci/sdhci.h> 58 59 #include "mmcbr_if.h" 60 #include "sdhci_if.h" 61 62 #define MAX_SLOTS 6 63 #define SDHCI_FDT_ARMADA38X 1 64 #define SDHCI_FDT_GENERIC 2 65 #define SDHCI_FDT_XLNX_ZY7 3 66 67 static struct ofw_compat_data compat_data[] = { 68 { "marvell,armada-380-sdhci", SDHCI_FDT_ARMADA38X }, 69 { "sdhci_generic", SDHCI_FDT_GENERIC }, 70 { "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 }, 71 { NULL, 0 } 72 }; 73 74 struct sdhci_fdt_softc { 75 device_t dev; /* Controller device */ 76 u_int quirks; /* Chip specific quirks */ 77 u_int caps; /* If we override SDHCI_CAPABILITIES */ 78 uint32_t max_clk; /* Max possible freq */ 79 struct resource *irq_res; /* IRQ resource */ 80 void *intrhand; /* Interrupt handle */ 81 82 int num_slots; /* Number of slots on this controller*/ 83 struct sdhci_slot slots[MAX_SLOTS]; 84 struct resource *mem_res[MAX_SLOTS]; /* Memory resource */ 85 86 bool wp_inverted; /* WP pin is inverted */ 87 bool no_18v; /* No 1.8V support */ 88 }; 89 90 static uint8_t 91 sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) 92 { 93 struct sdhci_fdt_softc *sc = device_get_softc(dev); 94 95 return (bus_read_1(sc->mem_res[slot->num], off)); 96 } 97 98 static void 99 sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, 100 uint8_t val) 101 { 102 struct sdhci_fdt_softc *sc = device_get_softc(dev); 103 104 bus_write_1(sc->mem_res[slot->num], off, val); 105 } 106 107 static uint16_t 108 sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) 109 { 110 struct sdhci_fdt_softc *sc = device_get_softc(dev); 111 112 return (bus_read_2(sc->mem_res[slot->num], off)); 113 } 114 115 static void 116 sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, 117 uint16_t val) 118 { 119 struct sdhci_fdt_softc *sc = device_get_softc(dev); 120 121 bus_write_2(sc->mem_res[slot->num], off, val); 122 } 123 124 static uint32_t 125 sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) 126 { 127 struct sdhci_fdt_softc *sc = device_get_softc(dev); 128 uint32_t val32; 129 130 val32 = bus_read_4(sc->mem_res[slot->num], off); 131 if (off == SDHCI_CAPABILITIES && sc->no_18v) 132 val32 &= ~SDHCI_CAN_VDD_180; 133 134 return (val32); 135 } 136 137 static void 138 sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, 139 uint32_t val) 140 { 141 struct sdhci_fdt_softc *sc = device_get_softc(dev); 142 143 bus_write_4(sc->mem_res[slot->num], off, val); 144 } 145 146 static void 147 sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot, 148 bus_size_t off, uint32_t *data, bus_size_t count) 149 { 150 struct sdhci_fdt_softc *sc = device_get_softc(dev); 151 152 bus_read_multi_4(sc->mem_res[slot->num], off, data, count); 153 } 154 155 static void 156 sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot, 157 bus_size_t off, uint32_t *data, bus_size_t count) 158 { 159 struct sdhci_fdt_softc *sc = device_get_softc(dev); 160 161 bus_write_multi_4(sc->mem_res[slot->num], off, data, count); 162 } 163 164 static void 165 sdhci_fdt_intr(void *arg) 166 { 167 struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg; 168 int i; 169 170 for (i = 0; i < sc->num_slots; i++) 171 sdhci_generic_intr(&sc->slots[i]); 172 } 173 174 static int 175 sdhci_fdt_get_ro(device_t bus, device_t dev) 176 { 177 struct sdhci_fdt_softc *sc = device_get_softc(bus); 178 179 return (sdhci_generic_get_ro(bus, dev) ^ sc->wp_inverted); 180 } 181 182 static int 183 sdhci_fdt_probe(device_t dev) 184 { 185 struct sdhci_fdt_softc *sc = device_get_softc(dev); 186 phandle_t node; 187 pcell_t cid; 188 189 sc->quirks = 0; 190 sc->num_slots = 1; 191 sc->max_clk = 0; 192 193 if (!ofw_bus_status_okay(dev)) 194 return (ENXIO); 195 196 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { 197 case SDHCI_FDT_ARMADA38X: 198 sc->quirks = SDHCI_QUIRK_BROKEN_AUTO_STOP; 199 device_set_desc(dev, "ARMADA38X SDHCI controller"); 200 break; 201 case SDHCI_FDT_GENERIC: 202 device_set_desc(dev, "generic fdt SDHCI controller"); 203 break; 204 case SDHCI_FDT_XLNX_ZY7: 205 sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; 206 device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller"); 207 break; 208 default: 209 return (ENXIO); 210 } 211 212 node = ofw_bus_get_node(dev); 213 214 /* Allow dts to patch quirks, slots, and max-frequency. */ 215 if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0) 216 sc->quirks = cid; 217 if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0) 218 sc->num_slots = cid; 219 if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0) 220 sc->max_clk = cid; 221 if (OF_hasprop(node, "no-1-8-v")) 222 sc->no_18v = true; 223 if (OF_hasprop(node, "wp-inverted")) 224 sc->wp_inverted = true; 225 226 return (0); 227 } 228 229 static int 230 sdhci_fdt_attach(device_t dev) 231 { 232 struct sdhci_fdt_softc *sc = device_get_softc(dev); 233 struct sdhci_slot *slot; 234 int err, slots, rid, i; 235 236 sc->dev = dev; 237 238 /* Allocate IRQ. */ 239 rid = 0; 240 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 241 RF_ACTIVE); 242 if (sc->irq_res == NULL) { 243 device_printf(dev, "Can't allocate IRQ\n"); 244 return (ENOMEM); 245 } 246 247 /* Scan all slots. */ 248 slots = sc->num_slots; /* number of slots determined in probe(). */ 249 sc->num_slots = 0; 250 for (i = 0; i < slots; i++) { 251 slot = &sc->slots[sc->num_slots]; 252 253 /* Allocate memory. */ 254 rid = 0; 255 sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 256 &rid, RF_ACTIVE); 257 if (sc->mem_res[i] == NULL) { 258 device_printf(dev, 259 "Can't allocate memory for slot %d\n", i); 260 continue; 261 } 262 263 slot->quirks = sc->quirks; 264 slot->caps = sc->caps; 265 slot->max_clk = sc->max_clk; 266 267 if (sdhci_init_slot(dev, slot, i) != 0) 268 continue; 269 270 sc->num_slots++; 271 } 272 device_printf(dev, "%d slot(s) allocated\n", sc->num_slots); 273 274 /* Activate the interrupt */ 275 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 276 NULL, sdhci_fdt_intr, sc, &sc->intrhand); 277 if (err) { 278 device_printf(dev, "Cannot setup IRQ\n"); 279 return (err); 280 } 281 282 /* Process cards detection. */ 283 for (i = 0; i < sc->num_slots; i++) 284 sdhci_start_slot(&sc->slots[i]); 285 286 return (0); 287 } 288 289 static int 290 sdhci_fdt_detach(device_t dev) 291 { 292 struct sdhci_fdt_softc *sc = device_get_softc(dev); 293 int i; 294 295 bus_generic_detach(dev); 296 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 297 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res), 298 sc->irq_res); 299 300 for (i = 0; i < sc->num_slots; i++) { 301 sdhci_cleanup_slot(&sc->slots[i]); 302 bus_release_resource(dev, SYS_RES_MEMORY, 303 rman_get_rid(sc->mem_res[i]), sc->mem_res[i]); 304 } 305 306 return (0); 307 } 308 309 static device_method_t sdhci_fdt_methods[] = { 310 /* device_if */ 311 DEVMETHOD(device_probe, sdhci_fdt_probe), 312 DEVMETHOD(device_attach, sdhci_fdt_attach), 313 DEVMETHOD(device_detach, sdhci_fdt_detach), 314 315 /* Bus interface */ 316 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), 317 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), 318 319 /* mmcbr_if */ 320 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios), 321 DEVMETHOD(mmcbr_request, sdhci_generic_request), 322 DEVMETHOD(mmcbr_get_ro, sdhci_fdt_get_ro), 323 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), 324 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), 325 326 /* SDHCI registers accessors */ 327 DEVMETHOD(sdhci_read_1, sdhci_fdt_read_1), 328 DEVMETHOD(sdhci_read_2, sdhci_fdt_read_2), 329 DEVMETHOD(sdhci_read_4, sdhci_fdt_read_4), 330 DEVMETHOD(sdhci_read_multi_4, sdhci_fdt_read_multi_4), 331 DEVMETHOD(sdhci_write_1, sdhci_fdt_write_1), 332 DEVMETHOD(sdhci_write_2, sdhci_fdt_write_2), 333 DEVMETHOD(sdhci_write_4, sdhci_fdt_write_4), 334 DEVMETHOD(sdhci_write_multi_4, sdhci_fdt_write_multi_4), 335 336 DEVMETHOD_END 337 }; 338 339 static driver_t sdhci_fdt_driver = { 340 "sdhci_fdt", 341 sdhci_fdt_methods, 342 sizeof(struct sdhci_fdt_softc), 343 }; 344 static devclass_t sdhci_fdt_devclass; 345 346 DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass, 347 NULL, NULL); 348 MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1); 349 MMC_DECLARE_BRIDGE(sdhci_fdt); 350