xref: /freebsd/sys/dev/sdhci/sdhci_fdt.c (revision a25896ca1270e25b657ceaa8d47d5699515f5c25)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2012 Thomas Skibo
5  * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 /* Generic driver to attach sdhci controllers on simplebus.
30  * Derived mainly from sdhci_pci.c
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/kernel.h>
40 #include <sys/lock.h>
41 #include <sys/module.h>
42 #include <sys/mutex.h>
43 #include <sys/resource.h>
44 #include <sys/rman.h>
45 #include <sys/sysctl.h>
46 #include <sys/taskqueue.h>
47 
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50 
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54 
55 #include <dev/mmc/bridge.h>
56 
57 #include <dev/sdhci/sdhci.h>
58 
59 #include "mmcbr_if.h"
60 #include "sdhci_if.h"
61 
62 #include "opt_mmccam.h"
63 
64 #define	MAX_SLOTS		6
65 #define	SDHCI_FDT_ARMADA38X	1
66 #define	SDHCI_FDT_GENERIC	2
67 #define	SDHCI_FDT_XLNX_ZY7	3
68 #define	SDHCI_FDT_QUALCOMM	4
69 
70 static struct ofw_compat_data compat_data[] = {
71 	{ "marvell,armada-380-sdhci",	SDHCI_FDT_ARMADA38X },
72 	{ "sdhci_generic",		SDHCI_FDT_GENERIC },
73 	{ "qcom,sdhci-msm-v4",		SDHCI_FDT_QUALCOMM },
74 	{ "xlnx,zy7_sdhci",		SDHCI_FDT_XLNX_ZY7 },
75 	{ NULL, 0 }
76 };
77 
78 struct sdhci_fdt_softc {
79 	device_t	dev;		/* Controller device */
80 	u_int		quirks;		/* Chip specific quirks */
81 	u_int		caps;		/* If we override SDHCI_CAPABILITIES */
82 	uint32_t	max_clk;	/* Max possible freq */
83 	struct resource *irq_res;	/* IRQ resource */
84 	void		*intrhand;	/* Interrupt handle */
85 
86 	int		num_slots;	/* Number of slots on this controller*/
87 	struct sdhci_slot slots[MAX_SLOTS];
88 	struct resource	*mem_res[MAX_SLOTS];	/* Memory resource */
89 
90 	bool		wp_inverted;	/* WP pin is inverted */
91 	bool		no_18v;		/* No 1.8V support */
92 };
93 
94 static uint8_t
95 sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
96 {
97 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
98 
99 	return (bus_read_1(sc->mem_res[slot->num], off));
100 }
101 
102 static void
103 sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
104     uint8_t val)
105 {
106 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
107 
108 	bus_write_1(sc->mem_res[slot->num], off, val);
109 }
110 
111 static uint16_t
112 sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
113 {
114 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
115 
116 	return (bus_read_2(sc->mem_res[slot->num], off));
117 }
118 
119 static void
120 sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
121     uint16_t val)
122 {
123 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
124 
125 	bus_write_2(sc->mem_res[slot->num], off, val);
126 }
127 
128 static uint32_t
129 sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
130 {
131 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
132 	uint32_t val32;
133 
134 	val32 = bus_read_4(sc->mem_res[slot->num], off);
135 	if (off == SDHCI_CAPABILITIES && sc->no_18v)
136 		val32 &= ~SDHCI_CAN_VDD_180;
137 
138 	return (val32);
139 }
140 
141 static void
142 sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
143     uint32_t val)
144 {
145 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
146 
147 	bus_write_4(sc->mem_res[slot->num], off, val);
148 }
149 
150 static void
151 sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot,
152     bus_size_t off, uint32_t *data, bus_size_t count)
153 {
154 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
155 
156 	bus_read_multi_4(sc->mem_res[slot->num], off, data, count);
157 }
158 
159 static void
160 sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,
161     bus_size_t off, uint32_t *data, bus_size_t count)
162 {
163 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
164 
165 	bus_write_multi_4(sc->mem_res[slot->num], off, data, count);
166 }
167 
168 static void
169 sdhci_fdt_intr(void *arg)
170 {
171 	struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg;
172 	int i;
173 
174 	for (i = 0; i < sc->num_slots; i++)
175 		sdhci_generic_intr(&sc->slots[i]);
176 }
177 
178 static int
179 sdhci_fdt_get_ro(device_t bus, device_t dev)
180 {
181 	struct sdhci_fdt_softc *sc = device_get_softc(bus);
182 
183 	return (sdhci_generic_get_ro(bus, dev) ^ sc->wp_inverted);
184 }
185 
186 static int
187 sdhci_fdt_probe(device_t dev)
188 {
189 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
190 	phandle_t node;
191 	pcell_t cid;
192 
193 	sc->quirks = 0;
194 	sc->num_slots = 1;
195 	sc->max_clk = 0;
196 
197 	if (!ofw_bus_status_okay(dev))
198 		return (ENXIO);
199 
200 	switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
201 	case SDHCI_FDT_ARMADA38X:
202 		sc->quirks = SDHCI_QUIRK_BROKEN_AUTO_STOP;
203 		device_set_desc(dev, "ARMADA38X SDHCI controller");
204 		break;
205 	case SDHCI_FDT_GENERIC:
206 		device_set_desc(dev, "generic fdt SDHCI controller");
207 		break;
208 	case SDHCI_FDT_QUALCOMM:
209 		sc->quirks = SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE;
210 		device_set_desc(dev, "Qualcomm FDT SDHCI controller");
211 		break;
212 	case SDHCI_FDT_XLNX_ZY7:
213 		sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
214 		device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller");
215 		break;
216 	default:
217 		return (ENXIO);
218 	}
219 
220 	node = ofw_bus_get_node(dev);
221 
222 	/* Allow dts to patch quirks, slots, and max-frequency. */
223 	if ((OF_getencprop(node, "quirks", &cid, sizeof(cid))) > 0)
224 		sc->quirks = cid;
225 	if ((OF_getencprop(node, "num-slots", &cid, sizeof(cid))) > 0)
226 		sc->num_slots = cid;
227 	if ((OF_getencprop(node, "max-frequency", &cid, sizeof(cid))) > 0)
228 		sc->max_clk = cid;
229 	if (OF_hasprop(node, "no-1-8-v"))
230 		sc->no_18v = true;
231 	if (OF_hasprop(node, "wp-inverted"))
232 		sc->wp_inverted = true;
233 
234 	return (0);
235 }
236 
237 static int
238 sdhci_fdt_attach(device_t dev)
239 {
240 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
241 	struct sdhci_slot *slot;
242 	int err, slots, rid, i;
243 
244 	sc->dev = dev;
245 
246 	/* Allocate IRQ. */
247 	rid = 0;
248 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
249 	    RF_ACTIVE);
250 	if (sc->irq_res == NULL) {
251 		device_printf(dev, "Can't allocate IRQ\n");
252 		return (ENOMEM);
253 	}
254 
255 	/* Scan all slots. */
256 	slots = sc->num_slots;	/* number of slots determined in probe(). */
257 	sc->num_slots = 0;
258 	for (i = 0; i < slots; i++) {
259 		slot = &sc->slots[sc->num_slots];
260 
261 		/* Allocate memory. */
262 		rid = 0;
263 		sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
264 							&rid, RF_ACTIVE);
265 		if (sc->mem_res[i] == NULL) {
266 			device_printf(dev,
267 			    "Can't allocate memory for slot %d\n", i);
268 			continue;
269 		}
270 
271 		slot->quirks = sc->quirks;
272 		slot->caps = sc->caps;
273 		slot->max_clk = sc->max_clk;
274 
275 		if (sdhci_init_slot(dev, slot, i) != 0)
276 			continue;
277 
278 		sc->num_slots++;
279 	}
280 	device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);
281 
282 	/* Activate the interrupt */
283 	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
284 	    NULL, sdhci_fdt_intr, sc, &sc->intrhand);
285 	if (err) {
286 		device_printf(dev, "Cannot setup IRQ\n");
287 		return (err);
288 	}
289 
290 	/* Process cards detection. */
291 	for (i = 0; i < sc->num_slots; i++)
292 		sdhci_start_slot(&sc->slots[i]);
293 
294 	return (0);
295 }
296 
297 static int
298 sdhci_fdt_detach(device_t dev)
299 {
300 	struct sdhci_fdt_softc *sc = device_get_softc(dev);
301 	int i;
302 
303 	bus_generic_detach(dev);
304 	bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
305 	bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res),
306 	    sc->irq_res);
307 
308 	for (i = 0; i < sc->num_slots; i++) {
309 		sdhci_cleanup_slot(&sc->slots[i]);
310 		bus_release_resource(dev, SYS_RES_MEMORY,
311 		    rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
312 	}
313 
314 	return (0);
315 }
316 
317 static device_method_t sdhci_fdt_methods[] = {
318 	/* device_if */
319 	DEVMETHOD(device_probe,		sdhci_fdt_probe),
320 	DEVMETHOD(device_attach,	sdhci_fdt_attach),
321 	DEVMETHOD(device_detach,	sdhci_fdt_detach),
322 
323 	/* Bus interface */
324 	DEVMETHOD(bus_read_ivar,	sdhci_generic_read_ivar),
325 	DEVMETHOD(bus_write_ivar,	sdhci_generic_write_ivar),
326 
327 	/* mmcbr_if */
328 	DEVMETHOD(mmcbr_update_ios,	sdhci_generic_update_ios),
329 	DEVMETHOD(mmcbr_request,	sdhci_generic_request),
330 	DEVMETHOD(mmcbr_get_ro,		sdhci_fdt_get_ro),
331 	DEVMETHOD(mmcbr_acquire_host,	sdhci_generic_acquire_host),
332 	DEVMETHOD(mmcbr_release_host,	sdhci_generic_release_host),
333 
334 	/* SDHCI registers accessors */
335 	DEVMETHOD(sdhci_read_1,		sdhci_fdt_read_1),
336 	DEVMETHOD(sdhci_read_2,		sdhci_fdt_read_2),
337 	DEVMETHOD(sdhci_read_4,		sdhci_fdt_read_4),
338 	DEVMETHOD(sdhci_read_multi_4,	sdhci_fdt_read_multi_4),
339 	DEVMETHOD(sdhci_write_1,	sdhci_fdt_write_1),
340 	DEVMETHOD(sdhci_write_2,	sdhci_fdt_write_2),
341 	DEVMETHOD(sdhci_write_4,	sdhci_fdt_write_4),
342 	DEVMETHOD(sdhci_write_multi_4,	sdhci_fdt_write_multi_4),
343 
344 	DEVMETHOD_END
345 };
346 
347 static driver_t sdhci_fdt_driver = {
348 	"sdhci_fdt",
349 	sdhci_fdt_methods,
350 	sizeof(struct sdhci_fdt_softc),
351 };
352 static devclass_t sdhci_fdt_devclass;
353 
354 DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass,
355     NULL, NULL);
356 MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1);
357 #ifndef MMCCAM
358 MMC_DECLARE_BRIDGE(sdhci_fdt);
359 #endif
360