1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2004-2006 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <machine/bus.h> 35 #include <sys/lock.h> 36 #include <sys/mutex.h> 37 #include <sys/rman.h> 38 #include <sys/serial.h> 39 40 #include <dev/scc/scc_bfe.h> 41 #include <dev/scc/scc_bus.h> 42 43 #include <dev/ic/z8530.h> 44 45 #include "scc_if.h" 46 47 static int z8530_bfe_attach(struct scc_softc *, int); 48 static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *); 49 static int z8530_bfe_ipend(struct scc_softc *); 50 static int z8530_bfe_probe(struct scc_softc *); 51 52 /* Channel B is always at 0 offset. */ 53 #define CHAN_A (-(sc->sc_class->cl_range)) 54 #define CHAN_B 0 55 56 static kobj_method_t z8530_methods[] = { 57 KOBJMETHOD(scc_attach, z8530_bfe_attach), 58 KOBJMETHOD(scc_iclear, z8530_bfe_iclear), 59 KOBJMETHOD(scc_ipend, z8530_bfe_ipend), 60 KOBJMETHOD(scc_probe, z8530_bfe_probe), 61 KOBJMETHOD_END 62 }; 63 64 /* 65 * escc (macio) spacing. 66 */ 67 struct scc_class scc_z8530_escc_class = { 68 "z8530 escc class", 69 z8530_methods, 70 sizeof(struct scc_softc), 71 .cl_channels = 2, 72 .cl_class = SCC_CLASS_Z8530, 73 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC, 74 /* Negative .cl_range signifies this is channel spacing. */ 75 .cl_range = (CHAN_B - 16), 76 }; 77 78 /* 79 * SUN compatible channel spacing. 80 */ 81 struct scc_class scc_z8530_legacy_class = { 82 "z8530 legacy class", 83 z8530_methods, 84 sizeof(struct scc_softc), 85 .cl_channels = 2, 86 .cl_class = SCC_CLASS_Z8530, 87 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC, 88 /* Negative .cl_range signifies this is channel spacing. */ 89 .cl_range = (CHAN_B - 2), 90 }; 91 92 /* Multiplexed I/O. */ 93 static __inline uint8_t 94 scc_getmreg(struct scc_bas *bas, int ch, int reg) 95 { 96 97 scc_setreg(bas, ch + REG_CTRL, reg); 98 scc_barrier(bas); 99 return (scc_getreg(bas, ch + REG_CTRL)); 100 } 101 102 static int 103 z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused) 104 { 105 106 return (0); 107 } 108 109 static int 110 z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch) 111 { 112 struct scc_bas *bas; 113 int c; 114 115 bas = &sc->sc_bas; 116 c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B; 117 mtx_lock_spin(&sc->sc_hwmtx); 118 if (ch->ch_ipend & SER_INT_TXIDLE) { 119 scc_setreg(bas, c + REG_CTRL, CR_RSTTXI); 120 scc_barrier(bas); 121 } 122 if (ch->ch_ipend & SER_INT_RXREADY) { 123 scc_getreg(bas, c + REG_DATA); 124 scc_barrier(bas); 125 } 126 if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK)) 127 scc_setreg(bas, c + REG_CTRL, CR_RSTERR); 128 mtx_unlock_spin(&sc->sc_hwmtx); 129 return (0); 130 } 131 132 #define SIGCHG(c, i, s, d) \ 133 if (c) { \ 134 i |= (i & s) ? s : s | d; \ 135 } else { \ 136 i = (i & s) ? (i & ~s) | d : i; \ 137 } 138 139 static int 140 z8530_bfe_ipend(struct scc_softc *sc) 141 { 142 struct scc_bas *bas; 143 struct scc_chan *ch[2]; 144 uint32_t sig; 145 uint8_t bes, ip, src; 146 147 bas = &sc->sc_bas; 148 ch[0] = &sc->sc_chan[0]; 149 ch[1] = &sc->sc_chan[1]; 150 ch[0]->ch_ipend = 0; 151 ch[1]->ch_ipend = 0; 152 153 mtx_lock_spin(&sc->sc_hwmtx); 154 ip = scc_getmreg(bas, CHAN_A, RR_IP); 155 if (ip & IP_RIA) 156 ch[0]->ch_ipend |= SER_INT_RXREADY; 157 if (ip & IP_RIB) 158 ch[1]->ch_ipend |= SER_INT_RXREADY; 159 if (ip & IP_TIA) 160 ch[0]->ch_ipend |= SER_INT_TXIDLE; 161 if (ip & IP_TIB) 162 ch[1]->ch_ipend |= SER_INT_TXIDLE; 163 if (ip & IP_SIA) { 164 bes = scc_getmreg(bas, CHAN_A, CR_RSTXSI); 165 if (bes & BES_BRK) 166 ch[0]->ch_ipend |= SER_INT_BREAK; 167 sig = ch[0]->ch_hwsig; 168 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 169 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 170 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 171 if (sig & SER_MASK_DELTA) { 172 ch[0]->ch_hwsig = sig; 173 ch[0]->ch_ipend |= SER_INT_SIGCHG; 174 } 175 src = scc_getmreg(bas, CHAN_A, RR_SRC); 176 if (src & SRC_OVR) 177 ch[0]->ch_ipend |= SER_INT_OVERRUN; 178 } 179 if (ip & IP_SIB) { 180 bes = scc_getmreg(bas, CHAN_B, CR_RSTXSI); 181 if (bes & BES_BRK) 182 ch[1]->ch_ipend |= SER_INT_BREAK; 183 sig = ch[1]->ch_hwsig; 184 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 185 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 186 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 187 if (sig & SER_MASK_DELTA) { 188 ch[1]->ch_hwsig = sig; 189 ch[1]->ch_ipend |= SER_INT_SIGCHG; 190 } 191 src = scc_getmreg(bas, CHAN_B, RR_SRC); 192 if (src & SRC_OVR) 193 ch[1]->ch_ipend |= SER_INT_OVERRUN; 194 } 195 mtx_unlock_spin(&sc->sc_hwmtx); 196 197 return (ch[0]->ch_ipend | ch[1]->ch_ipend); 198 } 199 200 static int 201 z8530_bfe_probe(struct scc_softc *sc __unused) 202 { 203 204 return (0); 205 } 206