xref: /freebsd/sys/dev/scc/scc_dev_z8530.c (revision 640235e2c2ba32947f7c59d168437ffa1280f1e6)
1 /*-
2  * Copyright (c) 2004-2006 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <machine/bus.h>
35 #include <sys/rman.h>
36 #include <sys/serial.h>
37 
38 #include <dev/scc/scc_bfe.h>
39 #include <dev/scc/scc_bus.h>
40 
41 #include <dev/ic/z8530.h>
42 
43 #include "scc_if.h"
44 
45 static int z8530_bfe_attach(struct scc_softc *, int);
46 static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *);
47 static int z8530_bfe_ipend(struct scc_softc *);
48 static int z8530_bfe_probe(struct scc_softc *);
49 
50 static kobj_method_t z8530_methods[] = {
51 	KOBJMETHOD(scc_attach,	z8530_bfe_attach),
52 	KOBJMETHOD(scc_iclear,	z8530_bfe_iclear),
53 	KOBJMETHOD(scc_ipend,	z8530_bfe_ipend),
54 	KOBJMETHOD(scc_probe,	z8530_bfe_probe),
55 	KOBJMETHOD_END
56 };
57 
58 struct scc_class scc_z8530_class = {
59 	"z8530 class",
60 	z8530_methods,
61 	sizeof(struct scc_softc),
62 	.cl_channels = 2,
63 	.cl_class = SCC_CLASS_Z8530,
64 	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
65 	.cl_range = CHAN_B - CHAN_A,
66 };
67 
68 /* Multiplexed I/O. */
69 static __inline uint8_t
70 scc_getmreg(struct scc_bas *bas, int ch, int reg)
71 {
72 
73 	scc_setreg(bas, ch + REG_CTRL, reg);
74 	scc_barrier(bas);
75 	return (scc_getreg(bas, ch + REG_CTRL));
76 }
77 
78 static int
79 z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
80 {
81 
82 	return (0);
83 }
84 
85 static int
86 z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
87 {
88 	struct scc_bas *bas;
89 	int c;
90 
91 	bas = &sc->sc_bas;
92 	c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B;
93 	mtx_lock_spin(&sc->sc_hwmtx);
94 	if (ch->ch_ipend & SER_INT_TXIDLE) {
95 		scc_setreg(bas, c + REG_CTRL, CR_RSTTXI);
96 		scc_barrier(bas);
97 	}
98 	if (ch->ch_ipend & SER_INT_RXREADY) {
99 		scc_getreg(bas, c + REG_DATA);
100 		scc_barrier(bas);
101 	}
102 	if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK))
103 		scc_setreg(bas, c + REG_CTRL, CR_RSTERR);
104 	mtx_unlock_spin(&sc->sc_hwmtx);
105 	return (0);
106 }
107 
108 #define	SIGCHG(c, i, s, d)				\
109 	if (c) {					\
110 		i |= (i & s) ? s : s | d;		\
111 	} else {					\
112 		i = (i & s) ? (i & ~s) | d : i;		\
113 	}
114 
115 static int
116 z8530_bfe_ipend(struct scc_softc *sc)
117 {
118 	struct scc_bas *bas;
119 	struct scc_chan *ch[2];
120 	uint32_t sig;
121 	uint8_t bes, ip, src;
122 
123 	bas = &sc->sc_bas;
124 	ch[0] = &sc->sc_chan[0];
125 	ch[1] = &sc->sc_chan[1];
126 	ch[0]->ch_ipend = 0;
127 	ch[1]->ch_ipend = 0;
128 
129 	mtx_lock_spin(&sc->sc_hwmtx);
130 	ip = scc_getmreg(bas, CHAN_A, RR_IP);
131 	if (ip & IP_RIA)
132 		ch[0]->ch_ipend |= SER_INT_RXREADY;
133 	if (ip & IP_RIB)
134 		ch[1]->ch_ipend |= SER_INT_RXREADY;
135 	if (ip & IP_TIA)
136 		ch[0]->ch_ipend |= SER_INT_TXIDLE;
137 	if (ip & IP_TIB)
138 		ch[1]->ch_ipend |= SER_INT_TXIDLE;
139 	if (ip & IP_SIA) {
140 		bes = scc_getmreg(bas, CHAN_A, CR_RSTXSI);
141 		if (bes & BES_BRK)
142 			ch[0]->ch_ipend |= SER_INT_BREAK;
143 		sig = ch[0]->ch_hwsig;
144 		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
145 		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
146 		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
147 		if (sig & SER_MASK_DELTA) {
148 			ch[0]->ch_hwsig = sig;
149 			ch[0]->ch_ipend |= SER_INT_SIGCHG;
150 		}
151 		src = scc_getmreg(bas, CHAN_A, RR_SRC);
152 		if (src & SRC_OVR)
153 			ch[0]->ch_ipend |= SER_INT_OVERRUN;
154 	}
155 	if (ip & IP_SIB) {
156 		bes = scc_getmreg(bas, CHAN_B, CR_RSTXSI);
157 		if (bes & BES_BRK)
158 			ch[1]->ch_ipend |= SER_INT_BREAK;
159 		sig = ch[1]->ch_hwsig;
160 		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
161 		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
162 		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
163 		if (sig & SER_MASK_DELTA) {
164 			ch[1]->ch_hwsig = sig;
165 			ch[1]->ch_ipend |= SER_INT_SIGCHG;
166 		}
167 		src = scc_getmreg(bas, CHAN_B, RR_SRC);
168 		if (src & SRC_OVR)
169 			ch[1]->ch_ipend |= SER_INT_OVERRUN;
170 	}
171 	mtx_unlock_spin(&sc->sc_hwmtx);
172 
173 	return (ch[0]->ch_ipend | ch[1]->ch_ipend);
174 }
175 
176 static int
177 z8530_bfe_probe(struct scc_softc *sc __unused)
178 {
179 
180 	return (0);
181 }
182