xref: /freebsd/sys/dev/scc/scc_dev_z8530.c (revision 389e4940069316fe667ffa263fa7d6390d0a960f)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2004-2006 Marcel Moolenaar
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/conf.h>
36 #include <machine/bus.h>
37 #include <sys/rman.h>
38 #include <sys/serial.h>
39 
40 #include <dev/scc/scc_bfe.h>
41 #include <dev/scc/scc_bus.h>
42 
43 #include <dev/ic/z8530.h>
44 
45 #include "scc_if.h"
46 
47 static int z8530_bfe_attach(struct scc_softc *, int);
48 static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *);
49 static int z8530_bfe_ipend(struct scc_softc *);
50 static int z8530_bfe_probe(struct scc_softc *);
51 
52 static kobj_method_t z8530_methods[] = {
53 	KOBJMETHOD(scc_attach,	z8530_bfe_attach),
54 	KOBJMETHOD(scc_iclear,	z8530_bfe_iclear),
55 	KOBJMETHOD(scc_ipend,	z8530_bfe_ipend),
56 	KOBJMETHOD(scc_probe,	z8530_bfe_probe),
57 	KOBJMETHOD_END
58 };
59 
60 struct scc_class scc_z8530_class = {
61 	"z8530 class",
62 	z8530_methods,
63 	sizeof(struct scc_softc),
64 	.cl_channels = 2,
65 	.cl_class = SCC_CLASS_Z8530,
66 	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
67 	.cl_range = CHAN_B - CHAN_A,
68 };
69 
70 /* Multiplexed I/O. */
71 static __inline uint8_t
72 scc_getmreg(struct scc_bas *bas, int ch, int reg)
73 {
74 
75 	scc_setreg(bas, ch + REG_CTRL, reg);
76 	scc_barrier(bas);
77 	return (scc_getreg(bas, ch + REG_CTRL));
78 }
79 
80 static int
81 z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
82 {
83 
84 	return (0);
85 }
86 
87 static int
88 z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
89 {
90 	struct scc_bas *bas;
91 	int c;
92 
93 	bas = &sc->sc_bas;
94 	c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B;
95 	mtx_lock_spin(&sc->sc_hwmtx);
96 	if (ch->ch_ipend & SER_INT_TXIDLE) {
97 		scc_setreg(bas, c + REG_CTRL, CR_RSTTXI);
98 		scc_barrier(bas);
99 	}
100 	if (ch->ch_ipend & SER_INT_RXREADY) {
101 		scc_getreg(bas, c + REG_DATA);
102 		scc_barrier(bas);
103 	}
104 	if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK))
105 		scc_setreg(bas, c + REG_CTRL, CR_RSTERR);
106 	mtx_unlock_spin(&sc->sc_hwmtx);
107 	return (0);
108 }
109 
110 #define	SIGCHG(c, i, s, d)				\
111 	if (c) {					\
112 		i |= (i & s) ? s : s | d;		\
113 	} else {					\
114 		i = (i & s) ? (i & ~s) | d : i;		\
115 	}
116 
117 static int
118 z8530_bfe_ipend(struct scc_softc *sc)
119 {
120 	struct scc_bas *bas;
121 	struct scc_chan *ch[2];
122 	uint32_t sig;
123 	uint8_t bes, ip, src;
124 
125 	bas = &sc->sc_bas;
126 	ch[0] = &sc->sc_chan[0];
127 	ch[1] = &sc->sc_chan[1];
128 	ch[0]->ch_ipend = 0;
129 	ch[1]->ch_ipend = 0;
130 
131 	mtx_lock_spin(&sc->sc_hwmtx);
132 	ip = scc_getmreg(bas, CHAN_A, RR_IP);
133 	if (ip & IP_RIA)
134 		ch[0]->ch_ipend |= SER_INT_RXREADY;
135 	if (ip & IP_RIB)
136 		ch[1]->ch_ipend |= SER_INT_RXREADY;
137 	if (ip & IP_TIA)
138 		ch[0]->ch_ipend |= SER_INT_TXIDLE;
139 	if (ip & IP_TIB)
140 		ch[1]->ch_ipend |= SER_INT_TXIDLE;
141 	if (ip & IP_SIA) {
142 		bes = scc_getmreg(bas, CHAN_A, CR_RSTXSI);
143 		if (bes & BES_BRK)
144 			ch[0]->ch_ipend |= SER_INT_BREAK;
145 		sig = ch[0]->ch_hwsig;
146 		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
147 		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
148 		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
149 		if (sig & SER_MASK_DELTA) {
150 			ch[0]->ch_hwsig = sig;
151 			ch[0]->ch_ipend |= SER_INT_SIGCHG;
152 		}
153 		src = scc_getmreg(bas, CHAN_A, RR_SRC);
154 		if (src & SRC_OVR)
155 			ch[0]->ch_ipend |= SER_INT_OVERRUN;
156 	}
157 	if (ip & IP_SIB) {
158 		bes = scc_getmreg(bas, CHAN_B, CR_RSTXSI);
159 		if (bes & BES_BRK)
160 			ch[1]->ch_ipend |= SER_INT_BREAK;
161 		sig = ch[1]->ch_hwsig;
162 		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
163 		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
164 		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
165 		if (sig & SER_MASK_DELTA) {
166 			ch[1]->ch_hwsig = sig;
167 			ch[1]->ch_ipend |= SER_INT_SIGCHG;
168 		}
169 		src = scc_getmreg(bas, CHAN_B, RR_SRC);
170 		if (src & SRC_OVR)
171 			ch[1]->ch_ipend |= SER_INT_OVERRUN;
172 	}
173 	mtx_unlock_spin(&sc->sc_hwmtx);
174 
175 	return (ch[0]->ch_ipend | ch[1]->ch_ipend);
176 }
177 
178 static int
179 z8530_bfe_probe(struct scc_softc *sc __unused)
180 {
181 
182 	return (0);
183 }
184