1 /*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 #include "opt_wlan.h" 29 30 #include <sys/param.h> 31 #include <sys/lock.h> 32 #include <sys/mutex.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/queue.h> 39 #include <sys/taskqueue.h> 40 #include <sys/bus.h> 41 #include <sys/endian.h> 42 #include <sys/linker.h> 43 44 #include <net/if.h> 45 #include <net/ethernet.h> 46 #include <net/if_media.h> 47 48 #include <net80211/ieee80211_var.h> 49 #include <net80211/ieee80211_radiotap.h> 50 51 #include <dev/rtwn/if_rtwnvar.h> 52 53 #include <dev/rtwn/if_rtwn_ridx.h> 54 #include <dev/rtwn/if_rtwn_rx.h> 55 56 #include <dev/rtwn/rtl8812a/r12a_var.h> 57 58 #include <dev/rtwn/rtl8821a/r21a.h> 59 #include <dev/rtwn/rtl8821a/r21a_reg.h> 60 61 static void 62 r21a_bypass_ext_lna_2ghz(struct rtwn_softc *sc) 63 { 64 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00100000, 0); 65 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0); 66 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x07); 67 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x0700); 68 } 69 70 void 71 r21a_set_band_2ghz(struct rtwn_softc *sc, uint32_t basicrates) 72 { 73 struct r12a_softc *rs = sc->sc_priv; 74 75 /* Enable CCK / OFDM. */ 76 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, 77 0, R12A_OFDMCCK_EN_CCK | R12A_OFDMCCK_EN_OFDM); 78 79 /* Turn off RF PA and LNA. */ 80 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 81 R12A_RFE_PINMUX_LNA_MASK, 0x7000); 82 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 83 R12A_RFE_PINMUX_PA_A_MASK, 0x70); 84 85 if (rs->ext_lna_2g) { 86 /* Turn on 2.4 GHz external LNA. */ 87 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0, 0x00100000); 88 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0); 89 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0x05, 0x02); 90 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0x0500, 0x0200); 91 } else { 92 /* Bypass 2.4 GHz external LNA. */ 93 r21a_bypass_ext_lna_2ghz(sc); 94 } 95 96 /* Select AGC table. */ 97 rtwn_bb_setbits(sc, R12A_TX_SCALE(0), 0x0f00, 0); 98 99 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0x10); 100 rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0x0f000000, 0x01000000); 101 102 /* Write basic rates. */ 103 rtwn_set_basicrates(sc, basicrates); 104 105 rtwn_write_1(sc, R12A_CCK_CHECK, 0); 106 } 107 108 void 109 r21a_set_band_5ghz(struct rtwn_softc *sc, uint32_t basicrates) 110 { 111 struct r12a_softc *rs = sc->sc_priv; 112 int ntries; 113 114 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 115 R12A_RFE_PINMUX_LNA_MASK, 0x5000); 116 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 117 R12A_RFE_PINMUX_PA_A_MASK, 0x40); 118 119 if (rs->ext_lna_2g) { 120 /* Bypass 2.4 GHz external LNA. */ 121 r21a_bypass_ext_lna_2ghz(sc); 122 } 123 124 rtwn_write_1(sc, R12A_CCK_CHECK, R12A_CCK_CHECK_5GHZ); 125 126 for (ntries = 0; ntries < 100; ntries++) { 127 if ((rtwn_read_2(sc, R12A_TXPKT_EMPTY) & 0x30) == 0x30) 128 break; 129 130 rtwn_delay(sc, 25); 131 } 132 if (ntries == 100) { 133 device_printf(sc->sc_dev, 134 "%s: TXPKT_EMPTY check failed (%04X)\n", 135 __func__, rtwn_read_2(sc, R12A_TXPKT_EMPTY)); 136 } 137 138 /* Enable OFDM. */ 139 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, R12A_OFDMCCK_EN_CCK, 140 R12A_OFDMCCK_EN_OFDM); 141 142 /* Select AGC table. */ 143 rtwn_bb_setbits(sc, R12A_TX_SCALE(0), 0x0f00, 0x0100); 144 145 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0); 146 rtwn_bb_setbits(sc, R12A_CCK_RX_PATH, 0, 0x0f000000); 147 148 /* Write basic rates. */ 149 rtwn_set_basicrates(sc, basicrates); 150 } 151