1 /*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_wlan.h" 31 32 #include <sys/param.h> 33 #include <sys/lock.h> 34 #include <sys/mutex.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/taskqueue.h> 42 #include <sys/bus.h> 43 #include <sys/endian.h> 44 #include <sys/linker.h> 45 46 #include <net/if.h> 47 #include <net/ethernet.h> 48 #include <net/if_media.h> 49 50 #include <net80211/ieee80211_var.h> 51 #include <net80211/ieee80211_radiotap.h> 52 53 #include <dev/rtwn/if_rtwnreg.h> 54 #include <dev/rtwn/if_rtwnvar.h> 55 56 #include <dev/rtwn/rtl8812a/r12a_var.h> 57 58 #include <dev/rtwn/rtl8812a/usb/r12au.h> 59 #include <dev/rtwn/rtl8812a/usb/r12au_reg.h> 60 61 62 void 63 r12au_init_rx_agg(struct rtwn_softc *sc) 64 { 65 struct r12a_softc *rs = sc->sc_priv; 66 67 /* Rx aggregation (USB). */ 68 rtwn_write_2(sc, R92C_RXDMA_AGG_PG_TH, 69 rs->ac_usb_dma_size | (rs->ac_usb_dma_time << 8)); 70 rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0, 71 R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 72 } 73 74 void 75 r12au_init_burstlen_usb2(struct rtwn_softc *sc) 76 { 77 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3); 78 79 if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) { 80 /* Set burst packet length to 512 B. */ 81 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, 82 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB2)); 83 } else { 84 /* Set burst packet length to 64 B. */ 85 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, 86 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB1)); 87 } 88 } 89 90 void 91 r12au_init_burstlen(struct rtwn_softc *sc) 92 { 93 const uint8_t dma_count = R12A_DMA_MODE | SM(R12A_BURST_CNT, 3); 94 95 if (rtwn_read_1(sc, R92C_TYPE_ID + 3) & 0x80) 96 r12au_init_burstlen_usb2(sc); 97 else { /* USB 3.0 */ 98 /* Set burst packet length to 1 KB. */ 99 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M, 100 dma_count | SM(R12A_BURST_SZ, R12A_BURST_SZ_USB3)); 101 102 rtwn_setbits_1(sc, 0xf008, 0x18, 0); 103 } 104 } 105 106 static void 107 r12au_arfb_init(struct rtwn_softc *sc) 108 { 109 /* ARFB table 9 for 11ac 5G 2SS. */ 110 rtwn_write_4(sc, R12A_ARFR_5G(0), 0x00000010); 111 rtwn_write_4(sc, R12A_ARFR_5G(0) + 4, 0xfffff000); 112 113 /* ARFB table 10 for 11ac 5G 1SS. */ 114 rtwn_write_4(sc, R12A_ARFR_5G(1), 0x00000010); 115 rtwn_write_4(sc, R12A_ARFR_5G(1) + 4, 0x003ff000); 116 117 /* ARFB table 11 for 11ac 2G 1SS. */ 118 rtwn_write_4(sc, R12A_ARFR_2G(0), 0x00000015); 119 rtwn_write_4(sc, R12A_ARFR_2G(0) + 4, 0x003ff000); 120 121 /* ARFB table 12 for 11ac 2G 2SS. */ 122 rtwn_write_4(sc, R12A_ARFR_2G(1), 0x00000015); 123 rtwn_write_4(sc, R12A_ARFR_2G(1) + 4, 0xffcff000); 124 } 125 126 void 127 r12au_init_ampdu_fwhw(struct rtwn_softc *sc) 128 { 129 rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL, 130 R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW, 0); 131 } 132 133 void 134 r12au_init_ampdu(struct rtwn_softc *sc) 135 { 136 struct r12a_softc *rs = sc->sc_priv; 137 138 /* Rx interval (USB3). */ 139 rtwn_write_1(sc, 0xf050, 0x01); 140 141 /* burst length = 4 */ 142 rtwn_write_2(sc, R92C_RXDMA_STATUS, 0x7400); 143 144 rtwn_write_1(sc, R92C_RXDMA_STATUS + 1, 0xf5); 145 146 /* Setup AMPDU aggregation. */ 147 rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, rs->ampdu_max_time); 148 rtwn_write_4(sc, R12A_AMPDU_MAX_LENGTH, 0xffffffff); 149 150 /* 80 MHz clock (again?) */ 151 rtwn_write_1(sc, R92C_USTIME_TSF, 0x50); 152 rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50); 153 154 rtwn_r12a_init_burstlen(sc); 155 156 /* Enable single packet AMPDU. */ 157 rtwn_setbits_1(sc, R12A_HT_SINGLE_AMPDU, 0, 158 R12A_HT_SINGLE_AMPDU_PKT_ENA); 159 160 /* 11K packet length for VHT. */ 161 rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18); 162 163 rtwn_write_1(sc, R92C_PIFS, 0); 164 165 rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x1f1f); 166 167 rtwn_r12a_init_ampdu_fwhw(sc); 168 169 /* Do not reset MAC. */ 170 rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60); 171 172 r12au_arfb_init(sc); 173 } 174 175 void 176 r12au_post_init(struct rtwn_softc *sc) 177 { 178 179 /* Setup RTS BW (equal to data BW). */ 180 rtwn_setbits_1(sc, R92C_QUEUE_CTRL, 0x08, 0); 181 182 rtwn_write_1(sc, R12A_EARLY_MODE_CONTROL + 3, 0x01); 183 184 /* Reset USB mode switch setting. */ 185 rtwn_write_1(sc, R12A_SDIO_CTRL, 0); 186 rtwn_write_1(sc, R92C_ACLK_MON, 0); 187 188 rtwn_write_1(sc, R92C_USB_HRPWM, 0); 189 190 #ifndef RTWN_WITHOUT_UCODE 191 if (sc->sc_flags & RTWN_FW_LOADED) { 192 if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) { 193 /* TODO: implement */ 194 sc->sc_ratectl = RTWN_RATECTL_NET80211; 195 } else 196 sc->sc_ratectl = sc->sc_ratectl_sysctl; 197 } else 198 #endif 199 sc->sc_ratectl = RTWN_RATECTL_NONE; 200 } 201