1 /*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_wlan.h" 31 32 #include <sys/param.h> 33 #include <sys/lock.h> 34 #include <sys/mutex.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/taskqueue.h> 42 #include <sys/bus.h> 43 #include <sys/endian.h> 44 #include <sys/linker.h> 45 46 #include <net/if.h> 47 #include <net/ethernet.h> 48 #include <net/if_media.h> 49 50 #include <net80211/ieee80211_var.h> 51 #include <net80211/ieee80211_radiotap.h> 52 53 #include <dev/rtwn/if_rtwnreg.h> 54 #include <dev/rtwn/if_rtwnvar.h> 55 56 #include <dev/rtwn/if_rtwn_debug.h> 57 58 #include <dev/rtwn/rtl8812a/r12a.h> 59 #include <dev/rtwn/rtl8812a/r12a_var.h> 60 #include <dev/rtwn/rtl8812a/r12a_rom_image.h> 61 62 63 void 64 r12a_parse_rom_common(struct rtwn_softc *sc, uint8_t *buf) 65 { 66 struct r12a_softc *rs = sc->sc_priv; 67 struct r12a_rom *rom = (struct r12a_rom *)buf; 68 int i, j, k; 69 70 sc->thermal_meter = rom->thermal_meter; 71 rs->crystalcap = RTWN_GET_ROM_VAR(rom->crystalcap, 72 R12A_ROM_CRYSTALCAP_DEF); 73 rs->tx_bbswing_2g = RTWN_GET_ROM_VAR(rom->tx_bbswing_2g, 0); 74 rs->tx_bbswing_5g = RTWN_GET_ROM_VAR(rom->tx_bbswing_5g, 0); 75 76 for (i = 0; i < sc->ntxchains; i++) { 77 struct r12a_tx_pwr_2g *pwr_2g = &rom->tx_pwr[i].pwr_2g; 78 struct r12a_tx_pwr_5g *pwr_5g = &rom->tx_pwr[i].pwr_5g; 79 struct r12a_tx_pwr_diff_2g *pwr_diff_2g = 80 &rom->tx_pwr[i].pwr_diff_2g; 81 struct r12a_tx_pwr_diff_5g *pwr_diff_5g = 82 &rom->tx_pwr[i].pwr_diff_5g; 83 84 for (j = 0; j < R12A_GROUP_2G - 1; j++) { 85 rs->cck_tx_pwr[i][j] = 86 RTWN_GET_ROM_VAR(pwr_2g->cck[j], 87 R12A_DEF_TX_PWR_2G); 88 rs->ht40_tx_pwr_2g[i][j] = 89 RTWN_GET_ROM_VAR(pwr_2g->ht40[j], 90 R12A_DEF_TX_PWR_2G); 91 } 92 rs->cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j], 93 R12A_DEF_TX_PWR_2G); 94 95 rs->cck_tx_pwr_diff_2g[i][0] = 0; 96 rs->ofdm_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( 97 MS(pwr_diff_2g->ht20_ofdm, LOW_PART)); 98 rs->bw20_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8( 99 MS(pwr_diff_2g->ht20_ofdm, HIGH_PART)); 100 rs->bw40_tx_pwr_diff_2g[i][0] = 0; 101 102 for (j = 1, k = 0; k < nitems(pwr_diff_2g->diff123); j++, k++) { 103 rs->cck_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 104 MS(pwr_diff_2g->diff123[k].ofdm_cck, LOW_PART)); 105 rs->ofdm_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 106 MS(pwr_diff_2g->diff123[k].ofdm_cck, HIGH_PART)); 107 rs->bw20_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 108 MS(pwr_diff_2g->diff123[k].ht40_ht20, LOW_PART)); 109 rs->bw40_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8( 110 MS(pwr_diff_2g->diff123[k].ht40_ht20, HIGH_PART)); 111 } 112 113 for (j = 0; j < R12A_GROUP_5G; j++) { 114 rs->ht40_tx_pwr_5g[i][j] = 115 RTWN_GET_ROM_VAR(pwr_5g->ht40[j], 116 R12A_DEF_TX_PWR_5G); 117 } 118 119 rs->ofdm_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( 120 MS(pwr_diff_5g->ht20_ofdm, LOW_PART)); 121 rs->ofdm_tx_pwr_diff_5g[i][1] = RTWN_SIGN4TO8( 122 MS(pwr_diff_5g->ofdm_ofdm[0], HIGH_PART)); 123 rs->ofdm_tx_pwr_diff_5g[i][2] = RTWN_SIGN4TO8( 124 MS(pwr_diff_5g->ofdm_ofdm[0], LOW_PART)); 125 rs->ofdm_tx_pwr_diff_5g[i][3] = RTWN_SIGN4TO8( 126 MS(pwr_diff_5g->ofdm_ofdm[1], LOW_PART)); 127 128 rs->bw20_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8( 129 MS(pwr_diff_5g->ht20_ofdm, HIGH_PART)); 130 rs->bw40_tx_pwr_diff_5g[i][0] = 0; 131 for (j = 1, k = 0; k < nitems(pwr_diff_5g->ht40_ht20); 132 j++, k++) { 133 rs->bw20_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 134 MS(pwr_diff_5g->ht40_ht20[k], LOW_PART)); 135 rs->bw40_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 136 MS(pwr_diff_5g->ht40_ht20[k], HIGH_PART)); 137 } 138 139 for (j = 0; j < nitems(pwr_diff_5g->ht80_ht160); j++) { 140 rs->bw80_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 141 MS(pwr_diff_5g->ht80_ht160[j], HIGH_PART)); 142 rs->bw160_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8( 143 MS(pwr_diff_5g->ht80_ht160[j], LOW_PART)); 144 } 145 } 146 147 rs->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 148 rs->board_type = 149 MS(RTWN_GET_ROM_VAR(rom->rf_board_opt, R92C_BOARD_TYPE_DONGLE), 150 R92C_ROM_RF1_BOARD_TYPE); 151 RTWN_DPRINTF(sc, RTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 152 __func__, rs->regulatory); 153 } 154 155 void 156 r12a_parse_rom(struct rtwn_softc *sc, uint8_t *buf) 157 { 158 struct r12a_softc *rs = sc->sc_priv; 159 struct r12a_rom *rom = (struct r12a_rom *)buf; 160 uint8_t pa_type, lna_type_2g, lna_type_5g; 161 162 /* Read PA/LNA types. */ 163 pa_type = RTWN_GET_ROM_VAR(rom->pa_type, 0); 164 lna_type_2g = RTWN_GET_ROM_VAR(rom->lna_type_2g, 0); 165 lna_type_5g = RTWN_GET_ROM_VAR(rom->lna_type_5g, 0); 166 167 rs->ext_pa_2g = R12A_ROM_IS_PA_EXT_2GHZ(pa_type); 168 rs->ext_pa_5g = R12A_ROM_IS_PA_EXT_5GHZ(pa_type); 169 rs->ext_lna_2g = R21A_ROM_IS_LNA_EXT(lna_type_2g); 170 rs->ext_lna_5g = R21A_ROM_IS_LNA_EXT(lna_type_5g); 171 rs->bt_coex = (MS(rom->rf_board_opt, R92C_ROM_RF1_BOARD_TYPE) == 172 R92C_BOARD_TYPE_HIGHPA); 173 rs->bt_ant_num = (rom->rf_bt_opt & R12A_RF_BT_OPT_ANT_NUM); 174 175 if (rs->ext_pa_2g) { 176 rs->type_pa_2g = 177 R12A_GET_ROM_PA_TYPE(lna_type_2g, 0) | 178 (R12A_GET_ROM_PA_TYPE(lna_type_2g, 1) << 2); 179 } 180 if (rs->ext_pa_5g) { 181 rs->type_pa_5g = 182 R12A_GET_ROM_PA_TYPE(lna_type_5g, 0) | 183 (R12A_GET_ROM_PA_TYPE(lna_type_5g, 1) << 2); 184 } 185 if (rs->ext_lna_2g) { 186 rs->type_lna_2g = 187 R12A_GET_ROM_LNA_TYPE(lna_type_2g, 0) | 188 (R12A_GET_ROM_LNA_TYPE(lna_type_2g, 1) << 2); 189 } 190 if (rs->ext_lna_5g) { 191 rs->type_lna_5g = 192 R12A_GET_ROM_LNA_TYPE(lna_type_5g, 0) | 193 (R12A_GET_ROM_LNA_TYPE(lna_type_5g, 1) << 2); 194 } 195 196 if (rom->rfe_option & 0x80) { 197 if (rs->ext_lna_5g) { 198 if (rs->ext_pa_5g) { 199 if (rs->ext_pa_2g && rs->ext_lna_2g) 200 rs->rfe_type = 3; 201 else 202 rs->rfe_type = 0; 203 } else 204 rs->rfe_type = 2; 205 } else 206 rs->rfe_type = 4; 207 } else { 208 rs->rfe_type = rom->rfe_option & 0x3f; 209 210 /* workaround for incorrect EFUSE map */ 211 if (rs->rfe_type == 4 && 212 rs->ext_pa_2g && rs->ext_lna_2g && 213 rs->ext_pa_5g && rs->ext_lna_5g) 214 rs->rfe_type = 0; 215 } 216 217 /* Read MAC address. */ 218 IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr_12a); 219 220 /* Execute common part of initialization. */ 221 r12a_parse_rom_common(sc, buf); 222 } 223