1 /*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef R12A_FW_CMD_H 28 #define R12A_FW_CMD_H 29 30 #include <dev/rtwn/rtl8188e/r88e_fw_cmd.h> 31 32 /* 33 * Host to firmware commands. 34 */ 35 /* Note: some parts are shared with RTL8188EU. */ 36 #define R12A_CMD_MSR_RPT 0x01 37 #define R12A_CMD_SET_PWRMODE 0x20 38 #define R12A_CMD_IQ_CALIBRATE 0x45 39 40 /* Structure for R12A_CMD_MSR_RPT. */ 41 struct r12a_fw_cmd_msrrpt { 42 uint8_t msrb0; 43 #define R12A_MSRRPT_B0_DISASSOC 0x00 44 #define R12A_MSRRPT_B0_ASSOC 0x01 45 #define R12A_MSRRPT_B0_MACID_IND 0x02 46 47 uint8_t macid; 48 uint8_t macid_end; 49 } __packed; 50 51 /* Structure for R12A_CMD_SET_PWRMODE. */ 52 struct r12a_fw_cmd_pwrmode { 53 uint8_t mode; 54 uint8_t pwrb1; 55 uint8_t bcn_pass; 56 uint8_t queue_uapsd; 57 uint8_t pwr_state; 58 uint8_t pwrb5; 59 #define R12A_PWRMODE_B5_NO_BTCOEX 0x40 60 } __packed; 61 62 /* Structure for R12A_CMD_IQ_CALIBRATE. */ 63 struct r12a_fw_cmd_iq_calib { 64 uint8_t chan; 65 uint8_t band_bw; 66 #define RTWN_CMD_IQ_CHAN_WIDTH_20 0x01 67 #define RTWN_CMD_IQ_CHAN_WIDTH_40 0x02 68 #define RTWN_CMD_IQ_CHAN_WIDTH_80 0x04 69 #define RTWN_CMD_IQ_CHAN_WIDTH_160 0x08 70 #define RTWN_CMD_IQ_BAND_2GHZ 0x10 71 #define RTWN_CMD_IQ_BAND_5GHZ 0x20 72 73 uint8_t ext_5g_pa_lna; 74 #define RTWN_CMD_IQ_EXT_PA_5G(pa) (pa) 75 #define RTWN_CMD_IQ_EXT_LNA_5G(lna) ((lna) << 1) 76 } __packed; 77 78 /* 79 * C2H event types. 80 */ 81 #define R12A_C2H_DEBUG 0x00 82 #define R12A_C2H_TX_REPORT 0x03 83 #define R12A_C2H_BT_INFO 0x09 84 #define R12A_C2H_RA_REPORT 0x0c 85 #define R12A_C2H_IQK_FINISHED 0x11 86 87 /* Structure for R12A_C2H_TX_REPORT event. */ 88 struct r12a_c2h_tx_rpt { 89 uint8_t txrptb0; 90 #define R12A_TXRPTB0_QSEL_M 0x1f 91 #define R12A_TXRPTB0_QSEL_S 0 92 #define R12A_TXRPTB0_BC 0x20 93 #define R12A_TXRPTB0_LIFE_EXPIRE 0x40 94 #define R12A_TXRPTB0_RETRY_OVER 0x80 95 96 uint8_t macid; 97 uint8_t txrptb2; 98 #define R12A_TXRPTB2_RETRY_CNT_M 0x3f 99 #define R12A_TXRPTB2_RETRY_CNT_S 0 100 101 uint8_t queue_time_low; /* 256 msec unit */ 102 uint8_t queue_time_high; 103 uint8_t final_rate; 104 uint16_t reserved; 105 } __packed; 106 107 /* Structure for R12A_C2H_RA_REPORT event. */ 108 struct r12a_c2h_ra_report { 109 uint8_t rarptb0; 110 #define R12A_RARPTB0_RATE_M 0x3f 111 #define R12A_RARPTB0_RATE_S 0 112 113 uint8_t macid; 114 uint8_t rarptb2; 115 #define R12A_RARPTB0_LDPC 0x01 116 #define R12A_RARPTB0_TXBF 0x02 117 #define R12A_RARPTB0_NOISE 0x04 118 } __packed; 119 120 #endif /* R12A_FW_CMD_H */ 121