1 /*- 2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef R12A_FW_CMD_H 30 #define R12A_FW_CMD_H 31 32 #include <dev/rtwn/rtl8188e/r88e_fw_cmd.h> 33 34 /* 35 * Host to firmware commands. 36 */ 37 /* Note: some parts are shared with RTL8188EU. */ 38 #define R12A_CMD_MSR_RPT 0x01 39 #define R12A_CMD_SET_PWRMODE 0x20 40 #define R12A_CMD_IQ_CALIBRATE 0x45 41 42 /* Structure for R12A_CMD_MSR_RPT. */ 43 struct r12a_fw_cmd_msrrpt { 44 uint8_t msrb0; 45 #define R12A_MSRRPT_B0_DISASSOC 0x00 46 #define R12A_MSRRPT_B0_ASSOC 0x01 47 #define R12A_MSRRPT_B0_MACID_IND 0x02 48 49 uint8_t macid; 50 uint8_t macid_end; 51 } __packed; 52 53 /* Structure for R12A_CMD_SET_PWRMODE. */ 54 struct r12a_fw_cmd_pwrmode { 55 uint8_t mode; 56 uint8_t pwrb1; 57 uint8_t bcn_pass; 58 uint8_t queue_uapsd; 59 uint8_t pwr_state; 60 uint8_t pwrb5; 61 #define R12A_PWRMODE_B5_NO_BTCOEX 0x40 62 } __packed; 63 64 /* Structure for R12A_CMD_IQ_CALIBRATE. */ 65 struct r12a_fw_cmd_iq_calib { 66 uint8_t chan; 67 uint8_t band_bw; 68 #define RTWN_CMD_IQ_CHAN_WIDTH_20 0x01 69 #define RTWN_CMD_IQ_CHAN_WIDTH_40 0x02 70 #define RTWN_CMD_IQ_CHAN_WIDTH_80 0x04 71 #define RTWN_CMD_IQ_CHAN_WIDTH_160 0x08 72 #define RTWN_CMD_IQ_BAND_2GHZ 0x10 73 #define RTWN_CMD_IQ_BAND_5GHZ 0x20 74 75 uint8_t ext_5g_pa_lna; 76 #define RTWN_CMD_IQ_EXT_PA_5G(pa) (pa) 77 #define RTWN_CMD_IQ_EXT_LNA_5G(lna) ((lna) << 1) 78 } __packed; 79 80 /* 81 * C2H event types. 82 */ 83 #define R12A_C2H_DEBUG 0x00 84 #define R12A_C2H_TX_REPORT 0x03 85 #define R12A_C2H_BT_INFO 0x09 86 #define R12A_C2H_RA_REPORT 0x0c 87 #define R12A_C2H_IQK_FINISHED 0x11 88 89 /* Structure for R12A_C2H_TX_REPORT event. */ 90 struct r12a_c2h_tx_rpt { 91 uint8_t txrptb0; 92 #define R12A_TXRPTB0_QSEL_M 0x1f 93 #define R12A_TXRPTB0_QSEL_S 0 94 #define R12A_TXRPTB0_BC 0x20 95 #define R12A_TXRPTB0_LIFE_EXPIRE 0x40 96 #define R12A_TXRPTB0_RETRY_OVER 0x80 97 98 uint8_t macid; 99 uint8_t txrptb2; 100 #define R12A_TXRPTB2_RETRY_CNT_M 0x3f 101 #define R12A_TXRPTB2_RETRY_CNT_S 0 102 103 uint8_t queue_time_low; /* 256 msec unit */ 104 uint8_t queue_time_high; 105 uint8_t final_rate; 106 uint16_t reserved; 107 } __packed; 108 109 /* Structure for R12A_C2H_RA_REPORT event. */ 110 struct r12a_c2h_ra_report { 111 uint8_t rarptb0; 112 #define R12A_RARPTB0_RATE_M 0x3f 113 #define R12A_RARPTB0_RATE_S 0 114 115 uint8_t macid; 116 uint8_t rarptb2; 117 #define R12A_RARPTB0_LDPC 0x01 118 #define R12A_RARPTB0_TXBF 0x02 119 #define R12A_RARPTB0_NOISE 0x04 120 } __packed; 121 122 #endif /* R12A_FW_CMD_H */ 123