xref: /freebsd/sys/dev/rtwn/rtl8192c/r92c_var.h (revision 1d386b48a555f61cb7325543adbbb5c3f3407a66)
1 /*-
2  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
3  * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
18  */
19 
20 #ifndef R92C_VAR_H
21 #define R92C_VAR_H
22 
23 #include <dev/rtwn/rtl8192c/r92c_rom_defs.h>
24 
25 struct r92c_softc {
26 	uint8_t		rs_flags;
27 #define R92C_FLAG_ASSOCIATED	0x01
28 
29 	uint8_t		chip;
30 #define R92C_CHIP_92C		0x01
31 #define R92C_CHIP_92C_1T2R	0x02
32 #define R92C_CHIP_UMC_A_CUT	0x04
33 
34 #ifndef RTWN_WITHOUT_UCODE
35 	struct callout	rs_c2h_report;
36 	int		rs_c2h_timeout;
37 	int		rs_c2h_pending;
38 	int		rs_c2h_paused;
39 #endif
40 #define R92C_TX_PAUSED_THRESHOLD	20
41 
42 	void		*rs_txpwr;
43 	const void	*rs_txagc;
44 
45 	uint8_t		board_type;
46 	uint8_t		regulatory;
47 	uint8_t		crystalcap;
48 	uint8_t		pa_setting;
49 
50 	void		(*rs_scan_start)(struct ieee80211com *);
51 	void		(*rs_scan_end)(struct ieee80211com *);
52 
53 	void		(*rs_set_bw20)(struct rtwn_softc *, uint8_t);
54 	void		(*rs_get_txpower)(struct rtwn_softc *, int,
55 			    struct ieee80211_channel *, uint8_t[]);
56 	void		(*rs_set_gain)(struct rtwn_softc *, uint8_t);
57 	void		(*rs_tx_enable_ampdu)(void *, int);
58 	void		(*rs_tx_setup_hwseq)(void *);
59 	void		(*rs_tx_setup_macid)(void *, int);
60 	void		(*rs_set_rom_opts)(struct rtwn_softc *, uint8_t *);
61 
62 	int		rf_read_delay[3];
63 	uint32_t	rf_chnlbw[R92C_MAX_CHAINS];
64 };
65 #define R92C_SOFTC(_sc)	((struct r92c_softc *)((_sc)->sc_priv))
66 
67 #define rtwn_r92c_set_bw20(_sc, _chan) \
68 	((R92C_SOFTC(_sc)->rs_set_bw20)((_sc), (_chan)))
69 #define rtwn_r92c_get_txpower(_sc, _chain, _c, _power) \
70 	((R92C_SOFTC(_sc)->rs_get_txpower)((_sc), (_chain), (_c), (_power)))
71 #define rtwn_r92c_set_gain(_sc, _gain) \
72 	((R92C_SOFTC(_sc)->rs_set_gain)((_sc), (_gain)))
73 #define rtwn_r92c_tx_enable_ampdu(_sc, _buf, _enable) \
74 	((R92C_SOFTC(_sc)->rs_tx_enable_ampdu)((_buf), (_enable)))
75 #define rtwn_r92c_tx_setup_hwseq(_sc, _buf) \
76 	((R92C_SOFTC(_sc)->rs_tx_setup_hwseq)((_buf)))
77 #define rtwn_r92c_tx_setup_macid(_sc, _buf, _id) \
78 	((R92C_SOFTC(_sc)->rs_tx_setup_macid)((_buf), (_id)))
79 #define rtwn_r92c_set_rom_opts(_sc, _buf) \
80 	((R92C_SOFTC(_sc)->rs_set_rom_opts)((_sc), (_buf)))
81 
82 #endif	/* R92C_VAR_H */
83