xref: /freebsd/sys/dev/rtwn/rtl8192c/pci/r92ce_attach.c (revision 792bbaba989533a1fc93823df1720c8c4aaf0442)
1 /*	$OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $	*/
2 
3 /*-
4  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5  * Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
6  * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 #include <sys/cdefs.h>
22 __FBSDID("$FreeBSD$");
23 
24 #include "opt_wlan.h"
25 
26 #include <sys/param.h>
27 #include <sys/lock.h>
28 #include <sys/mutex.h>
29 #include <sys/mbuf.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/queue.h>
35 #include <sys/taskqueue.h>
36 #include <sys/bus.h>
37 #include <sys/endian.h>
38 #include <sys/linker.h>
39 
40 #include <machine/bus.h>
41 #include <machine/resource.h>
42 #include <sys/rman.h>
43 
44 #include <net/if.h>
45 #include <net/ethernet.h>
46 #include <net/if_media.h>
47 
48 #include <net80211/ieee80211_var.h>
49 #include <net80211/ieee80211_radiotap.h>
50 
51 #include <dev/rtwn/if_rtwnreg.h>
52 #include <dev/rtwn/if_rtwnvar.h>
53 #include <dev/rtwn/if_rtwn_nop.h>
54 
55 #include <dev/rtwn/pci/rtwn_pci_var.h>
56 
57 #include <dev/rtwn/rtl8192c/r92c_var.h>
58 
59 #include <dev/rtwn/rtl8192c/pci/r92ce.h>
60 #include <dev/rtwn/rtl8192c/pci/r92ce_priv.h>
61 #include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
62 #include <dev/rtwn/rtl8192c/pci/r92ce_tx_desc.h>
63 
64 
65 static struct rtwn_r92c_txpwr r92c_txpwr;
66 
67 void	r92ce_attach(struct rtwn_pci_softc *);
68 
69 static void
70 r92ce_postattach(struct rtwn_softc *sc)
71 {
72 	struct r92c_softc *rs = sc->sc_priv;
73 	struct ieee80211com *ic = &sc->sc_ic;
74 
75 	if (!(rs->chip & R92C_CHIP_92C) &&
76 	    rs->board_type == R92C_BOARD_TYPE_HIGHPA)
77 		rs->rs_txagc = &rtl8188ru_txagc[0];
78 	else
79 		rs->rs_txagc = &rtl8192cu_txagc[0];
80 
81 	if ((rs->chip & (R92C_CHIP_UMC_A_CUT | R92C_CHIP_92C)) ==
82 	    R92C_CHIP_UMC_A_CUT)
83 		sc->fwname = "rtwn-rtl8192cfwE";
84 	else
85 		sc->fwname = "rtwn-rtl8192cfwE_B";
86 	sc->fwsig = 0x88c;
87 
88 	rs->rs_scan_start = ic->ic_scan_start;
89 	ic->ic_scan_start = r92c_scan_start;
90 	rs->rs_scan_end = ic->ic_scan_end;
91 	ic->ic_scan_end = r92c_scan_end;
92 }
93 
94 static void
95 r92ce_set_name(struct rtwn_softc *sc)
96 {
97 	struct r92c_softc *rs = sc->sc_priv;
98 
99 	if (rs->chip & R92C_CHIP_92C)
100 		sc->name = "RTL8192CE";
101 	else
102 		sc->name = "RTL8188CE";
103 }
104 
105 static void
106 r92ce_attach_private(struct rtwn_softc *sc)
107 {
108 	struct r92c_softc *rs;
109 
110 	rs = malloc(sizeof(struct r92c_softc), M_RTWN_PRIV, M_WAITOK | M_ZERO);
111 
112 	rs->rs_txpwr			= &r92c_txpwr;
113 
114 	rs->rs_set_bw20			= r92c_set_bw20;
115 	rs->rs_get_txpower		= r92c_get_txpower;
116 	rs->rs_set_gain			= r92c_set_gain;
117 	rs->rs_tx_enable_ampdu		= r92c_tx_enable_ampdu;
118 	rs->rs_tx_setup_hwseq		= r92c_tx_setup_hwseq;
119 	rs->rs_tx_setup_macid		= r92c_tx_setup_macid;
120 	rs->rs_set_name			= r92ce_set_name;
121 
122 	/* XXX TODO: test with net80211 ratectl! */
123 #ifndef RTWN_WITHOUT_UCODE
124 	rs->rs_c2h_timeout		= hz;
125 
126 	callout_init_mtx(&rs->rs_c2h_report, &sc->sc_mtx, 0);
127 #endif
128 
129 	rs->rf_read_delay[0]		= 1000;
130 	rs->rf_read_delay[1]		= 1000;
131 	rs->rf_read_delay[2]		= 1000;
132 
133 	sc->sc_priv = rs;
134 }
135 
136 static void
137 r92ce_adj_devcaps(struct rtwn_softc *sc)
138 {
139 	struct ieee80211com *ic = &sc->sc_ic;
140 
141 	/*
142 	 * XXX do NOT enable PMGT until RSVD_PAGE command
143 	 * will not be tested / fixed + HRPWM register must be set too.
144 	 */
145 	ic->ic_caps &= ~IEEE80211_C_PMGT;
146 }
147 
148 void
149 r92ce_attach(struct rtwn_pci_softc *pc)
150 {
151 	struct rtwn_softc *sc		= &pc->pc_sc;
152 
153 	/* PCIe part. */
154 	pc->pc_setup_tx_desc		= r92ce_setup_tx_desc;
155 	pc->pc_tx_postsetup		= r92ce_tx_postsetup;
156 	pc->pc_copy_tx_desc		= r92ce_copy_tx_desc;
157 	pc->pc_enable_intr		= r92ce_enable_intr;
158 
159 	pc->pc_qmap			= 0xf771;
160 	pc->tcr				=
161 	    R92C_TCR_CFENDFORM | (1 << 12) | (1 << 13);
162 
163 	/* Common part. */
164 	/* RTL8192C* cannot use pairwise keys from first 4 slots */
165 	sc->sc_flags			= RTWN_FLAG_CAM_FIXED;
166 
167 	sc->sc_start_xfers		= r92ce_start_xfers;
168 	sc->sc_set_chan			= r92c_set_chan;
169 	sc->sc_fill_tx_desc		= r92c_fill_tx_desc;
170 	sc->sc_fill_tx_desc_raw		= r92c_fill_tx_desc_raw;
171 	sc->sc_fill_tx_desc_null	= r92c_fill_tx_desc_null; /* XXX recheck */
172 	sc->sc_dump_tx_desc		= r92ce_dump_tx_desc;
173 	sc->sc_tx_radiotap_flags	= r92c_tx_radiotap_flags;
174 	sc->sc_rx_radiotap_flags	= r92c_rx_radiotap_flags;
175 	sc->sc_get_rssi_cck		= r92c_get_rssi_cck;
176 	sc->sc_get_rssi_ofdm		= r92c_get_rssi_ofdm;
177 	sc->sc_classify_intr		= r92ce_classify_intr;
178 	sc->sc_handle_tx_report		= rtwn_nop_softc_uint8_int;
179 	sc->sc_handle_c2h_report	= rtwn_nop_softc_uint8_int;
180 	sc->sc_check_frame		= rtwn_nop_int_softc_mbuf;
181 	sc->sc_rf_read			= r92c_rf_read;
182 	sc->sc_rf_write			= r92c_rf_write;
183 	sc->sc_check_condition		= r92c_check_condition;
184 	sc->sc_efuse_postread		= r92c_efuse_postread;
185 	sc->sc_parse_rom		= r92c_parse_rom;
186 	sc->sc_set_led			= r92ce_set_led;
187 	sc->sc_power_on			= r92ce_power_on;
188 	sc->sc_power_off		= r92ce_power_off;
189 #ifndef RTWN_WITHOUT_UCODE
190 	sc->sc_fw_reset			= r92ce_fw_reset;
191 	sc->sc_fw_download_enable	= r92c_fw_download_enable;
192 #endif
193 	sc->sc_set_page_size		= r92c_set_page_size;
194 	sc->sc_lc_calib			= r92c_lc_calib;
195 	sc->sc_iq_calib			= r92ce_iq_calib;
196 	sc->sc_read_chipid_vendor	= r92c_read_chipid_vendor;
197 	sc->sc_adj_devcaps		= r92ce_adj_devcaps;
198 	sc->sc_vap_preattach		= rtwn_nop_softc_vap;
199 	sc->sc_postattach		= r92ce_postattach;
200 	sc->sc_detach_private		= r92c_detach_private;
201 	sc->sc_set_media_status		= r92c_joinbss_rpt;
202 #ifndef RTWN_WITHOUT_UCODE
203 	sc->sc_set_rsvd_page		= r92c_set_rsvd_page;
204 	sc->sc_set_pwrmode		= r92c_set_pwrmode;
205 	sc->sc_set_rssi			= r92c_set_rssi;
206 #endif
207 	sc->sc_beacon_init		= r92c_beacon_init;
208 	sc->sc_beacon_enable		= r92c_beacon_enable;
209 	sc->sc_beacon_set_rate		= rtwn_nop_void_int;
210 	sc->sc_beacon_select		= rtwn_nop_softc_int;
211 	sc->sc_temp_measure		= r92c_temp_measure;
212 	sc->sc_temp_read		= r92c_temp_read;
213 	sc->sc_init_tx_agg		= rtwn_nop_softc;
214 	sc->sc_init_rx_agg		= rtwn_nop_softc;
215 	sc->sc_init_ampdu		= r92ce_init_ampdu;
216 	sc->sc_init_intr		= r92ce_init_intr;
217 	sc->sc_init_edca		= r92ce_init_edca;
218 	sc->sc_init_bb			= r92ce_init_bb;
219 	sc->sc_init_rf			= r92c_init_rf;
220 	sc->sc_init_antsel		= rtwn_nop_softc;
221 	sc->sc_post_init		= r92ce_post_init;
222 	sc->sc_init_bcnq1_boundary	= rtwn_nop_int_softc;
223 
224 	sc->mac_prog			= &rtl8192ce_mac[0];
225 	sc->mac_size			= nitems(rtl8192ce_mac);
226 	sc->bb_prog			= &rtl8192ce_bb[0];
227 	sc->bb_size			= nitems(rtl8192ce_bb);
228 	sc->agc_prog			= &rtl8192ce_agc[0];
229 	sc->agc_size			= nitems(rtl8192ce_agc);
230 	sc->rf_prog			= &rtl8192c_rf[0];
231 
232 	sc->page_count			= R92CE_TX_PAGE_COUNT;
233 	sc->pktbuf_count		= R92C_TXPKTBUF_COUNT;
234 
235 	sc->ackto			= 0x40;
236 	sc->npubqpages			= R92CE_PUBQ_NPAGES;
237 	sc->nhqpages			= R92CE_HPQ_NPAGES;
238 	sc->nnqpages			= 0;
239 	sc->nlqpages			= R92CE_LPQ_NPAGES;
240 	sc->page_size			= R92C_TX_PAGE_SIZE;
241 
242 	sc->txdesc_len			= sizeof(struct r92ce_tx_desc);
243 	sc->efuse_maxlen		= R92C_EFUSE_MAX_LEN;
244 	sc->efuse_maplen		= R92C_EFUSE_MAP_LEN;
245 	sc->rx_dma_size			= R92C_RX_DMA_BUFFER_SIZE;
246 
247 	sc->macid_limit			= R92C_MACID_MAX + 1;
248 	sc->cam_entry_limit		= R92C_CAM_ENTRY_COUNT;
249 	sc->fwsize_limit		= R92C_MAX_FW_SIZE;
250 	sc->temp_delta			= R92C_CALIB_THRESHOLD;
251 
252 	sc->bcn_status_reg[0]		= R92C_TDECTRL;
253 	/*
254 	 * TODO: some additional setup is required
255 	 * to maintain few beacons at the same time.
256 	 *
257 	 * XXX BCNQ1 mechanism is not needed here; move it to the USB module.
258 	 */
259 	sc->bcn_status_reg[1]		= R92C_TDECTRL;
260 	sc->rcr				= 0;
261 
262 	r92ce_attach_private(sc);
263 }
264