1 /* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #include <sys/cdefs.h> 22 __FBSDID("$FreeBSD$"); 23 24 #include <sys/param.h> 25 #include <sys/sysctl.h> 26 #include <sys/lock.h> 27 #include <sys/mutex.h> 28 #include <sys/mbuf.h> 29 #include <sys/kernel.h> 30 #include <sys/socket.h> 31 #include <sys/systm.h> 32 #include <sys/malloc.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 #include <sys/endian.h> 36 #include <sys/linker.h> 37 #include <sys/kdb.h> 38 39 #include <machine/bus.h> 40 #include <machine/resource.h> 41 #include <sys/rman.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <net/if.h> 47 #include <net/ethernet.h> 48 #include <net/if_media.h> 49 50 #include <net80211/ieee80211_var.h> 51 52 #include <dev/rtwn/if_rtwnreg.h> 53 #include <dev/rtwn/if_rtwnvar.h> 54 #include <dev/rtwn/if_rtwn_nop.h> 55 #include <dev/rtwn/if_rtwn_debug.h> 56 57 #include <dev/rtwn/pci/rtwn_pci_var.h> 58 59 #include <dev/rtwn/pci/rtwn_pci_attach.h> 60 #include <dev/rtwn/pci/rtwn_pci_reg.h> 61 #include <dev/rtwn/pci/rtwn_pci_rx.h> 62 #include <dev/rtwn/pci/rtwn_pci_tx.h> 63 64 #include <dev/rtwn/rtl8192c/pci/r92ce_reg.h> 65 #include <dev/rtwn/rtl8192c/pci/r92ce_rx_desc.h> 66 67 68 static device_probe_t rtwn_pci_probe; 69 static device_attach_t rtwn_pci_attach; 70 static device_detach_t rtwn_pci_detach; 71 static device_shutdown_t rtwn_pci_shutdown; 72 static device_suspend_t rtwn_pci_suspend; 73 static device_resume_t rtwn_pci_resume; 74 75 static int rtwn_pci_alloc_rx_list(struct rtwn_softc *); 76 static void rtwn_pci_reset_rx_list(struct rtwn_softc *); 77 static void rtwn_pci_free_rx_list(struct rtwn_softc *); 78 static int rtwn_pci_alloc_tx_list(struct rtwn_softc *, int); 79 static void rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *, int); 80 static void rtwn_pci_reset_beacon_ring(struct rtwn_softc *, int); 81 static void rtwn_pci_reset_tx_list(struct rtwn_softc *, 82 struct ieee80211vap *, int); 83 static void rtwn_pci_free_tx_list(struct rtwn_softc *, int); 84 static void rtwn_pci_reset_lists(struct rtwn_softc *, 85 struct ieee80211vap *); 86 static int rtwn_pci_fw_write_block(struct rtwn_softc *, 87 const uint8_t *, uint16_t, int); 88 static uint16_t rtwn_pci_get_qmap(struct rtwn_softc *); 89 static void rtwn_pci_set_desc_addr(struct rtwn_softc *); 90 static void rtwn_pci_attach_methods(struct rtwn_softc *); 91 92 93 static int matched_chip = RTWN_CHIP_MAX_PCI; 94 95 static int 96 rtwn_pci_probe(device_t dev) 97 { 98 const struct rtwn_pci_ident *ident; 99 100 for (ident = rtwn_pci_ident_table; ident->name != NULL; ident++) { 101 if (pci_get_vendor(dev) == ident->vendor && 102 pci_get_device(dev) == ident->device) { 103 matched_chip = ident->chip; 104 device_set_desc(dev, ident->name); 105 return (BUS_PROBE_DEFAULT); 106 } 107 } 108 return (ENXIO); 109 } 110 111 static int 112 rtwn_pci_alloc_rx_list(struct rtwn_softc *sc) 113 { 114 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 115 struct rtwn_rx_ring *rx_ring = &pc->rx_ring; 116 struct rtwn_rx_data *rx_data; 117 bus_size_t size; 118 int i, error; 119 120 /* Allocate Rx descriptors. */ 121 size = sizeof(struct r92ce_rx_stat) * RTWN_PCI_RX_LIST_COUNT; 122 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 123 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 124 size, 1, size, 0, NULL, NULL, &rx_ring->desc_dmat); 125 if (error != 0) { 126 device_printf(sc->sc_dev, "could not create rx desc DMA tag\n"); 127 goto fail; 128 } 129 130 error = bus_dmamem_alloc(rx_ring->desc_dmat, (void **)&rx_ring->desc, 131 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, 132 &rx_ring->desc_map); 133 if (error != 0) { 134 device_printf(sc->sc_dev, "could not allocate rx desc\n"); 135 goto fail; 136 } 137 error = bus_dmamap_load(rx_ring->desc_dmat, rx_ring->desc_map, 138 rx_ring->desc, size, rtwn_pci_dma_map_addr, &rx_ring->paddr, 0); 139 if (error != 0) { 140 device_printf(sc->sc_dev, "could not load rx desc DMA map\n"); 141 goto fail; 142 } 143 bus_dmamap_sync(rx_ring->desc_dmat, rx_ring->desc_map, 144 BUS_DMASYNC_PREWRITE); 145 146 /* Create RX buffer DMA tag. */ 147 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 148 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 149 1, MCLBYTES, 0, NULL, NULL, &rx_ring->data_dmat); 150 if (error != 0) { 151 device_printf(sc->sc_dev, "could not create rx buf DMA tag\n"); 152 goto fail; 153 } 154 155 /* Allocate Rx buffers. */ 156 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) { 157 rx_data = &rx_ring->rx_data[i]; 158 error = bus_dmamap_create(rx_ring->data_dmat, 0, &rx_data->map); 159 if (error != 0) { 160 device_printf(sc->sc_dev, 161 "could not create rx buf DMA map\n"); 162 goto fail; 163 } 164 165 rx_data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 166 if (rx_data->m == NULL) { 167 device_printf(sc->sc_dev, 168 "could not allocate rx mbuf\n"); 169 error = ENOMEM; 170 goto fail; 171 } 172 173 error = bus_dmamap_load(rx_ring->data_dmat, rx_data->map, 174 mtod(rx_data->m, void *), MCLBYTES, rtwn_pci_dma_map_addr, 175 &rx_data->paddr, BUS_DMA_NOWAIT); 176 if (error != 0) { 177 device_printf(sc->sc_dev, 178 "could not load rx buf DMA map"); 179 goto fail; 180 } 181 182 rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i], rx_data->paddr, 183 MCLBYTES, i); 184 } 185 rx_ring->cur = 0; 186 187 return (0); 188 189 fail: 190 rtwn_pci_free_rx_list(sc); 191 return (error); 192 } 193 194 static void 195 rtwn_pci_reset_rx_list(struct rtwn_softc *sc) 196 { 197 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 198 struct rtwn_rx_ring *rx_ring = &pc->rx_ring; 199 struct rtwn_rx_data *rx_data; 200 int i; 201 202 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) { 203 rx_data = &rx_ring->rx_data[i]; 204 rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i], 205 rx_data->paddr, MCLBYTES, i); 206 } 207 rx_ring->cur = 0; 208 } 209 210 static void 211 rtwn_pci_free_rx_list(struct rtwn_softc *sc) 212 { 213 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 214 struct rtwn_rx_ring *rx_ring = &pc->rx_ring; 215 struct rtwn_rx_data *rx_data; 216 int i; 217 218 if (rx_ring->desc_dmat != NULL) { 219 if (rx_ring->desc != NULL) { 220 bus_dmamap_sync(rx_ring->desc_dmat, 221 rx_ring->desc_map, 222 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 223 bus_dmamap_unload(rx_ring->desc_dmat, 224 rx_ring->desc_map); 225 bus_dmamem_free(rx_ring->desc_dmat, rx_ring->desc, 226 rx_ring->desc_map); 227 rx_ring->desc = NULL; 228 } 229 bus_dma_tag_destroy(rx_ring->desc_dmat); 230 rx_ring->desc_dmat = NULL; 231 } 232 233 for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) { 234 rx_data = &rx_ring->rx_data[i]; 235 236 if (rx_data->m != NULL) { 237 bus_dmamap_sync(rx_ring->data_dmat, 238 rx_data->map, BUS_DMASYNC_POSTREAD); 239 bus_dmamap_unload(rx_ring->data_dmat, rx_data->map); 240 m_freem(rx_data->m); 241 rx_data->m = NULL; 242 } 243 bus_dmamap_destroy(rx_ring->data_dmat, rx_data->map); 244 rx_data->map = NULL; 245 } 246 if (rx_ring->data_dmat != NULL) { 247 bus_dma_tag_destroy(rx_ring->data_dmat); 248 rx_ring->data_dmat = NULL; 249 } 250 } 251 252 static int 253 rtwn_pci_alloc_tx_list(struct rtwn_softc *sc, int qid) 254 { 255 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 256 struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid]; 257 bus_size_t size; 258 int i, error; 259 260 size = sc->txdesc_len * RTWN_PCI_TX_LIST_COUNT; 261 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0, 262 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 263 size, 1, size, 0, NULL, NULL, &tx_ring->desc_dmat); 264 if (error != 0) { 265 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n"); 266 goto fail; 267 } 268 269 error = bus_dmamem_alloc(tx_ring->desc_dmat, &tx_ring->desc, 270 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &tx_ring->desc_map); 271 if (error != 0) { 272 device_printf(sc->sc_dev, "can't map tx ring DMA memory\n"); 273 goto fail; 274 } 275 error = bus_dmamap_load(tx_ring->desc_dmat, tx_ring->desc_map, 276 tx_ring->desc, size, rtwn_pci_dma_map_addr, &tx_ring->paddr, 277 BUS_DMA_NOWAIT); 278 if (error != 0) { 279 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 280 goto fail; 281 } 282 bus_dmamap_sync(tx_ring->desc_dmat, tx_ring->desc_map, 283 BUS_DMASYNC_PREWRITE); 284 285 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 286 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 287 1, MCLBYTES, 0, NULL, NULL, &tx_ring->data_dmat); 288 if (error != 0) { 289 device_printf(sc->sc_dev, "could not create tx buf DMA tag\n"); 290 goto fail; 291 } 292 293 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) { 294 struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i]; 295 void *tx_desc = (uint8_t *)tx_ring->desc + sc->txdesc_len * i; 296 uint32_t next_desc_addr = tx_ring->paddr + 297 sc->txdesc_len * ((i + 1) % RTWN_PCI_TX_LIST_COUNT); 298 299 rtwn_pci_setup_tx_desc(pc, tx_desc, next_desc_addr); 300 301 error = bus_dmamap_create(tx_ring->data_dmat, 0, &tx_data->map); 302 if (error != 0) { 303 device_printf(sc->sc_dev, 304 "could not create tx buf DMA map\n"); 305 return (error); 306 } 307 tx_data->m = NULL; 308 tx_data->ni = NULL; 309 } 310 return (0); 311 312 fail: 313 rtwn_pci_free_tx_list(sc, qid); 314 return (error); 315 } 316 317 static void 318 rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *sc, int qid) 319 { 320 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 321 struct rtwn_tx_ring *ring = &pc->tx_ring[qid]; 322 int i; 323 324 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) { 325 struct rtwn_tx_data *data = &ring->tx_data[i]; 326 void *desc = (uint8_t *)ring->desc + sc->txdesc_len * i; 327 328 rtwn_pci_copy_tx_desc(pc, desc, NULL); 329 330 if (data->m != NULL) { 331 bus_dmamap_sync(ring->data_dmat, data->map, 332 BUS_DMASYNC_POSTWRITE); 333 bus_dmamap_unload(ring->data_dmat, data->map); 334 m_freem(data->m); 335 data->m = NULL; 336 } 337 if (data->ni != NULL) { 338 ieee80211_free_node(data->ni); 339 data->ni = NULL; 340 } 341 } 342 343 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 344 BUS_DMASYNC_POSTWRITE); 345 346 sc->qfullmsk &= ~(1 << qid); 347 ring->queued = 0; 348 ring->last = ring->cur = 0; 349 } 350 351 /* 352 * Clear entry 0 (or 1) in the beacon queue (other are not used). 353 */ 354 static void 355 rtwn_pci_reset_beacon_ring(struct rtwn_softc *sc, int id) 356 { 357 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 358 struct rtwn_tx_ring *ring = &pc->tx_ring[RTWN_PCI_BEACON_QUEUE]; 359 struct rtwn_tx_data *data = &ring->tx_data[id]; 360 struct rtwn_tx_desc_common *txd = (struct rtwn_tx_desc_common *) 361 ((uint8_t *)ring->desc + id * sc->txdesc_len); 362 363 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_POSTREAD); 364 if (txd->flags0 & RTWN_FLAGS0_OWN) { 365 /* Clear OWN bit. */ 366 txd->flags0 &= ~RTWN_FLAGS0_OWN; 367 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 368 BUS_DMASYNC_PREWRITE); 369 370 /* Unload mbuf. */ 371 bus_dmamap_sync(ring->data_dmat, data->map, 372 BUS_DMASYNC_POSTWRITE); 373 bus_dmamap_unload(ring->data_dmat, data->map); 374 } 375 } 376 377 /* 378 * Drop stale entries from Tx ring before the vap will be deleted. 379 * In case if vap is NULL just free everything and reset cur / last pointers. 380 */ 381 static void 382 rtwn_pci_reset_tx_list(struct rtwn_softc *sc, struct ieee80211vap *vap, 383 int qid) 384 { 385 int i; 386 387 if (vap == NULL) { 388 if (qid != RTWN_PCI_BEACON_QUEUE) { 389 /* 390 * Device was stopped; just clear all entries. 391 */ 392 rtwn_pci_reset_tx_ring_stopped(sc, qid); 393 } else { 394 for (i = 0; i < RTWN_PORT_COUNT; i++) 395 rtwn_pci_reset_beacon_ring(sc, i); 396 } 397 } else if (qid == RTWN_PCI_BEACON_QUEUE && 398 (vap->iv_opmode == IEEE80211_M_HOSTAP || 399 vap->iv_opmode == IEEE80211_M_IBSS)) { 400 struct rtwn_vap *uvp = RTWN_VAP(vap); 401 402 rtwn_pci_reset_beacon_ring(sc, uvp->id); 403 } else { 404 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 405 struct rtwn_tx_ring *ring = &pc->tx_ring[qid]; 406 407 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) { 408 struct rtwn_tx_data *data = &ring->tx_data[i]; 409 if (data->ni != NULL && data->ni->ni_vap == vap) { 410 /* 411 * NB: if some vap is still running 412 * rtwn_pci_tx_done() will free the mbuf; 413 * otherwise, rtwn_stop() will reset all rings 414 * after device shutdown. 415 */ 416 ieee80211_free_node(data->ni); 417 data->ni = NULL; 418 } 419 } 420 } 421 } 422 423 static void 424 rtwn_pci_free_tx_list(struct rtwn_softc *sc, int qid) 425 { 426 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 427 struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid]; 428 struct rtwn_tx_data *tx_data; 429 int i; 430 431 if (tx_ring->desc_dmat != NULL) { 432 if (tx_ring->desc != NULL) { 433 bus_dmamap_sync(tx_ring->desc_dmat, 434 tx_ring->desc_map, BUS_DMASYNC_POSTWRITE); 435 bus_dmamap_unload(tx_ring->desc_dmat, 436 tx_ring->desc_map); 437 bus_dmamem_free(tx_ring->desc_dmat, tx_ring->desc, 438 tx_ring->desc_map); 439 } 440 bus_dma_tag_destroy(tx_ring->desc_dmat); 441 } 442 443 for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) { 444 tx_data = &tx_ring->tx_data[i]; 445 446 if (tx_data->m != NULL) { 447 bus_dmamap_sync(tx_ring->data_dmat, tx_data->map, 448 BUS_DMASYNC_POSTWRITE); 449 bus_dmamap_unload(tx_ring->data_dmat, tx_data->map); 450 m_freem(tx_data->m); 451 tx_data->m = NULL; 452 } 453 } 454 if (tx_ring->data_dmat != NULL) { 455 bus_dma_tag_destroy(tx_ring->data_dmat); 456 tx_ring->data_dmat = NULL; 457 } 458 459 sc->qfullmsk &= ~(1 << qid); 460 tx_ring->queued = 0; 461 tx_ring->last = tx_ring->cur = 0; 462 } 463 464 static void 465 rtwn_pci_reset_lists(struct rtwn_softc *sc, struct ieee80211vap *vap) 466 { 467 int i; 468 469 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) 470 rtwn_pci_reset_tx_list(sc, vap, i); 471 472 if (vap == NULL) { 473 sc->qfullmsk = 0; 474 rtwn_pci_reset_rx_list(sc); 475 } 476 } 477 478 static int 479 rtwn_pci_fw_write_block(struct rtwn_softc *sc, const uint8_t *buf, 480 uint16_t reg, int mlen) 481 { 482 int i; 483 484 for (i = 0; i < mlen; i++) 485 rtwn_pci_write_1(sc, reg++, buf[i]); 486 487 /* NB: cannot fail */ 488 return (0); 489 } 490 491 static uint16_t 492 rtwn_pci_get_qmap(struct rtwn_softc *sc) 493 { 494 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 495 496 KASSERT(pc->pc_qmap != 0, ("%s: qmap is not set!\n", __func__)); 497 498 return (pc->pc_qmap); 499 } 500 501 static void 502 rtwn_pci_set_desc_addr(struct rtwn_softc *sc) 503 { 504 struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc); 505 506 RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: addresses:\n" 507 "bk: %08jX, be: %08jX, vi: %08jX, vo: %08jX\n" 508 "bcn: %08jX, mgt: %08jX, high: %08jX, rx: %08jX\n", 509 __func__, (uintmax_t)pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr, 510 (uintmax_t)pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr, 511 (uintmax_t)pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr, 512 (uintmax_t)pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr, 513 (uintmax_t)pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr, 514 (uintmax_t)pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr, 515 (uintmax_t)pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr, 516 (uintmax_t)pc->rx_ring.paddr); 517 518 /* Set Tx Configuration Register. */ 519 rtwn_pci_write_4(sc, R92C_TCR, pc->tcr); 520 521 /* Configure Tx DMA. */ 522 rtwn_pci_write_4(sc, R92C_BKQ_DESA, 523 pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr); 524 rtwn_pci_write_4(sc, R92C_BEQ_DESA, 525 pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr); 526 rtwn_pci_write_4(sc, R92C_VIQ_DESA, 527 pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr); 528 rtwn_pci_write_4(sc, R92C_VOQ_DESA, 529 pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr); 530 rtwn_pci_write_4(sc, R92C_BCNQ_DESA, 531 pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr); 532 rtwn_pci_write_4(sc, R92C_MGQ_DESA, 533 pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr); 534 rtwn_pci_write_4(sc, R92C_HQ_DESA, 535 pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr); 536 537 /* Configure Rx DMA. */ 538 rtwn_pci_write_4(sc, R92C_RX_DESA, pc->rx_ring.paddr); 539 } 540 541 static void 542 rtwn_pci_attach_methods(struct rtwn_softc *sc) 543 { 544 sc->sc_write_1 = rtwn_pci_write_1; 545 sc->sc_write_2 = rtwn_pci_write_2; 546 sc->sc_write_4 = rtwn_pci_write_4; 547 sc->sc_read_1 = rtwn_pci_read_1; 548 sc->sc_read_2 = rtwn_pci_read_2; 549 sc->sc_read_4 = rtwn_pci_read_4; 550 sc->sc_delay = rtwn_pci_delay; 551 sc->sc_tx_start = rtwn_pci_tx_start; 552 sc->sc_reset_lists = rtwn_pci_reset_lists; 553 sc->sc_abort_xfers = rtwn_nop_softc; 554 sc->sc_fw_write_block = rtwn_pci_fw_write_block; 555 sc->sc_get_qmap = rtwn_pci_get_qmap; 556 sc->sc_set_desc_addr = rtwn_pci_set_desc_addr; 557 sc->sc_drop_incorrect_tx = rtwn_nop_softc; 558 } 559 560 static int 561 rtwn_pci_attach(device_t dev) 562 { 563 struct rtwn_pci_softc *pc = device_get_softc(dev); 564 struct rtwn_softc *sc = &pc->pc_sc; 565 struct ieee80211com *ic = &sc->sc_ic; 566 uint32_t lcsr; 567 int cap_off, i, error, rid; 568 569 if (matched_chip >= RTWN_CHIP_MAX_PCI) 570 return (ENXIO); 571 572 /* 573 * Get the offset of the PCI Express Capability Structure in PCI 574 * Configuration Space. 575 */ 576 error = pci_find_cap(dev, PCIY_EXPRESS, &cap_off); 577 if (error != 0) { 578 device_printf(dev, "PCIe capability structure not found!\n"); 579 return (error); 580 } 581 582 /* Enable bus-mastering. */ 583 pci_enable_busmaster(dev); 584 585 rid = PCIR_BAR(2); 586 pc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 587 RF_ACTIVE); 588 if (pc->mem == NULL) { 589 device_printf(dev, "can't map mem space\n"); 590 return (ENOMEM); 591 } 592 pc->pc_st = rman_get_bustag(pc->mem); 593 pc->pc_sh = rman_get_bushandle(pc->mem); 594 595 /* Install interrupt handler. */ 596 rid = 1; 597 if (pci_alloc_msi(dev, &rid) == 0) 598 rid = 1; 599 else 600 rid = 0; 601 pc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | 602 (rid != 0 ? 0 : RF_SHAREABLE)); 603 if (pc->irq == NULL) { 604 device_printf(dev, "can't map interrupt\n"); 605 goto detach; 606 } 607 608 /* Disable PCIe Active State Power Management (ASPM). */ 609 lcsr = pci_read_config(dev, cap_off + PCIER_LINK_CTL, 4); 610 lcsr &= ~PCIEM_LINK_CTL_ASPMC; 611 pci_write_config(dev, cap_off + PCIER_LINK_CTL, lcsr, 4); 612 613 sc->sc_dev = dev; 614 ic->ic_name = device_get_nameunit(dev); 615 616 /* Need to be initialized early. */ 617 rtwn_sysctlattach(sc); 618 mtx_init(&sc->sc_mtx, ic->ic_name, MTX_NETWORK_LOCK, MTX_DEF); 619 620 rtwn_pci_attach_methods(sc); 621 /* XXX something similar to USB_GET_DRIVER_INFO() */ 622 rtwn_pci_attach_private(pc, matched_chip); 623 624 /* Allocate Tx/Rx buffers. */ 625 error = rtwn_pci_alloc_rx_list(sc); 626 if (error != 0) { 627 device_printf(dev, 628 "could not allocate Rx buffers, error %d\n", 629 error); 630 goto detach; 631 } 632 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) { 633 error = rtwn_pci_alloc_tx_list(sc, i); 634 if (error != 0) { 635 device_printf(dev, 636 "could not allocate Tx buffers, error %d\n", 637 error); 638 goto detach; 639 } 640 } 641 642 /* Generic attach. */ 643 error = rtwn_attach(sc); 644 if (error != 0) 645 goto detach; 646 647 /* 648 * Hook our interrupt after all initialization is complete. 649 */ 650 error = bus_setup_intr(dev, pc->irq, INTR_TYPE_NET | INTR_MPSAFE, 651 NULL, rtwn_pci_intr, sc, &pc->pc_ih); 652 if (error != 0) { 653 device_printf(dev, "can't establish interrupt, error %d\n", 654 error); 655 goto detach; 656 } 657 658 return (0); 659 660 detach: 661 rtwn_pci_detach(dev); /* failure */ 662 return (ENXIO); 663 } 664 665 static int 666 rtwn_pci_detach(device_t dev) 667 { 668 struct rtwn_pci_softc *pc = device_get_softc(dev); 669 struct rtwn_softc *sc = &pc->pc_sc; 670 int i; 671 672 /* Generic detach. */ 673 rtwn_detach(sc); 674 675 /* Uninstall interrupt handler. */ 676 if (pc->irq != NULL) { 677 bus_teardown_intr(dev, pc->irq, pc->pc_ih); 678 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(pc->irq), 679 pc->irq); 680 pci_release_msi(dev); 681 } 682 683 /* Free Tx/Rx buffers. */ 684 for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) 685 rtwn_pci_free_tx_list(sc, i); 686 rtwn_pci_free_rx_list(sc); 687 688 if (pc->mem != NULL) 689 bus_release_resource(dev, SYS_RES_MEMORY, 690 rman_get_rid(pc->mem), pc->mem); 691 692 rtwn_detach_private(sc); 693 mtx_destroy(&sc->sc_mtx); 694 695 return (0); 696 } 697 698 static int 699 rtwn_pci_shutdown(device_t self) 700 { 701 struct rtwn_pci_softc *pc = device_get_softc(self); 702 703 ieee80211_stop_all(&pc->pc_sc.sc_ic); 704 return (0); 705 } 706 707 static int 708 rtwn_pci_suspend(device_t self) 709 { 710 struct rtwn_pci_softc *pc = device_get_softc(self); 711 712 rtwn_suspend(&pc->pc_sc); 713 714 return (0); 715 } 716 717 static int 718 rtwn_pci_resume(device_t self) 719 { 720 struct rtwn_pci_softc *pc = device_get_softc(self); 721 722 rtwn_resume(&pc->pc_sc); 723 724 return (0); 725 } 726 727 static device_method_t rtwn_pci_methods[] = { 728 /* Device interface */ 729 DEVMETHOD(device_probe, rtwn_pci_probe), 730 DEVMETHOD(device_attach, rtwn_pci_attach), 731 DEVMETHOD(device_detach, rtwn_pci_detach), 732 DEVMETHOD(device_shutdown, rtwn_pci_shutdown), 733 DEVMETHOD(device_suspend, rtwn_pci_suspend), 734 DEVMETHOD(device_resume, rtwn_pci_resume), 735 736 DEVMETHOD_END 737 }; 738 739 static driver_t rtwn_pci_driver = { 740 "rtwn", 741 rtwn_pci_methods, 742 sizeof(struct rtwn_pci_softc) 743 }; 744 745 static devclass_t rtwn_pci_devclass; 746 747 DRIVER_MODULE(rtwn_pci, pci, rtwn_pci_driver, rtwn_pci_devclass, NULL, NULL); 748 MODULE_VERSION(rtwn_pci, 1); 749 MODULE_DEPEND(rtwn_pci, pci, 1, 1, 1); 750 MODULE_DEPEND(rtwn_pci, wlan, 1, 1, 1); 751 MODULE_DEPEND(rtwn_pci, rtwn, 2, 2, 2); 752