1098ca2bdSWarner Losh /*- 2a94100faSBill Paul * Copyright (c) 1997, 1998-2003 3a94100faSBill Paul * Bill Paul <wpaul@windriver.com>. All rights reserved. 4a94100faSBill Paul * 5a94100faSBill Paul * Redistribution and use in source and binary forms, with or without 6a94100faSBill Paul * modification, are permitted provided that the following conditions 7a94100faSBill Paul * are met: 8a94100faSBill Paul * 1. Redistributions of source code must retain the above copyright 9a94100faSBill Paul * notice, this list of conditions and the following disclaimer. 10a94100faSBill Paul * 2. Redistributions in binary form must reproduce the above copyright 11a94100faSBill Paul * notice, this list of conditions and the following disclaimer in the 12a94100faSBill Paul * documentation and/or other materials provided with the distribution. 13a94100faSBill Paul * 3. All advertising materials mentioning features or use of this software 14a94100faSBill Paul * must display the following acknowledgement: 15a94100faSBill Paul * This product includes software developed by Bill Paul. 16a94100faSBill Paul * 4. Neither the name of the author nor the names of any co-contributors 17a94100faSBill Paul * may be used to endorse or promote products derived from this software 18a94100faSBill Paul * without specific prior written permission. 19a94100faSBill Paul * 20a94100faSBill Paul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21a94100faSBill Paul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22a94100faSBill Paul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23a94100faSBill Paul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24a94100faSBill Paul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25a94100faSBill Paul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26a94100faSBill Paul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27a94100faSBill Paul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28a94100faSBill Paul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29a94100faSBill Paul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30a94100faSBill Paul * THE POSSIBILITY OF SUCH DAMAGE. 31a94100faSBill Paul */ 32a94100faSBill Paul 334dc52c32SDavid E. O'Brien #include <sys/cdefs.h> 344dc52c32SDavid E. O'Brien __FBSDID("$FreeBSD$"); 354dc52c32SDavid E. O'Brien 36a94100faSBill Paul /* 37ed510fb0SBill Paul * RealTek 8139C+/8169/8169S/8110S/8168/8111/8101E PCI NIC driver 38a94100faSBill Paul * 39a94100faSBill Paul * Written by Bill Paul <wpaul@windriver.com> 40a94100faSBill Paul * Senior Networking Software Engineer 41a94100faSBill Paul * Wind River Systems 42a94100faSBill Paul */ 43a94100faSBill Paul 44a94100faSBill Paul /* 45a94100faSBill Paul * This driver is designed to support RealTek's next generation of 46a94100faSBill Paul * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently 47ed510fb0SBill Paul * seven devices in this family: the RTL8139C+, the RTL8169, the RTL8169S, 48ed510fb0SBill Paul * RTL8110S, the RTL8168, the RTL8111 and the RTL8101E. 49a94100faSBill Paul * 50a94100faSBill Paul * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible 51a94100faSBill Paul * with the older 8139 family, however it also supports a special 52a94100faSBill Paul * C+ mode of operation that provides several new performance enhancing 53a94100faSBill Paul * features. These include: 54a94100faSBill Paul * 55a94100faSBill Paul * o Descriptor based DMA mechanism. Each descriptor represents 56a94100faSBill Paul * a single packet fragment. Data buffers may be aligned on 57a94100faSBill Paul * any byte boundary. 58a94100faSBill Paul * 59a94100faSBill Paul * o 64-bit DMA 60a94100faSBill Paul * 61a94100faSBill Paul * o TCP/IP checksum offload for both RX and TX 62a94100faSBill Paul * 63a94100faSBill Paul * o High and normal priority transmit DMA rings 64a94100faSBill Paul * 65a94100faSBill Paul * o VLAN tag insertion and extraction 66a94100faSBill Paul * 67a94100faSBill Paul * o TCP large send (segmentation offload) 68a94100faSBill Paul * 69a94100faSBill Paul * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+ 70a94100faSBill Paul * programming API is fairly straightforward. The RX filtering, EEPROM 71a94100faSBill Paul * access and PHY access is the same as it is on the older 8139 series 72a94100faSBill Paul * chips. 73a94100faSBill Paul * 74a94100faSBill Paul * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the 75a94100faSBill Paul * same programming API and feature set as the 8139C+ with the following 76a94100faSBill Paul * differences and additions: 77a94100faSBill Paul * 78a94100faSBill Paul * o 1000Mbps mode 79a94100faSBill Paul * 80a94100faSBill Paul * o Jumbo frames 81a94100faSBill Paul * 82a94100faSBill Paul * o GMII and TBI ports/registers for interfacing with copper 83a94100faSBill Paul * or fiber PHYs 84a94100faSBill Paul * 85a94100faSBill Paul * o RX and TX DMA rings can have up to 1024 descriptors 86a94100faSBill Paul * (the 8139C+ allows a maximum of 64) 87a94100faSBill Paul * 88a94100faSBill Paul * o Slight differences in register layout from the 8139C+ 89a94100faSBill Paul * 90a94100faSBill Paul * The TX start and timer interrupt registers are at different locations 91a94100faSBill Paul * on the 8169 than they are on the 8139C+. Also, the status word in the 92a94100faSBill Paul * RX descriptor has a slightly different bit layout. The 8169 does not 93a94100faSBill Paul * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska' 94a94100faSBill Paul * copper gigE PHY. 95a94100faSBill Paul * 96a94100faSBill Paul * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs 97a94100faSBill Paul * (the 'S' stands for 'single-chip'). These devices have the same 98a94100faSBill Paul * programming API as the older 8169, but also have some vendor-specific 99a94100faSBill Paul * registers for the on-board PHY. The 8110S is a LAN-on-motherboard 100a94100faSBill Paul * part designed to be pin-compatible with the RealTek 8100 10/100 chip. 101a94100faSBill Paul * 102a94100faSBill Paul * This driver takes advantage of the RX and TX checksum offload and 103a94100faSBill Paul * VLAN tag insertion/extraction features. It also implements TX 104a94100faSBill Paul * interrupt moderation using the timer interrupt registers, which 105a94100faSBill Paul * significantly reduces TX interrupt load. There is also support 106a94100faSBill Paul * for jumbo frames, however the 8169/8169S/8110S can not transmit 10722a11c96SJohn-Mark Gurney * jumbo frames larger than 7440, so the max MTU possible with this 10822a11c96SJohn-Mark Gurney * driver is 7422 bytes. 109a94100faSBill Paul */ 110a94100faSBill Paul 111f0796cd2SGleb Smirnoff #ifdef HAVE_KERNEL_OPTION_HEADERS 112f0796cd2SGleb Smirnoff #include "opt_device_polling.h" 113f0796cd2SGleb Smirnoff #endif 114f0796cd2SGleb Smirnoff 115a94100faSBill Paul #include <sys/param.h> 116a94100faSBill Paul #include <sys/endian.h> 117a94100faSBill Paul #include <sys/systm.h> 118a94100faSBill Paul #include <sys/sockio.h> 119a94100faSBill Paul #include <sys/mbuf.h> 120a94100faSBill Paul #include <sys/malloc.h> 121fe12f24bSPoul-Henning Kamp #include <sys/module.h> 122a94100faSBill Paul #include <sys/kernel.h> 123a94100faSBill Paul #include <sys/socket.h> 124ed510fb0SBill Paul #include <sys/lock.h> 125ed510fb0SBill Paul #include <sys/mutex.h> 126ed510fb0SBill Paul #include <sys/taskqueue.h> 127a94100faSBill Paul 128a94100faSBill Paul #include <net/if.h> 129a94100faSBill Paul #include <net/if_arp.h> 130a94100faSBill Paul #include <net/ethernet.h> 131a94100faSBill Paul #include <net/if_dl.h> 132a94100faSBill Paul #include <net/if_media.h> 133fc74a9f9SBrooks Davis #include <net/if_types.h> 134a94100faSBill Paul #include <net/if_vlan_var.h> 135a94100faSBill Paul 136a94100faSBill Paul #include <net/bpf.h> 137a94100faSBill Paul 138a94100faSBill Paul #include <machine/bus.h> 139a94100faSBill Paul #include <machine/resource.h> 140a94100faSBill Paul #include <sys/bus.h> 141a94100faSBill Paul #include <sys/rman.h> 142a94100faSBill Paul 143a94100faSBill Paul #include <dev/mii/mii.h> 144a94100faSBill Paul #include <dev/mii/miivar.h> 145a94100faSBill Paul 146a94100faSBill Paul #include <dev/pci/pcireg.h> 147a94100faSBill Paul #include <dev/pci/pcivar.h> 148a94100faSBill Paul 149a94100faSBill Paul MODULE_DEPEND(re, pci, 1, 1, 1); 150a94100faSBill Paul MODULE_DEPEND(re, ether, 1, 1, 1); 151a94100faSBill Paul MODULE_DEPEND(re, miibus, 1, 1, 1); 152a94100faSBill Paul 153298bfdf3SWarner Losh /* "device miibus" required. See GENERIC if you get errors here. */ 154a94100faSBill Paul #include "miibus_if.h" 155a94100faSBill Paul 156a94100faSBill Paul /* 157a94100faSBill Paul * Default to using PIO access for this driver. 158a94100faSBill Paul */ 159a94100faSBill Paul #define RE_USEIOSPACE 160a94100faSBill Paul 161a94100faSBill Paul #include <pci/if_rlreg.h> 162a94100faSBill Paul 1635774c5ffSPyun YongHyeon /* Tunables. */ 1645774c5ffSPyun YongHyeon static int msi_disable = 0; 1655774c5ffSPyun YongHyeon TUNABLE_INT("hw.re.msi_disable", &msi_disable); 1665774c5ffSPyun YongHyeon 167a94100faSBill Paul #define RE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 168a94100faSBill Paul 169a94100faSBill Paul /* 170a94100faSBill Paul * Various supported device vendors/types and their names. 171a94100faSBill Paul */ 172a94100faSBill Paul static struct rl_type re_devs[] = { 17332aa5f0eSAnton Berezin { DLINK_VENDORID, DLINK_DEVICEID_528T, RL_HWREV_8169S, 17432aa5f0eSAnton Berezin "D-Link DGE-528(T) Gigabit Ethernet Adapter" }, 175a94100faSBill Paul { RT_VENDORID, RT_DEVICEID_8139, RL_HWREV_8139CPLUS, 176a94100faSBill Paul "RealTek 8139C+ 10/100BaseTX" }, 177ed510fb0SBill Paul { RT_VENDORID, RT_DEVICEID_8101E, RL_HWREV_8101E, 178ed510fb0SBill Paul "RealTek 8101E PCIe 10/100baseTX" }, 179498bd0d3SBill Paul { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN1, 180498bd0d3SBill Paul "RealTek 8168/8111B PCIe Gigabit Ethernet" }, 181498bd0d3SBill Paul { RT_VENDORID, RT_DEVICEID_8168, RL_HWREV_8168_SPIN2, 182498bd0d3SBill Paul "RealTek 8168/8111B PCIe Gigabit Ethernet" }, 183a94100faSBill Paul { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169, 184a94100faSBill Paul "RealTek 8169 Gigabit Ethernet" }, 18569a6b7fbSBill Paul { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169S, 18669a6b7fbSBill Paul "RealTek 8169S Single-chip Gigabit Ethernet" }, 187ed510fb0SBill Paul { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169_8110SB, 188ed510fb0SBill Paul "RealTek 8169SB/8110SB Single-chip Gigabit Ethernet" }, 1892ee2c3b4SRemko Lodder { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8169_8110SC, 1902ee2c3b4SRemko Lodder "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" }, 191498bd0d3SBill Paul { RT_VENDORID, RT_DEVICEID_8169SC, RL_HWREV_8169_8110SC, 192ed510fb0SBill Paul "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" }, 19369a6b7fbSBill Paul { RT_VENDORID, RT_DEVICEID_8169, RL_HWREV_8110S, 19469a6b7fbSBill Paul "RealTek 8110S Single-chip Gigabit Ethernet" }, 195ea263191SMIHIRA Sanpei Yoshiro { COREGA_VENDORID, COREGA_DEVICEID_CGLAPCIGT, RL_HWREV_8169S, 196ea263191SMIHIRA Sanpei Yoshiro "Corega CG-LAPCIGT (RTL8169S) Gigabit Ethernet" }, 19726390635SJohn Baldwin { LINKSYS_VENDORID, LINKSYS_DEVICEID_EG1032, RL_HWREV_8169S, 19826390635SJohn Baldwin "Linksys EG1032 (RTL8169S) Gigabit Ethernet" }, 1990fc4974fSBill Paul { USR_VENDORID, USR_DEVICEID_997902, RL_HWREV_8169S, 2000fc4974fSBill Paul "US Robotics 997902 (RTL8169S) Gigabit Ethernet" }, 201a94100faSBill Paul { 0, 0, 0, NULL } 202a94100faSBill Paul }; 203a94100faSBill Paul 204a94100faSBill Paul static struct rl_hwrev re_hwrevs[] = { 205a94100faSBill Paul { RL_HWREV_8139, RL_8139, "" }, 206a94100faSBill Paul { RL_HWREV_8139A, RL_8139, "A" }, 207a94100faSBill Paul { RL_HWREV_8139AG, RL_8139, "A-G" }, 208a94100faSBill Paul { RL_HWREV_8139B, RL_8139, "B" }, 209a94100faSBill Paul { RL_HWREV_8130, RL_8139, "8130" }, 210a94100faSBill Paul { RL_HWREV_8139C, RL_8139, "C" }, 211a94100faSBill Paul { RL_HWREV_8139D, RL_8139, "8139D/8100B/8100C" }, 212a94100faSBill Paul { RL_HWREV_8139CPLUS, RL_8139CPLUS, "C+"}, 213498bd0d3SBill Paul { RL_HWREV_8168_SPIN1, RL_8169, "8168"}, 214a94100faSBill Paul { RL_HWREV_8169, RL_8169, "8169"}, 21569a6b7fbSBill Paul { RL_HWREV_8169S, RL_8169, "8169S"}, 21669a6b7fbSBill Paul { RL_HWREV_8110S, RL_8169, "8110S"}, 217ed510fb0SBill Paul { RL_HWREV_8169_8110SB, RL_8169, "8169SB"}, 218ed510fb0SBill Paul { RL_HWREV_8169_8110SC, RL_8169, "8169SC"}, 219a94100faSBill Paul { RL_HWREV_8100, RL_8139, "8100"}, 220a94100faSBill Paul { RL_HWREV_8101, RL_8139, "8101"}, 221ed510fb0SBill Paul { RL_HWREV_8100E, RL_8169, "8100E"}, 222ed510fb0SBill Paul { RL_HWREV_8101E, RL_8169, "8101E"}, 223498bd0d3SBill Paul { RL_HWREV_8168_SPIN2, RL_8169, "8168"}, 224a94100faSBill Paul { 0, 0, NULL } 225a94100faSBill Paul }; 226a94100faSBill Paul 227a94100faSBill Paul static int re_probe (device_t); 228a94100faSBill Paul static int re_attach (device_t); 229a94100faSBill Paul static int re_detach (device_t); 230a94100faSBill Paul 23180a2a305SJohn-Mark Gurney static int re_encap (struct rl_softc *, struct mbuf **, int *); 232a94100faSBill Paul 233a94100faSBill Paul static void re_dma_map_addr (void *, bus_dma_segment_t *, int, int); 234a94100faSBill Paul static void re_dma_map_desc (void *, bus_dma_segment_t *, int, 235a94100faSBill Paul bus_size_t, int); 236a94100faSBill Paul static int re_allocmem (device_t, struct rl_softc *); 237a94100faSBill Paul static int re_newbuf (struct rl_softc *, int, struct mbuf *); 238a94100faSBill Paul static int re_rx_list_init (struct rl_softc *); 239a94100faSBill Paul static int re_tx_list_init (struct rl_softc *); 24022a11c96SJohn-Mark Gurney #ifdef RE_FIXUP_RX 24122a11c96SJohn-Mark Gurney static __inline void re_fixup_rx 24222a11c96SJohn-Mark Gurney (struct mbuf *); 24322a11c96SJohn-Mark Gurney #endif 244ed510fb0SBill Paul static int re_rxeof (struct rl_softc *); 245a94100faSBill Paul static void re_txeof (struct rl_softc *); 24697b9d4baSJohn-Mark Gurney #ifdef DEVICE_POLLING 2470187838bSRuslan Ermilov static void re_poll (struct ifnet *, enum poll_cmd, int); 2480187838bSRuslan Ermilov static void re_poll_locked (struct ifnet *, enum poll_cmd, int); 24997b9d4baSJohn-Mark Gurney #endif 250ef544f63SPaolo Pisati static int re_intr (void *); 251a94100faSBill Paul static void re_tick (void *); 252ed510fb0SBill Paul static void re_tx_task (void *, int); 253ed510fb0SBill Paul static void re_int_task (void *, int); 254a94100faSBill Paul static void re_start (struct ifnet *); 255a94100faSBill Paul static int re_ioctl (struct ifnet *, u_long, caddr_t); 256a94100faSBill Paul static void re_init (void *); 25797b9d4baSJohn-Mark Gurney static void re_init_locked (struct rl_softc *); 258a94100faSBill Paul static void re_stop (struct rl_softc *); 2591d545c7aSMarius Strobl static void re_watchdog (struct rl_softc *); 260a94100faSBill Paul static int re_suspend (device_t); 261a94100faSBill Paul static int re_resume (device_t); 262a94100faSBill Paul static void re_shutdown (device_t); 263a94100faSBill Paul static int re_ifmedia_upd (struct ifnet *); 264a94100faSBill Paul static void re_ifmedia_sts (struct ifnet *, struct ifmediareq *); 265a94100faSBill Paul 266a94100faSBill Paul static void re_eeprom_putbyte (struct rl_softc *, int); 267a94100faSBill Paul static void re_eeprom_getword (struct rl_softc *, int, u_int16_t *); 268ed510fb0SBill Paul static void re_read_eeprom (struct rl_softc *, caddr_t, int, int); 269a94100faSBill Paul static int re_gmii_readreg (device_t, int, int); 270a94100faSBill Paul static int re_gmii_writereg (device_t, int, int, int); 271a94100faSBill Paul 272a94100faSBill Paul static int re_miibus_readreg (device_t, int, int); 273a94100faSBill Paul static int re_miibus_writereg (device_t, int, int, int); 274a94100faSBill Paul static void re_miibus_statchg (device_t); 275a94100faSBill Paul 276a94100faSBill Paul static void re_setmulti (struct rl_softc *); 277a94100faSBill Paul static void re_reset (struct rl_softc *); 278a94100faSBill Paul 279ed510fb0SBill Paul #ifdef RE_DIAG 280a94100faSBill Paul static int re_diag (struct rl_softc *); 281ed510fb0SBill Paul #endif 282a94100faSBill Paul 283a94100faSBill Paul #ifdef RE_USEIOSPACE 284a94100faSBill Paul #define RL_RES SYS_RES_IOPORT 285a94100faSBill Paul #define RL_RID RL_PCI_LOIO 286a94100faSBill Paul #else 287a94100faSBill Paul #define RL_RES SYS_RES_MEMORY 288a94100faSBill Paul #define RL_RID RL_PCI_LOMEM 289a94100faSBill Paul #endif 290a94100faSBill Paul 291a94100faSBill Paul static device_method_t re_methods[] = { 292a94100faSBill Paul /* Device interface */ 293a94100faSBill Paul DEVMETHOD(device_probe, re_probe), 294a94100faSBill Paul DEVMETHOD(device_attach, re_attach), 295a94100faSBill Paul DEVMETHOD(device_detach, re_detach), 296a94100faSBill Paul DEVMETHOD(device_suspend, re_suspend), 297a94100faSBill Paul DEVMETHOD(device_resume, re_resume), 298a94100faSBill Paul DEVMETHOD(device_shutdown, re_shutdown), 299a94100faSBill Paul 300a94100faSBill Paul /* bus interface */ 301a94100faSBill Paul DEVMETHOD(bus_print_child, bus_generic_print_child), 302a94100faSBill Paul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 303a94100faSBill Paul 304a94100faSBill Paul /* MII interface */ 305a94100faSBill Paul DEVMETHOD(miibus_readreg, re_miibus_readreg), 306a94100faSBill Paul DEVMETHOD(miibus_writereg, re_miibus_writereg), 307a94100faSBill Paul DEVMETHOD(miibus_statchg, re_miibus_statchg), 308a94100faSBill Paul 309a94100faSBill Paul { 0, 0 } 310a94100faSBill Paul }; 311a94100faSBill Paul 312a94100faSBill Paul static driver_t re_driver = { 313a94100faSBill Paul "re", 314a94100faSBill Paul re_methods, 315a94100faSBill Paul sizeof(struct rl_softc) 316a94100faSBill Paul }; 317a94100faSBill Paul 318a94100faSBill Paul static devclass_t re_devclass; 319a94100faSBill Paul 320a94100faSBill Paul DRIVER_MODULE(re, pci, re_driver, re_devclass, 0, 0); 321347934faSWarner Losh DRIVER_MODULE(re, cardbus, re_driver, re_devclass, 0, 0); 322a94100faSBill Paul DRIVER_MODULE(miibus, re, miibus_driver, miibus_devclass, 0, 0); 323a94100faSBill Paul 324a94100faSBill Paul #define EE_SET(x) \ 325a94100faSBill Paul CSR_WRITE_1(sc, RL_EECMD, \ 326a94100faSBill Paul CSR_READ_1(sc, RL_EECMD) | x) 327a94100faSBill Paul 328a94100faSBill Paul #define EE_CLR(x) \ 329a94100faSBill Paul CSR_WRITE_1(sc, RL_EECMD, \ 330a94100faSBill Paul CSR_READ_1(sc, RL_EECMD) & ~x) 331a94100faSBill Paul 332a94100faSBill Paul /* 333a94100faSBill Paul * Send a read command and address to the EEPROM, check for ACK. 334a94100faSBill Paul */ 335a94100faSBill Paul static void 336a94100faSBill Paul re_eeprom_putbyte(sc, addr) 337a94100faSBill Paul struct rl_softc *sc; 338a94100faSBill Paul int addr; 339a94100faSBill Paul { 340a94100faSBill Paul register int d, i; 341a94100faSBill Paul 342ed510fb0SBill Paul d = addr | (RL_9346_READ << sc->rl_eewidth); 343a94100faSBill Paul 344a94100faSBill Paul /* 345a94100faSBill Paul * Feed in each bit and strobe the clock. 346a94100faSBill Paul */ 347ed510fb0SBill Paul 348ed510fb0SBill Paul for (i = 1 << (sc->rl_eewidth + 3); i; i >>= 1) { 349a94100faSBill Paul if (d & i) { 350a94100faSBill Paul EE_SET(RL_EE_DATAIN); 351a94100faSBill Paul } else { 352a94100faSBill Paul EE_CLR(RL_EE_DATAIN); 353a94100faSBill Paul } 354a94100faSBill Paul DELAY(100); 355a94100faSBill Paul EE_SET(RL_EE_CLK); 356a94100faSBill Paul DELAY(150); 357a94100faSBill Paul EE_CLR(RL_EE_CLK); 358a94100faSBill Paul DELAY(100); 359a94100faSBill Paul } 360ed510fb0SBill Paul 361ed510fb0SBill Paul return; 362a94100faSBill Paul } 363a94100faSBill Paul 364a94100faSBill Paul /* 365a94100faSBill Paul * Read a word of data stored in the EEPROM at address 'addr.' 366a94100faSBill Paul */ 367a94100faSBill Paul static void 368a94100faSBill Paul re_eeprom_getword(sc, addr, dest) 369a94100faSBill Paul struct rl_softc *sc; 370a94100faSBill Paul int addr; 371a94100faSBill Paul u_int16_t *dest; 372a94100faSBill Paul { 373a94100faSBill Paul register int i; 374a94100faSBill Paul u_int16_t word = 0; 375a94100faSBill Paul 376a94100faSBill Paul /* 377a94100faSBill Paul * Send address of word we want to read. 378a94100faSBill Paul */ 379a94100faSBill Paul re_eeprom_putbyte(sc, addr); 380a94100faSBill Paul 381a94100faSBill Paul /* 382a94100faSBill Paul * Start reading bits from EEPROM. 383a94100faSBill Paul */ 384a94100faSBill Paul for (i = 0x8000; i; i >>= 1) { 385a94100faSBill Paul EE_SET(RL_EE_CLK); 386a94100faSBill Paul DELAY(100); 387a94100faSBill Paul if (CSR_READ_1(sc, RL_EECMD) & RL_EE_DATAOUT) 388a94100faSBill Paul word |= i; 389a94100faSBill Paul EE_CLR(RL_EE_CLK); 390a94100faSBill Paul DELAY(100); 391a94100faSBill Paul } 392a94100faSBill Paul 393a94100faSBill Paul *dest = word; 394ed510fb0SBill Paul 395ed510fb0SBill Paul return; 396a94100faSBill Paul } 397a94100faSBill Paul 398a94100faSBill Paul /* 399a94100faSBill Paul * Read a sequence of words from the EEPROM. 400a94100faSBill Paul */ 401a94100faSBill Paul static void 402ed510fb0SBill Paul re_read_eeprom(sc, dest, off, cnt) 403a94100faSBill Paul struct rl_softc *sc; 404a94100faSBill Paul caddr_t dest; 405a94100faSBill Paul int off; 406a94100faSBill Paul int cnt; 407a94100faSBill Paul { 408a94100faSBill Paul int i; 409a94100faSBill Paul u_int16_t word = 0, *ptr; 410a94100faSBill Paul 411ed510fb0SBill Paul CSR_SETBIT_1(sc, RL_EECMD, RL_EEMODE_PROGRAM); 412ed510fb0SBill Paul 413ed510fb0SBill Paul DELAY(100); 414ed510fb0SBill Paul 415a94100faSBill Paul for (i = 0; i < cnt; i++) { 416ed510fb0SBill Paul CSR_SETBIT_1(sc, RL_EECMD, RL_EE_SEL); 417a94100faSBill Paul re_eeprom_getword(sc, off + i, &word); 418ed510fb0SBill Paul CSR_CLRBIT_1(sc, RL_EECMD, RL_EE_SEL); 419a94100faSBill Paul ptr = (u_int16_t *)(dest + (i * 2)); 420be099007SPyun YongHyeon *ptr = word; 421a94100faSBill Paul } 422ed510fb0SBill Paul 423ed510fb0SBill Paul CSR_CLRBIT_1(sc, RL_EECMD, RL_EEMODE_PROGRAM); 424ed510fb0SBill Paul 425ed510fb0SBill Paul return; 426a94100faSBill Paul } 427a94100faSBill Paul 428a94100faSBill Paul static int 429a94100faSBill Paul re_gmii_readreg(dev, phy, reg) 430a94100faSBill Paul device_t dev; 431a94100faSBill Paul int phy, reg; 432a94100faSBill Paul { 433a94100faSBill Paul struct rl_softc *sc; 434a94100faSBill Paul u_int32_t rval; 435a94100faSBill Paul int i; 436a94100faSBill Paul 437a94100faSBill Paul if (phy != 1) 438a94100faSBill Paul return (0); 439a94100faSBill Paul 440a94100faSBill Paul sc = device_get_softc(dev); 441a94100faSBill Paul 4429bac70b8SBill Paul /* Let the rgephy driver read the GMEDIASTAT register */ 4439bac70b8SBill Paul 4449bac70b8SBill Paul if (reg == RL_GMEDIASTAT) { 4459bac70b8SBill Paul rval = CSR_READ_1(sc, RL_GMEDIASTAT); 4469bac70b8SBill Paul return (rval); 4479bac70b8SBill Paul } 4489bac70b8SBill Paul 449a94100faSBill Paul CSR_WRITE_4(sc, RL_PHYAR, reg << 16); 450a94100faSBill Paul DELAY(1000); 451a94100faSBill Paul 452a94100faSBill Paul for (i = 0; i < RL_TIMEOUT; i++) { 453a94100faSBill Paul rval = CSR_READ_4(sc, RL_PHYAR); 454a94100faSBill Paul if (rval & RL_PHYAR_BUSY) 455a94100faSBill Paul break; 456a94100faSBill Paul DELAY(100); 457a94100faSBill Paul } 458a94100faSBill Paul 459a94100faSBill Paul if (i == RL_TIMEOUT) { 4606b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "PHY read failed\n"); 461a94100faSBill Paul return (0); 462a94100faSBill Paul } 463a94100faSBill Paul 464a94100faSBill Paul return (rval & RL_PHYAR_PHYDATA); 465a94100faSBill Paul } 466a94100faSBill Paul 467a94100faSBill Paul static int 468a94100faSBill Paul re_gmii_writereg(dev, phy, reg, data) 469a94100faSBill Paul device_t dev; 470a94100faSBill Paul int phy, reg, data; 471a94100faSBill Paul { 472a94100faSBill Paul struct rl_softc *sc; 473a94100faSBill Paul u_int32_t rval; 474a94100faSBill Paul int i; 475a94100faSBill Paul 476a94100faSBill Paul sc = device_get_softc(dev); 477a94100faSBill Paul 478a94100faSBill Paul CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) | 4799bac70b8SBill Paul (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY); 480a94100faSBill Paul DELAY(1000); 481a94100faSBill Paul 482a94100faSBill Paul for (i = 0; i < RL_TIMEOUT; i++) { 483a94100faSBill Paul rval = CSR_READ_4(sc, RL_PHYAR); 484a94100faSBill Paul if (!(rval & RL_PHYAR_BUSY)) 485a94100faSBill Paul break; 486a94100faSBill Paul DELAY(100); 487a94100faSBill Paul } 488a94100faSBill Paul 489a94100faSBill Paul if (i == RL_TIMEOUT) { 4906b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "PHY write failed\n"); 491a94100faSBill Paul return (0); 492a94100faSBill Paul } 493a94100faSBill Paul 494a94100faSBill Paul return (0); 495a94100faSBill Paul } 496a94100faSBill Paul 497a94100faSBill Paul static int 498a94100faSBill Paul re_miibus_readreg(dev, phy, reg) 499a94100faSBill Paul device_t dev; 500a94100faSBill Paul int phy, reg; 501a94100faSBill Paul { 502a94100faSBill Paul struct rl_softc *sc; 503a94100faSBill Paul u_int16_t rval = 0; 504a94100faSBill Paul u_int16_t re8139_reg = 0; 505a94100faSBill Paul 506a94100faSBill Paul sc = device_get_softc(dev); 507a94100faSBill Paul 508a94100faSBill Paul if (sc->rl_type == RL_8169) { 509a94100faSBill Paul rval = re_gmii_readreg(dev, phy, reg); 510a94100faSBill Paul return (rval); 511a94100faSBill Paul } 512a94100faSBill Paul 513a94100faSBill Paul /* Pretend the internal PHY is only at address 0 */ 514a94100faSBill Paul if (phy) { 515a94100faSBill Paul return (0); 516a94100faSBill Paul } 517a94100faSBill Paul switch (reg) { 518a94100faSBill Paul case MII_BMCR: 519a94100faSBill Paul re8139_reg = RL_BMCR; 520a94100faSBill Paul break; 521a94100faSBill Paul case MII_BMSR: 522a94100faSBill Paul re8139_reg = RL_BMSR; 523a94100faSBill Paul break; 524a94100faSBill Paul case MII_ANAR: 525a94100faSBill Paul re8139_reg = RL_ANAR; 526a94100faSBill Paul break; 527a94100faSBill Paul case MII_ANER: 528a94100faSBill Paul re8139_reg = RL_ANER; 529a94100faSBill Paul break; 530a94100faSBill Paul case MII_ANLPAR: 531a94100faSBill Paul re8139_reg = RL_LPAR; 532a94100faSBill Paul break; 533a94100faSBill Paul case MII_PHYIDR1: 534a94100faSBill Paul case MII_PHYIDR2: 535a94100faSBill Paul return (0); 536a94100faSBill Paul /* 537a94100faSBill Paul * Allow the rlphy driver to read the media status 538a94100faSBill Paul * register. If we have a link partner which does not 539a94100faSBill Paul * support NWAY, this is the register which will tell 540a94100faSBill Paul * us the results of parallel detection. 541a94100faSBill Paul */ 542a94100faSBill Paul case RL_MEDIASTAT: 543a94100faSBill Paul rval = CSR_READ_1(sc, RL_MEDIASTAT); 544a94100faSBill Paul return (rval); 545a94100faSBill Paul default: 5466b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "bad phy register\n"); 547a94100faSBill Paul return (0); 548a94100faSBill Paul } 549a94100faSBill Paul rval = CSR_READ_2(sc, re8139_reg); 550baa12772SPyun YongHyeon if (sc->rl_type == RL_8139CPLUS && re8139_reg == RL_BMCR) { 551baa12772SPyun YongHyeon /* 8139C+ has different bit layout. */ 552baa12772SPyun YongHyeon rval &= ~(BMCR_LOOP | BMCR_ISO); 553baa12772SPyun YongHyeon } 554a94100faSBill Paul return (rval); 555a94100faSBill Paul } 556a94100faSBill Paul 557a94100faSBill Paul static int 558a94100faSBill Paul re_miibus_writereg(dev, phy, reg, data) 559a94100faSBill Paul device_t dev; 560a94100faSBill Paul int phy, reg, data; 561a94100faSBill Paul { 562a94100faSBill Paul struct rl_softc *sc; 563a94100faSBill Paul u_int16_t re8139_reg = 0; 564a94100faSBill Paul int rval = 0; 565a94100faSBill Paul 566a94100faSBill Paul sc = device_get_softc(dev); 567a94100faSBill Paul 568a94100faSBill Paul if (sc->rl_type == RL_8169) { 569a94100faSBill Paul rval = re_gmii_writereg(dev, phy, reg, data); 570a94100faSBill Paul return (rval); 571a94100faSBill Paul } 572a94100faSBill Paul 573a94100faSBill Paul /* Pretend the internal PHY is only at address 0 */ 57497b9d4baSJohn-Mark Gurney if (phy) 575a94100faSBill Paul return (0); 57697b9d4baSJohn-Mark Gurney 577a94100faSBill Paul switch (reg) { 578a94100faSBill Paul case MII_BMCR: 579a94100faSBill Paul re8139_reg = RL_BMCR; 580baa12772SPyun YongHyeon if (sc->rl_type == RL_8139CPLUS) { 581baa12772SPyun YongHyeon /* 8139C+ has different bit layout. */ 582baa12772SPyun YongHyeon data &= ~(BMCR_LOOP | BMCR_ISO); 583baa12772SPyun YongHyeon } 584a94100faSBill Paul break; 585a94100faSBill Paul case MII_BMSR: 586a94100faSBill Paul re8139_reg = RL_BMSR; 587a94100faSBill Paul break; 588a94100faSBill Paul case MII_ANAR: 589a94100faSBill Paul re8139_reg = RL_ANAR; 590a94100faSBill Paul break; 591a94100faSBill Paul case MII_ANER: 592a94100faSBill Paul re8139_reg = RL_ANER; 593a94100faSBill Paul break; 594a94100faSBill Paul case MII_ANLPAR: 595a94100faSBill Paul re8139_reg = RL_LPAR; 596a94100faSBill Paul break; 597a94100faSBill Paul case MII_PHYIDR1: 598a94100faSBill Paul case MII_PHYIDR2: 599a94100faSBill Paul return (0); 600a94100faSBill Paul break; 601a94100faSBill Paul default: 6026b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "bad phy register\n"); 603a94100faSBill Paul return (0); 604a94100faSBill Paul } 605a94100faSBill Paul CSR_WRITE_2(sc, re8139_reg, data); 606a94100faSBill Paul return (0); 607a94100faSBill Paul } 608a94100faSBill Paul 609a94100faSBill Paul static void 610a94100faSBill Paul re_miibus_statchg(dev) 611a94100faSBill Paul device_t dev; 612a94100faSBill Paul { 613a11e2f18SBruce M Simpson 614a94100faSBill Paul } 615a94100faSBill Paul 616a94100faSBill Paul /* 617a94100faSBill Paul * Program the 64-bit multicast hash filter. 618a94100faSBill Paul */ 619a94100faSBill Paul static void 620a94100faSBill Paul re_setmulti(sc) 621a94100faSBill Paul struct rl_softc *sc; 622a94100faSBill Paul { 623a94100faSBill Paul struct ifnet *ifp; 624a94100faSBill Paul int h = 0; 625a94100faSBill Paul u_int32_t hashes[2] = { 0, 0 }; 626a94100faSBill Paul struct ifmultiaddr *ifma; 627a94100faSBill Paul u_int32_t rxfilt; 628a94100faSBill Paul int mcnt = 0; 629bb7dfefbSBill Paul u_int32_t hwrev; 630a94100faSBill Paul 63197b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 63297b9d4baSJohn-Mark Gurney 633fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 634a94100faSBill Paul 635a94100faSBill Paul rxfilt = CSR_READ_4(sc, RL_RXCFG); 636a94100faSBill Paul 637a94100faSBill Paul if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 638a94100faSBill Paul rxfilt |= RL_RXCFG_RX_MULTI; 639a94100faSBill Paul CSR_WRITE_4(sc, RL_RXCFG, rxfilt); 640a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR0, 0xFFFFFFFF); 641a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR4, 0xFFFFFFFF); 642a94100faSBill Paul return; 643a94100faSBill Paul } 644a94100faSBill Paul 645a94100faSBill Paul /* first, zot all the existing hash bits */ 646a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR0, 0); 647a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR4, 0); 648a94100faSBill Paul 649a94100faSBill Paul /* now program new ones */ 65013b203d0SRobert Watson IF_ADDR_LOCK(ifp); 651a94100faSBill Paul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 652a94100faSBill Paul if (ifma->ifma_addr->sa_family != AF_LINK) 653a94100faSBill Paul continue; 6540e939c0cSChristian Weisgerber h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 6550e939c0cSChristian Weisgerber ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 656a94100faSBill Paul if (h < 32) 657a94100faSBill Paul hashes[0] |= (1 << h); 658a94100faSBill Paul else 659a94100faSBill Paul hashes[1] |= (1 << (h - 32)); 660a94100faSBill Paul mcnt++; 661a94100faSBill Paul } 66213b203d0SRobert Watson IF_ADDR_UNLOCK(ifp); 663a94100faSBill Paul 664a94100faSBill Paul if (mcnt) 665a94100faSBill Paul rxfilt |= RL_RXCFG_RX_MULTI; 666a94100faSBill Paul else 667a94100faSBill Paul rxfilt &= ~RL_RXCFG_RX_MULTI; 668a94100faSBill Paul 669a94100faSBill Paul CSR_WRITE_4(sc, RL_RXCFG, rxfilt); 670bb7dfefbSBill Paul 671bb7dfefbSBill Paul /* 672bb7dfefbSBill Paul * For some unfathomable reason, RealTek decided to reverse 673bb7dfefbSBill Paul * the order of the multicast hash registers in the PCI Express 674bb7dfefbSBill Paul * parts. This means we have to write the hash pattern in reverse 675bb7dfefbSBill Paul * order for those devices. 676bb7dfefbSBill Paul */ 677bb7dfefbSBill Paul 678bb7dfefbSBill Paul hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV; 679bb7dfefbSBill Paul 680bb7dfefbSBill Paul if (hwrev == RL_HWREV_8100E || hwrev == RL_HWREV_8101E || 681bb7dfefbSBill Paul hwrev == RL_HWREV_8168_SPIN1 || hwrev == RL_HWREV_8168_SPIN2) { 682bb7dfefbSBill Paul CSR_WRITE_4(sc, RL_MAR0, bswap32(hashes[1])); 683bb7dfefbSBill Paul CSR_WRITE_4(sc, RL_MAR4, bswap32(hashes[0])); 684bb7dfefbSBill Paul } else { 685a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR0, hashes[0]); 686a94100faSBill Paul CSR_WRITE_4(sc, RL_MAR4, hashes[1]); 687a94100faSBill Paul } 688bb7dfefbSBill Paul } 689a94100faSBill Paul 690a94100faSBill Paul static void 691a94100faSBill Paul re_reset(sc) 692a94100faSBill Paul struct rl_softc *sc; 693a94100faSBill Paul { 694a94100faSBill Paul register int i; 695a94100faSBill Paul 69697b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 69797b9d4baSJohn-Mark Gurney 698a94100faSBill Paul CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RESET); 699a94100faSBill Paul 700a94100faSBill Paul for (i = 0; i < RL_TIMEOUT; i++) { 701a94100faSBill Paul DELAY(10); 702a94100faSBill Paul if (!(CSR_READ_1(sc, RL_COMMAND) & RL_CMD_RESET)) 703a94100faSBill Paul break; 704a94100faSBill Paul } 705a94100faSBill Paul if (i == RL_TIMEOUT) 7066b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "reset never completed!\n"); 707a94100faSBill Paul 708a94100faSBill Paul CSR_WRITE_1(sc, 0x82, 1); 709a94100faSBill Paul } 710a94100faSBill Paul 711ed510fb0SBill Paul #ifdef RE_DIAG 712ed510fb0SBill Paul 713a94100faSBill Paul /* 714a94100faSBill Paul * The following routine is designed to test for a defect on some 715a94100faSBill Paul * 32-bit 8169 cards. Some of these NICs have the REQ64# and ACK64# 716a94100faSBill Paul * lines connected to the bus, however for a 32-bit only card, they 717a94100faSBill Paul * should be pulled high. The result of this defect is that the 718a94100faSBill Paul * NIC will not work right if you plug it into a 64-bit slot: DMA 719a94100faSBill Paul * operations will be done with 64-bit transfers, which will fail 720a94100faSBill Paul * because the 64-bit data lines aren't connected. 721a94100faSBill Paul * 722a94100faSBill Paul * There's no way to work around this (short of talking a soldering 723a94100faSBill Paul * iron to the board), however we can detect it. The method we use 724a94100faSBill Paul * here is to put the NIC into digital loopback mode, set the receiver 725a94100faSBill Paul * to promiscuous mode, and then try to send a frame. We then compare 726a94100faSBill Paul * the frame data we sent to what was received. If the data matches, 727a94100faSBill Paul * then the NIC is working correctly, otherwise we know the user has 728a94100faSBill Paul * a defective NIC which has been mistakenly plugged into a 64-bit PCI 729a94100faSBill Paul * slot. In the latter case, there's no way the NIC can work correctly, 730a94100faSBill Paul * so we print out a message on the console and abort the device attach. 731a94100faSBill Paul */ 732a94100faSBill Paul 733a94100faSBill Paul static int 734a94100faSBill Paul re_diag(sc) 735a94100faSBill Paul struct rl_softc *sc; 736a94100faSBill Paul { 737fc74a9f9SBrooks Davis struct ifnet *ifp = sc->rl_ifp; 738a94100faSBill Paul struct mbuf *m0; 739a94100faSBill Paul struct ether_header *eh; 740a94100faSBill Paul struct rl_desc *cur_rx; 741a94100faSBill Paul u_int16_t status; 742a94100faSBill Paul u_int32_t rxstat; 743ed510fb0SBill Paul int total_len, i, error = 0, phyaddr; 744a94100faSBill Paul u_int8_t dst[] = { 0x00, 'h', 'e', 'l', 'l', 'o' }; 745a94100faSBill Paul u_int8_t src[] = { 0x00, 'w', 'o', 'r', 'l', 'd' }; 746a94100faSBill Paul 747a94100faSBill Paul /* Allocate a single mbuf */ 748a94100faSBill Paul MGETHDR(m0, M_DONTWAIT, MT_DATA); 749a94100faSBill Paul if (m0 == NULL) 750a94100faSBill Paul return (ENOBUFS); 751a94100faSBill Paul 75297b9d4baSJohn-Mark Gurney RL_LOCK(sc); 75397b9d4baSJohn-Mark Gurney 754a94100faSBill Paul /* 755a94100faSBill Paul * Initialize the NIC in test mode. This sets the chip up 756a94100faSBill Paul * so that it can send and receive frames, but performs the 757a94100faSBill Paul * following special functions: 758a94100faSBill Paul * - Puts receiver in promiscuous mode 759a94100faSBill Paul * - Enables digital loopback mode 760a94100faSBill Paul * - Leaves interrupts turned off 761a94100faSBill Paul */ 762a94100faSBill Paul 763a94100faSBill Paul ifp->if_flags |= IFF_PROMISC; 764a94100faSBill Paul sc->rl_testmode = 1; 765ed510fb0SBill Paul re_reset(sc); 76697b9d4baSJohn-Mark Gurney re_init_locked(sc); 767ed510fb0SBill Paul sc->rl_link = 1; 768ed510fb0SBill Paul if (sc->rl_type == RL_8169) 769ed510fb0SBill Paul phyaddr = 1; 770ed510fb0SBill Paul else 771ed510fb0SBill Paul phyaddr = 0; 772ed510fb0SBill Paul 773ed510fb0SBill Paul re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_RESET); 774ed510fb0SBill Paul for (i = 0; i < RL_TIMEOUT; i++) { 775ed510fb0SBill Paul status = re_miibus_readreg(sc->rl_dev, phyaddr, MII_BMCR); 776ed510fb0SBill Paul if (!(status & BMCR_RESET)) 777ed510fb0SBill Paul break; 778ed510fb0SBill Paul } 779ed510fb0SBill Paul 780ed510fb0SBill Paul re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_LOOP); 781ed510fb0SBill Paul CSR_WRITE_2(sc, RL_ISR, RL_INTRS); 782ed510fb0SBill Paul 783804af9a1SBill Paul DELAY(100000); 784a94100faSBill Paul 785a94100faSBill Paul /* Put some data in the mbuf */ 786a94100faSBill Paul 787a94100faSBill Paul eh = mtod(m0, struct ether_header *); 788a94100faSBill Paul bcopy ((char *)&dst, eh->ether_dhost, ETHER_ADDR_LEN); 789a94100faSBill Paul bcopy ((char *)&src, eh->ether_shost, ETHER_ADDR_LEN); 790a94100faSBill Paul eh->ether_type = htons(ETHERTYPE_IP); 791a94100faSBill Paul m0->m_pkthdr.len = m0->m_len = ETHER_MIN_LEN - ETHER_CRC_LEN; 792a94100faSBill Paul 7937cae6651SBill Paul /* 7947cae6651SBill Paul * Queue the packet, start transmission. 7957cae6651SBill Paul * Note: IF_HANDOFF() ultimately calls re_start() for us. 7967cae6651SBill Paul */ 797a94100faSBill Paul 798abc8ff44SBill Paul CSR_WRITE_2(sc, RL_ISR, 0xFFFF); 79997b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 80052732175SMax Laier /* XXX: re_diag must not be called when in ALTQ mode */ 8017cae6651SBill Paul IF_HANDOFF(&ifp->if_snd, m0, ifp); 80297b9d4baSJohn-Mark Gurney RL_LOCK(sc); 803a94100faSBill Paul m0 = NULL; 804a94100faSBill Paul 805a94100faSBill Paul /* Wait for it to propagate through the chip */ 806a94100faSBill Paul 807abc8ff44SBill Paul DELAY(100000); 808a94100faSBill Paul for (i = 0; i < RL_TIMEOUT; i++) { 809a94100faSBill Paul status = CSR_READ_2(sc, RL_ISR); 810ed510fb0SBill Paul CSR_WRITE_2(sc, RL_ISR, status); 811abc8ff44SBill Paul if ((status & (RL_ISR_TIMEOUT_EXPIRED|RL_ISR_RX_OK)) == 812abc8ff44SBill Paul (RL_ISR_TIMEOUT_EXPIRED|RL_ISR_RX_OK)) 813a94100faSBill Paul break; 814a94100faSBill Paul DELAY(10); 815a94100faSBill Paul } 816a94100faSBill Paul 817a94100faSBill Paul if (i == RL_TIMEOUT) { 8186b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, 8196b9f5c94SGleb Smirnoff "diagnostic failed, failed to receive packet in" 8206b9f5c94SGleb Smirnoff " loopback mode\n"); 821a94100faSBill Paul error = EIO; 822a94100faSBill Paul goto done; 823a94100faSBill Paul } 824a94100faSBill Paul 825a94100faSBill Paul /* 826a94100faSBill Paul * The packet should have been dumped into the first 827a94100faSBill Paul * entry in the RX DMA ring. Grab it from there. 828a94100faSBill Paul */ 829a94100faSBill Paul 830a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag, 831a94100faSBill Paul sc->rl_ldata.rl_rx_list_map, 832a94100faSBill Paul BUS_DMASYNC_POSTREAD); 833a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_mtag, 834a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[0], 835a94100faSBill Paul BUS_DMASYNC_POSTWRITE); 836a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_mtag, 837a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[0]); 838a94100faSBill Paul 839a94100faSBill Paul m0 = sc->rl_ldata.rl_rx_mbuf[0]; 840a94100faSBill Paul sc->rl_ldata.rl_rx_mbuf[0] = NULL; 841a94100faSBill Paul eh = mtod(m0, struct ether_header *); 842a94100faSBill Paul 843a94100faSBill Paul cur_rx = &sc->rl_ldata.rl_rx_list[0]; 844a94100faSBill Paul total_len = RL_RXBYTES(cur_rx); 845a94100faSBill Paul rxstat = le32toh(cur_rx->rl_cmdstat); 846a94100faSBill Paul 847a94100faSBill Paul if (total_len != ETHER_MIN_LEN) { 8486b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, 8496b9f5c94SGleb Smirnoff "diagnostic failed, received short packet\n"); 850a94100faSBill Paul error = EIO; 851a94100faSBill Paul goto done; 852a94100faSBill Paul } 853a94100faSBill Paul 854a94100faSBill Paul /* Test that the received packet data matches what we sent. */ 855a94100faSBill Paul 856a94100faSBill Paul if (bcmp((char *)&eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN) || 857a94100faSBill Paul bcmp((char *)&eh->ether_shost, (char *)&src, ETHER_ADDR_LEN) || 858a94100faSBill Paul ntohs(eh->ether_type) != ETHERTYPE_IP) { 8596b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "WARNING, DMA FAILURE!\n"); 8606b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "expected TX data: %6D/%6D/0x%x\n", 861a94100faSBill Paul dst, ":", src, ":", ETHERTYPE_IP); 8626b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "received RX data: %6D/%6D/0x%x\n", 863a94100faSBill Paul eh->ether_dhost, ":", eh->ether_shost, ":", 864a94100faSBill Paul ntohs(eh->ether_type)); 8656b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "You may have a defective 32-bit " 8666b9f5c94SGleb Smirnoff "NIC plugged into a 64-bit PCI slot.\n"); 8676b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "Please re-install the NIC in a " 8686b9f5c94SGleb Smirnoff "32-bit slot for proper operation.\n"); 8696b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "Read the re(4) man page for more " 8706b9f5c94SGleb Smirnoff "details.\n"); 871a94100faSBill Paul error = EIO; 872a94100faSBill Paul } 873a94100faSBill Paul 874a94100faSBill Paul done: 875a94100faSBill Paul /* Turn interface off, release resources */ 876a94100faSBill Paul 877a94100faSBill Paul sc->rl_testmode = 0; 878ed510fb0SBill Paul sc->rl_link = 0; 879a94100faSBill Paul ifp->if_flags &= ~IFF_PROMISC; 880a94100faSBill Paul re_stop(sc); 881a94100faSBill Paul if (m0 != NULL) 882a94100faSBill Paul m_freem(m0); 883a94100faSBill Paul 88497b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 88597b9d4baSJohn-Mark Gurney 886a94100faSBill Paul return (error); 887a94100faSBill Paul } 888a94100faSBill Paul 889ed510fb0SBill Paul #endif 890ed510fb0SBill Paul 891a94100faSBill Paul /* 892a94100faSBill Paul * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device 893a94100faSBill Paul * IDs against our list and return a device name if we find a match. 894a94100faSBill Paul */ 895a94100faSBill Paul static int 896a94100faSBill Paul re_probe(dev) 897a94100faSBill Paul device_t dev; 898a94100faSBill Paul { 899a94100faSBill Paul struct rl_type *t; 900a94100faSBill Paul struct rl_softc *sc; 901a94100faSBill Paul int rid; 902a94100faSBill Paul u_int32_t hwrev; 903a94100faSBill Paul 904a94100faSBill Paul t = re_devs; 905a94100faSBill Paul sc = device_get_softc(dev); 906a94100faSBill Paul 907a94100faSBill Paul while (t->rl_name != NULL) { 908a94100faSBill Paul if ((pci_get_vendor(dev) == t->rl_vid) && 909a94100faSBill Paul (pci_get_device(dev) == t->rl_did)) { 91026390635SJohn Baldwin /* 91126390635SJohn Baldwin * Only attach to rev. 3 of the Linksys EG1032 adapter. 91226390635SJohn Baldwin * Rev. 2 i supported by sk(4). 91326390635SJohn Baldwin */ 91426390635SJohn Baldwin if ((t->rl_vid == LINKSYS_VENDORID) && 91526390635SJohn Baldwin (t->rl_did == LINKSYS_DEVICEID_EG1032) && 91626390635SJohn Baldwin (pci_get_subdevice(dev) != 91726390635SJohn Baldwin LINKSYS_SUBDEVICE_EG1032_REV3)) { 91826390635SJohn Baldwin t++; 91926390635SJohn Baldwin continue; 92026390635SJohn Baldwin } 921a94100faSBill Paul 922a94100faSBill Paul /* 923a94100faSBill Paul * Temporarily map the I/O space 924a94100faSBill Paul * so we can read the chip ID register. 925a94100faSBill Paul */ 926a94100faSBill Paul rid = RL_RID; 9275f96beb9SNate Lawson sc->rl_res = bus_alloc_resource_any(dev, RL_RES, &rid, 9285f96beb9SNate Lawson RF_ACTIVE); 929a94100faSBill Paul if (sc->rl_res == NULL) { 930a94100faSBill Paul device_printf(dev, 931a94100faSBill Paul "couldn't map ports/memory\n"); 932a94100faSBill Paul return (ENXIO); 933a94100faSBill Paul } 934a94100faSBill Paul sc->rl_btag = rman_get_bustag(sc->rl_res); 935a94100faSBill Paul sc->rl_bhandle = rman_get_bushandle(sc->rl_res); 936a94100faSBill Paul hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV; 937a94100faSBill Paul bus_release_resource(dev, RL_RES, 938a94100faSBill Paul RL_RID, sc->rl_res); 939a94100faSBill Paul if (t->rl_basetype == hwrev) { 940a94100faSBill Paul device_set_desc(dev, t->rl_name); 941d2b677bbSWarner Losh return (BUS_PROBE_DEFAULT); 942a94100faSBill Paul } 943a94100faSBill Paul } 944a94100faSBill Paul t++; 945a94100faSBill Paul } 946a94100faSBill Paul 947a94100faSBill Paul return (ENXIO); 948a94100faSBill Paul } 949a94100faSBill Paul 950a94100faSBill Paul /* 951a94100faSBill Paul * This routine takes the segment list provided as the result of 952a94100faSBill Paul * a bus_dma_map_load() operation and assigns the addresses/lengths 953a94100faSBill Paul * to RealTek DMA descriptors. This can be called either by the RX 954a94100faSBill Paul * code or the TX code. In the RX case, we'll probably wind up mapping 955a94100faSBill Paul * at most one segment. For the TX case, there could be any number of 956a94100faSBill Paul * segments since TX packets may span multiple mbufs. In either case, 957a94100faSBill Paul * if the number of segments is larger than the rl_maxsegs limit 958a94100faSBill Paul * specified by the caller, we abort the mapping operation. Sadly, 959a94100faSBill Paul * whoever designed the buffer mapping API did not provide a way to 960a94100faSBill Paul * return an error from here, so we have to fake it a bit. 961a94100faSBill Paul */ 962a94100faSBill Paul 963a94100faSBill Paul static void 964a94100faSBill Paul re_dma_map_desc(arg, segs, nseg, mapsize, error) 965a94100faSBill Paul void *arg; 966a94100faSBill Paul bus_dma_segment_t *segs; 967a94100faSBill Paul int nseg; 968a94100faSBill Paul bus_size_t mapsize; 969a94100faSBill Paul int error; 970a94100faSBill Paul { 971a94100faSBill Paul struct rl_dmaload_arg *ctx; 972a94100faSBill Paul struct rl_desc *d = NULL; 973a94100faSBill Paul int i = 0, idx; 974498bd0d3SBill Paul u_int32_t cmdstat; 975498bd0d3SBill Paul int totlen = 0; 976a94100faSBill Paul 977a94100faSBill Paul if (error) 978a94100faSBill Paul return; 979a94100faSBill Paul 980a94100faSBill Paul ctx = arg; 981a94100faSBill Paul 982a94100faSBill Paul /* Signal error to caller if there's too many segments */ 983a94100faSBill Paul if (nseg > ctx->rl_maxsegs) { 984a94100faSBill Paul ctx->rl_maxsegs = 0; 985a94100faSBill Paul return; 986a94100faSBill Paul } 987a94100faSBill Paul 988a94100faSBill Paul /* 989a94100faSBill Paul * Map the segment array into descriptors. Note that we set the 990a94100faSBill Paul * start-of-frame and end-of-frame markers for either TX or RX, but 991a94100faSBill Paul * they really only have meaning in the TX case. (In the RX case, 992a94100faSBill Paul * it's the chip that tells us where packets begin and end.) 993a94100faSBill Paul * We also keep track of the end of the ring and set the 994a94100faSBill Paul * end-of-ring bits as needed, and we set the ownership bits 995a94100faSBill Paul * in all except the very first descriptor. (The caller will 996a94100faSBill Paul * set this descriptor later when it start transmission or 997a94100faSBill Paul * reception.) 998a94100faSBill Paul */ 999a94100faSBill Paul idx = ctx->rl_idx; 100059b5d934SBruce M Simpson for (;;) { 1001a94100faSBill Paul d = &ctx->rl_ring[idx]; 1002a94100faSBill Paul if (le32toh(d->rl_cmdstat) & RL_RDESC_STAT_OWN) { 1003a94100faSBill Paul ctx->rl_maxsegs = 0; 1004a94100faSBill Paul return; 1005a94100faSBill Paul } 1006a94100faSBill Paul cmdstat = segs[i].ds_len; 1007498bd0d3SBill Paul totlen += segs[i].ds_len; 1008a94100faSBill Paul d->rl_bufaddr_lo = htole32(RL_ADDR_LO(segs[i].ds_addr)); 1009a94100faSBill Paul d->rl_bufaddr_hi = htole32(RL_ADDR_HI(segs[i].ds_addr)); 1010a94100faSBill Paul if (i == 0) 1011a94100faSBill Paul cmdstat |= RL_TDESC_CMD_SOF; 1012a94100faSBill Paul else 1013a94100faSBill Paul cmdstat |= RL_TDESC_CMD_OWN; 1014a94100faSBill Paul if (idx == (RL_RX_DESC_CNT - 1)) 1015a94100faSBill Paul cmdstat |= RL_TDESC_CMD_EOR; 1016a94100faSBill Paul d->rl_cmdstat = htole32(cmdstat | ctx->rl_flags); 1017a94100faSBill Paul i++; 1018a94100faSBill Paul if (i == nseg) 1019a94100faSBill Paul break; 1020a94100faSBill Paul RL_DESC_INC(idx); 1021a94100faSBill Paul } 1022a94100faSBill Paul 1023a94100faSBill Paul d->rl_cmdstat |= htole32(RL_TDESC_CMD_EOF); 1024a94100faSBill Paul ctx->rl_maxsegs = nseg; 1025a94100faSBill Paul ctx->rl_idx = idx; 1026a94100faSBill Paul } 1027a94100faSBill Paul 1028a94100faSBill Paul /* 1029a94100faSBill Paul * Map a single buffer address. 1030a94100faSBill Paul */ 1031a94100faSBill Paul 1032a94100faSBill Paul static void 1033a94100faSBill Paul re_dma_map_addr(arg, segs, nseg, error) 1034a94100faSBill Paul void *arg; 1035a94100faSBill Paul bus_dma_segment_t *segs; 1036a94100faSBill Paul int nseg; 1037a94100faSBill Paul int error; 1038a94100faSBill Paul { 10398fd99e38SPyun YongHyeon bus_addr_t *addr; 1040a94100faSBill Paul 1041a94100faSBill Paul if (error) 1042a94100faSBill Paul return; 1043a94100faSBill Paul 1044a94100faSBill Paul KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 1045a94100faSBill Paul addr = arg; 1046a94100faSBill Paul *addr = segs->ds_addr; 1047a94100faSBill Paul } 1048a94100faSBill Paul 1049a94100faSBill Paul static int 1050a94100faSBill Paul re_allocmem(dev, sc) 1051a94100faSBill Paul device_t dev; 1052a94100faSBill Paul struct rl_softc *sc; 1053a94100faSBill Paul { 1054a94100faSBill Paul int error; 1055a94100faSBill Paul int nseg; 1056a94100faSBill Paul int i; 1057a94100faSBill Paul 1058a94100faSBill Paul /* 1059a94100faSBill Paul * Allocate map for RX mbufs. 1060a94100faSBill Paul */ 1061a94100faSBill Paul nseg = 32; 1062a94100faSBill Paul error = bus_dma_tag_create(sc->rl_parent_tag, ETHER_ALIGN, 0, 1063a94100faSBill Paul BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, 10646110675fSBill Paul NULL, MCLBYTES * nseg, nseg, MCLBYTES, BUS_DMA_ALLOCNOW, 1065a94100faSBill Paul NULL, NULL, &sc->rl_ldata.rl_mtag); 1066a94100faSBill Paul if (error) { 1067a94100faSBill Paul device_printf(dev, "could not allocate dma tag\n"); 1068a94100faSBill Paul return (ENOMEM); 1069a94100faSBill Paul } 1070a94100faSBill Paul 1071a94100faSBill Paul /* 1072a94100faSBill Paul * Allocate map for TX descriptor list. 1073a94100faSBill Paul */ 1074a94100faSBill Paul error = bus_dma_tag_create(sc->rl_parent_tag, RL_RING_ALIGN, 1075a94100faSBill Paul 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, 10761d545c7aSMarius Strobl NULL, RL_TX_LIST_SZ, 1, RL_TX_LIST_SZ, 0, 1077a94100faSBill Paul NULL, NULL, &sc->rl_ldata.rl_tx_list_tag); 1078a94100faSBill Paul if (error) { 1079a94100faSBill Paul device_printf(dev, "could not allocate dma tag\n"); 1080a94100faSBill Paul return (ENOMEM); 1081a94100faSBill Paul } 1082a94100faSBill Paul 1083a94100faSBill Paul /* Allocate DMA'able memory for the TX ring */ 1084a94100faSBill Paul 1085a94100faSBill Paul error = bus_dmamem_alloc(sc->rl_ldata.rl_tx_list_tag, 1086a94100faSBill Paul (void **)&sc->rl_ldata.rl_tx_list, BUS_DMA_NOWAIT | BUS_DMA_ZERO, 1087a94100faSBill Paul &sc->rl_ldata.rl_tx_list_map); 1088a94100faSBill Paul if (error) 1089a94100faSBill Paul return (ENOMEM); 1090a94100faSBill Paul 1091a94100faSBill Paul /* Load the map for the TX ring. */ 1092a94100faSBill Paul 1093a94100faSBill Paul error = bus_dmamap_load(sc->rl_ldata.rl_tx_list_tag, 1094a94100faSBill Paul sc->rl_ldata.rl_tx_list_map, sc->rl_ldata.rl_tx_list, 1095a94100faSBill Paul RL_TX_LIST_SZ, re_dma_map_addr, 1096a94100faSBill Paul &sc->rl_ldata.rl_tx_list_addr, BUS_DMA_NOWAIT); 1097a94100faSBill Paul 1098a94100faSBill Paul /* Create DMA maps for TX buffers */ 1099a94100faSBill Paul 1100a94100faSBill Paul for (i = 0; i < RL_TX_DESC_CNT; i++) { 1101a94100faSBill Paul error = bus_dmamap_create(sc->rl_ldata.rl_mtag, 0, 1102a94100faSBill Paul &sc->rl_ldata.rl_tx_dmamap[i]); 1103a94100faSBill Paul if (error) { 1104a94100faSBill Paul device_printf(dev, "can't create DMA map for TX\n"); 1105a94100faSBill Paul return (ENOMEM); 1106a94100faSBill Paul } 1107a94100faSBill Paul } 1108a94100faSBill Paul 1109a94100faSBill Paul /* 1110a94100faSBill Paul * Allocate map for RX descriptor list. 1111a94100faSBill Paul */ 1112a94100faSBill Paul error = bus_dma_tag_create(sc->rl_parent_tag, RL_RING_ALIGN, 1113a94100faSBill Paul 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, 11141d545c7aSMarius Strobl NULL, RL_RX_LIST_SZ, 1, RL_RX_LIST_SZ, 0, 1115a94100faSBill Paul NULL, NULL, &sc->rl_ldata.rl_rx_list_tag); 1116a94100faSBill Paul if (error) { 1117a94100faSBill Paul device_printf(dev, "could not allocate dma tag\n"); 1118a94100faSBill Paul return (ENOMEM); 1119a94100faSBill Paul } 1120a94100faSBill Paul 1121a94100faSBill Paul /* Allocate DMA'able memory for the RX ring */ 1122a94100faSBill Paul 1123a94100faSBill Paul error = bus_dmamem_alloc(sc->rl_ldata.rl_rx_list_tag, 1124a94100faSBill Paul (void **)&sc->rl_ldata.rl_rx_list, BUS_DMA_NOWAIT | BUS_DMA_ZERO, 1125a94100faSBill Paul &sc->rl_ldata.rl_rx_list_map); 1126a94100faSBill Paul if (error) 1127a94100faSBill Paul return (ENOMEM); 1128a94100faSBill Paul 1129a94100faSBill Paul /* Load the map for the RX ring. */ 1130a94100faSBill Paul 1131a94100faSBill Paul error = bus_dmamap_load(sc->rl_ldata.rl_rx_list_tag, 1132a94100faSBill Paul sc->rl_ldata.rl_rx_list_map, sc->rl_ldata.rl_rx_list, 113361021536SJohn-Mark Gurney RL_RX_LIST_SZ, re_dma_map_addr, 1134a94100faSBill Paul &sc->rl_ldata.rl_rx_list_addr, BUS_DMA_NOWAIT); 1135a94100faSBill Paul 1136a94100faSBill Paul /* Create DMA maps for RX buffers */ 1137a94100faSBill Paul 1138a94100faSBill Paul for (i = 0; i < RL_RX_DESC_CNT; i++) { 1139a94100faSBill Paul error = bus_dmamap_create(sc->rl_ldata.rl_mtag, 0, 1140a94100faSBill Paul &sc->rl_ldata.rl_rx_dmamap[i]); 1141a94100faSBill Paul if (error) { 1142a94100faSBill Paul device_printf(dev, "can't create DMA map for RX\n"); 1143a94100faSBill Paul return (ENOMEM); 1144a94100faSBill Paul } 1145a94100faSBill Paul } 1146a94100faSBill Paul 1147a94100faSBill Paul return (0); 1148a94100faSBill Paul } 1149a94100faSBill Paul 1150a94100faSBill Paul /* 1151a94100faSBill Paul * Attach the interface. Allocate softc structures, do ifmedia 1152a94100faSBill Paul * setup and ethernet/BPF attach. 1153a94100faSBill Paul */ 1154a94100faSBill Paul static int 1155a94100faSBill Paul re_attach(dev) 1156a94100faSBill Paul device_t dev; 1157a94100faSBill Paul { 1158a94100faSBill Paul u_char eaddr[ETHER_ADDR_LEN]; 1159be099007SPyun YongHyeon u_int16_t as[ETHER_ADDR_LEN / 2]; 1160a94100faSBill Paul struct rl_softc *sc; 1161a94100faSBill Paul struct ifnet *ifp; 1162a94100faSBill Paul struct rl_hwrev *hw_rev; 1163a94100faSBill Paul int hwrev; 1164a94100faSBill Paul u_int16_t re_did = 0; 1165d1754a9bSJohn Baldwin int error = 0, rid, i; 11665774c5ffSPyun YongHyeon int msic, reg; 1167a94100faSBill Paul 1168a94100faSBill Paul sc = device_get_softc(dev); 1169ed510fb0SBill Paul sc->rl_dev = dev; 1170a94100faSBill Paul 1171a94100faSBill Paul mtx_init(&sc->rl_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 117297b9d4baSJohn-Mark Gurney MTX_DEF); 1173d1754a9bSJohn Baldwin callout_init_mtx(&sc->rl_stat_callout, &sc->rl_mtx, 0); 1174d1754a9bSJohn Baldwin 1175a94100faSBill Paul /* 1176a94100faSBill Paul * Map control/status registers. 1177a94100faSBill Paul */ 1178a94100faSBill Paul pci_enable_busmaster(dev); 1179a94100faSBill Paul 1180a94100faSBill Paul rid = RL_RID; 11815f96beb9SNate Lawson sc->rl_res = bus_alloc_resource_any(dev, RL_RES, &rid, 11825f96beb9SNate Lawson RF_ACTIVE); 1183a94100faSBill Paul 1184a94100faSBill Paul if (sc->rl_res == NULL) { 1185d1754a9bSJohn Baldwin device_printf(dev, "couldn't map ports/memory\n"); 1186a94100faSBill Paul error = ENXIO; 1187a94100faSBill Paul goto fail; 1188a94100faSBill Paul } 1189a94100faSBill Paul 1190a94100faSBill Paul sc->rl_btag = rman_get_bustag(sc->rl_res); 1191a94100faSBill Paul sc->rl_bhandle = rman_get_bushandle(sc->rl_res); 1192a94100faSBill Paul 11935774c5ffSPyun YongHyeon msic = 0; 11945774c5ffSPyun YongHyeon if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { 11955774c5ffSPyun YongHyeon msic = pci_msi_count(dev); 11965774c5ffSPyun YongHyeon if (bootverbose) 11975774c5ffSPyun YongHyeon device_printf(dev, "MSI count : %d\n", msic); 11985774c5ffSPyun YongHyeon } 11995774c5ffSPyun YongHyeon if (msic == RL_MSI_MESSAGES && msi_disable == 0) { 12005774c5ffSPyun YongHyeon if (pci_alloc_msi(dev, &msic) == 0) { 12015774c5ffSPyun YongHyeon if (msic == RL_MSI_MESSAGES) { 12025774c5ffSPyun YongHyeon device_printf(dev, "Using %d MSI messages\n", 12035774c5ffSPyun YongHyeon msic); 12045774c5ffSPyun YongHyeon sc->rl_msi = 1; 12055774c5ffSPyun YongHyeon } else 12065774c5ffSPyun YongHyeon pci_release_msi(dev); 12075774c5ffSPyun YongHyeon } 12085774c5ffSPyun YongHyeon } 1209a94100faSBill Paul 12105774c5ffSPyun YongHyeon /* Allocate interrupt */ 12115774c5ffSPyun YongHyeon if (sc->rl_msi == 0) { 12125774c5ffSPyun YongHyeon rid = 0; 12135774c5ffSPyun YongHyeon sc->rl_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 12145774c5ffSPyun YongHyeon RF_SHAREABLE | RF_ACTIVE); 12155774c5ffSPyun YongHyeon if (sc->rl_irq[0] == NULL) { 12165774c5ffSPyun YongHyeon device_printf(dev, "couldn't allocate IRQ resources\n"); 1217a94100faSBill Paul error = ENXIO; 1218a94100faSBill Paul goto fail; 1219a94100faSBill Paul } 12205774c5ffSPyun YongHyeon } else { 12215774c5ffSPyun YongHyeon for (i = 0, rid = 1; i < RL_MSI_MESSAGES; i++, rid++) { 12225774c5ffSPyun YongHyeon sc->rl_irq[i] = bus_alloc_resource_any(dev, 12235774c5ffSPyun YongHyeon SYS_RES_IRQ, &rid, RF_ACTIVE); 12245774c5ffSPyun YongHyeon if (sc->rl_irq[i] == NULL) { 12255774c5ffSPyun YongHyeon device_printf(dev, 12265774c5ffSPyun YongHyeon "couldn't llocate IRQ resources for " 12275774c5ffSPyun YongHyeon "message %d\n", rid); 12285774c5ffSPyun YongHyeon error = ENXIO; 12295774c5ffSPyun YongHyeon goto fail; 12305774c5ffSPyun YongHyeon } 12315774c5ffSPyun YongHyeon } 12325774c5ffSPyun YongHyeon } 1233a94100faSBill Paul 1234a94100faSBill Paul /* Reset the adapter. */ 123597b9d4baSJohn-Mark Gurney RL_LOCK(sc); 1236a94100faSBill Paul re_reset(sc); 123797b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 1238abc8ff44SBill Paul 1239abc8ff44SBill Paul hw_rev = re_hwrevs; 1240abc8ff44SBill Paul hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV; 1241abc8ff44SBill Paul while (hw_rev->rl_desc != NULL) { 1242abc8ff44SBill Paul if (hw_rev->rl_rev == hwrev) { 1243abc8ff44SBill Paul sc->rl_type = hw_rev->rl_type; 1244abc8ff44SBill Paul break; 1245abc8ff44SBill Paul } 1246abc8ff44SBill Paul hw_rev++; 1247abc8ff44SBill Paul } 1248abc8ff44SBill Paul 1249141f92e7SPyun YongHyeon sc->rl_eewidth = RL_9356_ADDR_LEN; 1250ed510fb0SBill Paul re_read_eeprom(sc, (caddr_t)&re_did, 0, 1); 1251a94100faSBill Paul if (re_did != 0x8129) 1252141f92e7SPyun YongHyeon sc->rl_eewidth = RL_9346_ADDR_LEN; 1253a94100faSBill Paul 1254a94100faSBill Paul /* 1255a94100faSBill Paul * Get station address from the EEPROM. 1256a94100faSBill Paul */ 1257ed510fb0SBill Paul re_read_eeprom(sc, (caddr_t)as, RL_EE_EADDR, 3); 1258be099007SPyun YongHyeon for (i = 0; i < ETHER_ADDR_LEN / 2; i++) 1259be099007SPyun YongHyeon as[i] = le16toh(as[i]); 1260be099007SPyun YongHyeon bcopy(as, eaddr, sizeof(eaddr)); 1261ed510fb0SBill Paul 1262ed510fb0SBill Paul if (sc->rl_type == RL_8169) { 1263ed510fb0SBill Paul /* Set RX length mask */ 1264ed510fb0SBill Paul sc->rl_rxlenmask = RL_RDESC_STAT_GFRAGLEN; 1265ed510fb0SBill Paul sc->rl_txstart = RL_GTXSTART; 1266ed510fb0SBill Paul } else { 1267ed510fb0SBill Paul /* Set RX length mask */ 1268ed510fb0SBill Paul sc->rl_rxlenmask = RL_RDESC_STAT_FRAGLEN; 1269ed510fb0SBill Paul sc->rl_txstart = RL_TXSTART; 1270abc8ff44SBill Paul } 12719bac70b8SBill Paul 1272a94100faSBill Paul /* 1273a94100faSBill Paul * Allocate the parent bus DMA tag appropriate for PCI. 1274a94100faSBill Paul */ 1275a94100faSBill Paul #define RL_NSEG_NEW 32 12761d545c7aSMarius Strobl error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 12771d545c7aSMarius Strobl BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 12781d545c7aSMarius Strobl MAXBSIZE, RL_NSEG_NEW, BUS_SPACE_MAXSIZE_32BIT, 0, 12791d545c7aSMarius Strobl NULL, NULL, &sc->rl_parent_tag); 1280a94100faSBill Paul if (error) 1281a94100faSBill Paul goto fail; 1282a94100faSBill Paul 1283a94100faSBill Paul error = re_allocmem(dev, sc); 1284a94100faSBill Paul 1285a94100faSBill Paul if (error) 1286a94100faSBill Paul goto fail; 1287a94100faSBill Paul 1288cd036ec1SBrooks Davis ifp = sc->rl_ifp = if_alloc(IFT_ETHER); 1289cd036ec1SBrooks Davis if (ifp == NULL) { 1290d1754a9bSJohn Baldwin device_printf(dev, "can not if_alloc()\n"); 1291cd036ec1SBrooks Davis error = ENOSPC; 1292cd036ec1SBrooks Davis goto fail; 1293cd036ec1SBrooks Davis } 1294cd036ec1SBrooks Davis 1295a94100faSBill Paul /* Do MII setup */ 1296a94100faSBill Paul if (mii_phy_probe(dev, &sc->rl_miibus, 1297a94100faSBill Paul re_ifmedia_upd, re_ifmedia_sts)) { 1298d1754a9bSJohn Baldwin device_printf(dev, "MII without any phy!\n"); 1299a94100faSBill Paul error = ENXIO; 1300a94100faSBill Paul goto fail; 1301a94100faSBill Paul } 1302a94100faSBill Paul 1303a94100faSBill Paul ifp->if_softc = sc; 13049bf40edeSBrooks Davis if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 1305a94100faSBill Paul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1306a94100faSBill Paul ifp->if_ioctl = re_ioctl; 1307a94100faSBill Paul ifp->if_start = re_start; 1308f28a171cSPyun YongHyeon ifp->if_hwassist = RE_CSUM_FEATURES; 1309f28a171cSPyun YongHyeon ifp->if_capabilities = IFCAP_HWCSUM; 1310498bd0d3SBill Paul ifp->if_capenable = ifp->if_capabilities; 1311a94100faSBill Paul ifp->if_init = re_init; 131252732175SMax Laier IFQ_SET_MAXLEN(&ifp->if_snd, RL_IFQ_MAXLEN); 131352732175SMax Laier ifp->if_snd.ifq_drv_maxlen = RL_IFQ_MAXLEN; 131452732175SMax Laier IFQ_SET_READY(&ifp->if_snd); 1315a94100faSBill Paul 1316ed510fb0SBill Paul TASK_INIT(&sc->rl_txtask, 1, re_tx_task, ifp); 1317ed510fb0SBill Paul TASK_INIT(&sc->rl_inttask, 0, re_int_task, sc); 1318ed510fb0SBill Paul 1319a94100faSBill Paul /* 1320a94100faSBill Paul * Call MI attach routine. 1321a94100faSBill Paul */ 1322a94100faSBill Paul ether_ifattach(ifp, eaddr); 1323a94100faSBill Paul 1324960fd5b3SPyun YongHyeon /* VLAN capability setup */ 1325960fd5b3SPyun YongHyeon ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING; 1326960fd5b3SPyun YongHyeon if (ifp->if_capabilities & IFCAP_HWCSUM) 1327960fd5b3SPyun YongHyeon ifp->if_capabilities |= IFCAP_VLAN_HWCSUM; 1328960fd5b3SPyun YongHyeon ifp->if_capenable = ifp->if_capabilities; 1329960fd5b3SPyun YongHyeon #ifdef DEVICE_POLLING 1330960fd5b3SPyun YongHyeon ifp->if_capabilities |= IFCAP_POLLING; 1331960fd5b3SPyun YongHyeon #endif 1332960fd5b3SPyun YongHyeon /* 1333960fd5b3SPyun YongHyeon * Tell the upper layer(s) we support long frames. 1334960fd5b3SPyun YongHyeon * Must appear after the call to ether_ifattach() because 1335960fd5b3SPyun YongHyeon * ether_ifattach() sets ifi_hdrlen to the default value. 1336960fd5b3SPyun YongHyeon */ 1337960fd5b3SPyun YongHyeon ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 1338960fd5b3SPyun YongHyeon 1339ed510fb0SBill Paul #ifdef RE_DIAG 1340ed510fb0SBill Paul /* 1341ed510fb0SBill Paul * Perform hardware diagnostic on the original RTL8169. 1342ed510fb0SBill Paul * Some 32-bit cards were incorrectly wired and would 1343ed510fb0SBill Paul * malfunction if plugged into a 64-bit slot. 1344ed510fb0SBill Paul */ 1345a94100faSBill Paul 1346ed510fb0SBill Paul if (hwrev == RL_HWREV_8169) { 1347ed510fb0SBill Paul error = re_diag(sc); 1348a94100faSBill Paul if (error) { 1349ed510fb0SBill Paul device_printf(dev, 1350ed510fb0SBill Paul "attach aborted due to hardware diag failure\n"); 1351a94100faSBill Paul ether_ifdetach(ifp); 1352a94100faSBill Paul goto fail; 1353a94100faSBill Paul } 1354ed510fb0SBill Paul } 1355ed510fb0SBill Paul #endif 1356a94100faSBill Paul 1357a94100faSBill Paul /* Hook interrupt last to avoid having to lock softc */ 13585774c5ffSPyun YongHyeon if (sc->rl_msi == 0) 13595774c5ffSPyun YongHyeon error = bus_setup_intr(dev, sc->rl_irq[0], 13605774c5ffSPyun YongHyeon INTR_TYPE_NET | INTR_MPSAFE, re_intr, NULL, sc, 13615774c5ffSPyun YongHyeon &sc->rl_intrhand[0]); 13625774c5ffSPyun YongHyeon else { 13635774c5ffSPyun YongHyeon for (i = 0; i < RL_MSI_MESSAGES; i++) { 13645774c5ffSPyun YongHyeon error = bus_setup_intr(dev, sc->rl_irq[i], 13655774c5ffSPyun YongHyeon INTR_TYPE_NET | INTR_MPSAFE, re_intr, NULL, sc, 13665774c5ffSPyun YongHyeon &sc->rl_intrhand[i]); 13675774c5ffSPyun YongHyeon if (error != 0) 13685774c5ffSPyun YongHyeon break; 13695774c5ffSPyun YongHyeon } 13705774c5ffSPyun YongHyeon } 1371a94100faSBill Paul if (error) { 1372d1754a9bSJohn Baldwin device_printf(dev, "couldn't set up irq\n"); 1373a94100faSBill Paul ether_ifdetach(ifp); 1374a94100faSBill Paul } 1375a94100faSBill Paul 1376a94100faSBill Paul fail: 1377ed510fb0SBill Paul 1378a94100faSBill Paul if (error) 1379a94100faSBill Paul re_detach(dev); 1380a94100faSBill Paul 1381a94100faSBill Paul return (error); 1382a94100faSBill Paul } 1383a94100faSBill Paul 1384a94100faSBill Paul /* 1385a94100faSBill Paul * Shutdown hardware and free up resources. This can be called any 1386a94100faSBill Paul * time after the mutex has been initialized. It is called in both 1387a94100faSBill Paul * the error case in attach and the normal detach case so it needs 1388a94100faSBill Paul * to be careful about only freeing resources that have actually been 1389a94100faSBill Paul * allocated. 1390a94100faSBill Paul */ 1391a94100faSBill Paul static int 1392a94100faSBill Paul re_detach(dev) 1393a94100faSBill Paul device_t dev; 1394a94100faSBill Paul { 1395a94100faSBill Paul struct rl_softc *sc; 1396a94100faSBill Paul struct ifnet *ifp; 13975774c5ffSPyun YongHyeon int i, rid; 1398a94100faSBill Paul 1399a94100faSBill Paul sc = device_get_softc(dev); 1400fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 1401aedd16d9SJohn-Mark Gurney KASSERT(mtx_initialized(&sc->rl_mtx), ("re mutex not initialized")); 140297b9d4baSJohn-Mark Gurney 140340929967SGleb Smirnoff #ifdef DEVICE_POLLING 140440929967SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) 140540929967SGleb Smirnoff ether_poll_deregister(ifp); 140640929967SGleb Smirnoff #endif 140797b9d4baSJohn-Mark Gurney /* These should only be active if attach succeeded */ 1408525e6a87SRuslan Ermilov if (device_is_attached(dev)) { 140997b9d4baSJohn-Mark Gurney RL_LOCK(sc); 141097b9d4baSJohn-Mark Gurney #if 0 141197b9d4baSJohn-Mark Gurney sc->suspended = 1; 141297b9d4baSJohn-Mark Gurney #endif 1413a94100faSBill Paul re_stop(sc); 1414525e6a87SRuslan Ermilov RL_UNLOCK(sc); 1415d1754a9bSJohn Baldwin callout_drain(&sc->rl_stat_callout); 14163d4c1b57SJohn Baldwin taskqueue_drain(taskqueue_fast, &sc->rl_inttask); 14173d4c1b57SJohn Baldwin taskqueue_drain(taskqueue_fast, &sc->rl_txtask); 1418a94100faSBill Paul /* 1419a94100faSBill Paul * Force off the IFF_UP flag here, in case someone 1420a94100faSBill Paul * still had a BPF descriptor attached to this 142197b9d4baSJohn-Mark Gurney * interface. If they do, ether_ifdetach() will cause 1422a94100faSBill Paul * the BPF code to try and clear the promisc mode 1423a94100faSBill Paul * flag, which will bubble down to re_ioctl(), 1424a94100faSBill Paul * which will try to call re_init() again. This will 1425a94100faSBill Paul * turn the NIC back on and restart the MII ticker, 1426a94100faSBill Paul * which will panic the system when the kernel tries 1427a94100faSBill Paul * to invoke the re_tick() function that isn't there 1428a94100faSBill Paul * anymore. 1429a94100faSBill Paul */ 1430a94100faSBill Paul ifp->if_flags &= ~IFF_UP; 1431525e6a87SRuslan Ermilov ether_ifdetach(ifp); 1432a94100faSBill Paul } 1433a94100faSBill Paul if (sc->rl_miibus) 1434a94100faSBill Paul device_delete_child(dev, sc->rl_miibus); 1435a94100faSBill Paul bus_generic_detach(dev); 1436a94100faSBill Paul 143797b9d4baSJohn-Mark Gurney /* 143897b9d4baSJohn-Mark Gurney * The rest is resource deallocation, so we should already be 143997b9d4baSJohn-Mark Gurney * stopped here. 144097b9d4baSJohn-Mark Gurney */ 144197b9d4baSJohn-Mark Gurney 14425774c5ffSPyun YongHyeon for (i = 0; i < RL_MSI_MESSAGES; i++) { 14435774c5ffSPyun YongHyeon if (sc->rl_intrhand[i] != NULL) { 14445774c5ffSPyun YongHyeon bus_teardown_intr(dev, sc->rl_irq[i], 14455774c5ffSPyun YongHyeon sc->rl_intrhand[i]); 14465774c5ffSPyun YongHyeon sc->rl_intrhand[i] = NULL; 14475774c5ffSPyun YongHyeon } 14485774c5ffSPyun YongHyeon } 1449ad4f426eSWarner Losh if (ifp != NULL) 1450ad4f426eSWarner Losh if_free(ifp); 14515774c5ffSPyun YongHyeon if (sc->rl_msi == 0) { 14525774c5ffSPyun YongHyeon if (sc->rl_irq[0] != NULL) { 14535774c5ffSPyun YongHyeon bus_release_resource(dev, SYS_RES_IRQ, 0, 14545774c5ffSPyun YongHyeon sc->rl_irq[0]); 14555774c5ffSPyun YongHyeon sc->rl_irq[0] = NULL; 14565774c5ffSPyun YongHyeon } 14575774c5ffSPyun YongHyeon } else { 14585774c5ffSPyun YongHyeon for (i = 0, rid = 1; i < RL_MSI_MESSAGES; i++, rid++) { 14595774c5ffSPyun YongHyeon if (sc->rl_irq[i] != NULL) { 14605774c5ffSPyun YongHyeon bus_release_resource(dev, SYS_RES_IRQ, rid, 14615774c5ffSPyun YongHyeon sc->rl_irq[i]); 14625774c5ffSPyun YongHyeon sc->rl_irq[i] = NULL; 14635774c5ffSPyun YongHyeon } 14645774c5ffSPyun YongHyeon } 14655774c5ffSPyun YongHyeon pci_release_msi(dev); 14665774c5ffSPyun YongHyeon } 1467a94100faSBill Paul if (sc->rl_res) 1468a94100faSBill Paul bus_release_resource(dev, RL_RES, RL_RID, sc->rl_res); 1469a94100faSBill Paul 1470a94100faSBill Paul /* Unload and free the RX DMA ring memory and map */ 1471a94100faSBill Paul 1472a94100faSBill Paul if (sc->rl_ldata.rl_rx_list_tag) { 1473a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_rx_list_tag, 1474a94100faSBill Paul sc->rl_ldata.rl_rx_list_map); 1475a94100faSBill Paul bus_dmamem_free(sc->rl_ldata.rl_rx_list_tag, 1476a94100faSBill Paul sc->rl_ldata.rl_rx_list, 1477a94100faSBill Paul sc->rl_ldata.rl_rx_list_map); 1478a94100faSBill Paul bus_dma_tag_destroy(sc->rl_ldata.rl_rx_list_tag); 1479a94100faSBill Paul } 1480a94100faSBill Paul 1481a94100faSBill Paul /* Unload and free the TX DMA ring memory and map */ 1482a94100faSBill Paul 1483a94100faSBill Paul if (sc->rl_ldata.rl_tx_list_tag) { 1484a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_tx_list_tag, 1485a94100faSBill Paul sc->rl_ldata.rl_tx_list_map); 1486a94100faSBill Paul bus_dmamem_free(sc->rl_ldata.rl_tx_list_tag, 1487a94100faSBill Paul sc->rl_ldata.rl_tx_list, 1488a94100faSBill Paul sc->rl_ldata.rl_tx_list_map); 1489a94100faSBill Paul bus_dma_tag_destroy(sc->rl_ldata.rl_tx_list_tag); 1490a94100faSBill Paul } 1491a94100faSBill Paul 1492a94100faSBill Paul /* Destroy all the RX and TX buffer maps */ 1493a94100faSBill Paul 1494a94100faSBill Paul if (sc->rl_ldata.rl_mtag) { 1495a94100faSBill Paul for (i = 0; i < RL_TX_DESC_CNT; i++) 1496a94100faSBill Paul bus_dmamap_destroy(sc->rl_ldata.rl_mtag, 1497a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[i]); 1498a94100faSBill Paul for (i = 0; i < RL_RX_DESC_CNT; i++) 1499a94100faSBill Paul bus_dmamap_destroy(sc->rl_ldata.rl_mtag, 1500a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[i]); 1501a94100faSBill Paul bus_dma_tag_destroy(sc->rl_ldata.rl_mtag); 1502a94100faSBill Paul } 1503a94100faSBill Paul 1504a94100faSBill Paul /* Unload and free the stats buffer and map */ 1505a94100faSBill Paul 1506a94100faSBill Paul if (sc->rl_ldata.rl_stag) { 1507a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_stag, 1508a94100faSBill Paul sc->rl_ldata.rl_rx_list_map); 1509a94100faSBill Paul bus_dmamem_free(sc->rl_ldata.rl_stag, 1510a94100faSBill Paul sc->rl_ldata.rl_stats, 1511a94100faSBill Paul sc->rl_ldata.rl_smap); 1512a94100faSBill Paul bus_dma_tag_destroy(sc->rl_ldata.rl_stag); 1513a94100faSBill Paul } 1514a94100faSBill Paul 1515a94100faSBill Paul if (sc->rl_parent_tag) 1516a94100faSBill Paul bus_dma_tag_destroy(sc->rl_parent_tag); 1517a94100faSBill Paul 1518a94100faSBill Paul mtx_destroy(&sc->rl_mtx); 1519a94100faSBill Paul 1520a94100faSBill Paul return (0); 1521a94100faSBill Paul } 1522a94100faSBill Paul 1523a94100faSBill Paul static int 1524a94100faSBill Paul re_newbuf(sc, idx, m) 1525a94100faSBill Paul struct rl_softc *sc; 1526a94100faSBill Paul int idx; 1527a94100faSBill Paul struct mbuf *m; 1528a94100faSBill Paul { 1529a94100faSBill Paul struct rl_dmaload_arg arg; 1530a94100faSBill Paul struct mbuf *n = NULL; 1531a94100faSBill Paul int error; 1532a94100faSBill Paul 1533a94100faSBill Paul if (m == NULL) { 1534a94100faSBill Paul n = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1535a94100faSBill Paul if (n == NULL) 1536a94100faSBill Paul return (ENOBUFS); 1537a94100faSBill Paul m = n; 1538a94100faSBill Paul } else 1539a94100faSBill Paul m->m_data = m->m_ext.ext_buf; 1540a94100faSBill Paul 1541a94100faSBill Paul m->m_len = m->m_pkthdr.len = MCLBYTES; 154222a11c96SJohn-Mark Gurney #ifdef RE_FIXUP_RX 154322a11c96SJohn-Mark Gurney /* 154422a11c96SJohn-Mark Gurney * This is part of an evil trick to deal with non-x86 platforms. 154522a11c96SJohn-Mark Gurney * The RealTek chip requires RX buffers to be aligned on 64-bit 154622a11c96SJohn-Mark Gurney * boundaries, but that will hose non-x86 machines. To get around 154722a11c96SJohn-Mark Gurney * this, we leave some empty space at the start of each buffer 154822a11c96SJohn-Mark Gurney * and for non-x86 hosts, we copy the buffer back six bytes 154922a11c96SJohn-Mark Gurney * to achieve word alignment. This is slightly more efficient 155022a11c96SJohn-Mark Gurney * than allocating a new buffer, copying the contents, and 155122a11c96SJohn-Mark Gurney * discarding the old buffer. 155222a11c96SJohn-Mark Gurney */ 155322a11c96SJohn-Mark Gurney m_adj(m, RE_ETHER_ALIGN); 155422a11c96SJohn-Mark Gurney #endif 1555a94100faSBill Paul arg.rl_idx = idx; 1556a94100faSBill Paul arg.rl_maxsegs = 1; 1557a94100faSBill Paul arg.rl_flags = 0; 1558a94100faSBill Paul arg.rl_ring = sc->rl_ldata.rl_rx_list; 1559a94100faSBill Paul 1560a94100faSBill Paul error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, 1561a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[idx], m, re_dma_map_desc, 1562a94100faSBill Paul &arg, BUS_DMA_NOWAIT); 1563a94100faSBill Paul if (error || arg.rl_maxsegs != 1) { 1564a94100faSBill Paul if (n != NULL) 1565a94100faSBill Paul m_freem(n); 1566b4b95879SMarius Strobl if (arg.rl_maxsegs == 0) 1567b4b95879SMarius Strobl bus_dmamap_unload(sc->rl_ldata.rl_mtag, 1568b4b95879SMarius Strobl sc->rl_ldata.rl_rx_dmamap[idx]); 1569a94100faSBill Paul return (ENOMEM); 1570a94100faSBill Paul } 1571a94100faSBill Paul 1572a94100faSBill Paul sc->rl_ldata.rl_rx_list[idx].rl_cmdstat |= htole32(RL_RDESC_CMD_OWN); 1573a94100faSBill Paul sc->rl_ldata.rl_rx_mbuf[idx] = m; 1574a94100faSBill Paul 1575a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_mtag, 1576a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[idx], 1577a94100faSBill Paul BUS_DMASYNC_PREREAD); 1578a94100faSBill Paul 1579a94100faSBill Paul return (0); 1580a94100faSBill Paul } 1581a94100faSBill Paul 158222a11c96SJohn-Mark Gurney #ifdef RE_FIXUP_RX 158322a11c96SJohn-Mark Gurney static __inline void 158422a11c96SJohn-Mark Gurney re_fixup_rx(m) 158522a11c96SJohn-Mark Gurney struct mbuf *m; 158622a11c96SJohn-Mark Gurney { 158722a11c96SJohn-Mark Gurney int i; 158822a11c96SJohn-Mark Gurney uint16_t *src, *dst; 158922a11c96SJohn-Mark Gurney 159022a11c96SJohn-Mark Gurney src = mtod(m, uint16_t *); 159122a11c96SJohn-Mark Gurney dst = src - (RE_ETHER_ALIGN - ETHER_ALIGN) / sizeof *src; 159222a11c96SJohn-Mark Gurney 159322a11c96SJohn-Mark Gurney for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++) 159422a11c96SJohn-Mark Gurney *dst++ = *src++; 159522a11c96SJohn-Mark Gurney 159622a11c96SJohn-Mark Gurney m->m_data -= RE_ETHER_ALIGN - ETHER_ALIGN; 159722a11c96SJohn-Mark Gurney 159822a11c96SJohn-Mark Gurney return; 159922a11c96SJohn-Mark Gurney } 160022a11c96SJohn-Mark Gurney #endif 160122a11c96SJohn-Mark Gurney 1602a94100faSBill Paul static int 1603a94100faSBill Paul re_tx_list_init(sc) 1604a94100faSBill Paul struct rl_softc *sc; 1605a94100faSBill Paul { 160697b9d4baSJohn-Mark Gurney 160797b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 160897b9d4baSJohn-Mark Gurney 1609a94100faSBill Paul bzero ((char *)sc->rl_ldata.rl_tx_list, RL_TX_LIST_SZ); 1610a94100faSBill Paul bzero ((char *)&sc->rl_ldata.rl_tx_mbuf, 1611a94100faSBill Paul (RL_TX_DESC_CNT * sizeof(struct mbuf *))); 1612a94100faSBill Paul 1613a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag, 1614a94100faSBill Paul sc->rl_ldata.rl_tx_list_map, BUS_DMASYNC_PREWRITE); 1615a94100faSBill Paul sc->rl_ldata.rl_tx_prodidx = 0; 1616a94100faSBill Paul sc->rl_ldata.rl_tx_considx = 0; 1617a94100faSBill Paul sc->rl_ldata.rl_tx_free = RL_TX_DESC_CNT; 1618a94100faSBill Paul 1619a94100faSBill Paul return (0); 1620a94100faSBill Paul } 1621a94100faSBill Paul 1622a94100faSBill Paul static int 1623a94100faSBill Paul re_rx_list_init(sc) 1624a94100faSBill Paul struct rl_softc *sc; 1625a94100faSBill Paul { 1626a94100faSBill Paul int i; 1627a94100faSBill Paul 1628a94100faSBill Paul bzero ((char *)sc->rl_ldata.rl_rx_list, RL_RX_LIST_SZ); 1629a94100faSBill Paul bzero ((char *)&sc->rl_ldata.rl_rx_mbuf, 1630a94100faSBill Paul (RL_RX_DESC_CNT * sizeof(struct mbuf *))); 1631a94100faSBill Paul 1632a94100faSBill Paul for (i = 0; i < RL_RX_DESC_CNT; i++) { 1633a94100faSBill Paul if (re_newbuf(sc, i, NULL) == ENOBUFS) 1634a94100faSBill Paul return (ENOBUFS); 1635a94100faSBill Paul } 1636a94100faSBill Paul 1637a94100faSBill Paul /* Flush the RX descriptors */ 1638a94100faSBill Paul 1639a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag, 1640a94100faSBill Paul sc->rl_ldata.rl_rx_list_map, 1641a94100faSBill Paul BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1642a94100faSBill Paul 1643a94100faSBill Paul sc->rl_ldata.rl_rx_prodidx = 0; 1644a94100faSBill Paul sc->rl_head = sc->rl_tail = NULL; 1645a94100faSBill Paul 1646a94100faSBill Paul return (0); 1647a94100faSBill Paul } 1648a94100faSBill Paul 1649a94100faSBill Paul /* 1650a94100faSBill Paul * RX handler for C+ and 8169. For the gigE chips, we support 1651a94100faSBill Paul * the reception of jumbo frames that have been fragmented 1652a94100faSBill Paul * across multiple 2K mbuf cluster buffers. 1653a94100faSBill Paul */ 1654ed510fb0SBill Paul static int 1655a94100faSBill Paul re_rxeof(sc) 1656a94100faSBill Paul struct rl_softc *sc; 1657a94100faSBill Paul { 1658a94100faSBill Paul struct mbuf *m; 1659a94100faSBill Paul struct ifnet *ifp; 1660a94100faSBill Paul int i, total_len; 1661a94100faSBill Paul struct rl_desc *cur_rx; 1662a94100faSBill Paul u_int32_t rxstat, rxvlan; 1663ed510fb0SBill Paul int maxpkt = 16; 1664a94100faSBill Paul 16655120abbfSSam Leffler RL_LOCK_ASSERT(sc); 16665120abbfSSam Leffler 1667fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 1668a94100faSBill Paul i = sc->rl_ldata.rl_rx_prodidx; 1669a94100faSBill Paul 1670a94100faSBill Paul /* Invalidate the descriptor memory */ 1671a94100faSBill Paul 1672a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag, 1673a94100faSBill Paul sc->rl_ldata.rl_rx_list_map, 1674a94100faSBill Paul BUS_DMASYNC_POSTREAD); 1675a94100faSBill Paul 1676ed510fb0SBill Paul while (!RL_OWN(&sc->rl_ldata.rl_rx_list[i]) && maxpkt) { 1677a94100faSBill Paul cur_rx = &sc->rl_ldata.rl_rx_list[i]; 1678a94100faSBill Paul m = sc->rl_ldata.rl_rx_mbuf[i]; 1679a94100faSBill Paul total_len = RL_RXBYTES(cur_rx); 1680a94100faSBill Paul rxstat = le32toh(cur_rx->rl_cmdstat); 1681a94100faSBill Paul rxvlan = le32toh(cur_rx->rl_vlanctl); 1682a94100faSBill Paul 1683a94100faSBill Paul /* Invalidate the RX mbuf and unload its map */ 1684a94100faSBill Paul 1685a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_mtag, 1686a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[i], 1687a94100faSBill Paul BUS_DMASYNC_POSTWRITE); 1688a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_mtag, 1689a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[i]); 1690a94100faSBill Paul 1691a94100faSBill Paul if (!(rxstat & RL_RDESC_STAT_EOF)) { 169222a11c96SJohn-Mark Gurney m->m_len = RE_RX_DESC_BUFLEN; 1693a94100faSBill Paul if (sc->rl_head == NULL) 1694a94100faSBill Paul sc->rl_head = sc->rl_tail = m; 1695a94100faSBill Paul else { 1696a94100faSBill Paul m->m_flags &= ~M_PKTHDR; 1697a94100faSBill Paul sc->rl_tail->m_next = m; 1698a94100faSBill Paul sc->rl_tail = m; 1699a94100faSBill Paul } 1700a94100faSBill Paul re_newbuf(sc, i, NULL); 1701a94100faSBill Paul RL_DESC_INC(i); 1702a94100faSBill Paul continue; 1703a94100faSBill Paul } 1704a94100faSBill Paul 1705a94100faSBill Paul /* 1706a94100faSBill Paul * NOTE: for the 8139C+, the frame length field 1707a94100faSBill Paul * is always 12 bits in size, but for the gigE chips, 1708a94100faSBill Paul * it is 13 bits (since the max RX frame length is 16K). 1709a94100faSBill Paul * Unfortunately, all 32 bits in the status word 1710a94100faSBill Paul * were already used, so to make room for the extra 1711a94100faSBill Paul * length bit, RealTek took out the 'frame alignment 1712a94100faSBill Paul * error' bit and shifted the other status bits 1713a94100faSBill Paul * over one slot. The OWN, EOR, FS and LS bits are 1714a94100faSBill Paul * still in the same places. We have already extracted 1715a94100faSBill Paul * the frame length and checked the OWN bit, so rather 1716a94100faSBill Paul * than using an alternate bit mapping, we shift the 1717a94100faSBill Paul * status bits one space to the right so we can evaluate 1718a94100faSBill Paul * them using the 8169 status as though it was in the 1719a94100faSBill Paul * same format as that of the 8139C+. 1720a94100faSBill Paul */ 1721a94100faSBill Paul if (sc->rl_type == RL_8169) 1722a94100faSBill Paul rxstat >>= 1; 1723a94100faSBill Paul 172422a11c96SJohn-Mark Gurney /* 172522a11c96SJohn-Mark Gurney * if total_len > 2^13-1, both _RXERRSUM and _GIANT will be 172622a11c96SJohn-Mark Gurney * set, but if CRC is clear, it will still be a valid frame. 172722a11c96SJohn-Mark Gurney */ 172822a11c96SJohn-Mark Gurney if (rxstat & RL_RDESC_STAT_RXERRSUM && !(total_len > 8191 && 172922a11c96SJohn-Mark Gurney (rxstat & RL_RDESC_STAT_ERRS) == RL_RDESC_STAT_GIANT)) { 1730a94100faSBill Paul ifp->if_ierrors++; 1731a94100faSBill Paul /* 1732a94100faSBill Paul * If this is part of a multi-fragment packet, 1733a94100faSBill Paul * discard all the pieces. 1734a94100faSBill Paul */ 1735a94100faSBill Paul if (sc->rl_head != NULL) { 1736a94100faSBill Paul m_freem(sc->rl_head); 1737a94100faSBill Paul sc->rl_head = sc->rl_tail = NULL; 1738a94100faSBill Paul } 1739a94100faSBill Paul re_newbuf(sc, i, m); 1740a94100faSBill Paul RL_DESC_INC(i); 1741a94100faSBill Paul continue; 1742a94100faSBill Paul } 1743a94100faSBill Paul 1744a94100faSBill Paul /* 1745a94100faSBill Paul * If allocating a replacement mbuf fails, 1746a94100faSBill Paul * reload the current one. 1747a94100faSBill Paul */ 1748a94100faSBill Paul 1749a94100faSBill Paul if (re_newbuf(sc, i, NULL)) { 1750a94100faSBill Paul ifp->if_ierrors++; 1751a94100faSBill Paul if (sc->rl_head != NULL) { 1752a94100faSBill Paul m_freem(sc->rl_head); 1753a94100faSBill Paul sc->rl_head = sc->rl_tail = NULL; 1754a94100faSBill Paul } 1755a94100faSBill Paul re_newbuf(sc, i, m); 1756a94100faSBill Paul RL_DESC_INC(i); 1757a94100faSBill Paul continue; 1758a94100faSBill Paul } 1759a94100faSBill Paul 1760a94100faSBill Paul RL_DESC_INC(i); 1761a94100faSBill Paul 1762a94100faSBill Paul if (sc->rl_head != NULL) { 176322a11c96SJohn-Mark Gurney m->m_len = total_len % RE_RX_DESC_BUFLEN; 176422a11c96SJohn-Mark Gurney if (m->m_len == 0) 176522a11c96SJohn-Mark Gurney m->m_len = RE_RX_DESC_BUFLEN; 1766a94100faSBill Paul /* 1767a94100faSBill Paul * Special case: if there's 4 bytes or less 1768a94100faSBill Paul * in this buffer, the mbuf can be discarded: 1769a94100faSBill Paul * the last 4 bytes is the CRC, which we don't 1770a94100faSBill Paul * care about anyway. 1771a94100faSBill Paul */ 1772a94100faSBill Paul if (m->m_len <= ETHER_CRC_LEN) { 1773a94100faSBill Paul sc->rl_tail->m_len -= 1774a94100faSBill Paul (ETHER_CRC_LEN - m->m_len); 1775a94100faSBill Paul m_freem(m); 1776a94100faSBill Paul } else { 1777a94100faSBill Paul m->m_len -= ETHER_CRC_LEN; 1778a94100faSBill Paul m->m_flags &= ~M_PKTHDR; 1779a94100faSBill Paul sc->rl_tail->m_next = m; 1780a94100faSBill Paul } 1781a94100faSBill Paul m = sc->rl_head; 1782a94100faSBill Paul sc->rl_head = sc->rl_tail = NULL; 1783a94100faSBill Paul m->m_pkthdr.len = total_len - ETHER_CRC_LEN; 1784a94100faSBill Paul } else 1785a94100faSBill Paul m->m_pkthdr.len = m->m_len = 1786a94100faSBill Paul (total_len - ETHER_CRC_LEN); 1787a94100faSBill Paul 178822a11c96SJohn-Mark Gurney #ifdef RE_FIXUP_RX 178922a11c96SJohn-Mark Gurney re_fixup_rx(m); 179022a11c96SJohn-Mark Gurney #endif 1791a94100faSBill Paul ifp->if_ipackets++; 1792a94100faSBill Paul m->m_pkthdr.rcvif = ifp; 1793a94100faSBill Paul 1794a94100faSBill Paul /* Do RX checksumming if enabled */ 1795a94100faSBill Paul 1796a94100faSBill Paul if (ifp->if_capenable & IFCAP_RXCSUM) { 1797a94100faSBill Paul 1798a94100faSBill Paul /* Check IP header checksum */ 1799a94100faSBill Paul if (rxstat & RL_RDESC_STAT_PROTOID) 1800a94100faSBill Paul m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 1801a94100faSBill Paul if (!(rxstat & RL_RDESC_STAT_IPSUMBAD)) 1802a94100faSBill Paul m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 1803a94100faSBill Paul 1804a94100faSBill Paul /* Check TCP/UDP checksum */ 1805a94100faSBill Paul if ((RL_TCPPKT(rxstat) && 1806a94100faSBill Paul !(rxstat & RL_RDESC_STAT_TCPSUMBAD)) || 1807a94100faSBill Paul (RL_UDPPKT(rxstat) && 1808a94100faSBill Paul !(rxstat & RL_RDESC_STAT_UDPSUMBAD))) { 1809a94100faSBill Paul m->m_pkthdr.csum_flags |= 1810a94100faSBill Paul CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 1811a94100faSBill Paul m->m_pkthdr.csum_data = 0xffff; 1812a94100faSBill Paul } 1813a94100faSBill Paul } 1814ed510fb0SBill Paul maxpkt--; 1815d147662cSGleb Smirnoff if (rxvlan & RL_RDESC_VLANCTL_TAG) { 181678ba57b9SAndre Oppermann m->m_pkthdr.ether_vtag = 181778ba57b9SAndre Oppermann ntohs((rxvlan & RL_RDESC_VLANCTL_DATA)); 181878ba57b9SAndre Oppermann m->m_flags |= M_VLANTAG; 1819d147662cSGleb Smirnoff } 18205120abbfSSam Leffler RL_UNLOCK(sc); 1821a94100faSBill Paul (*ifp->if_input)(ifp, m); 18225120abbfSSam Leffler RL_LOCK(sc); 1823a94100faSBill Paul } 1824a94100faSBill Paul 1825a94100faSBill Paul /* Flush the RX DMA ring */ 1826a94100faSBill Paul 1827a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag, 1828a94100faSBill Paul sc->rl_ldata.rl_rx_list_map, 1829a94100faSBill Paul BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1830a94100faSBill Paul 1831a94100faSBill Paul sc->rl_ldata.rl_rx_prodidx = i; 1832ed510fb0SBill Paul 1833ed510fb0SBill Paul if (maxpkt) 1834ed510fb0SBill Paul return(EAGAIN); 1835ed510fb0SBill Paul 1836ed510fb0SBill Paul return(0); 1837a94100faSBill Paul } 1838a94100faSBill Paul 1839a94100faSBill Paul static void 1840a94100faSBill Paul re_txeof(sc) 1841a94100faSBill Paul struct rl_softc *sc; 1842a94100faSBill Paul { 1843a94100faSBill Paul struct ifnet *ifp; 1844a94100faSBill Paul u_int32_t txstat; 1845a94100faSBill Paul int idx; 1846a94100faSBill Paul 1847fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 1848a94100faSBill Paul idx = sc->rl_ldata.rl_tx_considx; 1849a94100faSBill Paul 1850a94100faSBill Paul /* Invalidate the TX descriptor list */ 1851a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag, 1852a94100faSBill Paul sc->rl_ldata.rl_tx_list_map, 1853a94100faSBill Paul BUS_DMASYNC_POSTREAD); 1854a94100faSBill Paul 1855ed510fb0SBill Paul while (sc->rl_ldata.rl_tx_free < RL_TX_DESC_CNT) { 1856a94100faSBill Paul txstat = le32toh(sc->rl_ldata.rl_tx_list[idx].rl_cmdstat); 1857a94100faSBill Paul if (txstat & RL_TDESC_CMD_OWN) 1858a94100faSBill Paul break; 1859a94100faSBill Paul 1860ed510fb0SBill Paul sc->rl_ldata.rl_tx_list[idx].rl_bufaddr_lo = 0; 1861ed510fb0SBill Paul 1862a94100faSBill Paul /* 1863a94100faSBill Paul * We only stash mbufs in the last descriptor 1864a94100faSBill Paul * in a fragment chain, which also happens to 1865a94100faSBill Paul * be the only place where the TX status bits 1866a94100faSBill Paul * are valid. 1867a94100faSBill Paul */ 1868a94100faSBill Paul if (txstat & RL_TDESC_CMD_EOF) { 1869a94100faSBill Paul m_freem(sc->rl_ldata.rl_tx_mbuf[idx]); 1870a94100faSBill Paul sc->rl_ldata.rl_tx_mbuf[idx] = NULL; 1871a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_mtag, 1872a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[idx]); 1873a94100faSBill Paul if (txstat & (RL_TDESC_STAT_EXCESSCOL| 1874a94100faSBill Paul RL_TDESC_STAT_COLCNT)) 1875a94100faSBill Paul ifp->if_collisions++; 1876a94100faSBill Paul if (txstat & RL_TDESC_STAT_TXERRSUM) 1877a94100faSBill Paul ifp->if_oerrors++; 1878a94100faSBill Paul else 1879a94100faSBill Paul ifp->if_opackets++; 1880a94100faSBill Paul } 1881a94100faSBill Paul sc->rl_ldata.rl_tx_free++; 1882a94100faSBill Paul RL_DESC_INC(idx); 1883a94100faSBill Paul } 1884b4b95879SMarius Strobl sc->rl_ldata.rl_tx_considx = idx; 1885a94100faSBill Paul 1886a94100faSBill Paul /* No changes made to the TX ring, so no flush needed */ 1887a94100faSBill Paul 1888b4b95879SMarius Strobl if (sc->rl_ldata.rl_tx_free > RL_TX_DESC_THLD) 188913f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1890a94100faSBill Paul 1891b4b95879SMarius Strobl if (sc->rl_ldata.rl_tx_free < RL_TX_DESC_CNT) { 18920fc4974fSBill Paul /* 1893b4b95879SMarius Strobl * Some chips will ignore a second TX request issued 1894b4b95879SMarius Strobl * while an existing transmission is in progress. If 1895b4b95879SMarius Strobl * the transmitter goes idle but there are still 1896b4b95879SMarius Strobl * packets waiting to be sent, we need to restart the 1897b4b95879SMarius Strobl * channel here to flush them out. This only seems to 1898b4b95879SMarius Strobl * be required with the PCIe devices. 18990fc4974fSBill Paul */ 19000fc4974fSBill Paul CSR_WRITE_1(sc, sc->rl_txstart, RL_TXSTART_START); 19010fc4974fSBill Paul 1902ed510fb0SBill Paul #ifdef RE_TX_MODERATION 1903a94100faSBill Paul /* 1904b4b95879SMarius Strobl * If not all descriptors have been reaped yet, reload 1905b4b95879SMarius Strobl * the timer so that we will eventually get another 1906a94100faSBill Paul * interrupt that will cause us to re-enter this routine. 1907a94100faSBill Paul * This is done in case the transmitter has gone idle. 1908a94100faSBill Paul */ 1909a94100faSBill Paul CSR_WRITE_4(sc, RL_TIMERCNT, 1); 1910ed510fb0SBill Paul #endif 1911b4b95879SMarius Strobl } else 1912b4b95879SMarius Strobl sc->rl_watchdog_timer = 0; 1913a94100faSBill Paul } 1914a94100faSBill Paul 1915a94100faSBill Paul static void 1916a94100faSBill Paul re_tick(xsc) 1917a94100faSBill Paul void *xsc; 1918a94100faSBill Paul { 1919a94100faSBill Paul struct rl_softc *sc; 1920d1754a9bSJohn Baldwin struct mii_data *mii; 1921ed510fb0SBill Paul struct ifnet *ifp; 1922a94100faSBill Paul 1923a94100faSBill Paul sc = xsc; 1924ed510fb0SBill Paul ifp = sc->rl_ifp; 192597b9d4baSJohn-Mark Gurney 192697b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 192797b9d4baSJohn-Mark Gurney 19281d545c7aSMarius Strobl re_watchdog(sc); 1929a94100faSBill Paul 19301d545c7aSMarius Strobl mii = device_get_softc(sc->rl_miibus); 1931a94100faSBill Paul mii_tick(mii); 1932ed510fb0SBill Paul if (sc->rl_link) { 1933ed510fb0SBill Paul if (!(mii->mii_media_status & IFM_ACTIVE)) 1934ed510fb0SBill Paul sc->rl_link = 0; 1935ed510fb0SBill Paul } else { 1936ed510fb0SBill Paul if (mii->mii_media_status & IFM_ACTIVE && 1937ed510fb0SBill Paul IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1938ed510fb0SBill Paul sc->rl_link = 1; 1939ed510fb0SBill Paul if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1940ed510fb0SBill Paul taskqueue_enqueue_fast(taskqueue_fast, 1941ed510fb0SBill Paul &sc->rl_txtask); 1942ed510fb0SBill Paul } 1943ed510fb0SBill Paul } 1944a94100faSBill Paul 1945d1754a9bSJohn Baldwin callout_reset(&sc->rl_stat_callout, hz, re_tick, sc); 1946a94100faSBill Paul } 1947a94100faSBill Paul 1948a94100faSBill Paul #ifdef DEVICE_POLLING 1949a94100faSBill Paul static void 1950a94100faSBill Paul re_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1951a94100faSBill Paul { 1952a94100faSBill Paul struct rl_softc *sc = ifp->if_softc; 1953a94100faSBill Paul 1954a94100faSBill Paul RL_LOCK(sc); 195540929967SGleb Smirnoff if (ifp->if_drv_flags & IFF_DRV_RUNNING) 195697b9d4baSJohn-Mark Gurney re_poll_locked(ifp, cmd, count); 195797b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 195897b9d4baSJohn-Mark Gurney } 195997b9d4baSJohn-Mark Gurney 196097b9d4baSJohn-Mark Gurney static void 196197b9d4baSJohn-Mark Gurney re_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count) 196297b9d4baSJohn-Mark Gurney { 196397b9d4baSJohn-Mark Gurney struct rl_softc *sc = ifp->if_softc; 196497b9d4baSJohn-Mark Gurney 196597b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 196697b9d4baSJohn-Mark Gurney 1967a94100faSBill Paul sc->rxcycles = count; 1968a94100faSBill Paul re_rxeof(sc); 1969a94100faSBill Paul re_txeof(sc); 1970a94100faSBill Paul 197137652939SMax Laier if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1972ed510fb0SBill Paul taskqueue_enqueue_fast(taskqueue_fast, &sc->rl_txtask); 1973a94100faSBill Paul 1974a94100faSBill Paul if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */ 1975a94100faSBill Paul u_int16_t status; 1976a94100faSBill Paul 1977a94100faSBill Paul status = CSR_READ_2(sc, RL_ISR); 1978a94100faSBill Paul if (status == 0xffff) 197997b9d4baSJohn-Mark Gurney return; 1980a94100faSBill Paul if (status) 1981a94100faSBill Paul CSR_WRITE_2(sc, RL_ISR, status); 1982a94100faSBill Paul 1983a94100faSBill Paul /* 1984a94100faSBill Paul * XXX check behaviour on receiver stalls. 1985a94100faSBill Paul */ 1986a94100faSBill Paul 1987a94100faSBill Paul if (status & RL_ISR_SYSTEM_ERR) { 1988a94100faSBill Paul re_reset(sc); 198997b9d4baSJohn-Mark Gurney re_init_locked(sc); 1990a94100faSBill Paul } 1991a94100faSBill Paul } 1992a94100faSBill Paul } 1993a94100faSBill Paul #endif /* DEVICE_POLLING */ 1994a94100faSBill Paul 1995ef544f63SPaolo Pisati static int 1996a94100faSBill Paul re_intr(arg) 1997a94100faSBill Paul void *arg; 1998a94100faSBill Paul { 1999a94100faSBill Paul struct rl_softc *sc; 2000ed510fb0SBill Paul uint16_t status; 2001a94100faSBill Paul 2002a94100faSBill Paul sc = arg; 2003ed510fb0SBill Paul 2004ed510fb0SBill Paul status = CSR_READ_2(sc, RL_ISR); 2005498bd0d3SBill Paul if (status == 0xFFFF || (status & RL_INTRS_CPLUS) == 0) 2006ef544f63SPaolo Pisati return (FILTER_STRAY); 2007ed510fb0SBill Paul CSR_WRITE_2(sc, RL_IMR, 0); 2008ed510fb0SBill Paul 2009ed510fb0SBill Paul taskqueue_enqueue_fast(taskqueue_fast, &sc->rl_inttask); 2010ed510fb0SBill Paul 2011ef544f63SPaolo Pisati return (FILTER_HANDLED); 2012ed510fb0SBill Paul } 2013ed510fb0SBill Paul 2014ed510fb0SBill Paul static void 2015ed510fb0SBill Paul re_int_task(arg, npending) 2016ed510fb0SBill Paul void *arg; 2017ed510fb0SBill Paul int npending; 2018ed510fb0SBill Paul { 2019ed510fb0SBill Paul struct rl_softc *sc; 2020ed510fb0SBill Paul struct ifnet *ifp; 2021ed510fb0SBill Paul u_int16_t status; 2022ed510fb0SBill Paul int rval = 0; 2023ed510fb0SBill Paul 2024ed510fb0SBill Paul sc = arg; 2025ed510fb0SBill Paul ifp = sc->rl_ifp; 2026a94100faSBill Paul 2027a94100faSBill Paul RL_LOCK(sc); 202897b9d4baSJohn-Mark Gurney 2029a94100faSBill Paul status = CSR_READ_2(sc, RL_ISR); 2030a94100faSBill Paul CSR_WRITE_2(sc, RL_ISR, status); 2031a94100faSBill Paul 2032ed510fb0SBill Paul if (sc->suspended || !(ifp->if_flags & IFF_UP)) { 2033ed510fb0SBill Paul RL_UNLOCK(sc); 2034ed510fb0SBill Paul return; 2035ed510fb0SBill Paul } 2036a94100faSBill Paul 2037ed510fb0SBill Paul #ifdef DEVICE_POLLING 2038ed510fb0SBill Paul if (ifp->if_capenable & IFCAP_POLLING) { 2039ed510fb0SBill Paul RL_UNLOCK(sc); 2040ed510fb0SBill Paul return; 2041ed510fb0SBill Paul } 2042ed510fb0SBill Paul #endif 2043a94100faSBill Paul 2044ed510fb0SBill Paul if (status & (RL_ISR_RX_OK|RL_ISR_RX_ERR|RL_ISR_FIFO_OFLOW)) 2045ed510fb0SBill Paul rval = re_rxeof(sc); 2046ed510fb0SBill Paul 2047ed510fb0SBill Paul #ifdef RE_TX_MODERATION 2048ed510fb0SBill Paul if (status & (RL_ISR_TIMEOUT_EXPIRED| 2049ed510fb0SBill Paul #else 2050ed510fb0SBill Paul if (status & (RL_ISR_TX_OK| 2051ed510fb0SBill Paul #endif 2052ed510fb0SBill Paul RL_ISR_TX_ERR|RL_ISR_TX_DESC_UNAVAIL)) 2053a94100faSBill Paul re_txeof(sc); 2054a94100faSBill Paul 2055a94100faSBill Paul if (status & RL_ISR_SYSTEM_ERR) { 2056a94100faSBill Paul re_reset(sc); 205797b9d4baSJohn-Mark Gurney re_init_locked(sc); 2058a94100faSBill Paul } 2059a94100faSBill Paul 2060a94100faSBill Paul if (status & RL_ISR_LINKCHG) { 2061d1754a9bSJohn Baldwin callout_stop(&sc->rl_stat_callout); 2062d1754a9bSJohn Baldwin re_tick(sc); 2063a94100faSBill Paul } 2064a94100faSBill Paul 206552732175SMax Laier if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 2066ed510fb0SBill Paul taskqueue_enqueue_fast(taskqueue_fast, &sc->rl_txtask); 2067a94100faSBill Paul 2068a94100faSBill Paul RL_UNLOCK(sc); 2069ed510fb0SBill Paul 2070ed510fb0SBill Paul if ((CSR_READ_2(sc, RL_ISR) & RL_INTRS_CPLUS) || rval) { 2071ed510fb0SBill Paul taskqueue_enqueue_fast(taskqueue_fast, &sc->rl_inttask); 2072ed510fb0SBill Paul return; 2073ed510fb0SBill Paul } 2074ed510fb0SBill Paul 2075ed510fb0SBill Paul CSR_WRITE_2(sc, RL_IMR, RL_INTRS_CPLUS); 2076ed510fb0SBill Paul 2077ed510fb0SBill Paul return; 2078a94100faSBill Paul } 2079a94100faSBill Paul 2080a94100faSBill Paul static int 2081a94100faSBill Paul re_encap(sc, m_head, idx) 2082a94100faSBill Paul struct rl_softc *sc; 208380a2a305SJohn-Mark Gurney struct mbuf **m_head; 2084a94100faSBill Paul int *idx; 2085a94100faSBill Paul { 2086a94100faSBill Paul struct mbuf *m_new = NULL; 2087a94100faSBill Paul struct rl_dmaload_arg arg; 2088a94100faSBill Paul bus_dmamap_t map; 2089a94100faSBill Paul int error; 2090a94100faSBill Paul 209197b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 209297b9d4baSJohn-Mark Gurney 2093b4b95879SMarius Strobl if (sc->rl_ldata.rl_tx_free <= RL_TX_DESC_THLD) 2094a94100faSBill Paul return (EFBIG); 2095a94100faSBill Paul 2096a94100faSBill Paul /* 2097a94100faSBill Paul * Set up checksum offload. Note: checksum offload bits must 2098a94100faSBill Paul * appear in all descriptors of a multi-descriptor transmit 209922a11c96SJohn-Mark Gurney * attempt. This is according to testing done with an 8169 210022a11c96SJohn-Mark Gurney * chip. This is a requirement. 2101a94100faSBill Paul */ 2102a94100faSBill Paul 2103a94100faSBill Paul arg.rl_flags = 0; 2104a94100faSBill Paul 2105dc74159dSPyun YongHyeon if (((*m_head)->m_pkthdr.csum_flags & CSUM_TSO) != 0) 2106dc74159dSPyun YongHyeon arg.rl_flags = RL_TDESC_CMD_LGSEND | 2107dc74159dSPyun YongHyeon ((uint32_t)(*m_head)->m_pkthdr.tso_segsz << 2108dc74159dSPyun YongHyeon RL_TDESC_CMD_MSSVAL_SHIFT); 2109dc74159dSPyun YongHyeon else { 211080a2a305SJohn-Mark Gurney if ((*m_head)->m_pkthdr.csum_flags & CSUM_IP) 2111a94100faSBill Paul arg.rl_flags |= RL_TDESC_CMD_IPCSUM; 211280a2a305SJohn-Mark Gurney if ((*m_head)->m_pkthdr.csum_flags & CSUM_TCP) 2113a94100faSBill Paul arg.rl_flags |= RL_TDESC_CMD_TCPCSUM; 211480a2a305SJohn-Mark Gurney if ((*m_head)->m_pkthdr.csum_flags & CSUM_UDP) 2115a94100faSBill Paul arg.rl_flags |= RL_TDESC_CMD_UDPCSUM; 2116dc74159dSPyun YongHyeon } 2117a94100faSBill Paul 2118a94100faSBill Paul arg.rl_idx = *idx; 2119a94100faSBill Paul arg.rl_maxsegs = sc->rl_ldata.rl_tx_free; 2120b4b95879SMarius Strobl if (arg.rl_maxsegs > RL_TX_DESC_THLD) 2121b4b95879SMarius Strobl arg.rl_maxsegs -= RL_TX_DESC_THLD; 2122a94100faSBill Paul arg.rl_ring = sc->rl_ldata.rl_tx_list; 2123a94100faSBill Paul 2124a94100faSBill Paul map = sc->rl_ldata.rl_tx_dmamap[*idx]; 21250fc4974fSBill Paul 21260fc4974fSBill Paul /* 21270fc4974fSBill Paul * With some of the RealTek chips, using the checksum offload 21280fc4974fSBill Paul * support in conjunction with the autopadding feature results 21290fc4974fSBill Paul * in the transmission of corrupt frames. For example, if we 21300fc4974fSBill Paul * need to send a really small IP fragment that's less than 60 21310fc4974fSBill Paul * bytes in size, and IP header checksumming is enabled, the 21320fc4974fSBill Paul * resulting ethernet frame that appears on the wire will 21330fc4974fSBill Paul * have garbled payload. To work around this, if TX checksum 21340fc4974fSBill Paul * offload is enabled, we always manually pad short frames out 21350fc4974fSBill Paul * to the minimum ethernet frame size. We do this by pretending 21360fc4974fSBill Paul * the mbuf chain has too many fragments so the coalescing code 21370fc4974fSBill Paul * below can assemble the packet into a single buffer that's 21380fc4974fSBill Paul * padded out to the mininum frame size. 2139e2bcb489SBill Paul * 2140e2bcb489SBill Paul * Note: this appears unnecessary for TCP, and doing it for TCP 2141e2bcb489SBill Paul * with PCIe adapters seems to result in bad checksums. 21420fc4974fSBill Paul */ 2143e2bcb489SBill Paul 2144e2bcb489SBill Paul if (arg.rl_flags && !(arg.rl_flags & RL_TDESC_CMD_TCPCSUM) && 2145e2bcb489SBill Paul (*m_head)->m_pkthdr.len < RL_MIN_FRAMELEN) 21460fc4974fSBill Paul error = EFBIG; 21470fc4974fSBill Paul else 2148a94100faSBill Paul error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, map, 214980a2a305SJohn-Mark Gurney *m_head, re_dma_map_desc, &arg, BUS_DMA_NOWAIT); 2150a94100faSBill Paul 2151a94100faSBill Paul if (error && error != EFBIG) { 21526b9f5c94SGleb Smirnoff device_printf(sc->rl_dev, "can't map mbuf (error %d)\n", error); 2153a94100faSBill Paul return (ENOBUFS); 2154a94100faSBill Paul } 2155a94100faSBill Paul 2156a94100faSBill Paul /* Too many segments to map, coalesce into a single mbuf */ 2157a94100faSBill Paul 2158a94100faSBill Paul if (error || arg.rl_maxsegs == 0) { 2159b4b95879SMarius Strobl if (arg.rl_maxsegs == 0) 2160b4b95879SMarius Strobl bus_dmamap_unload(sc->rl_ldata.rl_mtag, map); 216180a2a305SJohn-Mark Gurney m_new = m_defrag(*m_head, M_DONTWAIT); 2162b4b95879SMarius Strobl if (m_new == NULL) { 2163b4b95879SMarius Strobl m_freem(*m_head); 2164b4b95879SMarius Strobl *m_head = NULL; 216580a2a305SJohn-Mark Gurney return (ENOBUFS); 2166b4b95879SMarius Strobl } 216780a2a305SJohn-Mark Gurney *m_head = m_new; 2168a94100faSBill Paul 21690fc4974fSBill Paul /* 21700fc4974fSBill Paul * Manually pad short frames, and zero the pad space 21710fc4974fSBill Paul * to avoid leaking data. 21720fc4974fSBill Paul */ 21730fc4974fSBill Paul if (m_new->m_pkthdr.len < RL_MIN_FRAMELEN) { 21740fc4974fSBill Paul bzero(mtod(m_new, char *) + m_new->m_pkthdr.len, 21750fc4974fSBill Paul RL_MIN_FRAMELEN - m_new->m_pkthdr.len); 21760fc4974fSBill Paul m_new->m_pkthdr.len += RL_MIN_FRAMELEN - 21770fc4974fSBill Paul m_new->m_pkthdr.len; 21780fc4974fSBill Paul m_new->m_len = m_new->m_pkthdr.len; 21790fc4974fSBill Paul } 21800fc4974fSBill Paul 2181b4b95879SMarius Strobl /* Note that we'll run over RL_TX_DESC_THLD here. */ 2182a94100faSBill Paul arg.rl_maxsegs = sc->rl_ldata.rl_tx_free; 2183a94100faSBill Paul error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, map, 218480a2a305SJohn-Mark Gurney *m_head, re_dma_map_desc, &arg, BUS_DMA_NOWAIT); 2185b4b95879SMarius Strobl if (error || arg.rl_maxsegs == 0) { 2186b4b95879SMarius Strobl device_printf(sc->rl_dev, 2187b4b95879SMarius Strobl "can't map defragmented mbuf (error %d)\n", error); 2188b4b95879SMarius Strobl m_freem(m_new); 2189b4b95879SMarius Strobl *m_head = NULL; 2190b4b95879SMarius Strobl if (arg.rl_maxsegs == 0) 2191b4b95879SMarius Strobl bus_dmamap_unload(sc->rl_ldata.rl_mtag, map); 2192a94100faSBill Paul return (EFBIG); 2193a94100faSBill Paul } 2194a94100faSBill Paul } 2195a94100faSBill Paul 2196a94100faSBill Paul /* 2197a94100faSBill Paul * Insure that the map for this transmission 2198a94100faSBill Paul * is placed at the array index of the last descriptor 219922a11c96SJohn-Mark Gurney * in this chain. (Swap last and first dmamaps.) 2200a94100faSBill Paul */ 2201a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[*idx] = 2202a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[arg.rl_idx]; 2203a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[arg.rl_idx] = map; 2204a94100faSBill Paul 220580a2a305SJohn-Mark Gurney sc->rl_ldata.rl_tx_mbuf[arg.rl_idx] = *m_head; 2206a94100faSBill Paul sc->rl_ldata.rl_tx_free -= arg.rl_maxsegs; 2207a94100faSBill Paul 2208a94100faSBill Paul /* 2209a94100faSBill Paul * Set up hardware VLAN tagging. Note: vlan tag info must 2210a94100faSBill Paul * appear in the first descriptor of a multi-descriptor 2211a94100faSBill Paul * transmission attempt. 2212a94100faSBill Paul */ 221378ba57b9SAndre Oppermann if ((*m_head)->m_flags & M_VLANTAG) 2214a94100faSBill Paul sc->rl_ldata.rl_tx_list[*idx].rl_vlanctl = 221578ba57b9SAndre Oppermann htole32(htons((*m_head)->m_pkthdr.ether_vtag) | 221678ba57b9SAndre Oppermann RL_TDESC_VLANCTL_TAG); 2217a94100faSBill Paul 2218a94100faSBill Paul /* Transfer ownership of packet to the chip. */ 2219a94100faSBill Paul 2220a94100faSBill Paul sc->rl_ldata.rl_tx_list[arg.rl_idx].rl_cmdstat |= 2221a94100faSBill Paul htole32(RL_TDESC_CMD_OWN); 2222a94100faSBill Paul if (*idx != arg.rl_idx) 2223a94100faSBill Paul sc->rl_ldata.rl_tx_list[*idx].rl_cmdstat |= 2224a94100faSBill Paul htole32(RL_TDESC_CMD_OWN); 2225a94100faSBill Paul 2226a94100faSBill Paul RL_DESC_INC(arg.rl_idx); 2227a94100faSBill Paul *idx = arg.rl_idx; 2228a94100faSBill Paul 2229a94100faSBill Paul return (0); 2230a94100faSBill Paul } 2231a94100faSBill Paul 223297b9d4baSJohn-Mark Gurney static void 2233ed510fb0SBill Paul re_tx_task(arg, npending) 2234ed510fb0SBill Paul void *arg; 2235ed510fb0SBill Paul int npending; 223697b9d4baSJohn-Mark Gurney { 2237ed510fb0SBill Paul struct ifnet *ifp; 223897b9d4baSJohn-Mark Gurney 2239ed510fb0SBill Paul ifp = arg; 2240ed510fb0SBill Paul re_start(ifp); 2241ed510fb0SBill Paul 2242ed510fb0SBill Paul return; 224397b9d4baSJohn-Mark Gurney } 224497b9d4baSJohn-Mark Gurney 2245a94100faSBill Paul /* 2246a94100faSBill Paul * Main transmit routine for C+ and gigE NICs. 2247a94100faSBill Paul */ 2248a94100faSBill Paul static void 2249ed510fb0SBill Paul re_start(ifp) 2250a94100faSBill Paul struct ifnet *ifp; 2251a94100faSBill Paul { 2252a94100faSBill Paul struct rl_softc *sc; 2253a94100faSBill Paul struct mbuf *m_head = NULL; 225452732175SMax Laier int idx, queued = 0; 2255a94100faSBill Paul 2256a94100faSBill Paul sc = ifp->if_softc; 225797b9d4baSJohn-Mark Gurney 2258ed510fb0SBill Paul RL_LOCK(sc); 2259ed510fb0SBill Paul 2260ed510fb0SBill Paul if (!sc->rl_link || ifp->if_drv_flags & IFF_DRV_OACTIVE) { 2261ed510fb0SBill Paul RL_UNLOCK(sc); 2262ed510fb0SBill Paul return; 2263ed510fb0SBill Paul } 2264a94100faSBill Paul 2265a94100faSBill Paul idx = sc->rl_ldata.rl_tx_prodidx; 2266a94100faSBill Paul 2267a94100faSBill Paul while (sc->rl_ldata.rl_tx_mbuf[idx] == NULL) { 226852732175SMax Laier IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 2269a94100faSBill Paul if (m_head == NULL) 2270a94100faSBill Paul break; 2271a94100faSBill Paul 227280a2a305SJohn-Mark Gurney if (re_encap(sc, &m_head, &idx)) { 2273b4b95879SMarius Strobl if (m_head == NULL) 2274b4b95879SMarius Strobl break; 227552732175SMax Laier IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 227613f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2277a94100faSBill Paul break; 2278a94100faSBill Paul } 2279a94100faSBill Paul 2280a94100faSBill Paul /* 2281a94100faSBill Paul * If there's a BPF listener, bounce a copy of this frame 2282a94100faSBill Paul * to him. 2283a94100faSBill Paul */ 228459a0d28bSChristian S.J. Peron ETHER_BPF_MTAP(ifp, m_head); 228552732175SMax Laier 228652732175SMax Laier queued++; 2287a94100faSBill Paul } 2288a94100faSBill Paul 2289ed510fb0SBill Paul if (queued == 0) { 2290ed510fb0SBill Paul #ifdef RE_TX_MODERATION 2291ed510fb0SBill Paul if (sc->rl_ldata.rl_tx_free != RL_TX_DESC_CNT) 2292ed510fb0SBill Paul CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2293ed510fb0SBill Paul #endif 2294ed510fb0SBill Paul RL_UNLOCK(sc); 229552732175SMax Laier return; 2296ed510fb0SBill Paul } 229752732175SMax Laier 2298a94100faSBill Paul /* Flush the TX descriptors */ 2299a94100faSBill Paul 2300a94100faSBill Paul bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag, 2301a94100faSBill Paul sc->rl_ldata.rl_tx_list_map, 2302a94100faSBill Paul BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 2303a94100faSBill Paul 2304a94100faSBill Paul sc->rl_ldata.rl_tx_prodidx = idx; 2305a94100faSBill Paul 23060fc4974fSBill Paul CSR_WRITE_1(sc, sc->rl_txstart, RL_TXSTART_START); 2307a94100faSBill Paul 2308ed510fb0SBill Paul #ifdef RE_TX_MODERATION 2309a94100faSBill Paul /* 2310a94100faSBill Paul * Use the countdown timer for interrupt moderation. 2311a94100faSBill Paul * 'TX done' interrupts are disabled. Instead, we reset the 2312a94100faSBill Paul * countdown timer, which will begin counting until it hits 2313a94100faSBill Paul * the value in the TIMERINT register, and then trigger an 2314a94100faSBill Paul * interrupt. Each time we write to the TIMERCNT register, 2315a94100faSBill Paul * the timer count is reset to 0. 2316a94100faSBill Paul */ 2317a94100faSBill Paul CSR_WRITE_4(sc, RL_TIMERCNT, 1); 2318ed510fb0SBill Paul #endif 2319a94100faSBill Paul 2320a94100faSBill Paul /* 2321a94100faSBill Paul * Set a timeout in case the chip goes out to lunch. 2322a94100faSBill Paul */ 23231d545c7aSMarius Strobl sc->rl_watchdog_timer = 5; 2324ed510fb0SBill Paul 2325ed510fb0SBill Paul RL_UNLOCK(sc); 2326ed510fb0SBill Paul 2327ed510fb0SBill Paul return; 2328a94100faSBill Paul } 2329a94100faSBill Paul 2330a94100faSBill Paul static void 2331a94100faSBill Paul re_init(xsc) 2332a94100faSBill Paul void *xsc; 2333a94100faSBill Paul { 2334a94100faSBill Paul struct rl_softc *sc = xsc; 233597b9d4baSJohn-Mark Gurney 233697b9d4baSJohn-Mark Gurney RL_LOCK(sc); 233797b9d4baSJohn-Mark Gurney re_init_locked(sc); 233897b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 233997b9d4baSJohn-Mark Gurney } 234097b9d4baSJohn-Mark Gurney 234197b9d4baSJohn-Mark Gurney static void 234297b9d4baSJohn-Mark Gurney re_init_locked(sc) 234397b9d4baSJohn-Mark Gurney struct rl_softc *sc; 234497b9d4baSJohn-Mark Gurney { 2345fc74a9f9SBrooks Davis struct ifnet *ifp = sc->rl_ifp; 2346a94100faSBill Paul struct mii_data *mii; 2347a94100faSBill Paul u_int32_t rxcfg = 0; 23484d3d7085SBernd Walter union { 23494d3d7085SBernd Walter uint32_t align_dummy; 23504d3d7085SBernd Walter u_char eaddr[ETHER_ADDR_LEN]; 23514d3d7085SBernd Walter } eaddr; 2352a94100faSBill Paul 235397b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 235497b9d4baSJohn-Mark Gurney 2355a94100faSBill Paul mii = device_get_softc(sc->rl_miibus); 2356a94100faSBill Paul 2357a94100faSBill Paul /* 2358a94100faSBill Paul * Cancel pending I/O and free all RX/TX buffers. 2359a94100faSBill Paul */ 2360a94100faSBill Paul re_stop(sc); 2361a94100faSBill Paul 2362a94100faSBill Paul /* 2363c2c6548bSBill Paul * Enable C+ RX and TX mode, as well as VLAN stripping and 2364edd03374SBill Paul * RX checksum offload. We must configure the C+ register 2365c2c6548bSBill Paul * before all others. 2366c2c6548bSBill Paul */ 2367c2c6548bSBill Paul CSR_WRITE_2(sc, RL_CPLUS_CMD, RL_CPLUSCMD_RXENB| 2368c2c6548bSBill Paul RL_CPLUSCMD_TXENB|RL_CPLUSCMD_PCI_MRW| 2369ed510fb0SBill Paul RL_CPLUSCMD_VLANSTRIP|RL_CPLUSCMD_RXCSUM_ENB); 2370c2c6548bSBill Paul 2371c2c6548bSBill Paul /* 2372a94100faSBill Paul * Init our MAC address. Even though the chipset 2373a94100faSBill Paul * documentation doesn't mention it, we need to enter "Config 2374a94100faSBill Paul * register write enable" mode to modify the ID registers. 2375a94100faSBill Paul */ 23764d3d7085SBernd Walter /* Copy MAC address on stack to align. */ 23774d3d7085SBernd Walter bcopy(IF_LLADDR(ifp), eaddr.eaddr, ETHER_ADDR_LEN); 2378a94100faSBill Paul CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_WRITECFG); 2379ed510fb0SBill Paul CSR_WRITE_4(sc, RL_IDR0, 2380ed510fb0SBill Paul htole32(*(u_int32_t *)(&eaddr.eaddr[0]))); 2381ed510fb0SBill Paul CSR_WRITE_4(sc, RL_IDR4, 2382ed510fb0SBill Paul htole32(*(u_int32_t *)(&eaddr.eaddr[4]))); 2383a94100faSBill Paul CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF); 2384a94100faSBill Paul 2385a94100faSBill Paul /* 2386a94100faSBill Paul * For C+ mode, initialize the RX descriptors and mbufs. 2387a94100faSBill Paul */ 2388a94100faSBill Paul re_rx_list_init(sc); 2389a94100faSBill Paul re_tx_list_init(sc); 2390a94100faSBill Paul 2391a94100faSBill Paul /* 2392d01fac16SPyun YongHyeon * Load the addresses of the RX and TX lists into the chip. 2393d01fac16SPyun YongHyeon */ 2394d01fac16SPyun YongHyeon 2395d01fac16SPyun YongHyeon CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI, 2396d01fac16SPyun YongHyeon RL_ADDR_HI(sc->rl_ldata.rl_rx_list_addr)); 2397d01fac16SPyun YongHyeon CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO, 2398d01fac16SPyun YongHyeon RL_ADDR_LO(sc->rl_ldata.rl_rx_list_addr)); 2399d01fac16SPyun YongHyeon 2400d01fac16SPyun YongHyeon CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI, 2401d01fac16SPyun YongHyeon RL_ADDR_HI(sc->rl_ldata.rl_tx_list_addr)); 2402d01fac16SPyun YongHyeon CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO, 2403d01fac16SPyun YongHyeon RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); 2404d01fac16SPyun YongHyeon 2405d01fac16SPyun YongHyeon /* 2406a94100faSBill Paul * Enable transmit and receive. 2407a94100faSBill Paul */ 2408a94100faSBill Paul CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); 2409a94100faSBill Paul 2410a94100faSBill Paul /* 2411a94100faSBill Paul * Set the initial TX and RX configuration. 2412a94100faSBill Paul */ 2413abc8ff44SBill Paul if (sc->rl_testmode) { 2414abc8ff44SBill Paul if (sc->rl_type == RL_8169) 2415abc8ff44SBill Paul CSR_WRITE_4(sc, RL_TXCFG, 2416abc8ff44SBill Paul RL_TXCFG_CONFIG|RL_LOOPTEST_ON); 2417a94100faSBill Paul else 2418abc8ff44SBill Paul CSR_WRITE_4(sc, RL_TXCFG, 2419abc8ff44SBill Paul RL_TXCFG_CONFIG|RL_LOOPTEST_ON_CPLUS); 2420abc8ff44SBill Paul } else 2421a94100faSBill Paul CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); 2422d01fac16SPyun YongHyeon 2423d01fac16SPyun YongHyeon CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16); 2424d01fac16SPyun YongHyeon 2425a94100faSBill Paul CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG); 2426a94100faSBill Paul 2427a94100faSBill Paul /* Set the individual bit to receive frames for this host only. */ 2428a94100faSBill Paul rxcfg = CSR_READ_4(sc, RL_RXCFG); 2429a94100faSBill Paul rxcfg |= RL_RXCFG_RX_INDIV; 2430a94100faSBill Paul 2431a94100faSBill Paul /* If we want promiscuous mode, set the allframes bit. */ 243261021536SJohn-Mark Gurney if (ifp->if_flags & IFF_PROMISC) 2433a94100faSBill Paul rxcfg |= RL_RXCFG_RX_ALLPHYS; 243461021536SJohn-Mark Gurney else 2435a94100faSBill Paul rxcfg &= ~RL_RXCFG_RX_ALLPHYS; 2436a94100faSBill Paul CSR_WRITE_4(sc, RL_RXCFG, rxcfg); 2437a94100faSBill Paul 2438a94100faSBill Paul /* 2439a94100faSBill Paul * Set capture broadcast bit to capture broadcast frames. 2440a94100faSBill Paul */ 244161021536SJohn-Mark Gurney if (ifp->if_flags & IFF_BROADCAST) 2442a94100faSBill Paul rxcfg |= RL_RXCFG_RX_BROAD; 244361021536SJohn-Mark Gurney else 2444a94100faSBill Paul rxcfg &= ~RL_RXCFG_RX_BROAD; 2445a94100faSBill Paul CSR_WRITE_4(sc, RL_RXCFG, rxcfg); 2446a94100faSBill Paul 2447a94100faSBill Paul /* 2448a94100faSBill Paul * Program the multicast filter, if necessary. 2449a94100faSBill Paul */ 2450a94100faSBill Paul re_setmulti(sc); 2451a94100faSBill Paul 2452a94100faSBill Paul #ifdef DEVICE_POLLING 2453a94100faSBill Paul /* 2454a94100faSBill Paul * Disable interrupts if we are polling. 2455a94100faSBill Paul */ 245640929967SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) 2457a94100faSBill Paul CSR_WRITE_2(sc, RL_IMR, 0); 2458a94100faSBill Paul else /* otherwise ... */ 245940929967SGleb Smirnoff #endif 2460ed510fb0SBill Paul 2461a94100faSBill Paul /* 2462a94100faSBill Paul * Enable interrupts. 2463a94100faSBill Paul */ 2464a94100faSBill Paul if (sc->rl_testmode) 2465a94100faSBill Paul CSR_WRITE_2(sc, RL_IMR, 0); 2466a94100faSBill Paul else 2467a94100faSBill Paul CSR_WRITE_2(sc, RL_IMR, RL_INTRS_CPLUS); 2468ed510fb0SBill Paul CSR_WRITE_2(sc, RL_ISR, RL_INTRS_CPLUS); 2469a94100faSBill Paul 2470a94100faSBill Paul /* Set initial TX threshold */ 2471a94100faSBill Paul sc->rl_txthresh = RL_TX_THRESH_INIT; 2472a94100faSBill Paul 2473a94100faSBill Paul /* Start RX/TX process. */ 2474a94100faSBill Paul CSR_WRITE_4(sc, RL_MISSEDPKT, 0); 2475a94100faSBill Paul #ifdef notdef 2476a94100faSBill Paul /* Enable receiver and transmitter. */ 2477a94100faSBill Paul CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); 2478a94100faSBill Paul #endif 2479a94100faSBill Paul 2480ed510fb0SBill Paul #ifdef RE_TX_MODERATION 2481a94100faSBill Paul /* 2482a94100faSBill Paul * Initialize the timer interrupt register so that 2483a94100faSBill Paul * a timer interrupt will be generated once the timer 2484a94100faSBill Paul * reaches a certain number of ticks. The timer is 2485a94100faSBill Paul * reloaded on each transmit. This gives us TX interrupt 2486a94100faSBill Paul * moderation, which dramatically improves TX frame rate. 2487a94100faSBill Paul */ 2488a94100faSBill Paul if (sc->rl_type == RL_8169) 2489a94100faSBill Paul CSR_WRITE_4(sc, RL_TIMERINT_8169, 0x800); 2490a94100faSBill Paul else 2491a94100faSBill Paul CSR_WRITE_4(sc, RL_TIMERINT, 0x400); 2492ed510fb0SBill Paul #endif 2493a94100faSBill Paul 2494a94100faSBill Paul /* 2495a94100faSBill Paul * For 8169 gigE NICs, set the max allowed RX packet 2496a94100faSBill Paul * size so we can receive jumbo frames. 2497a94100faSBill Paul */ 2498a94100faSBill Paul if (sc->rl_type == RL_8169) 2499a94100faSBill Paul CSR_WRITE_2(sc, RL_MAXRXPKTLEN, 16383); 2500a94100faSBill Paul 250197b9d4baSJohn-Mark Gurney if (sc->rl_testmode) 2502a94100faSBill Paul return; 2503a94100faSBill Paul 2504a94100faSBill Paul mii_mediachg(mii); 2505a94100faSBill Paul 250619ecd231SPyun YongHyeon CSR_WRITE_1(sc, RL_CFG1, CSR_READ_1(sc, RL_CFG1) | RL_CFG1_DRVLOAD); 2507a94100faSBill Paul 250813f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_RUNNING; 250913f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2510a94100faSBill Paul 2511ed510fb0SBill Paul sc->rl_link = 0; 25121d545c7aSMarius Strobl sc->rl_watchdog_timer = 0; 2513d1754a9bSJohn Baldwin callout_reset(&sc->rl_stat_callout, hz, re_tick, sc); 2514a94100faSBill Paul } 2515a94100faSBill Paul 2516a94100faSBill Paul /* 2517a94100faSBill Paul * Set media options. 2518a94100faSBill Paul */ 2519a94100faSBill Paul static int 2520a94100faSBill Paul re_ifmedia_upd(ifp) 2521a94100faSBill Paul struct ifnet *ifp; 2522a94100faSBill Paul { 2523a94100faSBill Paul struct rl_softc *sc; 2524a94100faSBill Paul struct mii_data *mii; 2525a94100faSBill Paul 2526a94100faSBill Paul sc = ifp->if_softc; 2527a94100faSBill Paul mii = device_get_softc(sc->rl_miibus); 2528d1754a9bSJohn Baldwin RL_LOCK(sc); 2529a94100faSBill Paul mii_mediachg(mii); 2530d1754a9bSJohn Baldwin RL_UNLOCK(sc); 2531a94100faSBill Paul 2532a94100faSBill Paul return (0); 2533a94100faSBill Paul } 2534a94100faSBill Paul 2535a94100faSBill Paul /* 2536a94100faSBill Paul * Report current media status. 2537a94100faSBill Paul */ 2538a94100faSBill Paul static void 2539a94100faSBill Paul re_ifmedia_sts(ifp, ifmr) 2540a94100faSBill Paul struct ifnet *ifp; 2541a94100faSBill Paul struct ifmediareq *ifmr; 2542a94100faSBill Paul { 2543a94100faSBill Paul struct rl_softc *sc; 2544a94100faSBill Paul struct mii_data *mii; 2545a94100faSBill Paul 2546a94100faSBill Paul sc = ifp->if_softc; 2547a94100faSBill Paul mii = device_get_softc(sc->rl_miibus); 2548a94100faSBill Paul 2549d1754a9bSJohn Baldwin RL_LOCK(sc); 2550a94100faSBill Paul mii_pollstat(mii); 2551d1754a9bSJohn Baldwin RL_UNLOCK(sc); 2552a94100faSBill Paul ifmr->ifm_active = mii->mii_media_active; 2553a94100faSBill Paul ifmr->ifm_status = mii->mii_media_status; 2554a94100faSBill Paul } 2555a94100faSBill Paul 2556a94100faSBill Paul static int 2557a94100faSBill Paul re_ioctl(ifp, command, data) 2558a94100faSBill Paul struct ifnet *ifp; 2559a94100faSBill Paul u_long command; 2560a94100faSBill Paul caddr_t data; 2561a94100faSBill Paul { 2562a94100faSBill Paul struct rl_softc *sc = ifp->if_softc; 2563a94100faSBill Paul struct ifreq *ifr = (struct ifreq *) data; 2564a94100faSBill Paul struct mii_data *mii; 256540929967SGleb Smirnoff int error = 0; 2566a94100faSBill Paul 2567a94100faSBill Paul switch (command) { 2568a94100faSBill Paul case SIOCSIFMTU: 2569d1754a9bSJohn Baldwin RL_LOCK(sc); 2570a94100faSBill Paul if (ifr->ifr_mtu > RL_JUMBO_MTU) 2571a94100faSBill Paul error = EINVAL; 2572a94100faSBill Paul ifp->if_mtu = ifr->ifr_mtu; 2573d1754a9bSJohn Baldwin RL_UNLOCK(sc); 2574a94100faSBill Paul break; 2575a94100faSBill Paul case SIOCSIFFLAGS: 257697b9d4baSJohn-Mark Gurney RL_LOCK(sc); 2577eed497bbSPyun YongHyeon if ((ifp->if_flags & IFF_UP) != 0) { 2578eed497bbSPyun YongHyeon if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { 2579eed497bbSPyun YongHyeon if (((ifp->if_flags ^ sc->rl_if_flags) 2580eed497bbSPyun YongHyeon & IFF_PROMISC) != 0) 2581eed497bbSPyun YongHyeon re_setmulti(sc); 2582eed497bbSPyun YongHyeon } else 258397b9d4baSJohn-Mark Gurney re_init_locked(sc); 2584eed497bbSPyun YongHyeon } else { 2585eed497bbSPyun YongHyeon if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2586a94100faSBill Paul re_stop(sc); 2587eed497bbSPyun YongHyeon } 2588eed497bbSPyun YongHyeon sc->rl_if_flags = ifp->if_flags; 258997b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 2590a94100faSBill Paul break; 2591a94100faSBill Paul case SIOCADDMULTI: 2592a94100faSBill Paul case SIOCDELMULTI: 259397b9d4baSJohn-Mark Gurney RL_LOCK(sc); 2594a94100faSBill Paul re_setmulti(sc); 259597b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 2596a94100faSBill Paul break; 2597a94100faSBill Paul case SIOCGIFMEDIA: 2598a94100faSBill Paul case SIOCSIFMEDIA: 2599a94100faSBill Paul mii = device_get_softc(sc->rl_miibus); 2600a94100faSBill Paul error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 2601a94100faSBill Paul break; 2602a94100faSBill Paul case SIOCSIFCAP: 260340929967SGleb Smirnoff { 2604f051cb85SGleb Smirnoff int mask, reinit; 2605f051cb85SGleb Smirnoff 2606f051cb85SGleb Smirnoff mask = ifr->ifr_reqcap ^ ifp->if_capenable; 2607f051cb85SGleb Smirnoff reinit = 0; 260840929967SGleb Smirnoff #ifdef DEVICE_POLLING 260940929967SGleb Smirnoff if (mask & IFCAP_POLLING) { 261040929967SGleb Smirnoff if (ifr->ifr_reqcap & IFCAP_POLLING) { 261140929967SGleb Smirnoff error = ether_poll_register(re_poll, ifp); 261240929967SGleb Smirnoff if (error) 261340929967SGleb Smirnoff return(error); 2614d1754a9bSJohn Baldwin RL_LOCK(sc); 261540929967SGleb Smirnoff /* Disable interrupts */ 261640929967SGleb Smirnoff CSR_WRITE_2(sc, RL_IMR, 0x0000); 261740929967SGleb Smirnoff ifp->if_capenable |= IFCAP_POLLING; 261840929967SGleb Smirnoff RL_UNLOCK(sc); 261940929967SGleb Smirnoff } else { 262040929967SGleb Smirnoff error = ether_poll_deregister(ifp); 262140929967SGleb Smirnoff /* Enable interrupts. */ 262240929967SGleb Smirnoff RL_LOCK(sc); 262340929967SGleb Smirnoff CSR_WRITE_2(sc, RL_IMR, RL_INTRS_CPLUS); 262440929967SGleb Smirnoff ifp->if_capenable &= ~IFCAP_POLLING; 262540929967SGleb Smirnoff RL_UNLOCK(sc); 262640929967SGleb Smirnoff } 262740929967SGleb Smirnoff } 262840929967SGleb Smirnoff #endif /* DEVICE_POLLING */ 262940929967SGleb Smirnoff if (mask & IFCAP_HWCSUM) { 2630f051cb85SGleb Smirnoff ifp->if_capenable ^= IFCAP_HWCSUM; 2631a94100faSBill Paul if (ifp->if_capenable & IFCAP_TXCSUM) 2632dc74159dSPyun YongHyeon ifp->if_hwassist |= RE_CSUM_FEATURES; 2633a94100faSBill Paul else 2634b61178a9SPyun YongHyeon ifp->if_hwassist &= ~RE_CSUM_FEATURES; 2635f051cb85SGleb Smirnoff reinit = 1; 263640929967SGleb Smirnoff } 2637f051cb85SGleb Smirnoff if (mask & IFCAP_VLAN_HWTAGGING) { 2638f051cb85SGleb Smirnoff ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 2639f051cb85SGleb Smirnoff reinit = 1; 2640f051cb85SGleb Smirnoff } 2641dc74159dSPyun YongHyeon if (mask & IFCAP_TSO4) { 2642dc74159dSPyun YongHyeon ifp->if_capenable ^= IFCAP_TSO4; 2643dc74159dSPyun YongHyeon if ((IFCAP_TSO4 & ifp->if_capenable) && 2644dc74159dSPyun YongHyeon (IFCAP_TSO4 & ifp->if_capabilities)) 2645dc74159dSPyun YongHyeon ifp->if_hwassist |= CSUM_TSO; 2646dc74159dSPyun YongHyeon else 2647dc74159dSPyun YongHyeon ifp->if_hwassist &= ~CSUM_TSO; 2648dc74159dSPyun YongHyeon } 2649f051cb85SGleb Smirnoff if (reinit && ifp->if_drv_flags & IFF_DRV_RUNNING) 2650f051cb85SGleb Smirnoff re_init(sc); 2651960fd5b3SPyun YongHyeon VLAN_CAPABILITIES(ifp); 265240929967SGleb Smirnoff } 2653a94100faSBill Paul break; 2654a94100faSBill Paul default: 2655a94100faSBill Paul error = ether_ioctl(ifp, command, data); 2656a94100faSBill Paul break; 2657a94100faSBill Paul } 2658a94100faSBill Paul 2659a94100faSBill Paul return (error); 2660a94100faSBill Paul } 2661a94100faSBill Paul 2662a94100faSBill Paul static void 26631d545c7aSMarius Strobl re_watchdog(sc) 2664a94100faSBill Paul struct rl_softc *sc; 26651d545c7aSMarius Strobl { 2666a94100faSBill Paul 26671d545c7aSMarius Strobl RL_LOCK_ASSERT(sc); 26681d545c7aSMarius Strobl 26691d545c7aSMarius Strobl if (sc->rl_watchdog_timer == 0 || --sc->rl_watchdog_timer != 0) 26701d545c7aSMarius Strobl return; 26711d545c7aSMarius Strobl 26721d545c7aSMarius Strobl device_printf(sc->rl_dev, "watchdog timeout\n"); 26731d545c7aSMarius Strobl sc->rl_ifp->if_oerrors++; 2674a94100faSBill Paul 2675a94100faSBill Paul re_txeof(sc); 2676a94100faSBill Paul re_rxeof(sc); 267797b9d4baSJohn-Mark Gurney re_init_locked(sc); 2678a94100faSBill Paul } 2679a94100faSBill Paul 2680a94100faSBill Paul /* 2681a94100faSBill Paul * Stop the adapter and free any mbufs allocated to the 2682a94100faSBill Paul * RX and TX lists. 2683a94100faSBill Paul */ 2684a94100faSBill Paul static void 2685a94100faSBill Paul re_stop(sc) 2686a94100faSBill Paul struct rl_softc *sc; 2687a94100faSBill Paul { 2688a94100faSBill Paul register int i; 2689a94100faSBill Paul struct ifnet *ifp; 2690a94100faSBill Paul 269197b9d4baSJohn-Mark Gurney RL_LOCK_ASSERT(sc); 269297b9d4baSJohn-Mark Gurney 2693fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 2694a94100faSBill Paul 26951d545c7aSMarius Strobl sc->rl_watchdog_timer = 0; 2696d1754a9bSJohn Baldwin callout_stop(&sc->rl_stat_callout); 269713f4c340SRobert Watson ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2698a94100faSBill Paul 2699a94100faSBill Paul CSR_WRITE_1(sc, RL_COMMAND, 0x00); 2700a94100faSBill Paul CSR_WRITE_2(sc, RL_IMR, 0x0000); 2701ed510fb0SBill Paul CSR_WRITE_2(sc, RL_ISR, 0xFFFF); 2702a94100faSBill Paul 2703a94100faSBill Paul if (sc->rl_head != NULL) { 2704a94100faSBill Paul m_freem(sc->rl_head); 2705a94100faSBill Paul sc->rl_head = sc->rl_tail = NULL; 2706a94100faSBill Paul } 2707a94100faSBill Paul 2708a94100faSBill Paul /* Free the TX list buffers. */ 2709a94100faSBill Paul 2710a94100faSBill Paul for (i = 0; i < RL_TX_DESC_CNT; i++) { 2711a94100faSBill Paul if (sc->rl_ldata.rl_tx_mbuf[i] != NULL) { 2712a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_mtag, 2713a94100faSBill Paul sc->rl_ldata.rl_tx_dmamap[i]); 2714a94100faSBill Paul m_freem(sc->rl_ldata.rl_tx_mbuf[i]); 2715a94100faSBill Paul sc->rl_ldata.rl_tx_mbuf[i] = NULL; 2716a94100faSBill Paul } 2717a94100faSBill Paul } 2718a94100faSBill Paul 2719a94100faSBill Paul /* Free the RX list buffers. */ 2720a94100faSBill Paul 2721a94100faSBill Paul for (i = 0; i < RL_RX_DESC_CNT; i++) { 2722a94100faSBill Paul if (sc->rl_ldata.rl_rx_mbuf[i] != NULL) { 2723a94100faSBill Paul bus_dmamap_unload(sc->rl_ldata.rl_mtag, 2724a94100faSBill Paul sc->rl_ldata.rl_rx_dmamap[i]); 2725a94100faSBill Paul m_freem(sc->rl_ldata.rl_rx_mbuf[i]); 2726a94100faSBill Paul sc->rl_ldata.rl_rx_mbuf[i] = NULL; 2727a94100faSBill Paul } 2728a94100faSBill Paul } 2729a94100faSBill Paul } 2730a94100faSBill Paul 2731a94100faSBill Paul /* 2732a94100faSBill Paul * Device suspend routine. Stop the interface and save some PCI 2733a94100faSBill Paul * settings in case the BIOS doesn't restore them properly on 2734a94100faSBill Paul * resume. 2735a94100faSBill Paul */ 2736a94100faSBill Paul static int 2737a94100faSBill Paul re_suspend(dev) 2738a94100faSBill Paul device_t dev; 2739a94100faSBill Paul { 2740a94100faSBill Paul struct rl_softc *sc; 2741a94100faSBill Paul 2742a94100faSBill Paul sc = device_get_softc(dev); 2743a94100faSBill Paul 274497b9d4baSJohn-Mark Gurney RL_LOCK(sc); 2745a94100faSBill Paul re_stop(sc); 2746a94100faSBill Paul sc->suspended = 1; 274797b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 2748a94100faSBill Paul 2749a94100faSBill Paul return (0); 2750a94100faSBill Paul } 2751a94100faSBill Paul 2752a94100faSBill Paul /* 2753a94100faSBill Paul * Device resume routine. Restore some PCI settings in case the BIOS 2754a94100faSBill Paul * doesn't, re-enable busmastering, and restart the interface if 2755a94100faSBill Paul * appropriate. 2756a94100faSBill Paul */ 2757a94100faSBill Paul static int 2758a94100faSBill Paul re_resume(dev) 2759a94100faSBill Paul device_t dev; 2760a94100faSBill Paul { 2761a94100faSBill Paul struct rl_softc *sc; 2762a94100faSBill Paul struct ifnet *ifp; 2763a94100faSBill Paul 2764a94100faSBill Paul sc = device_get_softc(dev); 276597b9d4baSJohn-Mark Gurney 276697b9d4baSJohn-Mark Gurney RL_LOCK(sc); 276797b9d4baSJohn-Mark Gurney 2768fc74a9f9SBrooks Davis ifp = sc->rl_ifp; 2769a94100faSBill Paul 2770a94100faSBill Paul /* reinitialize interface if necessary */ 2771a94100faSBill Paul if (ifp->if_flags & IFF_UP) 277297b9d4baSJohn-Mark Gurney re_init_locked(sc); 2773a94100faSBill Paul 2774a94100faSBill Paul sc->suspended = 0; 277597b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 2776a94100faSBill Paul 2777a94100faSBill Paul return (0); 2778a94100faSBill Paul } 2779a94100faSBill Paul 2780a94100faSBill Paul /* 2781a94100faSBill Paul * Stop all chip I/O so that the kernel's probe routines don't 2782a94100faSBill Paul * get confused by errant DMAs when rebooting. 2783a94100faSBill Paul */ 2784a94100faSBill Paul static void 2785a94100faSBill Paul re_shutdown(dev) 2786a94100faSBill Paul device_t dev; 2787a94100faSBill Paul { 2788a94100faSBill Paul struct rl_softc *sc; 2789a94100faSBill Paul 2790a94100faSBill Paul sc = device_get_softc(dev); 2791a94100faSBill Paul 279297b9d4baSJohn-Mark Gurney RL_LOCK(sc); 2793a94100faSBill Paul re_stop(sc); 2794536fde34SMaxim Sobolev /* 2795536fde34SMaxim Sobolev * Mark interface as down since otherwise we will panic if 2796536fde34SMaxim Sobolev * interrupt comes in later on, which can happen in some 279772293673SRuslan Ermilov * cases. 2798536fde34SMaxim Sobolev */ 2799536fde34SMaxim Sobolev sc->rl_ifp->if_flags &= ~IFF_UP; 280097b9d4baSJohn-Mark Gurney RL_UNLOCK(sc); 2801a94100faSBill Paul } 2802