xref: /freebsd/sys/dev/ral/rt2661.c (revision b032f27c365b992e9d8e42214183b39acfb8c6ac)
19c6307b1SDamien Bergamini /*	$FreeBSD$	*/
29c6307b1SDamien Bergamini 
39c6307b1SDamien Bergamini /*-
49c6307b1SDamien Bergamini  * Copyright (c) 2006
59c6307b1SDamien Bergamini  *	Damien Bergamini <damien.bergamini@free.fr>
69c6307b1SDamien Bergamini  *
79c6307b1SDamien Bergamini  * Permission to use, copy, modify, and distribute this software for any
89c6307b1SDamien Bergamini  * purpose with or without fee is hereby granted, provided that the above
99c6307b1SDamien Bergamini  * copyright notice and this permission notice appear in all copies.
109c6307b1SDamien Bergamini  *
119c6307b1SDamien Bergamini  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
129c6307b1SDamien Bergamini  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
139c6307b1SDamien Bergamini  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
149c6307b1SDamien Bergamini  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
159c6307b1SDamien Bergamini  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
169c6307b1SDamien Bergamini  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
179c6307b1SDamien Bergamini  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
189c6307b1SDamien Bergamini  */
199c6307b1SDamien Bergamini 
209c6307b1SDamien Bergamini #include <sys/cdefs.h>
219c6307b1SDamien Bergamini __FBSDID("$FreeBSD$");
229c6307b1SDamien Bergamini 
239c6307b1SDamien Bergamini /*-
249c6307b1SDamien Bergamini  * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
259c6307b1SDamien Bergamini  * http://www.ralinktech.com/
269c6307b1SDamien Bergamini  */
279c6307b1SDamien Bergamini 
289c6307b1SDamien Bergamini #include <sys/param.h>
299c6307b1SDamien Bergamini #include <sys/sysctl.h>
309c6307b1SDamien Bergamini #include <sys/sockio.h>
319c6307b1SDamien Bergamini #include <sys/mbuf.h>
329c6307b1SDamien Bergamini #include <sys/kernel.h>
339c6307b1SDamien Bergamini #include <sys/socket.h>
349c6307b1SDamien Bergamini #include <sys/systm.h>
359c6307b1SDamien Bergamini #include <sys/malloc.h>
36f910c56cSKevin Lo #include <sys/lock.h>
37f910c56cSKevin Lo #include <sys/mutex.h>
389c6307b1SDamien Bergamini #include <sys/module.h>
399c6307b1SDamien Bergamini #include <sys/bus.h>
409c6307b1SDamien Bergamini #include <sys/endian.h>
41b032f27cSSam Leffler #include <sys/firmware.h>
429c6307b1SDamien Bergamini 
439c6307b1SDamien Bergamini #include <machine/bus.h>
449c6307b1SDamien Bergamini #include <machine/resource.h>
459c6307b1SDamien Bergamini #include <sys/rman.h>
469c6307b1SDamien Bergamini 
479c6307b1SDamien Bergamini #include <net/bpf.h>
489c6307b1SDamien Bergamini #include <net/if.h>
499c6307b1SDamien Bergamini #include <net/if_arp.h>
509c6307b1SDamien Bergamini #include <net/ethernet.h>
519c6307b1SDamien Bergamini #include <net/if_dl.h>
529c6307b1SDamien Bergamini #include <net/if_media.h>
539c6307b1SDamien Bergamini #include <net/if_types.h>
549c6307b1SDamien Bergamini 
559c6307b1SDamien Bergamini #include <net80211/ieee80211_var.h>
56b032f27cSSam Leffler #include <net80211/ieee80211_phy.h>
579c6307b1SDamien Bergamini #include <net80211/ieee80211_radiotap.h>
5868e8e04eSSam Leffler #include <net80211/ieee80211_regdomain.h>
59b032f27cSSam Leffler #include <net80211/ieee80211_amrr.h>
609c6307b1SDamien Bergamini 
619c6307b1SDamien Bergamini #include <netinet/in.h>
629c6307b1SDamien Bergamini #include <netinet/in_systm.h>
639c6307b1SDamien Bergamini #include <netinet/in_var.h>
649c6307b1SDamien Bergamini #include <netinet/ip.h>
659c6307b1SDamien Bergamini #include <netinet/if_ether.h>
669c6307b1SDamien Bergamini 
672017e1cbSMike Silbersack #include <dev/ral/rt2661reg.h>
682017e1cbSMike Silbersack #include <dev/ral/rt2661var.h>
699c6307b1SDamien Bergamini 
70b032f27cSSam Leffler #define RAL_DEBUG
719c6307b1SDamien Bergamini #ifdef RAL_DEBUG
72b032f27cSSam Leffler #define DPRINTF(sc, fmt, ...) do {				\
73b032f27cSSam Leffler 	if (sc->sc_debug > 0)					\
74b032f27cSSam Leffler 		printf(fmt, __VA_ARGS__);			\
75b032f27cSSam Leffler } while (0)
76b032f27cSSam Leffler #define DPRINTFN(sc, n, fmt, ...) do {				\
77b032f27cSSam Leffler 	if (sc->sc_debug >= (n))				\
78b032f27cSSam Leffler 		printf(fmt, __VA_ARGS__);			\
79b032f27cSSam Leffler } while (0)
809c6307b1SDamien Bergamini #else
81b032f27cSSam Leffler #define DPRINTF(sc, fmt, ...)
82b032f27cSSam Leffler #define DPRINTFN(sc, n, fmt, ...)
839c6307b1SDamien Bergamini #endif
849c6307b1SDamien Bergamini 
85b032f27cSSam Leffler static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
86b032f27cSSam Leffler 			    const char name[IFNAMSIZ], int unit, int opmode,
87b032f27cSSam Leffler 			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
88b032f27cSSam Leffler 			    const uint8_t mac[IEEE80211_ADDR_LEN]);
89b032f27cSSam Leffler static void		rt2661_vap_delete(struct ieee80211vap *);
909c6307b1SDamien Bergamini static void		rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
919c6307b1SDamien Bergamini 			    int);
929c6307b1SDamien Bergamini static int		rt2661_alloc_tx_ring(struct rt2661_softc *,
939c6307b1SDamien Bergamini 			    struct rt2661_tx_ring *, int);
949c6307b1SDamien Bergamini static void		rt2661_reset_tx_ring(struct rt2661_softc *,
959c6307b1SDamien Bergamini 			    struct rt2661_tx_ring *);
969c6307b1SDamien Bergamini static void		rt2661_free_tx_ring(struct rt2661_softc *,
979c6307b1SDamien Bergamini 			    struct rt2661_tx_ring *);
989c6307b1SDamien Bergamini static int		rt2661_alloc_rx_ring(struct rt2661_softc *,
999c6307b1SDamien Bergamini 			    struct rt2661_rx_ring *, int);
1009c6307b1SDamien Bergamini static void		rt2661_reset_rx_ring(struct rt2661_softc *,
1019c6307b1SDamien Bergamini 			    struct rt2661_rx_ring *);
1029c6307b1SDamien Bergamini static void		rt2661_free_rx_ring(struct rt2661_softc *,
1039c6307b1SDamien Bergamini 			    struct rt2661_rx_ring *);
1049c6307b1SDamien Bergamini static struct		ieee80211_node *rt2661_node_alloc(
1059c6307b1SDamien Bergamini 			    struct ieee80211_node_table *);
106b032f27cSSam Leffler static void		rt2661_newassoc(struct ieee80211_node *, int);
107b032f27cSSam Leffler static int		rt2661_newstate(struct ieee80211vap *,
1089c6307b1SDamien Bergamini 			    enum ieee80211_state, int);
1099c6307b1SDamien Bergamini static uint16_t		rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
1109c6307b1SDamien Bergamini static void		rt2661_rx_intr(struct rt2661_softc *);
1119c6307b1SDamien Bergamini static void		rt2661_tx_intr(struct rt2661_softc *);
1129c6307b1SDamien Bergamini static void		rt2661_tx_dma_intr(struct rt2661_softc *,
1139c6307b1SDamien Bergamini 			    struct rt2661_tx_ring *);
1149c6307b1SDamien Bergamini static void		rt2661_mcu_beacon_expire(struct rt2661_softc *);
1159c6307b1SDamien Bergamini static void		rt2661_mcu_wakeup(struct rt2661_softc *);
1169c6307b1SDamien Bergamini static void		rt2661_mcu_cmd_intr(struct rt2661_softc *);
11768e8e04eSSam Leffler static void		rt2661_scan_start(struct ieee80211com *);
11868e8e04eSSam Leffler static void		rt2661_scan_end(struct ieee80211com *);
11968e8e04eSSam Leffler static void		rt2661_set_channel(struct ieee80211com *);
1209c6307b1SDamien Bergamini static void		rt2661_setup_tx_desc(struct rt2661_softc *,
1219c6307b1SDamien Bergamini 			    struct rt2661_tx_desc *, uint32_t, uint16_t, int,
1229c6307b1SDamien Bergamini 			    int, const bus_dma_segment_t *, int, int);
1239c6307b1SDamien Bergamini static int		rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
1249c6307b1SDamien Bergamini 			    struct ieee80211_node *, int);
1259c6307b1SDamien Bergamini static int		rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
1269c6307b1SDamien Bergamini 			    struct ieee80211_node *);
127b032f27cSSam Leffler static void		rt2661_start_locked(struct ifnet *);
1289c6307b1SDamien Bergamini static void		rt2661_start(struct ifnet *);
129b032f27cSSam Leffler static int		rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
130b032f27cSSam Leffler 			    const struct ieee80211_bpf_params *);
1318f435158SBruce M Simpson static void		rt2661_watchdog(void *);
1329c6307b1SDamien Bergamini static int		rt2661_ioctl(struct ifnet *, u_long, caddr_t);
1339c6307b1SDamien Bergamini static void		rt2661_bbp_write(struct rt2661_softc *, uint8_t,
1349c6307b1SDamien Bergamini 			    uint8_t);
1359c6307b1SDamien Bergamini static uint8_t		rt2661_bbp_read(struct rt2661_softc *, uint8_t);
1369c6307b1SDamien Bergamini static void		rt2661_rf_write(struct rt2661_softc *, uint8_t,
1379c6307b1SDamien Bergamini 			    uint32_t);
1389c6307b1SDamien Bergamini static int		rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
1399c6307b1SDamien Bergamini 			    uint16_t);
1409c6307b1SDamien Bergamini static void		rt2661_select_antenna(struct rt2661_softc *);
1419c6307b1SDamien Bergamini static void		rt2661_enable_mrr(struct rt2661_softc *);
1429c6307b1SDamien Bergamini static void		rt2661_set_txpreamble(struct rt2661_softc *);
1439c6307b1SDamien Bergamini static void		rt2661_set_basicrates(struct rt2661_softc *,
1449c6307b1SDamien Bergamini 			    const struct ieee80211_rateset *);
1459c6307b1SDamien Bergamini static void		rt2661_select_band(struct rt2661_softc *,
1469c6307b1SDamien Bergamini 			    struct ieee80211_channel *);
1479c6307b1SDamien Bergamini static void		rt2661_set_chan(struct rt2661_softc *,
1489c6307b1SDamien Bergamini 			    struct ieee80211_channel *);
1499c6307b1SDamien Bergamini static void		rt2661_set_bssid(struct rt2661_softc *,
1509c6307b1SDamien Bergamini 			    const uint8_t *);
1519c6307b1SDamien Bergamini static void		rt2661_set_macaddr(struct rt2661_softc *,
1529c6307b1SDamien Bergamini 			   const uint8_t *);
153b032f27cSSam Leffler static void		rt2661_update_promisc(struct ifnet *);
1549c6307b1SDamien Bergamini static int		rt2661_wme_update(struct ieee80211com *) __unused;
1559c6307b1SDamien Bergamini static void		rt2661_update_slot(struct ifnet *);
1569c6307b1SDamien Bergamini static const char	*rt2661_get_rf(int);
157b032f27cSSam Leffler static void		rt2661_read_eeprom(struct rt2661_softc *,
158b032f27cSSam Leffler 			    struct ieee80211com *);
1599c6307b1SDamien Bergamini static int		rt2661_bbp_init(struct rt2661_softc *);
160b032f27cSSam Leffler static void		rt2661_init_locked(struct rt2661_softc *);
1619c6307b1SDamien Bergamini static void		rt2661_init(void *);
16268e8e04eSSam Leffler static void             rt2661_stop_locked(struct rt2661_softc *);
163b032f27cSSam Leffler static void		rt2661_stop(void *);
164b032f27cSSam Leffler static int		rt2661_load_microcode(struct rt2661_softc *);
1659c6307b1SDamien Bergamini #ifdef notyet
1669c6307b1SDamien Bergamini static void		rt2661_rx_tune(struct rt2661_softc *);
1679c6307b1SDamien Bergamini static void		rt2661_radar_start(struct rt2661_softc *);
1689c6307b1SDamien Bergamini static int		rt2661_radar_stop(struct rt2661_softc *);
1699c6307b1SDamien Bergamini #endif
170b032f27cSSam Leffler static int		rt2661_prepare_beacon(struct rt2661_softc *,
171b032f27cSSam Leffler 			    struct ieee80211vap *);
1729c6307b1SDamien Bergamini static void		rt2661_enable_tsf_sync(struct rt2661_softc *);
1739c6307b1SDamien Bergamini static int		rt2661_get_rssi(struct rt2661_softc *, uint8_t);
1749c6307b1SDamien Bergamini 
1759c6307b1SDamien Bergamini static const struct {
1769c6307b1SDamien Bergamini 	uint32_t	reg;
1779c6307b1SDamien Bergamini 	uint32_t	val;
1789c6307b1SDamien Bergamini } rt2661_def_mac[] = {
1799c6307b1SDamien Bergamini 	RT2661_DEF_MAC
1809c6307b1SDamien Bergamini };
1819c6307b1SDamien Bergamini 
1829c6307b1SDamien Bergamini static const struct {
1839c6307b1SDamien Bergamini 	uint8_t	reg;
1849c6307b1SDamien Bergamini 	uint8_t	val;
1859c6307b1SDamien Bergamini } rt2661_def_bbp[] = {
1869c6307b1SDamien Bergamini 	RT2661_DEF_BBP
1879c6307b1SDamien Bergamini };
1889c6307b1SDamien Bergamini 
1899c6307b1SDamien Bergamini static const struct rfprog {
1909c6307b1SDamien Bergamini 	uint8_t		chan;
1919c6307b1SDamien Bergamini 	uint32_t	r1, r2, r3, r4;
1929c6307b1SDamien Bergamini }  rt2661_rf5225_1[] = {
1939c6307b1SDamien Bergamini 	RT2661_RF5225_1
1949c6307b1SDamien Bergamini }, rt2661_rf5225_2[] = {
1959c6307b1SDamien Bergamini 	RT2661_RF5225_2
1969c6307b1SDamien Bergamini };
1979c6307b1SDamien Bergamini 
1989c6307b1SDamien Bergamini int
1999c6307b1SDamien Bergamini rt2661_attach(device_t dev, int id)
2009c6307b1SDamien Bergamini {
2019c6307b1SDamien Bergamini 	struct rt2661_softc *sc = device_get_softc(dev);
202b032f27cSSam Leffler 	struct ieee80211com *ic;
2039c6307b1SDamien Bergamini 	struct ifnet *ifp;
2049c6307b1SDamien Bergamini 	uint32_t val;
205b032f27cSSam Leffler 	int error, ac, ntries;
206b032f27cSSam Leffler 	uint8_t bands;
2079c6307b1SDamien Bergamini 
208b032f27cSSam Leffler 	sc->sc_id = id;
2099c6307b1SDamien Bergamini 	sc->sc_dev = dev;
2109c6307b1SDamien Bergamini 
211b032f27cSSam Leffler 	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
212b032f27cSSam Leffler 	if (ifp == NULL) {
213b032f27cSSam Leffler 		device_printf(sc->sc_dev, "can not if_alloc()\n");
214b032f27cSSam Leffler 		return ENOMEM;
215b032f27cSSam Leffler 	}
216b032f27cSSam Leffler 	ic = ifp->if_l2com;
217b032f27cSSam Leffler 
2189c6307b1SDamien Bergamini 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
2199c6307b1SDamien Bergamini 	    MTX_DEF | MTX_RECURSE);
2209c6307b1SDamien Bergamini 
2218f435158SBruce M Simpson 	callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
2229c6307b1SDamien Bergamini 
2239c6307b1SDamien Bergamini 	/* wait for NIC to initialize */
2249c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 1000; ntries++) {
2259c6307b1SDamien Bergamini 		if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
2269c6307b1SDamien Bergamini 			break;
2279c6307b1SDamien Bergamini 		DELAY(1000);
2289c6307b1SDamien Bergamini 	}
2299c6307b1SDamien Bergamini 	if (ntries == 1000) {
2309c6307b1SDamien Bergamini 		device_printf(sc->sc_dev,
2319c6307b1SDamien Bergamini 		    "timeout waiting for NIC to initialize\n");
2329c6307b1SDamien Bergamini 		error = EIO;
2339c6307b1SDamien Bergamini 		goto fail1;
2349c6307b1SDamien Bergamini 	}
2359c6307b1SDamien Bergamini 
2369c6307b1SDamien Bergamini 	/* retrieve RF rev. no and various other things from EEPROM */
237b032f27cSSam Leffler 	rt2661_read_eeprom(sc, ic);
2389c6307b1SDamien Bergamini 
2399c6307b1SDamien Bergamini 	device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
2409c6307b1SDamien Bergamini 	    rt2661_get_rf(sc->rf_rev));
2419c6307b1SDamien Bergamini 
2429c6307b1SDamien Bergamini 	/*
2439c6307b1SDamien Bergamini 	 * Allocate Tx and Rx rings.
2449c6307b1SDamien Bergamini 	 */
2459c6307b1SDamien Bergamini 	for (ac = 0; ac < 4; ac++) {
2469c6307b1SDamien Bergamini 		error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
2479c6307b1SDamien Bergamini 		    RT2661_TX_RING_COUNT);
2489c6307b1SDamien Bergamini 		if (error != 0) {
2499c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
2509c6307b1SDamien Bergamini 			    "could not allocate Tx ring %d\n", ac);
2519c6307b1SDamien Bergamini 			goto fail2;
2529c6307b1SDamien Bergamini 		}
2539c6307b1SDamien Bergamini 	}
2549c6307b1SDamien Bergamini 
2559c6307b1SDamien Bergamini 	error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
2569c6307b1SDamien Bergamini 	if (error != 0) {
2579c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
2589c6307b1SDamien Bergamini 		goto fail2;
2599c6307b1SDamien Bergamini 	}
2609c6307b1SDamien Bergamini 
2619c6307b1SDamien Bergamini 	error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
2629c6307b1SDamien Bergamini 	if (error != 0) {
2639c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate Rx ring\n");
2649c6307b1SDamien Bergamini 		goto fail3;
2659c6307b1SDamien Bergamini 	}
2669c6307b1SDamien Bergamini 
2679c6307b1SDamien Bergamini 	ifp->if_softc = sc;
2689c6307b1SDamien Bergamini 	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2699c6307b1SDamien Bergamini 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2709c6307b1SDamien Bergamini 	ifp->if_init = rt2661_init;
2719c6307b1SDamien Bergamini 	ifp->if_ioctl = rt2661_ioctl;
2729c6307b1SDamien Bergamini 	ifp->if_start = rt2661_start;
2739c6307b1SDamien Bergamini 	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
2749c6307b1SDamien Bergamini 	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
2759c6307b1SDamien Bergamini 	IFQ_SET_READY(&ifp->if_snd);
2769c6307b1SDamien Bergamini 
2779c6307b1SDamien Bergamini 	ic->ic_ifp = ifp;
278b032f27cSSam Leffler 	ic->ic_opmode = IEEE80211_M_STA;
2799c6307b1SDamien Bergamini 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
2809c6307b1SDamien Bergamini 
2819c6307b1SDamien Bergamini 	/* set device capabilities */
2829c6307b1SDamien Bergamini 	ic->ic_caps =
283b032f27cSSam Leffler 		  IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
284b032f27cSSam Leffler 		| IEEE80211_C_HOSTAP		/* hostap mode */
285b032f27cSSam Leffler 		| IEEE80211_C_MONITOR		/* monitor mode */
286b032f27cSSam Leffler 		| IEEE80211_C_AHDEMO		/* adhoc demo mode */
287b032f27cSSam Leffler 		| IEEE80211_C_WDS		/* 4-address traffic works */
288b032f27cSSam Leffler 		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
289b032f27cSSam Leffler 		| IEEE80211_C_SHSLOT		/* short slot time supported */
290b032f27cSSam Leffler 		| IEEE80211_C_WPA		/* capable of WPA1+WPA2 */
291b032f27cSSam Leffler 		| IEEE80211_C_BGSCAN		/* capable of bg scanning */
292a6991cc7SDamien Bergamini #ifdef notyet
293b032f27cSSam Leffler 		| IEEE80211_C_TXFRAG		/* handle tx frags */
294b032f27cSSam Leffler 		| IEEE80211_C_WME		/* 802.11e */
295a6991cc7SDamien Bergamini #endif
296b032f27cSSam Leffler 		;
2979c6307b1SDamien Bergamini 
29868e8e04eSSam Leffler 	bands = 0;
29968e8e04eSSam Leffler 	setbit(&bands, IEEE80211_MODE_11B);
30068e8e04eSSam Leffler 	setbit(&bands, IEEE80211_MODE_11G);
30168e8e04eSSam Leffler 	if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
30268e8e04eSSam Leffler 		setbit(&bands, IEEE80211_MODE_11A);
303b032f27cSSam Leffler 	ieee80211_init_channels(ic, NULL, &bands);
3049c6307b1SDamien Bergamini 
3059c6307b1SDamien Bergamini 	ieee80211_ifattach(ic);
306b032f27cSSam Leffler 	ic->ic_newassoc = rt2661_newassoc;
3079c6307b1SDamien Bergamini 	ic->ic_node_alloc = rt2661_node_alloc;
308b032f27cSSam Leffler #if 0
309b032f27cSSam Leffler 	ic->ic_wme.wme_update = rt2661_wme_update;
310b032f27cSSam Leffler #endif
31168e8e04eSSam Leffler 	ic->ic_scan_start = rt2661_scan_start;
31268e8e04eSSam Leffler 	ic->ic_scan_end = rt2661_scan_end;
31368e8e04eSSam Leffler 	ic->ic_set_channel = rt2661_set_channel;
3149c6307b1SDamien Bergamini 	ic->ic_updateslot = rt2661_update_slot;
315b032f27cSSam Leffler 	ic->ic_update_promisc = rt2661_update_promisc;
316b032f27cSSam Leffler 	ic->ic_raw_xmit = rt2661_raw_xmit;
3179c6307b1SDamien Bergamini 
318b032f27cSSam Leffler 	ic->ic_vap_create = rt2661_vap_create;
319b032f27cSSam Leffler 	ic->ic_vap_delete = rt2661_vap_delete;
3209c6307b1SDamien Bergamini 
321b032f27cSSam Leffler 	sc->sc_rates = ieee80211_get_ratetable(ic->ic_curchan);
322b032f27cSSam Leffler 
323b032f27cSSam Leffler 	bpfattach(ifp, DLT_IEEE802_11_RADIO,
324b032f27cSSam Leffler 	    sizeof (struct ieee80211_frame) + sizeof (sc->sc_txtap));
3259c6307b1SDamien Bergamini 
32656083486SKevin Lo 	sc->sc_rxtap_len = sizeof sc->sc_rxtap;
3279c6307b1SDamien Bergamini 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
3289c6307b1SDamien Bergamini 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
3299c6307b1SDamien Bergamini 
33056083486SKevin Lo 	sc->sc_txtap_len = sizeof sc->sc_txtap;
3319c6307b1SDamien Bergamini 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
3329c6307b1SDamien Bergamini 	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
3339c6307b1SDamien Bergamini 
334b032f27cSSam Leffler #ifdef RAL_DEBUG
3359c6307b1SDamien Bergamini 	SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
336b032f27cSSam Leffler 	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
337b032f27cSSam Leffler 	    "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
338b032f27cSSam Leffler #endif
3399c6307b1SDamien Bergamini 	if (bootverbose)
3409c6307b1SDamien Bergamini 		ieee80211_announce(ic);
3419c6307b1SDamien Bergamini 
3429c6307b1SDamien Bergamini 	return 0;
3439c6307b1SDamien Bergamini 
3449c6307b1SDamien Bergamini fail3:	rt2661_free_tx_ring(sc, &sc->mgtq);
3459c6307b1SDamien Bergamini fail2:	while (--ac >= 0)
3469c6307b1SDamien Bergamini 		rt2661_free_tx_ring(sc, &sc->txq[ac]);
3479c6307b1SDamien Bergamini fail1:	mtx_destroy(&sc->sc_mtx);
348b032f27cSSam Leffler 	if_free(ifp);
3499c6307b1SDamien Bergamini 	return error;
3509c6307b1SDamien Bergamini }
3519c6307b1SDamien Bergamini 
3529c6307b1SDamien Bergamini int
3539c6307b1SDamien Bergamini rt2661_detach(void *xsc)
3549c6307b1SDamien Bergamini {
3559c6307b1SDamien Bergamini 	struct rt2661_softc *sc = xsc;
356b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
357b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
3589c6307b1SDamien Bergamini 
359c5876e18SSam Leffler 	RAL_LOCK(sc);
360c5876e18SSam Leffler 	rt2661_stop_locked(sc);
361c5876e18SSam Leffler 	RAL_UNLOCK(sc);
3629c6307b1SDamien Bergamini 
3639c6307b1SDamien Bergamini 	bpfdetach(ifp);
3649c6307b1SDamien Bergamini 	ieee80211_ifdetach(ic);
3659c6307b1SDamien Bergamini 
3669c6307b1SDamien Bergamini 	rt2661_free_tx_ring(sc, &sc->txq[0]);
3679c6307b1SDamien Bergamini 	rt2661_free_tx_ring(sc, &sc->txq[1]);
3689c6307b1SDamien Bergamini 	rt2661_free_tx_ring(sc, &sc->txq[2]);
3699c6307b1SDamien Bergamini 	rt2661_free_tx_ring(sc, &sc->txq[3]);
3709c6307b1SDamien Bergamini 	rt2661_free_tx_ring(sc, &sc->mgtq);
3719c6307b1SDamien Bergamini 	rt2661_free_rx_ring(sc, &sc->rxq);
3729c6307b1SDamien Bergamini 
3739c6307b1SDamien Bergamini 	if_free(ifp);
3749c6307b1SDamien Bergamini 
3759c6307b1SDamien Bergamini 	mtx_destroy(&sc->sc_mtx);
3769c6307b1SDamien Bergamini 
3779c6307b1SDamien Bergamini 	return 0;
3789c6307b1SDamien Bergamini }
3799c6307b1SDamien Bergamini 
380b032f27cSSam Leffler static struct ieee80211vap *
381b032f27cSSam Leffler rt2661_vap_create(struct ieee80211com *ic,
382b032f27cSSam Leffler 	const char name[IFNAMSIZ], int unit, int opmode, int flags,
383b032f27cSSam Leffler 	const uint8_t bssid[IEEE80211_ADDR_LEN],
384b032f27cSSam Leffler 	const uint8_t mac[IEEE80211_ADDR_LEN])
385b032f27cSSam Leffler {
386b032f27cSSam Leffler 	struct ifnet *ifp = ic->ic_ifp;
387b032f27cSSam Leffler 	struct rt2661_vap *rvp;
388b032f27cSSam Leffler 	struct ieee80211vap *vap;
389b032f27cSSam Leffler 
390b032f27cSSam Leffler 	switch (opmode) {
391b032f27cSSam Leffler 	case IEEE80211_M_STA:
392b032f27cSSam Leffler 	case IEEE80211_M_IBSS:
393b032f27cSSam Leffler 	case IEEE80211_M_AHDEMO:
394b032f27cSSam Leffler 	case IEEE80211_M_MONITOR:
395b032f27cSSam Leffler 	case IEEE80211_M_HOSTAP:
396b032f27cSSam Leffler 		if (!TAILQ_EMPTY(&ic->ic_vaps)) {
397b032f27cSSam Leffler 			if_printf(ifp, "only 1 vap supported\n");
398b032f27cSSam Leffler 			return NULL;
399b032f27cSSam Leffler 		}
400b032f27cSSam Leffler 		if (opmode == IEEE80211_M_STA)
401b032f27cSSam Leffler 			flags |= IEEE80211_CLONE_NOBEACONS;
402b032f27cSSam Leffler 		break;
403b032f27cSSam Leffler 	case IEEE80211_M_WDS:
404b032f27cSSam Leffler 		if (TAILQ_EMPTY(&ic->ic_vaps) ||
405b032f27cSSam Leffler 		    ic->ic_opmode != IEEE80211_M_HOSTAP) {
406b032f27cSSam Leffler 			if_printf(ifp, "wds only supported in ap mode\n");
407b032f27cSSam Leffler 			return NULL;
408b032f27cSSam Leffler 		}
409b032f27cSSam Leffler 		/*
410b032f27cSSam Leffler 		 * Silently remove any request for a unique
411b032f27cSSam Leffler 		 * bssid; WDS vap's always share the local
412b032f27cSSam Leffler 		 * mac address.
413b032f27cSSam Leffler 		 */
414b032f27cSSam Leffler 		flags &= ~IEEE80211_CLONE_BSSID;
415b032f27cSSam Leffler 		break;
416b032f27cSSam Leffler 	default:
417b032f27cSSam Leffler 		if_printf(ifp, "unknown opmode %d\n", opmode);
418b032f27cSSam Leffler 		return NULL;
419b032f27cSSam Leffler 	}
420b032f27cSSam Leffler 	rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap),
421b032f27cSSam Leffler 	    M_80211_VAP, M_NOWAIT | M_ZERO);
422b032f27cSSam Leffler 	if (rvp == NULL)
423b032f27cSSam Leffler 		return NULL;
424b032f27cSSam Leffler 	vap = &rvp->ral_vap;
425b032f27cSSam Leffler 	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
426b032f27cSSam Leffler 
427b032f27cSSam Leffler 	/* override state transition machine */
428b032f27cSSam Leffler 	rvp->ral_newstate = vap->iv_newstate;
429b032f27cSSam Leffler 	vap->iv_newstate = rt2661_newstate;
430b032f27cSSam Leffler #if 0
431b032f27cSSam Leffler 	vap->iv_update_beacon = rt2661_beacon_update;
432b032f27cSSam Leffler #endif
433b032f27cSSam Leffler 
434b032f27cSSam Leffler 	ieee80211_amrr_init(&rvp->amrr, vap,
435b032f27cSSam Leffler 	    IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD,
436b032f27cSSam Leffler 	    IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD,
437b032f27cSSam Leffler 	    500 /* ms */);
438b032f27cSSam Leffler 
439b032f27cSSam Leffler 	/* complete setup */
440b032f27cSSam Leffler 	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
441b032f27cSSam Leffler 	if (TAILQ_FIRST(&ic->ic_vaps) == vap)
442b032f27cSSam Leffler 		ic->ic_opmode = opmode;
443b032f27cSSam Leffler 	return vap;
444b032f27cSSam Leffler }
445b032f27cSSam Leffler 
446b032f27cSSam Leffler static void
447b032f27cSSam Leffler rt2661_vap_delete(struct ieee80211vap *vap)
448b032f27cSSam Leffler {
449b032f27cSSam Leffler 	struct rt2661_vap *rvp = RT2661_VAP(vap);
450b032f27cSSam Leffler 
451b032f27cSSam Leffler 	ieee80211_amrr_cleanup(&rvp->amrr);
452b032f27cSSam Leffler 	ieee80211_vap_detach(vap);
453b032f27cSSam Leffler 	free(rvp, M_80211_VAP);
454b032f27cSSam Leffler }
455b032f27cSSam Leffler 
4569c6307b1SDamien Bergamini void
4579c6307b1SDamien Bergamini rt2661_shutdown(void *xsc)
4589c6307b1SDamien Bergamini {
4599c6307b1SDamien Bergamini 	struct rt2661_softc *sc = xsc;
4609c6307b1SDamien Bergamini 
4619c6307b1SDamien Bergamini 	rt2661_stop(sc);
4629c6307b1SDamien Bergamini }
4639c6307b1SDamien Bergamini 
4649c6307b1SDamien Bergamini void
4659c6307b1SDamien Bergamini rt2661_suspend(void *xsc)
4669c6307b1SDamien Bergamini {
4679c6307b1SDamien Bergamini 	struct rt2661_softc *sc = xsc;
4689c6307b1SDamien Bergamini 
4699c6307b1SDamien Bergamini 	rt2661_stop(sc);
4709c6307b1SDamien Bergamini }
4719c6307b1SDamien Bergamini 
4729c6307b1SDamien Bergamini void
4739c6307b1SDamien Bergamini rt2661_resume(void *xsc)
4749c6307b1SDamien Bergamini {
4759c6307b1SDamien Bergamini 	struct rt2661_softc *sc = xsc;
476b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
4779c6307b1SDamien Bergamini 
478b032f27cSSam Leffler 	if (ifp->if_flags & IFF_UP)
479b032f27cSSam Leffler 		rt2661_init(sc);
4809c6307b1SDamien Bergamini }
4819c6307b1SDamien Bergamini 
4829c6307b1SDamien Bergamini static void
4839c6307b1SDamien Bergamini rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
4849c6307b1SDamien Bergamini {
4859c6307b1SDamien Bergamini 	if (error != 0)
4869c6307b1SDamien Bergamini 		return;
4879c6307b1SDamien Bergamini 
4889c6307b1SDamien Bergamini 	KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
4899c6307b1SDamien Bergamini 
4909c6307b1SDamien Bergamini 	*(bus_addr_t *)arg = segs[0].ds_addr;
4919c6307b1SDamien Bergamini }
4929c6307b1SDamien Bergamini 
4939c6307b1SDamien Bergamini static int
4949c6307b1SDamien Bergamini rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
4959c6307b1SDamien Bergamini     int count)
4969c6307b1SDamien Bergamini {
4979c6307b1SDamien Bergamini 	int i, error;
4989c6307b1SDamien Bergamini 
4999c6307b1SDamien Bergamini 	ring->count = count;
5009c6307b1SDamien Bergamini 	ring->queued = 0;
5019c6307b1SDamien Bergamini 	ring->cur = ring->next = ring->stat = 0;
5029c6307b1SDamien Bergamini 
50336ffd4baSKevin Lo 	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
50436ffd4baSKevin Lo 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
50536ffd4baSKevin Lo 	    count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
50636ffd4baSKevin Lo 	    0, NULL, NULL, &ring->desc_dmat);
5079c6307b1SDamien Bergamini 	if (error != 0) {
5089c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
5099c6307b1SDamien Bergamini 		goto fail;
5109c6307b1SDamien Bergamini 	}
5119c6307b1SDamien Bergamini 
5129c6307b1SDamien Bergamini 	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
5139c6307b1SDamien Bergamini 	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
5149c6307b1SDamien Bergamini 	if (error != 0) {
5159c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
5169c6307b1SDamien Bergamini 		goto fail;
5179c6307b1SDamien Bergamini 	}
5189c6307b1SDamien Bergamini 
5199c6307b1SDamien Bergamini 	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
5209c6307b1SDamien Bergamini 	    count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
5219c6307b1SDamien Bergamini 	    0);
5229c6307b1SDamien Bergamini 	if (error != 0) {
5239c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not load desc DMA map\n");
5249c6307b1SDamien Bergamini 		goto fail;
5259c6307b1SDamien Bergamini 	}
5269c6307b1SDamien Bergamini 
5279c6307b1SDamien Bergamini 	ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
5289c6307b1SDamien Bergamini 	    M_NOWAIT | M_ZERO);
5299c6307b1SDamien Bergamini 	if (ring->data == NULL) {
5309c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate soft data\n");
5319c6307b1SDamien Bergamini 		error = ENOMEM;
5329c6307b1SDamien Bergamini 		goto fail;
5339c6307b1SDamien Bergamini 	}
5349c6307b1SDamien Bergamini 
53536ffd4baSKevin Lo 	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
53636ffd4baSKevin Lo 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
53736ffd4baSKevin Lo 	    RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
5389c6307b1SDamien Bergamini 	if (error != 0) {
5399c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not create data DMA tag\n");
5409c6307b1SDamien Bergamini 		goto fail;
5419c6307b1SDamien Bergamini 	}
5429c6307b1SDamien Bergamini 
5439c6307b1SDamien Bergamini 	for (i = 0; i < count; i++) {
5449c6307b1SDamien Bergamini 		error = bus_dmamap_create(ring->data_dmat, 0,
5459c6307b1SDamien Bergamini 		    &ring->data[i].map);
5469c6307b1SDamien Bergamini 		if (error != 0) {
5479c6307b1SDamien Bergamini 			device_printf(sc->sc_dev, "could not create DMA map\n");
5489c6307b1SDamien Bergamini 			goto fail;
5499c6307b1SDamien Bergamini 		}
5509c6307b1SDamien Bergamini 	}
5519c6307b1SDamien Bergamini 
5529c6307b1SDamien Bergamini 	return 0;
5539c6307b1SDamien Bergamini 
5549c6307b1SDamien Bergamini fail:	rt2661_free_tx_ring(sc, ring);
5559c6307b1SDamien Bergamini 	return error;
5569c6307b1SDamien Bergamini }
5579c6307b1SDamien Bergamini 
5589c6307b1SDamien Bergamini static void
5599c6307b1SDamien Bergamini rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
5609c6307b1SDamien Bergamini {
5619c6307b1SDamien Bergamini 	struct rt2661_tx_desc *desc;
5629c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
5639c6307b1SDamien Bergamini 	int i;
5649c6307b1SDamien Bergamini 
5659c6307b1SDamien Bergamini 	for (i = 0; i < ring->count; i++) {
5669c6307b1SDamien Bergamini 		desc = &ring->desc[i];
5679c6307b1SDamien Bergamini 		data = &ring->data[i];
5689c6307b1SDamien Bergamini 
5699c6307b1SDamien Bergamini 		if (data->m != NULL) {
5709c6307b1SDamien Bergamini 			bus_dmamap_sync(ring->data_dmat, data->map,
5719c6307b1SDamien Bergamini 			    BUS_DMASYNC_POSTWRITE);
5729c6307b1SDamien Bergamini 			bus_dmamap_unload(ring->data_dmat, data->map);
5739c6307b1SDamien Bergamini 			m_freem(data->m);
5749c6307b1SDamien Bergamini 			data->m = NULL;
5759c6307b1SDamien Bergamini 		}
5769c6307b1SDamien Bergamini 
5779c6307b1SDamien Bergamini 		if (data->ni != NULL) {
5789c6307b1SDamien Bergamini 			ieee80211_free_node(data->ni);
5799c6307b1SDamien Bergamini 			data->ni = NULL;
5809c6307b1SDamien Bergamini 		}
5819c6307b1SDamien Bergamini 
5829c6307b1SDamien Bergamini 		desc->flags = 0;
5839c6307b1SDamien Bergamini 	}
5849c6307b1SDamien Bergamini 
5859c6307b1SDamien Bergamini 	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
5869c6307b1SDamien Bergamini 
5879c6307b1SDamien Bergamini 	ring->queued = 0;
5889c6307b1SDamien Bergamini 	ring->cur = ring->next = ring->stat = 0;
5899c6307b1SDamien Bergamini }
5909c6307b1SDamien Bergamini 
5919c6307b1SDamien Bergamini static void
5929c6307b1SDamien Bergamini rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
5939c6307b1SDamien Bergamini {
5949c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
5959c6307b1SDamien Bergamini 	int i;
5969c6307b1SDamien Bergamini 
5979c6307b1SDamien Bergamini 	if (ring->desc != NULL) {
5989c6307b1SDamien Bergamini 		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
5999c6307b1SDamien Bergamini 		    BUS_DMASYNC_POSTWRITE);
6009c6307b1SDamien Bergamini 		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
6019c6307b1SDamien Bergamini 		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
6029c6307b1SDamien Bergamini 	}
6039c6307b1SDamien Bergamini 
6049c6307b1SDamien Bergamini 	if (ring->desc_dmat != NULL)
6059c6307b1SDamien Bergamini 		bus_dma_tag_destroy(ring->desc_dmat);
6069c6307b1SDamien Bergamini 
6079c6307b1SDamien Bergamini 	if (ring->data != NULL) {
6089c6307b1SDamien Bergamini 		for (i = 0; i < ring->count; i++) {
6099c6307b1SDamien Bergamini 			data = &ring->data[i];
6109c6307b1SDamien Bergamini 
6119c6307b1SDamien Bergamini 			if (data->m != NULL) {
6129c6307b1SDamien Bergamini 				bus_dmamap_sync(ring->data_dmat, data->map,
6139c6307b1SDamien Bergamini 				    BUS_DMASYNC_POSTWRITE);
6149c6307b1SDamien Bergamini 				bus_dmamap_unload(ring->data_dmat, data->map);
6159c6307b1SDamien Bergamini 				m_freem(data->m);
6169c6307b1SDamien Bergamini 			}
6179c6307b1SDamien Bergamini 
6189c6307b1SDamien Bergamini 			if (data->ni != NULL)
6199c6307b1SDamien Bergamini 				ieee80211_free_node(data->ni);
6209c6307b1SDamien Bergamini 
6219c6307b1SDamien Bergamini 			if (data->map != NULL)
6229c6307b1SDamien Bergamini 				bus_dmamap_destroy(ring->data_dmat, data->map);
6239c6307b1SDamien Bergamini 		}
6249c6307b1SDamien Bergamini 
6259c6307b1SDamien Bergamini 		free(ring->data, M_DEVBUF);
6269c6307b1SDamien Bergamini 	}
6279c6307b1SDamien Bergamini 
6289c6307b1SDamien Bergamini 	if (ring->data_dmat != NULL)
6299c6307b1SDamien Bergamini 		bus_dma_tag_destroy(ring->data_dmat);
6309c6307b1SDamien Bergamini }
6319c6307b1SDamien Bergamini 
6329c6307b1SDamien Bergamini static int
6339c6307b1SDamien Bergamini rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
6349c6307b1SDamien Bergamini     int count)
6359c6307b1SDamien Bergamini {
6369c6307b1SDamien Bergamini 	struct rt2661_rx_desc *desc;
6379c6307b1SDamien Bergamini 	struct rt2661_rx_data *data;
6389c6307b1SDamien Bergamini 	bus_addr_t physaddr;
6399c6307b1SDamien Bergamini 	int i, error;
6409c6307b1SDamien Bergamini 
6419c6307b1SDamien Bergamini 	ring->count = count;
6429c6307b1SDamien Bergamini 	ring->cur = ring->next = 0;
6439c6307b1SDamien Bergamini 
64436ffd4baSKevin Lo 	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
64536ffd4baSKevin Lo 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
64636ffd4baSKevin Lo 	    count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
64736ffd4baSKevin Lo 	    0, NULL, NULL, &ring->desc_dmat);
6489c6307b1SDamien Bergamini 	if (error != 0) {
6499c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not create desc DMA tag\n");
6509c6307b1SDamien Bergamini 		goto fail;
6519c6307b1SDamien Bergamini 	}
6529c6307b1SDamien Bergamini 
6539c6307b1SDamien Bergamini 	error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
6549c6307b1SDamien Bergamini 	    BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
6559c6307b1SDamien Bergamini 	if (error != 0) {
6569c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate DMA memory\n");
6579c6307b1SDamien Bergamini 		goto fail;
6589c6307b1SDamien Bergamini 	}
6599c6307b1SDamien Bergamini 
6609c6307b1SDamien Bergamini 	error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
6619c6307b1SDamien Bergamini 	    count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
6629c6307b1SDamien Bergamini 	    0);
6639c6307b1SDamien Bergamini 	if (error != 0) {
6649c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not load desc DMA map\n");
6659c6307b1SDamien Bergamini 		goto fail;
6669c6307b1SDamien Bergamini 	}
6679c6307b1SDamien Bergamini 
6689c6307b1SDamien Bergamini 	ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
6699c6307b1SDamien Bergamini 	    M_NOWAIT | M_ZERO);
6709c6307b1SDamien Bergamini 	if (ring->data == NULL) {
6719c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate soft data\n");
6729c6307b1SDamien Bergamini 		error = ENOMEM;
6739c6307b1SDamien Bergamini 		goto fail;
6749c6307b1SDamien Bergamini 	}
6759c6307b1SDamien Bergamini 
6769c6307b1SDamien Bergamini 	/*
6779c6307b1SDamien Bergamini 	 * Pre-allocate Rx buffers and populate Rx ring.
6789c6307b1SDamien Bergamini 	 */
67936ffd4baSKevin Lo 	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
68036ffd4baSKevin Lo 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
68136ffd4baSKevin Lo 	    1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
6829c6307b1SDamien Bergamini 	if (error != 0) {
6839c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not create data DMA tag\n");
6849c6307b1SDamien Bergamini 		goto fail;
6859c6307b1SDamien Bergamini 	}
6869c6307b1SDamien Bergamini 
6879c6307b1SDamien Bergamini 	for (i = 0; i < count; i++) {
6889c6307b1SDamien Bergamini 		desc = &sc->rxq.desc[i];
6899c6307b1SDamien Bergamini 		data = &sc->rxq.data[i];
6909c6307b1SDamien Bergamini 
6919c6307b1SDamien Bergamini 		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
6929c6307b1SDamien Bergamini 		if (error != 0) {
6939c6307b1SDamien Bergamini 			device_printf(sc->sc_dev, "could not create DMA map\n");
6949c6307b1SDamien Bergamini 			goto fail;
6959c6307b1SDamien Bergamini 		}
6969c6307b1SDamien Bergamini 
6979c6307b1SDamien Bergamini 		data->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
6989c6307b1SDamien Bergamini 		if (data->m == NULL) {
6999c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
7009c6307b1SDamien Bergamini 			    "could not allocate rx mbuf\n");
7019c6307b1SDamien Bergamini 			error = ENOMEM;
7029c6307b1SDamien Bergamini 			goto fail;
7039c6307b1SDamien Bergamini 		}
7049c6307b1SDamien Bergamini 
7059c6307b1SDamien Bergamini 		error = bus_dmamap_load(ring->data_dmat, data->map,
7069c6307b1SDamien Bergamini 		    mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
7079c6307b1SDamien Bergamini 		    &physaddr, 0);
7089c6307b1SDamien Bergamini 		if (error != 0) {
7099c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
7109c6307b1SDamien Bergamini 			    "could not load rx buf DMA map");
7119c6307b1SDamien Bergamini 			goto fail;
7129c6307b1SDamien Bergamini 		}
7139c6307b1SDamien Bergamini 
7149c6307b1SDamien Bergamini 		desc->flags = htole32(RT2661_RX_BUSY);
7159c6307b1SDamien Bergamini 		desc->physaddr = htole32(physaddr);
7169c6307b1SDamien Bergamini 	}
7179c6307b1SDamien Bergamini 
7189c6307b1SDamien Bergamini 	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
7199c6307b1SDamien Bergamini 
7209c6307b1SDamien Bergamini 	return 0;
7219c6307b1SDamien Bergamini 
7229c6307b1SDamien Bergamini fail:	rt2661_free_rx_ring(sc, ring);
7239c6307b1SDamien Bergamini 	return error;
7249c6307b1SDamien Bergamini }
7259c6307b1SDamien Bergamini 
7269c6307b1SDamien Bergamini static void
7279c6307b1SDamien Bergamini rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
7289c6307b1SDamien Bergamini {
7299c6307b1SDamien Bergamini 	int i;
7309c6307b1SDamien Bergamini 
7319c6307b1SDamien Bergamini 	for (i = 0; i < ring->count; i++)
7329c6307b1SDamien Bergamini 		ring->desc[i].flags = htole32(RT2661_RX_BUSY);
7339c6307b1SDamien Bergamini 
7349c6307b1SDamien Bergamini 	bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
7359c6307b1SDamien Bergamini 
7369c6307b1SDamien Bergamini 	ring->cur = ring->next = 0;
7379c6307b1SDamien Bergamini }
7389c6307b1SDamien Bergamini 
7399c6307b1SDamien Bergamini static void
7409c6307b1SDamien Bergamini rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
7419c6307b1SDamien Bergamini {
7429c6307b1SDamien Bergamini 	struct rt2661_rx_data *data;
7439c6307b1SDamien Bergamini 	int i;
7449c6307b1SDamien Bergamini 
7459c6307b1SDamien Bergamini 	if (ring->desc != NULL) {
7469c6307b1SDamien Bergamini 		bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
7479c6307b1SDamien Bergamini 		    BUS_DMASYNC_POSTWRITE);
7489c6307b1SDamien Bergamini 		bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
7499c6307b1SDamien Bergamini 		bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
7509c6307b1SDamien Bergamini 	}
7519c6307b1SDamien Bergamini 
7529c6307b1SDamien Bergamini 	if (ring->desc_dmat != NULL)
7539c6307b1SDamien Bergamini 		bus_dma_tag_destroy(ring->desc_dmat);
7549c6307b1SDamien Bergamini 
7559c6307b1SDamien Bergamini 	if (ring->data != NULL) {
7569c6307b1SDamien Bergamini 		for (i = 0; i < ring->count; i++) {
7579c6307b1SDamien Bergamini 			data = &ring->data[i];
7589c6307b1SDamien Bergamini 
7599c6307b1SDamien Bergamini 			if (data->m != NULL) {
7609c6307b1SDamien Bergamini 				bus_dmamap_sync(ring->data_dmat, data->map,
7619c6307b1SDamien Bergamini 				    BUS_DMASYNC_POSTREAD);
7629c6307b1SDamien Bergamini 				bus_dmamap_unload(ring->data_dmat, data->map);
7639c6307b1SDamien Bergamini 				m_freem(data->m);
7649c6307b1SDamien Bergamini 			}
7659c6307b1SDamien Bergamini 
7669c6307b1SDamien Bergamini 			if (data->map != NULL)
7679c6307b1SDamien Bergamini 				bus_dmamap_destroy(ring->data_dmat, data->map);
7689c6307b1SDamien Bergamini 		}
7699c6307b1SDamien Bergamini 
7709c6307b1SDamien Bergamini 		free(ring->data, M_DEVBUF);
7719c6307b1SDamien Bergamini 	}
7729c6307b1SDamien Bergamini 
7739c6307b1SDamien Bergamini 	if (ring->data_dmat != NULL)
7749c6307b1SDamien Bergamini 		bus_dma_tag_destroy(ring->data_dmat);
7759c6307b1SDamien Bergamini }
7769c6307b1SDamien Bergamini 
7779c6307b1SDamien Bergamini static struct ieee80211_node *
7789c6307b1SDamien Bergamini rt2661_node_alloc(struct ieee80211_node_table *nt)
7799c6307b1SDamien Bergamini {
7809c6307b1SDamien Bergamini 	struct rt2661_node *rn;
7819c6307b1SDamien Bergamini 
7829c6307b1SDamien Bergamini 	rn = malloc(sizeof (struct rt2661_node), M_80211_NODE,
7839c6307b1SDamien Bergamini 	    M_NOWAIT | M_ZERO);
7849c6307b1SDamien Bergamini 
7859c6307b1SDamien Bergamini 	return (rn != NULL) ? &rn->ni : NULL;
7869c6307b1SDamien Bergamini }
7879c6307b1SDamien Bergamini 
788b032f27cSSam Leffler static void
789b032f27cSSam Leffler rt2661_newassoc(struct ieee80211_node *ni, int isnew)
7909c6307b1SDamien Bergamini {
791b032f27cSSam Leffler 	struct ieee80211vap *vap = ni->ni_vap;
792b032f27cSSam Leffler 
793b032f27cSSam Leffler 	ieee80211_amrr_node_init(&RT2661_VAP(vap)->amrr,
794b032f27cSSam Leffler 	    &RT2661_NODE(ni)->amrr, ni);
795b032f27cSSam Leffler }
796b032f27cSSam Leffler 
797b032f27cSSam Leffler static int
798b032f27cSSam Leffler rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
799b032f27cSSam Leffler {
800b032f27cSSam Leffler 	struct rt2661_vap *rvp = RT2661_VAP(vap);
801b032f27cSSam Leffler 	struct ieee80211com *ic = vap->iv_ic;
802b032f27cSSam Leffler 	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
8039c6307b1SDamien Bergamini 	int error;
8049c6307b1SDamien Bergamini 
805b032f27cSSam Leffler 	if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
8069c6307b1SDamien Bergamini 		uint32_t tmp;
8079c6307b1SDamien Bergamini 
8089c6307b1SDamien Bergamini 		/* abort TSF synchronization */
8099c6307b1SDamien Bergamini 		tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
8109c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
8119c6307b1SDamien Bergamini 	}
8129c6307b1SDamien Bergamini 
813b032f27cSSam Leffler 	error = rvp->ral_newstate(vap, nstate, arg);
814b032f27cSSam Leffler 
815b032f27cSSam Leffler 	if (error == 0 && nstate == IEEE80211_S_RUN) {
816b032f27cSSam Leffler 		struct ieee80211_node *ni = vap->iv_bss;
817b032f27cSSam Leffler 
818b032f27cSSam Leffler 		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
8199c6307b1SDamien Bergamini 			rt2661_enable_mrr(sc);
8209c6307b1SDamien Bergamini 			rt2661_set_txpreamble(sc);
8219c6307b1SDamien Bergamini 			rt2661_set_basicrates(sc, &ni->ni_rates);
8229c6307b1SDamien Bergamini 			rt2661_set_bssid(sc, ni->ni_bssid);
8239c6307b1SDamien Bergamini 		}
8249c6307b1SDamien Bergamini 
825b032f27cSSam Leffler 		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
826b032f27cSSam Leffler 		    vap->iv_opmode == IEEE80211_M_IBSS) {
827b032f27cSSam Leffler 			error = rt2661_prepare_beacon(sc, vap);
828b032f27cSSam Leffler 			if (error != 0)
829b032f27cSSam Leffler 				return error;
8309c6307b1SDamien Bergamini 		}
831b032f27cSSam Leffler 		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
832b032f27cSSam Leffler 			if (vap->iv_opmode == IEEE80211_M_STA) {
833b032f27cSSam Leffler 				/* fake a join to init the tx rate */
834b032f27cSSam Leffler 				rt2661_newassoc(ni, 1);
835b032f27cSSam Leffler 			}
8369c6307b1SDamien Bergamini 			rt2661_enable_tsf_sync(sc);
8379c6307b1SDamien Bergamini 		}
8389c6307b1SDamien Bergamini 	}
839b032f27cSSam Leffler 	return error;
8409c6307b1SDamien Bergamini }
8419c6307b1SDamien Bergamini 
8429c6307b1SDamien Bergamini /*
8439c6307b1SDamien Bergamini  * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
8449c6307b1SDamien Bergamini  * 93C66).
8459c6307b1SDamien Bergamini  */
8469c6307b1SDamien Bergamini static uint16_t
8479c6307b1SDamien Bergamini rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
8489c6307b1SDamien Bergamini {
8499c6307b1SDamien Bergamini 	uint32_t tmp;
8509c6307b1SDamien Bergamini 	uint16_t val;
8519c6307b1SDamien Bergamini 	int n;
8529c6307b1SDamien Bergamini 
8539c6307b1SDamien Bergamini 	/* clock C once before the first command */
8549c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, 0);
8559c6307b1SDamien Bergamini 
8569c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S);
8579c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8589c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S);
8599c6307b1SDamien Bergamini 
8609c6307b1SDamien Bergamini 	/* write start bit (1) */
8619c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
8629c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
8639c6307b1SDamien Bergamini 
8649c6307b1SDamien Bergamini 	/* write READ opcode (10) */
8659c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
8669c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
8679c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S);
8689c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8699c6307b1SDamien Bergamini 
8709c6307b1SDamien Bergamini 	/* write address (A5-A0 or A7-A0) */
8719c6307b1SDamien Bergamini 	n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
8729c6307b1SDamien Bergamini 	for (; n >= 0; n--) {
8739c6307b1SDamien Bergamini 		RT2661_EEPROM_CTL(sc, RT2661_S |
8749c6307b1SDamien Bergamini 		    (((addr >> n) & 1) << RT2661_SHIFT_D));
8759c6307b1SDamien Bergamini 		RT2661_EEPROM_CTL(sc, RT2661_S |
8769c6307b1SDamien Bergamini 		    (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
8779c6307b1SDamien Bergamini 	}
8789c6307b1SDamien Bergamini 
8799c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S);
8809c6307b1SDamien Bergamini 
8819c6307b1SDamien Bergamini 	/* read data Q15-Q0 */
8829c6307b1SDamien Bergamini 	val = 0;
8839c6307b1SDamien Bergamini 	for (n = 15; n >= 0; n--) {
8849c6307b1SDamien Bergamini 		RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8859c6307b1SDamien Bergamini 		tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
8869c6307b1SDamien Bergamini 		val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
8879c6307b1SDamien Bergamini 		RT2661_EEPROM_CTL(sc, RT2661_S);
8889c6307b1SDamien Bergamini 	}
8899c6307b1SDamien Bergamini 
8909c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, 0);
8919c6307b1SDamien Bergamini 
8929c6307b1SDamien Bergamini 	/* clear Chip Select and clock C */
8939c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_S);
8949c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, 0);
8959c6307b1SDamien Bergamini 	RT2661_EEPROM_CTL(sc, RT2661_C);
8969c6307b1SDamien Bergamini 
8979c6307b1SDamien Bergamini 	return val;
8989c6307b1SDamien Bergamini }
8999c6307b1SDamien Bergamini 
9009c6307b1SDamien Bergamini static void
9019c6307b1SDamien Bergamini rt2661_tx_intr(struct rt2661_softc *sc)
9029c6307b1SDamien Bergamini {
903b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
9049c6307b1SDamien Bergamini 	struct rt2661_tx_ring *txq;
9059c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
9069c6307b1SDamien Bergamini 	struct rt2661_node *rn;
9079c6307b1SDamien Bergamini 	uint32_t val;
9089c6307b1SDamien Bergamini 	int qid, retrycnt;
9099c6307b1SDamien Bergamini 
9109c6307b1SDamien Bergamini 	for (;;) {
91168e8e04eSSam Leffler 		struct ieee80211_node *ni;
91268e8e04eSSam Leffler 		struct mbuf *m;
91368e8e04eSSam Leffler 
9149c6307b1SDamien Bergamini 		val = RAL_READ(sc, RT2661_STA_CSR4);
9159c6307b1SDamien Bergamini 		if (!(val & RT2661_TX_STAT_VALID))
9169c6307b1SDamien Bergamini 			break;
9179c6307b1SDamien Bergamini 
9189c6307b1SDamien Bergamini 		/* retrieve the queue in which this frame was sent */
9199c6307b1SDamien Bergamini 		qid = RT2661_TX_QID(val);
9209c6307b1SDamien Bergamini 		txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
9219c6307b1SDamien Bergamini 
9229c6307b1SDamien Bergamini 		/* retrieve rate control algorithm context */
9239c6307b1SDamien Bergamini 		data = &txq->data[txq->stat];
92468e8e04eSSam Leffler 		m = data->m;
92568e8e04eSSam Leffler 		data->m = NULL;
92668e8e04eSSam Leffler 		ni = data->ni;
92768e8e04eSSam Leffler 		data->ni = NULL;
9289c6307b1SDamien Bergamini 
9293da2dc07SMax Khon 		/* if no frame has been sent, ignore */
93068e8e04eSSam Leffler 		if (ni == NULL)
9313da2dc07SMax Khon 			continue;
9323da2dc07SMax Khon 
933b032f27cSSam Leffler 		rn = RT2661_NODE(ni);
93468e8e04eSSam Leffler 
9359c6307b1SDamien Bergamini 		switch (RT2661_TX_RESULT(val)) {
9369c6307b1SDamien Bergamini 		case RT2661_TX_SUCCESS:
9379c6307b1SDamien Bergamini 			retrycnt = RT2661_TX_RETRYCNT(val);
9389c6307b1SDamien Bergamini 
939b032f27cSSam Leffler 			DPRINTFN(sc, 10, "data frame sent successfully after "
940b032f27cSSam Leffler 			    "%d retries\n", retrycnt);
941b032f27cSSam Leffler 			if (data->rix != IEEE80211_FIXED_RATE_NONE)
942b032f27cSSam Leffler 				ieee80211_amrr_tx_complete(&rn->amrr,
943b032f27cSSam Leffler 				    IEEE80211_AMRR_SUCCESS, retrycnt);
9449c6307b1SDamien Bergamini 			ifp->if_opackets++;
9459c6307b1SDamien Bergamini 			break;
9469c6307b1SDamien Bergamini 
9479c6307b1SDamien Bergamini 		case RT2661_TX_RETRY_FAIL:
948b032f27cSSam Leffler 			retrycnt = RT2661_TX_RETRYCNT(val);
949b032f27cSSam Leffler 
950b032f27cSSam Leffler 			DPRINTFN(sc, 9, "%s\n",
951b032f27cSSam Leffler 			    "sending data frame failed (too much retries)");
952b032f27cSSam Leffler 			if (data->rix != IEEE80211_FIXED_RATE_NONE)
953b032f27cSSam Leffler 				ieee80211_amrr_tx_complete(&rn->amrr,
954b032f27cSSam Leffler 				    IEEE80211_AMRR_FAILURE, retrycnt);
9559c6307b1SDamien Bergamini 			ifp->if_oerrors++;
9569c6307b1SDamien Bergamini 			break;
9579c6307b1SDamien Bergamini 
9589c6307b1SDamien Bergamini 		default:
9599c6307b1SDamien Bergamini 			/* other failure */
9609c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
9619c6307b1SDamien Bergamini 			    "sending data frame failed 0x%08x\n", val);
9629c6307b1SDamien Bergamini 			ifp->if_oerrors++;
9639c6307b1SDamien Bergamini 		}
9649c6307b1SDamien Bergamini 
965b032f27cSSam Leffler 		DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
9669c6307b1SDamien Bergamini 
9679c6307b1SDamien Bergamini 		txq->queued--;
9689c6307b1SDamien Bergamini 		if (++txq->stat >= txq->count)	/* faster than % count */
9699c6307b1SDamien Bergamini 			txq->stat = 0;
97068e8e04eSSam Leffler 
97168e8e04eSSam Leffler 		if (m->m_flags & M_TXCB)
97268e8e04eSSam Leffler 			ieee80211_process_callback(ni, m,
97368e8e04eSSam Leffler 				RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
97468e8e04eSSam Leffler 		m_freem(m);
97568e8e04eSSam Leffler 		ieee80211_free_node(ni);
9769c6307b1SDamien Bergamini 	}
9779c6307b1SDamien Bergamini 
9789c6307b1SDamien Bergamini 	sc->sc_tx_timer = 0;
9799c6307b1SDamien Bergamini 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
980b032f27cSSam Leffler 
981b032f27cSSam Leffler 	rt2661_start_locked(ifp);
9829c6307b1SDamien Bergamini }
9839c6307b1SDamien Bergamini 
9849c6307b1SDamien Bergamini static void
9859c6307b1SDamien Bergamini rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
9869c6307b1SDamien Bergamini {
9879c6307b1SDamien Bergamini 	struct rt2661_tx_desc *desc;
9889c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
9899c6307b1SDamien Bergamini 
9909c6307b1SDamien Bergamini 	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
9919c6307b1SDamien Bergamini 
9929c6307b1SDamien Bergamini 	for (;;) {
9939c6307b1SDamien Bergamini 		desc = &txq->desc[txq->next];
9949c6307b1SDamien Bergamini 		data = &txq->data[txq->next];
9959c6307b1SDamien Bergamini 
9969c6307b1SDamien Bergamini 		if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
9979c6307b1SDamien Bergamini 		    !(le32toh(desc->flags) & RT2661_TX_VALID))
9989c6307b1SDamien Bergamini 			break;
9999c6307b1SDamien Bergamini 
10009c6307b1SDamien Bergamini 		bus_dmamap_sync(txq->data_dmat, data->map,
10019c6307b1SDamien Bergamini 		    BUS_DMASYNC_POSTWRITE);
10029c6307b1SDamien Bergamini 		bus_dmamap_unload(txq->data_dmat, data->map);
10039c6307b1SDamien Bergamini 
10049c6307b1SDamien Bergamini 		/* descriptor is no longer valid */
10059c6307b1SDamien Bergamini 		desc->flags &= ~htole32(RT2661_TX_VALID);
10069c6307b1SDamien Bergamini 
1007b032f27cSSam Leffler 		DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
10089c6307b1SDamien Bergamini 
10099c6307b1SDamien Bergamini 		if (++txq->next >= txq->count)	/* faster than % count */
10109c6307b1SDamien Bergamini 			txq->next = 0;
10119c6307b1SDamien Bergamini 	}
10129c6307b1SDamien Bergamini 
10139c6307b1SDamien Bergamini 	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
10149c6307b1SDamien Bergamini }
10159c6307b1SDamien Bergamini 
10169c6307b1SDamien Bergamini static void
10179c6307b1SDamien Bergamini rt2661_rx_intr(struct rt2661_softc *sc)
10189c6307b1SDamien Bergamini {
1019b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1020b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
10219c6307b1SDamien Bergamini 	struct rt2661_rx_desc *desc;
10229c6307b1SDamien Bergamini 	struct rt2661_rx_data *data;
10239c6307b1SDamien Bergamini 	bus_addr_t physaddr;
10249c6307b1SDamien Bergamini 	struct ieee80211_frame *wh;
10259c6307b1SDamien Bergamini 	struct ieee80211_node *ni;
10269c6307b1SDamien Bergamini 	struct mbuf *mnew, *m;
10279c6307b1SDamien Bergamini 	int error;
10289c6307b1SDamien Bergamini 
10299c6307b1SDamien Bergamini 	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
10309c6307b1SDamien Bergamini 	    BUS_DMASYNC_POSTREAD);
10319c6307b1SDamien Bergamini 
10329c6307b1SDamien Bergamini 	for (;;) {
103368e8e04eSSam Leffler 		int rssi;
103468e8e04eSSam Leffler 
10359c6307b1SDamien Bergamini 		desc = &sc->rxq.desc[sc->rxq.cur];
10369c6307b1SDamien Bergamini 		data = &sc->rxq.data[sc->rxq.cur];
10379c6307b1SDamien Bergamini 
10389c6307b1SDamien Bergamini 		if (le32toh(desc->flags) & RT2661_RX_BUSY)
10399c6307b1SDamien Bergamini 			break;
10409c6307b1SDamien Bergamini 
10419c6307b1SDamien Bergamini 		if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
10429c6307b1SDamien Bergamini 		    (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
10439c6307b1SDamien Bergamini 			/*
10449c6307b1SDamien Bergamini 			 * This should not happen since we did not request
10459c6307b1SDamien Bergamini 			 * to receive those frames when we filled TXRX_CSR0.
10469c6307b1SDamien Bergamini 			 */
1047b032f27cSSam Leffler 			DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1048b032f27cSSam Leffler 			    le32toh(desc->flags));
10499c6307b1SDamien Bergamini 			ifp->if_ierrors++;
10509c6307b1SDamien Bergamini 			goto skip;
10519c6307b1SDamien Bergamini 		}
10529c6307b1SDamien Bergamini 
10539c6307b1SDamien Bergamini 		if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
10549c6307b1SDamien Bergamini 			ifp->if_ierrors++;
10559c6307b1SDamien Bergamini 			goto skip;
10569c6307b1SDamien Bergamini 		}
10579c6307b1SDamien Bergamini 
10589c6307b1SDamien Bergamini 		/*
10599c6307b1SDamien Bergamini 		 * Try to allocate a new mbuf for this ring element and load it
10609c6307b1SDamien Bergamini 		 * before processing the current mbuf. If the ring element
10619c6307b1SDamien Bergamini 		 * cannot be loaded, drop the received packet and reuse the old
10629c6307b1SDamien Bergamini 		 * mbuf. In the unlikely case that the old mbuf can't be
10639c6307b1SDamien Bergamini 		 * reloaded either, explicitly panic.
10649c6307b1SDamien Bergamini 		 */
10659c6307b1SDamien Bergamini 		mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
10669c6307b1SDamien Bergamini 		if (mnew == NULL) {
10679c6307b1SDamien Bergamini 			ifp->if_ierrors++;
10689c6307b1SDamien Bergamini 			goto skip;
10699c6307b1SDamien Bergamini 		}
10709c6307b1SDamien Bergamini 
10719c6307b1SDamien Bergamini 		bus_dmamap_sync(sc->rxq.data_dmat, data->map,
10729c6307b1SDamien Bergamini 		    BUS_DMASYNC_POSTREAD);
10739c6307b1SDamien Bergamini 		bus_dmamap_unload(sc->rxq.data_dmat, data->map);
10749c6307b1SDamien Bergamini 
10759c6307b1SDamien Bergamini 		error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
10769c6307b1SDamien Bergamini 		    mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
10779c6307b1SDamien Bergamini 		    &physaddr, 0);
10789c6307b1SDamien Bergamini 		if (error != 0) {
10799c6307b1SDamien Bergamini 			m_freem(mnew);
10809c6307b1SDamien Bergamini 
10819c6307b1SDamien Bergamini 			/* try to reload the old mbuf */
10829c6307b1SDamien Bergamini 			error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
10839c6307b1SDamien Bergamini 			    mtod(data->m, void *), MCLBYTES,
10849c6307b1SDamien Bergamini 			    rt2661_dma_map_addr, &physaddr, 0);
10859c6307b1SDamien Bergamini 			if (error != 0) {
10869c6307b1SDamien Bergamini 				/* very unlikely that it will fail... */
10879c6307b1SDamien Bergamini 				panic("%s: could not load old rx mbuf",
10889c6307b1SDamien Bergamini 				    device_get_name(sc->sc_dev));
10899c6307b1SDamien Bergamini 			}
10909c6307b1SDamien Bergamini 			ifp->if_ierrors++;
10919c6307b1SDamien Bergamini 			goto skip;
10929c6307b1SDamien Bergamini 		}
10939c6307b1SDamien Bergamini 
10949c6307b1SDamien Bergamini 		/*
10959c6307b1SDamien Bergamini 	 	 * New mbuf successfully loaded, update Rx ring and continue
10969c6307b1SDamien Bergamini 		 * processing.
10979c6307b1SDamien Bergamini 		 */
10989c6307b1SDamien Bergamini 		m = data->m;
10999c6307b1SDamien Bergamini 		data->m = mnew;
11009c6307b1SDamien Bergamini 		desc->physaddr = htole32(physaddr);
11019c6307b1SDamien Bergamini 
11029c6307b1SDamien Bergamini 		/* finalize mbuf */
11039c6307b1SDamien Bergamini 		m->m_pkthdr.rcvif = ifp;
11049c6307b1SDamien Bergamini 		m->m_pkthdr.len = m->m_len =
11059c6307b1SDamien Bergamini 		    (le32toh(desc->flags) >> 16) & 0xfff;
11069c6307b1SDamien Bergamini 
110768e8e04eSSam Leffler 		rssi = rt2661_get_rssi(sc, desc->rssi);
110868e8e04eSSam Leffler 
1109b032f27cSSam Leffler 		if (bpf_peers_present(ifp->if_bpf)) {
11109c6307b1SDamien Bergamini 			struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
11119c6307b1SDamien Bergamini 			uint32_t tsf_lo, tsf_hi;
11129c6307b1SDamien Bergamini 
11139c6307b1SDamien Bergamini 			/* get timestamp (low and high 32 bits) */
11149c6307b1SDamien Bergamini 			tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
11159c6307b1SDamien Bergamini 			tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
11169c6307b1SDamien Bergamini 
11179c6307b1SDamien Bergamini 			tap->wr_tsf =
11189c6307b1SDamien Bergamini 			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
11199c6307b1SDamien Bergamini 			tap->wr_flags = 0;
1120b032f27cSSam Leffler 			tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1121b032f27cSSam Leffler 			    le32toh(desc->flags) & RT2661_RX_OFDM);
112268e8e04eSSam Leffler 			tap->wr_antsignal = rssi < 0 ? 0 : rssi;
11239c6307b1SDamien Bergamini 
1124b032f27cSSam Leffler 			bpf_mtap2(ifp->if_bpf, tap, sc->sc_rxtap_len, m);
11259c6307b1SDamien Bergamini 		}
112668e8e04eSSam Leffler 		sc->sc_flags |= RAL_INPUT_RUNNING;
112768e8e04eSSam Leffler 		RAL_UNLOCK(sc);
11289c6307b1SDamien Bergamini 		wh = mtod(m, struct ieee80211_frame *);
112968e8e04eSSam Leffler 
11309c6307b1SDamien Bergamini 		/* send the frame to the 802.11 layer */
1131b032f27cSSam Leffler 		ni = ieee80211_find_rxnode(ic,
1132b032f27cSSam Leffler 		    (struct ieee80211_frame_min *)wh);
1133b032f27cSSam Leffler 		if (ni != NULL) {
1134b032f27cSSam Leffler 			/* Error happened during RSSI conversion. */
1135b032f27cSSam Leffler 			if (rssi < 0)
1136b032f27cSSam Leffler 				rssi = -30;	/* XXX ignored by net80211 */
11379c6307b1SDamien Bergamini 
1138b032f27cSSam Leffler 			(void) ieee80211_input(ni, m, rssi,
1139b032f27cSSam Leffler 			    RT2661_NOISE_FLOOR, 0);
1140b032f27cSSam Leffler 			ieee80211_free_node(ni);
1141b032f27cSSam Leffler 		} else
1142b032f27cSSam Leffler 			(void) ieee80211_input_all(ic, m, rssi,
1143b032f27cSSam Leffler 			    RT2661_NOISE_FLOOR, 0);
1144b032f27cSSam Leffler 
114568e8e04eSSam Leffler 		RAL_LOCK(sc);
114668e8e04eSSam Leffler 		sc->sc_flags &= ~RAL_INPUT_RUNNING;
11479c6307b1SDamien Bergamini 
11489c6307b1SDamien Bergamini skip:		desc->flags |= htole32(RT2661_RX_BUSY);
11499c6307b1SDamien Bergamini 
1150b032f27cSSam Leffler 		DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
11519c6307b1SDamien Bergamini 
11529c6307b1SDamien Bergamini 		sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
11539c6307b1SDamien Bergamini 	}
11549c6307b1SDamien Bergamini 
11559c6307b1SDamien Bergamini 	bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
11569c6307b1SDamien Bergamini 	    BUS_DMASYNC_PREWRITE);
11579c6307b1SDamien Bergamini }
11589c6307b1SDamien Bergamini 
11599c6307b1SDamien Bergamini /* ARGSUSED */
11609c6307b1SDamien Bergamini static void
11619c6307b1SDamien Bergamini rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
11629c6307b1SDamien Bergamini {
11639c6307b1SDamien Bergamini 	/* do nothing */
11649c6307b1SDamien Bergamini }
11659c6307b1SDamien Bergamini 
11669c6307b1SDamien Bergamini static void
11679c6307b1SDamien Bergamini rt2661_mcu_wakeup(struct rt2661_softc *sc)
11689c6307b1SDamien Bergamini {
11699c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
11709c6307b1SDamien Bergamini 
11719c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
11729c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
11739c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
11749c6307b1SDamien Bergamini 
11759c6307b1SDamien Bergamini 	/* send wakeup command to MCU */
11769c6307b1SDamien Bergamini 	rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
11779c6307b1SDamien Bergamini }
11789c6307b1SDamien Bergamini 
11799c6307b1SDamien Bergamini static void
11809c6307b1SDamien Bergamini rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
11819c6307b1SDamien Bergamini {
11829c6307b1SDamien Bergamini 	RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
11839c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
11849c6307b1SDamien Bergamini }
11859c6307b1SDamien Bergamini 
11869c6307b1SDamien Bergamini void
11879c6307b1SDamien Bergamini rt2661_intr(void *arg)
11889c6307b1SDamien Bergamini {
11899c6307b1SDamien Bergamini 	struct rt2661_softc *sc = arg;
1190d0934eb1SDamien Bergamini 	struct ifnet *ifp = sc->sc_ifp;
11919c6307b1SDamien Bergamini 	uint32_t r1, r2;
11929c6307b1SDamien Bergamini 
11939c6307b1SDamien Bergamini 	RAL_LOCK(sc);
11949c6307b1SDamien Bergamini 
11959c6307b1SDamien Bergamini 	/* disable MAC and MCU interrupts */
11969c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
11979c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
11989c6307b1SDamien Bergamini 
1199d0934eb1SDamien Bergamini 	/* don't re-enable interrupts if we're shutting down */
1200d0934eb1SDamien Bergamini 	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1201d0934eb1SDamien Bergamini 		RAL_UNLOCK(sc);
1202d0934eb1SDamien Bergamini 		return;
1203d0934eb1SDamien Bergamini 	}
1204d0934eb1SDamien Bergamini 
12059c6307b1SDamien Bergamini 	r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
12069c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
12079c6307b1SDamien Bergamini 
12089c6307b1SDamien Bergamini 	r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
12099c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
12109c6307b1SDamien Bergamini 
12119c6307b1SDamien Bergamini 	if (r1 & RT2661_MGT_DONE)
12129c6307b1SDamien Bergamini 		rt2661_tx_dma_intr(sc, &sc->mgtq);
12139c6307b1SDamien Bergamini 
12149c6307b1SDamien Bergamini 	if (r1 & RT2661_RX_DONE)
12159c6307b1SDamien Bergamini 		rt2661_rx_intr(sc);
12169c6307b1SDamien Bergamini 
12179c6307b1SDamien Bergamini 	if (r1 & RT2661_TX0_DMA_DONE)
12189c6307b1SDamien Bergamini 		rt2661_tx_dma_intr(sc, &sc->txq[0]);
12199c6307b1SDamien Bergamini 
12209c6307b1SDamien Bergamini 	if (r1 & RT2661_TX1_DMA_DONE)
12219c6307b1SDamien Bergamini 		rt2661_tx_dma_intr(sc, &sc->txq[1]);
12229c6307b1SDamien Bergamini 
12239c6307b1SDamien Bergamini 	if (r1 & RT2661_TX2_DMA_DONE)
12249c6307b1SDamien Bergamini 		rt2661_tx_dma_intr(sc, &sc->txq[2]);
12259c6307b1SDamien Bergamini 
12269c6307b1SDamien Bergamini 	if (r1 & RT2661_TX3_DMA_DONE)
12279c6307b1SDamien Bergamini 		rt2661_tx_dma_intr(sc, &sc->txq[3]);
12289c6307b1SDamien Bergamini 
12299c6307b1SDamien Bergamini 	if (r1 & RT2661_TX_DONE)
12309c6307b1SDamien Bergamini 		rt2661_tx_intr(sc);
12319c6307b1SDamien Bergamini 
12329c6307b1SDamien Bergamini 	if (r2 & RT2661_MCU_CMD_DONE)
12339c6307b1SDamien Bergamini 		rt2661_mcu_cmd_intr(sc);
12349c6307b1SDamien Bergamini 
12359c6307b1SDamien Bergamini 	if (r2 & RT2661_MCU_BEACON_EXPIRE)
12369c6307b1SDamien Bergamini 		rt2661_mcu_beacon_expire(sc);
12379c6307b1SDamien Bergamini 
12389c6307b1SDamien Bergamini 	if (r2 & RT2661_MCU_WAKEUP)
12399c6307b1SDamien Bergamini 		rt2661_mcu_wakeup(sc);
12409c6307b1SDamien Bergamini 
12419c6307b1SDamien Bergamini 	/* re-enable MAC and MCU interrupts */
12429c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
12439c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
12449c6307b1SDamien Bergamini 
12459c6307b1SDamien Bergamini 	RAL_UNLOCK(sc);
12469c6307b1SDamien Bergamini }
12479c6307b1SDamien Bergamini 
12489c6307b1SDamien Bergamini static void
12499c6307b1SDamien Bergamini rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
12509c6307b1SDamien Bergamini     uint32_t flags, uint16_t xflags, int len, int rate,
12519c6307b1SDamien Bergamini     const bus_dma_segment_t *segs, int nsegs, int ac)
12529c6307b1SDamien Bergamini {
1253b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1254b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
12559c6307b1SDamien Bergamini 	uint16_t plcp_length;
12569c6307b1SDamien Bergamini 	int i, remainder;
12579c6307b1SDamien Bergamini 
12589c6307b1SDamien Bergamini 	desc->flags = htole32(flags);
12599c6307b1SDamien Bergamini 	desc->flags |= htole32(len << 16);
12609c6307b1SDamien Bergamini 	desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
12619c6307b1SDamien Bergamini 
12629c6307b1SDamien Bergamini 	desc->xflags = htole16(xflags);
12639c6307b1SDamien Bergamini 	desc->xflags |= htole16(nsegs << 13);
12649c6307b1SDamien Bergamini 
12659c6307b1SDamien Bergamini 	desc->wme = htole16(
12669c6307b1SDamien Bergamini 	    RT2661_QID(ac) |
12679c6307b1SDamien Bergamini 	    RT2661_AIFSN(2) |
12689c6307b1SDamien Bergamini 	    RT2661_LOGCWMIN(4) |
12699c6307b1SDamien Bergamini 	    RT2661_LOGCWMAX(10));
12709c6307b1SDamien Bergamini 
12719c6307b1SDamien Bergamini 	/*
12729c6307b1SDamien Bergamini 	 * Remember in which queue this frame was sent. This field is driver
12739c6307b1SDamien Bergamini 	 * private data only. It will be made available by the NIC in STA_CSR4
12749c6307b1SDamien Bergamini 	 * on Tx interrupts.
12759c6307b1SDamien Bergamini 	 */
12769c6307b1SDamien Bergamini 	desc->qid = ac;
12779c6307b1SDamien Bergamini 
12789c6307b1SDamien Bergamini 	/* setup PLCP fields */
1279b032f27cSSam Leffler 	desc->plcp_signal  = ieee80211_rate2plcp(rate);
12809c6307b1SDamien Bergamini 	desc->plcp_service = 4;
12819c6307b1SDamien Bergamini 
12829c6307b1SDamien Bergamini 	len += IEEE80211_CRC_LEN;
1283b032f27cSSam Leffler 	if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) {
12849c6307b1SDamien Bergamini 		desc->flags |= htole32(RT2661_TX_OFDM);
12859c6307b1SDamien Bergamini 
12869c6307b1SDamien Bergamini 		plcp_length = len & 0xfff;
12879c6307b1SDamien Bergamini 		desc->plcp_length_hi = plcp_length >> 6;
12889c6307b1SDamien Bergamini 		desc->plcp_length_lo = plcp_length & 0x3f;
12899c6307b1SDamien Bergamini 	} else {
12909c6307b1SDamien Bergamini 		plcp_length = (16 * len + rate - 1) / rate;
12919c6307b1SDamien Bergamini 		if (rate == 22) {
12929c6307b1SDamien Bergamini 			remainder = (16 * len) % 22;
12939c6307b1SDamien Bergamini 			if (remainder != 0 && remainder < 7)
12949c6307b1SDamien Bergamini 				desc->plcp_service |= RT2661_PLCP_LENGEXT;
12959c6307b1SDamien Bergamini 		}
12969c6307b1SDamien Bergamini 		desc->plcp_length_hi = plcp_length >> 8;
12979c6307b1SDamien Bergamini 		desc->plcp_length_lo = plcp_length & 0xff;
12989c6307b1SDamien Bergamini 
12999c6307b1SDamien Bergamini 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
13009c6307b1SDamien Bergamini 			desc->plcp_signal |= 0x08;
13019c6307b1SDamien Bergamini 	}
13029c6307b1SDamien Bergamini 
13039c6307b1SDamien Bergamini 	/* RT2x61 supports scatter with up to 5 segments */
13049c6307b1SDamien Bergamini 	for (i = 0; i < nsegs; i++) {
13059c6307b1SDamien Bergamini 		desc->addr[i] = htole32(segs[i].ds_addr);
13069c6307b1SDamien Bergamini 		desc->len [i] = htole16(segs[i].ds_len);
13079c6307b1SDamien Bergamini 	}
13089c6307b1SDamien Bergamini }
13099c6307b1SDamien Bergamini 
13109c6307b1SDamien Bergamini static int
13119c6307b1SDamien Bergamini rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
13129c6307b1SDamien Bergamini     struct ieee80211_node *ni)
13139c6307b1SDamien Bergamini {
1314b032f27cSSam Leffler 	struct ieee80211vap *vap = ni->ni_vap;
1315b032f27cSSam Leffler 	struct ieee80211com *ic = ni->ni_ic;
1316b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
13179c6307b1SDamien Bergamini 	struct rt2661_tx_desc *desc;
13189c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
13199c6307b1SDamien Bergamini 	struct ieee80211_frame *wh;
132002f0a39fSKevin Lo 	struct ieee80211_key *k;
13219c6307b1SDamien Bergamini 	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
13229c6307b1SDamien Bergamini 	uint16_t dur;
13239c6307b1SDamien Bergamini 	uint32_t flags = 0;	/* XXX HWSEQ */
13249c6307b1SDamien Bergamini 	int nsegs, rate, error;
13259c6307b1SDamien Bergamini 
13269c6307b1SDamien Bergamini 	desc = &sc->mgtq.desc[sc->mgtq.cur];
13279c6307b1SDamien Bergamini 	data = &sc->mgtq.data[sc->mgtq.cur];
13289c6307b1SDamien Bergamini 
1329b032f27cSSam Leffler 	rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
13309c6307b1SDamien Bergamini 
133102f0a39fSKevin Lo 	wh = mtod(m0, struct ieee80211_frame *);
133202f0a39fSKevin Lo 
133302f0a39fSKevin Lo 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1334b032f27cSSam Leffler 		k = ieee80211_crypto_encap(ni, m0);
133502f0a39fSKevin Lo 		if (k == NULL) {
133602f0a39fSKevin Lo 			m_freem(m0);
133702f0a39fSKevin Lo 			return ENOBUFS;
133802f0a39fSKevin Lo 		}
133902f0a39fSKevin Lo 	}
134002f0a39fSKevin Lo 
13419c6307b1SDamien Bergamini 	error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
13429c6307b1SDamien Bergamini 	    segs, &nsegs, 0);
13439c6307b1SDamien Bergamini 	if (error != 0) {
13449c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
13459c6307b1SDamien Bergamini 		    error);
13469c6307b1SDamien Bergamini 		m_freem(m0);
13479c6307b1SDamien Bergamini 		return error;
13489c6307b1SDamien Bergamini 	}
13499c6307b1SDamien Bergamini 
1350b032f27cSSam Leffler 	if (bpf_peers_present(ifp->if_bpf)) {
13519c6307b1SDamien Bergamini 		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
13529c6307b1SDamien Bergamini 
13539c6307b1SDamien Bergamini 		tap->wt_flags = 0;
13549c6307b1SDamien Bergamini 		tap->wt_rate = rate;
13559c6307b1SDamien Bergamini 
1356b032f27cSSam Leffler 		bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0);
13579c6307b1SDamien Bergamini 	}
13589c6307b1SDamien Bergamini 
13599c6307b1SDamien Bergamini 	data->m = m0;
13609c6307b1SDamien Bergamini 	data->ni = ni;
1361b032f27cSSam Leffler 	/* management frames are not taken into account for amrr */
1362b032f27cSSam Leffler 	data->rix = IEEE80211_FIXED_RATE_NONE;
13639c6307b1SDamien Bergamini 
13649c6307b1SDamien Bergamini 	wh = mtod(m0, struct ieee80211_frame *);
13659c6307b1SDamien Bergamini 
13669c6307b1SDamien Bergamini 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
13679c6307b1SDamien Bergamini 		flags |= RT2661_TX_NEED_ACK;
13689c6307b1SDamien Bergamini 
1369b032f27cSSam Leffler 		dur = ieee80211_ack_duration(sc->sc_rates,
1370b032f27cSSam Leffler 		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
13719c6307b1SDamien Bergamini 		*(uint16_t *)wh->i_dur = htole16(dur);
13729c6307b1SDamien Bergamini 
13739c6307b1SDamien Bergamini 		/* tell hardware to add timestamp in probe responses */
13749c6307b1SDamien Bergamini 		if ((wh->i_fc[0] &
13759c6307b1SDamien Bergamini 		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
13769c6307b1SDamien Bergamini 		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
13779c6307b1SDamien Bergamini 			flags |= RT2661_TX_TIMESTAMP;
13789c6307b1SDamien Bergamini 	}
13799c6307b1SDamien Bergamini 
13809c6307b1SDamien Bergamini 	rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
13819c6307b1SDamien Bergamini 	    m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
13829c6307b1SDamien Bergamini 
13839c6307b1SDamien Bergamini 	bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
13849c6307b1SDamien Bergamini 	bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
13859c6307b1SDamien Bergamini 	    BUS_DMASYNC_PREWRITE);
13869c6307b1SDamien Bergamini 
1387b032f27cSSam Leffler 	DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1388b032f27cSSam Leffler 	    m0->m_pkthdr.len, sc->mgtq.cur, rate);
13899c6307b1SDamien Bergamini 
13909c6307b1SDamien Bergamini 	/* kick mgt */
13919c6307b1SDamien Bergamini 	sc->mgtq.queued++;
13929c6307b1SDamien Bergamini 	sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
13939c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
13949c6307b1SDamien Bergamini 
13959c6307b1SDamien Bergamini 	return 0;
13969c6307b1SDamien Bergamini }
13979c6307b1SDamien Bergamini 
1398b032f27cSSam Leffler static int
1399b032f27cSSam Leffler rt2661_sendprot(struct rt2661_softc *sc, int ac,
1400b032f27cSSam Leffler     const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
14019c6307b1SDamien Bergamini {
1402b032f27cSSam Leffler 	struct ieee80211com *ic = ni->ni_ic;
1403b032f27cSSam Leffler 	struct rt2661_tx_ring *txq = &sc->txq[ac];
1404b032f27cSSam Leffler 	const struct ieee80211_frame *wh;
1405b032f27cSSam Leffler 	struct rt2661_tx_desc *desc;
1406b032f27cSSam Leffler 	struct rt2661_tx_data *data;
1407b032f27cSSam Leffler 	struct mbuf *mprot;
1408b032f27cSSam Leffler 	int protrate, ackrate, pktlen, flags, isshort, error;
1409b032f27cSSam Leffler 	uint16_t dur;
1410b032f27cSSam Leffler 	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1411b032f27cSSam Leffler 	int nsegs;
14129c6307b1SDamien Bergamini 
1413b032f27cSSam Leffler 	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1414b032f27cSSam Leffler 	    ("protection %d", prot));
1415b032f27cSSam Leffler 
1416b032f27cSSam Leffler 	wh = mtod(m, const struct ieee80211_frame *);
1417b032f27cSSam Leffler 	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1418b032f27cSSam Leffler 
1419b032f27cSSam Leffler 	protrate = ieee80211_ctl_rate(sc->sc_rates, rate);
1420b032f27cSSam Leffler 	ackrate = ieee80211_ack_rate(sc->sc_rates, rate);
1421b032f27cSSam Leffler 
1422b032f27cSSam Leffler 	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1423b032f27cSSam Leffler 	dur = ieee80211_compute_duration(sc->sc_rates, pktlen, rate, isshort);
1424b032f27cSSam Leffler 	    + ieee80211_ack_duration(sc->sc_rates, rate, isshort);
1425b032f27cSSam Leffler 	flags = RT2661_TX_MORE_FRAG;
1426b032f27cSSam Leffler 	if (prot == IEEE80211_PROT_RTSCTS) {
1427b032f27cSSam Leffler 		/* NB: CTS is the same size as an ACK */
1428b032f27cSSam Leffler 		dur += ieee80211_ack_duration(sc->sc_rates, rate, isshort);
1429b032f27cSSam Leffler 		flags |= RT2661_TX_NEED_ACK;
1430b032f27cSSam Leffler 		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1431b032f27cSSam Leffler 	} else {
1432b032f27cSSam Leffler 		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1433b032f27cSSam Leffler 	}
1434b032f27cSSam Leffler 	if (mprot == NULL) {
1435b032f27cSSam Leffler 		/* XXX stat + msg */
1436b032f27cSSam Leffler 		return ENOBUFS;
14379c6307b1SDamien Bergamini 	}
14389c6307b1SDamien Bergamini 
1439b032f27cSSam Leffler 	data = &txq->data[txq->cur];
1440b032f27cSSam Leffler 	desc = &txq->desc[txq->cur];
14419c6307b1SDamien Bergamini 
1442b032f27cSSam Leffler 	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1443b032f27cSSam Leffler 	    &nsegs, 0);
1444b032f27cSSam Leffler 	if (error != 0) {
1445b032f27cSSam Leffler 		device_printf(sc->sc_dev,
1446b032f27cSSam Leffler 		    "could not map mbuf (error %d)\n", error);
1447b032f27cSSam Leffler 		m_freem(mprot);
1448b032f27cSSam Leffler 		return error;
1449b032f27cSSam Leffler 	}
14509c6307b1SDamien Bergamini 
1451b032f27cSSam Leffler 	data->m = mprot;
1452b032f27cSSam Leffler 	data->ni = ieee80211_ref_node(ni);
1453b032f27cSSam Leffler 	/* ctl frames are not taken into account for amrr */
1454b032f27cSSam Leffler 	data->rix = IEEE80211_FIXED_RATE_NONE;
14559c6307b1SDamien Bergamini 
1456b032f27cSSam Leffler 	rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1457b032f27cSSam Leffler 	    protrate, segs, 1, ac);
1458b032f27cSSam Leffler 
1459b032f27cSSam Leffler 	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1460b032f27cSSam Leffler 	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1461b032f27cSSam Leffler 
1462b032f27cSSam Leffler 	txq->queued++;
1463b032f27cSSam Leffler 	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1464b032f27cSSam Leffler 
1465b032f27cSSam Leffler 	return 0;
14669c6307b1SDamien Bergamini }
14679c6307b1SDamien Bergamini 
14689c6307b1SDamien Bergamini static int
14699c6307b1SDamien Bergamini rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
14709c6307b1SDamien Bergamini     struct ieee80211_node *ni, int ac)
14719c6307b1SDamien Bergamini {
1472b032f27cSSam Leffler 	struct ieee80211vap *vap = ni->ni_vap;
1473b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1474b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
14759c6307b1SDamien Bergamini 	struct rt2661_tx_ring *txq = &sc->txq[ac];
14769c6307b1SDamien Bergamini 	struct rt2661_tx_desc *desc;
14779c6307b1SDamien Bergamini 	struct rt2661_tx_data *data;
14789c6307b1SDamien Bergamini 	struct ieee80211_frame *wh;
1479b032f27cSSam Leffler 	const struct ieee80211_txparam *tp;
14809c6307b1SDamien Bergamini 	struct ieee80211_key *k;
14819c6307b1SDamien Bergamini 	const struct chanAccParams *cap;
14829c6307b1SDamien Bergamini 	struct mbuf *mnew;
14839c6307b1SDamien Bergamini 	bus_dma_segment_t segs[RT2661_MAX_SCATTER];
14849c6307b1SDamien Bergamini 	uint16_t dur;
1485b032f27cSSam Leffler 	uint32_t flags;
14869c6307b1SDamien Bergamini 	int error, nsegs, rate, noack = 0;
14879c6307b1SDamien Bergamini 
14889c6307b1SDamien Bergamini 	wh = mtod(m0, struct ieee80211_frame *);
14899c6307b1SDamien Bergamini 
1490b032f27cSSam Leffler 	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1491b032f27cSSam Leffler 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1492b032f27cSSam Leffler 		rate = tp->mcastrate;
1493b032f27cSSam Leffler 	} else if (m0->m_flags & M_EAPOL) {
1494b032f27cSSam Leffler 		rate = tp->mgmtrate;
1495b032f27cSSam Leffler 	} else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1496b032f27cSSam Leffler 		rate = tp->ucastrate;
14979c6307b1SDamien Bergamini 	} else {
1498b032f27cSSam Leffler 		(void) ieee80211_amrr_choose(ni, &RT2661_NODE(ni)->amrr);
1499b032f27cSSam Leffler 		rate = ni->ni_txrate;
15009c6307b1SDamien Bergamini 	}
15019c6307b1SDamien Bergamini 	rate &= IEEE80211_RATE_VAL;
15029c6307b1SDamien Bergamini 
15039c6307b1SDamien Bergamini 	if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
15049c6307b1SDamien Bergamini 		cap = &ic->ic_wme.wme_chanParams;
15059c6307b1SDamien Bergamini 		noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
15069c6307b1SDamien Bergamini 	}
15079c6307b1SDamien Bergamini 
15089c6307b1SDamien Bergamini 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1509b032f27cSSam Leffler 		k = ieee80211_crypto_encap(ni, m0);
15109c6307b1SDamien Bergamini 		if (k == NULL) {
15119c6307b1SDamien Bergamini 			m_freem(m0);
15129c6307b1SDamien Bergamini 			return ENOBUFS;
15139c6307b1SDamien Bergamini 		}
15149c6307b1SDamien Bergamini 
15159c6307b1SDamien Bergamini 		/* packet header may have moved, reset our local pointer */
15169c6307b1SDamien Bergamini 		wh = mtod(m0, struct ieee80211_frame *);
15179c6307b1SDamien Bergamini 	}
15189c6307b1SDamien Bergamini 
1519b032f27cSSam Leffler 	flags = 0;
1520b032f27cSSam Leffler 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1521b032f27cSSam Leffler 		int prot = IEEE80211_PROT_NONE;
1522b032f27cSSam Leffler 		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1523b032f27cSSam Leffler 			prot = IEEE80211_PROT_RTSCTS;
1524b032f27cSSam Leffler 		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1525b032f27cSSam Leffler 		    ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM)
1526b032f27cSSam Leffler 			prot = ic->ic_protmode;
1527b032f27cSSam Leffler 		if (prot != IEEE80211_PROT_NONE) {
1528b032f27cSSam Leffler 			error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1529b032f27cSSam Leffler 			if (error) {
15309c6307b1SDamien Bergamini 				m_freem(m0);
15319c6307b1SDamien Bergamini 				return error;
15329c6307b1SDamien Bergamini 			}
15339c6307b1SDamien Bergamini 			flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
15349c6307b1SDamien Bergamini 		}
1535b032f27cSSam Leffler 	}
15369c6307b1SDamien Bergamini 
15379c6307b1SDamien Bergamini 	data = &txq->data[txq->cur];
15389c6307b1SDamien Bergamini 	desc = &txq->desc[txq->cur];
15399c6307b1SDamien Bergamini 
15409c6307b1SDamien Bergamini 	error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
15419c6307b1SDamien Bergamini 	    &nsegs, 0);
15429c6307b1SDamien Bergamini 	if (error != 0 && error != EFBIG) {
15439c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
15449c6307b1SDamien Bergamini 		    error);
15459c6307b1SDamien Bergamini 		m_freem(m0);
15469c6307b1SDamien Bergamini 		return error;
15479c6307b1SDamien Bergamini 	}
15489c6307b1SDamien Bergamini 	if (error != 0) {
15499c6307b1SDamien Bergamini 		mnew = m_defrag(m0, M_DONTWAIT);
15509c6307b1SDamien Bergamini 		if (mnew == NULL) {
15519c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
15529c6307b1SDamien Bergamini 			    "could not defragment mbuf\n");
15539c6307b1SDamien Bergamini 			m_freem(m0);
15549c6307b1SDamien Bergamini 			return ENOBUFS;
15559c6307b1SDamien Bergamini 		}
15569c6307b1SDamien Bergamini 		m0 = mnew;
15579c6307b1SDamien Bergamini 
15589c6307b1SDamien Bergamini 		error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
15599c6307b1SDamien Bergamini 		    segs, &nsegs, 0);
15609c6307b1SDamien Bergamini 		if (error != 0) {
15619c6307b1SDamien Bergamini 			device_printf(sc->sc_dev,
15629c6307b1SDamien Bergamini 			    "could not map mbuf (error %d)\n", error);
15639c6307b1SDamien Bergamini 			m_freem(m0);
15649c6307b1SDamien Bergamini 			return error;
15659c6307b1SDamien Bergamini 		}
15669c6307b1SDamien Bergamini 
15679c6307b1SDamien Bergamini 		/* packet header have moved, reset our local pointer */
15689c6307b1SDamien Bergamini 		wh = mtod(m0, struct ieee80211_frame *);
15699c6307b1SDamien Bergamini 	}
15709c6307b1SDamien Bergamini 
1571b032f27cSSam Leffler 	if (bpf_peers_present(ifp->if_bpf)) {
15729c6307b1SDamien Bergamini 		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
15739c6307b1SDamien Bergamini 
15749c6307b1SDamien Bergamini 		tap->wt_flags = 0;
15759c6307b1SDamien Bergamini 		tap->wt_rate = rate;
15769c6307b1SDamien Bergamini 		tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
15779c6307b1SDamien Bergamini 		tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
15789c6307b1SDamien Bergamini 
1579b032f27cSSam Leffler 		bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m0);
15809c6307b1SDamien Bergamini 	}
15819c6307b1SDamien Bergamini 
15829c6307b1SDamien Bergamini 	data->m = m0;
15839c6307b1SDamien Bergamini 	data->ni = ni;
15849c6307b1SDamien Bergamini 
15859c6307b1SDamien Bergamini 	/* remember link conditions for rate adaptation algorithm */
1586b032f27cSSam Leffler 	if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1587b032f27cSSam Leffler 		data->rix = ni->ni_txrate;
1588b032f27cSSam Leffler 		/* XXX probably need last rssi value and not avg */
1589b032f27cSSam Leffler 		data->rssi = ic->ic_node_getrssi(ni);
15909c6307b1SDamien Bergamini 	} else
1591b032f27cSSam Leffler 		data->rix = IEEE80211_FIXED_RATE_NONE;
15929c6307b1SDamien Bergamini 
15939c6307b1SDamien Bergamini 	if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
15949c6307b1SDamien Bergamini 		flags |= RT2661_TX_NEED_ACK;
15959c6307b1SDamien Bergamini 
1596b032f27cSSam Leffler 		dur = ieee80211_ack_duration(sc->sc_rates,
1597b032f27cSSam Leffler 		    rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
15989c6307b1SDamien Bergamini 		*(uint16_t *)wh->i_dur = htole16(dur);
15999c6307b1SDamien Bergamini 	}
16009c6307b1SDamien Bergamini 
16019c6307b1SDamien Bergamini 	rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
16029c6307b1SDamien Bergamini 	    nsegs, ac);
16039c6307b1SDamien Bergamini 
16049c6307b1SDamien Bergamini 	bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
16059c6307b1SDamien Bergamini 	bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
16069c6307b1SDamien Bergamini 
1607b032f27cSSam Leffler 	DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1608b032f27cSSam Leffler 	    m0->m_pkthdr.len, txq->cur, rate);
16099c6307b1SDamien Bergamini 
16109c6307b1SDamien Bergamini 	/* kick Tx */
16119c6307b1SDamien Bergamini 	txq->queued++;
16129c6307b1SDamien Bergamini 	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
16139c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
16149c6307b1SDamien Bergamini 
16159c6307b1SDamien Bergamini 	return 0;
16169c6307b1SDamien Bergamini }
16179c6307b1SDamien Bergamini 
16189c6307b1SDamien Bergamini static void
1619b032f27cSSam Leffler rt2661_start_locked(struct ifnet *ifp)
1620b032f27cSSam Leffler {
1621b032f27cSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
1622b032f27cSSam Leffler 	struct mbuf *m;
1623b032f27cSSam Leffler 	struct ieee80211_node *ni;
1624b032f27cSSam Leffler 	int ac;
1625b032f27cSSam Leffler 
1626b032f27cSSam Leffler 	RAL_LOCK_ASSERT(sc);
1627b032f27cSSam Leffler 
1628b032f27cSSam Leffler 	/* prevent management frames from being sent if we're not ready */
1629b032f27cSSam Leffler 	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid)
1630b032f27cSSam Leffler 		return;
1631b032f27cSSam Leffler 
1632b032f27cSSam Leffler 	for (;;) {
1633b032f27cSSam Leffler 		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1634b032f27cSSam Leffler 		if (m == NULL)
1635b032f27cSSam Leffler 			break;
1636b032f27cSSam Leffler 
1637b032f27cSSam Leffler 		ac = M_WME_GETAC(m);
1638b032f27cSSam Leffler 		if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1639b032f27cSSam Leffler 			/* there is no place left in this ring */
1640b032f27cSSam Leffler 			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1641b032f27cSSam Leffler 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1642b032f27cSSam Leffler 			break;
1643b032f27cSSam Leffler 		}
1644b032f27cSSam Leffler 
1645b032f27cSSam Leffler 		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1646b032f27cSSam Leffler 		m = ieee80211_encap(ni, m);
1647b032f27cSSam Leffler 		if (m == NULL) {
1648b032f27cSSam Leffler 			ieee80211_free_node(ni);
1649b032f27cSSam Leffler 			ifp->if_oerrors++;
1650b032f27cSSam Leffler 			continue;
1651b032f27cSSam Leffler 		}
1652b032f27cSSam Leffler 
1653b032f27cSSam Leffler 		if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1654b032f27cSSam Leffler 			ieee80211_free_node(ni);
1655b032f27cSSam Leffler 			ifp->if_oerrors++;
1656b032f27cSSam Leffler 			break;
1657b032f27cSSam Leffler 		}
1658b032f27cSSam Leffler 
1659b032f27cSSam Leffler 		sc->sc_tx_timer = 5;
1660b032f27cSSam Leffler 	}
1661b032f27cSSam Leffler }
1662b032f27cSSam Leffler 
1663b032f27cSSam Leffler static void
16649c6307b1SDamien Bergamini rt2661_start(struct ifnet *ifp)
16659c6307b1SDamien Bergamini {
16669c6307b1SDamien Bergamini 	struct rt2661_softc *sc = ifp->if_softc;
1667b032f27cSSam Leffler 
1668b032f27cSSam Leffler 	RAL_LOCK(sc);
1669b032f27cSSam Leffler 	rt2661_start_locked(ifp);
1670b032f27cSSam Leffler 	RAL_UNLOCK(sc);
1671b032f27cSSam Leffler }
1672b032f27cSSam Leffler 
1673b032f27cSSam Leffler static int
1674b032f27cSSam Leffler rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1675b032f27cSSam Leffler 	const struct ieee80211_bpf_params *params)
1676b032f27cSSam Leffler {
1677b032f27cSSam Leffler 	struct ieee80211com *ic = ni->ni_ic;
1678b032f27cSSam Leffler 	struct ifnet *ifp = ic->ic_ifp;
1679b032f27cSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
16809c6307b1SDamien Bergamini 
16819c6307b1SDamien Bergamini 	RAL_LOCK(sc);
16829c6307b1SDamien Bergamini 
1683d0934eb1SDamien Bergamini 	/* prevent management frames from being sent if we're not ready */
1684b032f27cSSam Leffler 	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1685d0934eb1SDamien Bergamini 		RAL_UNLOCK(sc);
1686b032f27cSSam Leffler 		m_freem(m);
1687b032f27cSSam Leffler 		ieee80211_free_node(ni);
1688b032f27cSSam Leffler 		return ENETDOWN;
1689d0934eb1SDamien Bergamini 	}
16909c6307b1SDamien Bergamini 	if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
16919c6307b1SDamien Bergamini 		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1692b032f27cSSam Leffler 		RAL_UNLOCK(sc);
1693b032f27cSSam Leffler 		m_freem(m);
169468e8e04eSSam Leffler 		ieee80211_free_node(ni);
1695b032f27cSSam Leffler 		return ENOBUFS;		/* XXX */
169668e8e04eSSam Leffler 	}
16979c6307b1SDamien Bergamini 
1698b032f27cSSam Leffler 	ifp->if_opackets++;
1699b032f27cSSam Leffler 
17002b9411e2SSam Leffler 	/*
1701b032f27cSSam Leffler 	 * Legacy path; interpret frame contents to decide
1702b032f27cSSam Leffler 	 * precisely how to send the frame.
1703b032f27cSSam Leffler 	 * XXX raw path
17042b9411e2SSam Leffler 	 */
1705b032f27cSSam Leffler 	if (rt2661_tx_mgt(sc, m, ni) != 0)
1706b032f27cSSam Leffler 		goto bad;
17079c6307b1SDamien Bergamini 	sc->sc_tx_timer = 5;
17089c6307b1SDamien Bergamini 
17099c6307b1SDamien Bergamini 	RAL_UNLOCK(sc);
1710b032f27cSSam Leffler 
1711b032f27cSSam Leffler 	return 0;
1712b032f27cSSam Leffler bad:
1713b032f27cSSam Leffler 	ifp->if_oerrors++;
1714b032f27cSSam Leffler 	ieee80211_free_node(ni);
1715b032f27cSSam Leffler 	RAL_UNLOCK(sc);
1716b032f27cSSam Leffler 	return EIO;		/* XXX */
17179c6307b1SDamien Bergamini }
17189c6307b1SDamien Bergamini 
17199c6307b1SDamien Bergamini static void
17208f435158SBruce M Simpson rt2661_watchdog(void *arg)
17219c6307b1SDamien Bergamini {
17228f435158SBruce M Simpson 	struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1723b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
17249c6307b1SDamien Bergamini 
1725b032f27cSSam Leffler 	RAL_LOCK_ASSERT(sc);
1726b032f27cSSam Leffler 
1727b032f27cSSam Leffler 	KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
1728b032f27cSSam Leffler 
1729b032f27cSSam Leffler 	if (sc->sc_invalid)		/* card ejected */
1730b032f27cSSam Leffler 		return;
1731b032f27cSSam Leffler 
1732b032f27cSSam Leffler 	if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1733b032f27cSSam Leffler 		if_printf(ifp, "device timeout\n");
1734b032f27cSSam Leffler 		rt2661_init_locked(sc);
1735b032f27cSSam Leffler 		ifp->if_oerrors++;
1736b032f27cSSam Leffler 		/* NB: callout is reset in rt2661_init() */
17379c6307b1SDamien Bergamini 		return;
17389c6307b1SDamien Bergamini 	}
17398f435158SBruce M Simpson 	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
17409c6307b1SDamien Bergamini }
17419c6307b1SDamien Bergamini 
17429c6307b1SDamien Bergamini static int
17439c6307b1SDamien Bergamini rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
17449c6307b1SDamien Bergamini {
17459c6307b1SDamien Bergamini 	struct rt2661_softc *sc = ifp->if_softc;
1746b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
1747b032f27cSSam Leffler 	struct ifreq *ifr = (struct ifreq *) data;
1748b032f27cSSam Leffler 	int error = 0, startall = 0;
17499c6307b1SDamien Bergamini 
1750b032f27cSSam Leffler 	RAL_LOCK(sc);
17519c6307b1SDamien Bergamini 	switch (cmd) {
17529c6307b1SDamien Bergamini 	case SIOCSIFFLAGS:
17539c6307b1SDamien Bergamini 		if (ifp->if_flags & IFF_UP) {
1754b032f27cSSam Leffler 			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1755b032f27cSSam Leffler 				rt2661_init_locked(sc);
1756b032f27cSSam Leffler 				startall = 1;
1757b032f27cSSam Leffler 			} else
1758b032f27cSSam Leffler 				rt2661_update_promisc(ifp);
17599c6307b1SDamien Bergamini 		} else {
17609c6307b1SDamien Bergamini 			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1761b032f27cSSam Leffler 				rt2661_stop_locked(sc);
17629c6307b1SDamien Bergamini 		}
17639c6307b1SDamien Bergamini 		break;
1764b032f27cSSam Leffler 	case SIOCGIFMEDIA:
1765b032f27cSSam Leffler 	case SIOCSIFMEDIA:
1766b032f27cSSam Leffler 		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1767b032f27cSSam Leffler 		break;
17689c6307b1SDamien Bergamini 	default:
1769b032f27cSSam Leffler 		error = ether_ioctl(ifp, cmd, data);
1770b032f27cSSam Leffler 		break;
17719c6307b1SDamien Bergamini 	}
1772b032f27cSSam Leffler 	RAL_UNLOCK(sc);
17739c6307b1SDamien Bergamini 
1774b032f27cSSam Leffler 	if (startall)
1775b032f27cSSam Leffler 		ieee80211_start_all(ic);
17769c6307b1SDamien Bergamini 	return error;
17779c6307b1SDamien Bergamini }
17789c6307b1SDamien Bergamini 
17799c6307b1SDamien Bergamini static void
17809c6307b1SDamien Bergamini rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
17819c6307b1SDamien Bergamini {
17829c6307b1SDamien Bergamini 	uint32_t tmp;
17839c6307b1SDamien Bergamini 	int ntries;
17849c6307b1SDamien Bergamini 
17859c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 100; ntries++) {
17869c6307b1SDamien Bergamini 		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
17879c6307b1SDamien Bergamini 			break;
17889c6307b1SDamien Bergamini 		DELAY(1);
17899c6307b1SDamien Bergamini 	}
17909c6307b1SDamien Bergamini 	if (ntries == 100) {
17919c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not write to BBP\n");
17929c6307b1SDamien Bergamini 		return;
17939c6307b1SDamien Bergamini 	}
17949c6307b1SDamien Bergamini 
17959c6307b1SDamien Bergamini 	tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
17969c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
17979c6307b1SDamien Bergamini 
1798b032f27cSSam Leffler 	DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
17999c6307b1SDamien Bergamini }
18009c6307b1SDamien Bergamini 
18019c6307b1SDamien Bergamini static uint8_t
18029c6307b1SDamien Bergamini rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
18039c6307b1SDamien Bergamini {
18049c6307b1SDamien Bergamini 	uint32_t val;
18059c6307b1SDamien Bergamini 	int ntries;
18069c6307b1SDamien Bergamini 
18079c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 100; ntries++) {
18089c6307b1SDamien Bergamini 		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
18099c6307b1SDamien Bergamini 			break;
18109c6307b1SDamien Bergamini 		DELAY(1);
18119c6307b1SDamien Bergamini 	}
18129c6307b1SDamien Bergamini 	if (ntries == 100) {
18139c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not read from BBP\n");
18149c6307b1SDamien Bergamini 		return 0;
18159c6307b1SDamien Bergamini 	}
18169c6307b1SDamien Bergamini 
18179c6307b1SDamien Bergamini 	val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
18189c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_PHY_CSR3, val);
18199c6307b1SDamien Bergamini 
18209c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 100; ntries++) {
18219c6307b1SDamien Bergamini 		val = RAL_READ(sc, RT2661_PHY_CSR3);
18229c6307b1SDamien Bergamini 		if (!(val & RT2661_BBP_BUSY))
18239c6307b1SDamien Bergamini 			return val & 0xff;
18249c6307b1SDamien Bergamini 		DELAY(1);
18259c6307b1SDamien Bergamini 	}
18269c6307b1SDamien Bergamini 
18279c6307b1SDamien Bergamini 	device_printf(sc->sc_dev, "could not read from BBP\n");
18289c6307b1SDamien Bergamini 	return 0;
18299c6307b1SDamien Bergamini }
18309c6307b1SDamien Bergamini 
18319c6307b1SDamien Bergamini static void
18329c6307b1SDamien Bergamini rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
18339c6307b1SDamien Bergamini {
18349c6307b1SDamien Bergamini 	uint32_t tmp;
18359c6307b1SDamien Bergamini 	int ntries;
18369c6307b1SDamien Bergamini 
18379c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 100; ntries++) {
18389c6307b1SDamien Bergamini 		if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
18399c6307b1SDamien Bergamini 			break;
18409c6307b1SDamien Bergamini 		DELAY(1);
18419c6307b1SDamien Bergamini 	}
18429c6307b1SDamien Bergamini 	if (ntries == 100) {
18439c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not write to RF\n");
18449c6307b1SDamien Bergamini 		return;
18459c6307b1SDamien Bergamini 	}
18469c6307b1SDamien Bergamini 
18479c6307b1SDamien Bergamini 	tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
18489c6307b1SDamien Bergamini 	    (reg & 3);
18499c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
18509c6307b1SDamien Bergamini 
18519c6307b1SDamien Bergamini 	/* remember last written value in sc */
18529c6307b1SDamien Bergamini 	sc->rf_regs[reg] = val;
18539c6307b1SDamien Bergamini 
1854b032f27cSSam Leffler 	DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
18559c6307b1SDamien Bergamini }
18569c6307b1SDamien Bergamini 
18579c6307b1SDamien Bergamini static int
18589c6307b1SDamien Bergamini rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
18599c6307b1SDamien Bergamini {
18609c6307b1SDamien Bergamini 	if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
18619c6307b1SDamien Bergamini 		return EIO;	/* there is already a command pending */
18629c6307b1SDamien Bergamini 
18639c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
18649c6307b1SDamien Bergamini 	    RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
18659c6307b1SDamien Bergamini 
18669c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
18679c6307b1SDamien Bergamini 
18689c6307b1SDamien Bergamini 	return 0;
18699c6307b1SDamien Bergamini }
18709c6307b1SDamien Bergamini 
18719c6307b1SDamien Bergamini static void
18729c6307b1SDamien Bergamini rt2661_select_antenna(struct rt2661_softc *sc)
18739c6307b1SDamien Bergamini {
18749c6307b1SDamien Bergamini 	uint8_t bbp4, bbp77;
18759c6307b1SDamien Bergamini 	uint32_t tmp;
18769c6307b1SDamien Bergamini 
18779c6307b1SDamien Bergamini 	bbp4  = rt2661_bbp_read(sc,  4);
18789c6307b1SDamien Bergamini 	bbp77 = rt2661_bbp_read(sc, 77);
18799c6307b1SDamien Bergamini 
18809c6307b1SDamien Bergamini 	/* TBD */
18819c6307b1SDamien Bergamini 
18829c6307b1SDamien Bergamini 	/* make sure Rx is disabled before switching antenna */
18839c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
18849c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
18859c6307b1SDamien Bergamini 
18869c6307b1SDamien Bergamini 	rt2661_bbp_write(sc,  4, bbp4);
18879c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 77, bbp77);
18889c6307b1SDamien Bergamini 
18899c6307b1SDamien Bergamini 	/* restore Rx filter */
18909c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
18919c6307b1SDamien Bergamini }
18929c6307b1SDamien Bergamini 
18939c6307b1SDamien Bergamini /*
18949c6307b1SDamien Bergamini  * Enable multi-rate retries for frames sent at OFDM rates.
18959c6307b1SDamien Bergamini  * In 802.11b/g mode, allow fallback to CCK rates.
18969c6307b1SDamien Bergamini  */
18979c6307b1SDamien Bergamini static void
18989c6307b1SDamien Bergamini rt2661_enable_mrr(struct rt2661_softc *sc)
18999c6307b1SDamien Bergamini {
1900b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1901b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
19029c6307b1SDamien Bergamini 	uint32_t tmp;
19039c6307b1SDamien Bergamini 
19049c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
19059c6307b1SDamien Bergamini 
19069c6307b1SDamien Bergamini 	tmp &= ~RT2661_MRR_CCK_FALLBACK;
1907b032f27cSSam Leffler 	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
19089c6307b1SDamien Bergamini 		tmp |= RT2661_MRR_CCK_FALLBACK;
19099c6307b1SDamien Bergamini 	tmp |= RT2661_MRR_ENABLED;
19109c6307b1SDamien Bergamini 
19119c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
19129c6307b1SDamien Bergamini }
19139c6307b1SDamien Bergamini 
19149c6307b1SDamien Bergamini static void
19159c6307b1SDamien Bergamini rt2661_set_txpreamble(struct rt2661_softc *sc)
19169c6307b1SDamien Bergamini {
1917b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1918b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
19199c6307b1SDamien Bergamini 	uint32_t tmp;
19209c6307b1SDamien Bergamini 
19219c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
19229c6307b1SDamien Bergamini 
19239c6307b1SDamien Bergamini 	tmp &= ~RT2661_SHORT_PREAMBLE;
1924b032f27cSSam Leffler 	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
19259c6307b1SDamien Bergamini 		tmp |= RT2661_SHORT_PREAMBLE;
19269c6307b1SDamien Bergamini 
19279c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
19289c6307b1SDamien Bergamini }
19299c6307b1SDamien Bergamini 
19309c6307b1SDamien Bergamini static void
19319c6307b1SDamien Bergamini rt2661_set_basicrates(struct rt2661_softc *sc,
19329c6307b1SDamien Bergamini     const struct ieee80211_rateset *rs)
19339c6307b1SDamien Bergamini {
19349c6307b1SDamien Bergamini #define RV(r)	((r) & IEEE80211_RATE_VAL)
1935b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
1936b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
19379c6307b1SDamien Bergamini 	uint32_t mask = 0;
19389c6307b1SDamien Bergamini 	uint8_t rate;
19399c6307b1SDamien Bergamini 	int i, j;
19409c6307b1SDamien Bergamini 
19419c6307b1SDamien Bergamini 	for (i = 0; i < rs->rs_nrates; i++) {
19429c6307b1SDamien Bergamini 		rate = rs->rs_rates[i];
19439c6307b1SDamien Bergamini 
19449c6307b1SDamien Bergamini 		if (!(rate & IEEE80211_RATE_BASIC))
19459c6307b1SDamien Bergamini 			continue;
19469c6307b1SDamien Bergamini 
19479c6307b1SDamien Bergamini 		/*
19489c6307b1SDamien Bergamini 		 * Find h/w rate index.  We know it exists because the rate
19499c6307b1SDamien Bergamini 		 * set has already been negotiated.
19509c6307b1SDamien Bergamini 		 */
1951fa393cd5SSam Leffler 		for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
19529c6307b1SDamien Bergamini 
19539c6307b1SDamien Bergamini 		mask |= 1 << j;
19549c6307b1SDamien Bergamini 	}
19559c6307b1SDamien Bergamini 
19569c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
19579c6307b1SDamien Bergamini 
1958b032f27cSSam Leffler 	DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
19599c6307b1SDamien Bergamini #undef RV
19609c6307b1SDamien Bergamini }
19619c6307b1SDamien Bergamini 
19629c6307b1SDamien Bergamini /*
19639c6307b1SDamien Bergamini  * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
19649c6307b1SDamien Bergamini  * driver.
19659c6307b1SDamien Bergamini  */
19669c6307b1SDamien Bergamini static void
19679c6307b1SDamien Bergamini rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
19689c6307b1SDamien Bergamini {
19699c6307b1SDamien Bergamini 	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
19709c6307b1SDamien Bergamini 	uint32_t tmp;
19719c6307b1SDamien Bergamini 
19729c6307b1SDamien Bergamini 	/* update all BBP registers that depend on the band */
19739c6307b1SDamien Bergamini 	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
19749c6307b1SDamien Bergamini 	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
19759c6307b1SDamien Bergamini 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
19769c6307b1SDamien Bergamini 		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
19779c6307b1SDamien Bergamini 		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
19789c6307b1SDamien Bergamini 	}
19799c6307b1SDamien Bergamini 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
19809c6307b1SDamien Bergamini 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
19819c6307b1SDamien Bergamini 		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
19829c6307b1SDamien Bergamini 	}
19839c6307b1SDamien Bergamini 
19849c6307b1SDamien Bergamini 	rt2661_bbp_write(sc,  17, bbp17);
19859c6307b1SDamien Bergamini 	rt2661_bbp_write(sc,  96, bbp96);
19869c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 104, bbp104);
19879c6307b1SDamien Bergamini 
19889c6307b1SDamien Bergamini 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
19899c6307b1SDamien Bergamini 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
19909c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, 75, 0x80);
19919c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, 86, 0x80);
19929c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, 88, 0x80);
19939c6307b1SDamien Bergamini 	}
19949c6307b1SDamien Bergamini 
19959c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 35, bbp35);
19969c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 97, bbp97);
19979c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 98, bbp98);
19989c6307b1SDamien Bergamini 
19999c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_PHY_CSR0);
20009c6307b1SDamien Bergamini 	tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
20019c6307b1SDamien Bergamini 	if (IEEE80211_IS_CHAN_2GHZ(c))
20029c6307b1SDamien Bergamini 		tmp |= RT2661_PA_PE_2GHZ;
20039c6307b1SDamien Bergamini 	else
20049c6307b1SDamien Bergamini 		tmp |= RT2661_PA_PE_5GHZ;
20059c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
20069c6307b1SDamien Bergamini }
20079c6307b1SDamien Bergamini 
20089c6307b1SDamien Bergamini static void
20099c6307b1SDamien Bergamini rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
20109c6307b1SDamien Bergamini {
2011b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
2012b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
20139c6307b1SDamien Bergamini 	const struct rfprog *rfprog;
20149c6307b1SDamien Bergamini 	uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
20159c6307b1SDamien Bergamini 	int8_t power;
20169c6307b1SDamien Bergamini 	u_int i, chan;
20179c6307b1SDamien Bergamini 
20189c6307b1SDamien Bergamini 	chan = ieee80211_chan2ieee(ic, c);
2019b032f27cSSam Leffler 	KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2020b032f27cSSam Leffler 
2021b032f27cSSam Leffler 	sc->sc_rates = ieee80211_get_ratetable(c);
20229c6307b1SDamien Bergamini 
20239c6307b1SDamien Bergamini 	/* select the appropriate RF settings based on what EEPROM says */
20249c6307b1SDamien Bergamini 	rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
20259c6307b1SDamien Bergamini 
20269c6307b1SDamien Bergamini 	/* find the settings for this channel (we know it exists) */
20279c6307b1SDamien Bergamini 	for (i = 0; rfprog[i].chan != chan; i++);
20289c6307b1SDamien Bergamini 
20299c6307b1SDamien Bergamini 	power = sc->txpow[i];
20309c6307b1SDamien Bergamini 	if (power < 0) {
20319c6307b1SDamien Bergamini 		bbp94 += power;
20329c6307b1SDamien Bergamini 		power = 0;
20339c6307b1SDamien Bergamini 	} else if (power > 31) {
20349c6307b1SDamien Bergamini 		bbp94 += power - 31;
20359c6307b1SDamien Bergamini 		power = 31;
20369c6307b1SDamien Bergamini 	}
20379c6307b1SDamien Bergamini 
20389c6307b1SDamien Bergamini 	/*
20399c6307b1SDamien Bergamini 	 * If we are switching from the 2GHz band to the 5GHz band or
20409c6307b1SDamien Bergamini 	 * vice-versa, BBP registers need to be reprogrammed.
20419c6307b1SDamien Bergamini 	 */
20429c6307b1SDamien Bergamini 	if (c->ic_flags != sc->sc_curchan->ic_flags) {
20439c6307b1SDamien Bergamini 		rt2661_select_band(sc, c);
20449c6307b1SDamien Bergamini 		rt2661_select_antenna(sc);
20459c6307b1SDamien Bergamini 	}
20469c6307b1SDamien Bergamini 	sc->sc_curchan = c;
20479c6307b1SDamien Bergamini 
20489c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20499c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20509c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
20519c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20529c6307b1SDamien Bergamini 
20539c6307b1SDamien Bergamini 	DELAY(200);
20549c6307b1SDamien Bergamini 
20559c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20569c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20579c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
20589c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20599c6307b1SDamien Bergamini 
20609c6307b1SDamien Bergamini 	DELAY(200);
20619c6307b1SDamien Bergamini 
20629c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20639c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20649c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
20659c6307b1SDamien Bergamini 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20669c6307b1SDamien Bergamini 
20679c6307b1SDamien Bergamini 	/* enable smart mode for MIMO-capable RFs */
20689c6307b1SDamien Bergamini 	bbp3 = rt2661_bbp_read(sc, 3);
20699c6307b1SDamien Bergamini 
20709c6307b1SDamien Bergamini 	bbp3 &= ~RT2661_SMART_MODE;
20719c6307b1SDamien Bergamini 	if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
20729c6307b1SDamien Bergamini 		bbp3 |= RT2661_SMART_MODE;
20739c6307b1SDamien Bergamini 
20749c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 3, bbp3);
20759c6307b1SDamien Bergamini 
20769c6307b1SDamien Bergamini 	if (bbp94 != RT2661_BBPR94_DEFAULT)
20779c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, 94, bbp94);
20789c6307b1SDamien Bergamini 
20799c6307b1SDamien Bergamini 	/* 5GHz radio needs a 1ms delay here */
20809c6307b1SDamien Bergamini 	if (IEEE80211_IS_CHAN_5GHZ(c))
20819c6307b1SDamien Bergamini 		DELAY(1000);
20829c6307b1SDamien Bergamini }
20839c6307b1SDamien Bergamini 
20849c6307b1SDamien Bergamini static void
20859c6307b1SDamien Bergamini rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
20869c6307b1SDamien Bergamini {
20879c6307b1SDamien Bergamini 	uint32_t tmp;
20889c6307b1SDamien Bergamini 
20899c6307b1SDamien Bergamini 	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
20909c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
20919c6307b1SDamien Bergamini 
20929c6307b1SDamien Bergamini 	tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
20939c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
20949c6307b1SDamien Bergamini }
20959c6307b1SDamien Bergamini 
20969c6307b1SDamien Bergamini static void
20979c6307b1SDamien Bergamini rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
20989c6307b1SDamien Bergamini {
20999c6307b1SDamien Bergamini 	uint32_t tmp;
21009c6307b1SDamien Bergamini 
21019c6307b1SDamien Bergamini 	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
21029c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
21039c6307b1SDamien Bergamini 
21049c6307b1SDamien Bergamini 	tmp = addr[4] | addr[5] << 8;
21059c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
21069c6307b1SDamien Bergamini }
21079c6307b1SDamien Bergamini 
21089c6307b1SDamien Bergamini static void
2109b032f27cSSam Leffler rt2661_update_promisc(struct ifnet *ifp)
21109c6307b1SDamien Bergamini {
2111b032f27cSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
21129c6307b1SDamien Bergamini 	uint32_t tmp;
21139c6307b1SDamien Bergamini 
21149c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
21159c6307b1SDamien Bergamini 
21169c6307b1SDamien Bergamini 	tmp &= ~RT2661_DROP_NOT_TO_ME;
21179c6307b1SDamien Bergamini 	if (!(ifp->if_flags & IFF_PROMISC))
21189c6307b1SDamien Bergamini 		tmp |= RT2661_DROP_NOT_TO_ME;
21199c6307b1SDamien Bergamini 
21209c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
21219c6307b1SDamien Bergamini 
2122b032f27cSSam Leffler 	DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2123b032f27cSSam Leffler 	    "entering" : "leaving");
21249c6307b1SDamien Bergamini }
21259c6307b1SDamien Bergamini 
21269c6307b1SDamien Bergamini /*
21279c6307b1SDamien Bergamini  * Update QoS (802.11e) settings for each h/w Tx ring.
21289c6307b1SDamien Bergamini  */
21299c6307b1SDamien Bergamini static int
21309c6307b1SDamien Bergamini rt2661_wme_update(struct ieee80211com *ic)
21319c6307b1SDamien Bergamini {
21329c6307b1SDamien Bergamini 	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
21339c6307b1SDamien Bergamini 	const struct wmeParams *wmep;
21349c6307b1SDamien Bergamini 
21359c6307b1SDamien Bergamini 	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
21369c6307b1SDamien Bergamini 
21379c6307b1SDamien Bergamini 	/* XXX: not sure about shifts. */
21389c6307b1SDamien Bergamini 	/* XXX: the reference driver plays with AC_VI settings too. */
21399c6307b1SDamien Bergamini 
21409c6307b1SDamien Bergamini 	/* update TxOp */
21419c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
21429c6307b1SDamien Bergamini 	    wmep[WME_AC_BE].wmep_txopLimit << 16 |
21439c6307b1SDamien Bergamini 	    wmep[WME_AC_BK].wmep_txopLimit);
21449c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
21459c6307b1SDamien Bergamini 	    wmep[WME_AC_VI].wmep_txopLimit << 16 |
21469c6307b1SDamien Bergamini 	    wmep[WME_AC_VO].wmep_txopLimit);
21479c6307b1SDamien Bergamini 
21489c6307b1SDamien Bergamini 	/* update CWmin */
21499c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_CWMIN_CSR,
21509c6307b1SDamien Bergamini 	    wmep[WME_AC_BE].wmep_logcwmin << 12 |
21519c6307b1SDamien Bergamini 	    wmep[WME_AC_BK].wmep_logcwmin <<  8 |
21529c6307b1SDamien Bergamini 	    wmep[WME_AC_VI].wmep_logcwmin <<  4 |
21539c6307b1SDamien Bergamini 	    wmep[WME_AC_VO].wmep_logcwmin);
21549c6307b1SDamien Bergamini 
21559c6307b1SDamien Bergamini 	/* update CWmax */
21569c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_CWMAX_CSR,
21579c6307b1SDamien Bergamini 	    wmep[WME_AC_BE].wmep_logcwmax << 12 |
21589c6307b1SDamien Bergamini 	    wmep[WME_AC_BK].wmep_logcwmax <<  8 |
21599c6307b1SDamien Bergamini 	    wmep[WME_AC_VI].wmep_logcwmax <<  4 |
21609c6307b1SDamien Bergamini 	    wmep[WME_AC_VO].wmep_logcwmax);
21619c6307b1SDamien Bergamini 
21629c6307b1SDamien Bergamini 	/* update Aifsn */
21639c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AIFSN_CSR,
21649c6307b1SDamien Bergamini 	    wmep[WME_AC_BE].wmep_aifsn << 12 |
21659c6307b1SDamien Bergamini 	    wmep[WME_AC_BK].wmep_aifsn <<  8 |
21669c6307b1SDamien Bergamini 	    wmep[WME_AC_VI].wmep_aifsn <<  4 |
21679c6307b1SDamien Bergamini 	    wmep[WME_AC_VO].wmep_aifsn);
21689c6307b1SDamien Bergamini 
21699c6307b1SDamien Bergamini 	return 0;
21709c6307b1SDamien Bergamini }
21719c6307b1SDamien Bergamini 
21729c6307b1SDamien Bergamini static void
21739c6307b1SDamien Bergamini rt2661_update_slot(struct ifnet *ifp)
21749c6307b1SDamien Bergamini {
21759c6307b1SDamien Bergamini 	struct rt2661_softc *sc = ifp->if_softc;
2176b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
21779c6307b1SDamien Bergamini 	uint8_t slottime;
21789c6307b1SDamien Bergamini 	uint32_t tmp;
21799c6307b1SDamien Bergamini 
21809c6307b1SDamien Bergamini 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
21819c6307b1SDamien Bergamini 
21829c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_MAC_CSR9);
21839c6307b1SDamien Bergamini 	tmp = (tmp & ~0xff) | slottime;
21849c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
21859c6307b1SDamien Bergamini }
21869c6307b1SDamien Bergamini 
21879c6307b1SDamien Bergamini static const char *
21889c6307b1SDamien Bergamini rt2661_get_rf(int rev)
21899c6307b1SDamien Bergamini {
21909c6307b1SDamien Bergamini 	switch (rev) {
21919c6307b1SDamien Bergamini 	case RT2661_RF_5225:	return "RT5225";
21929c6307b1SDamien Bergamini 	case RT2661_RF_5325:	return "RT5325 (MIMO XR)";
21939c6307b1SDamien Bergamini 	case RT2661_RF_2527:	return "RT2527";
21949c6307b1SDamien Bergamini 	case RT2661_RF_2529:	return "RT2529 (MIMO XR)";
21959c6307b1SDamien Bergamini 	default:		return "unknown";
21969c6307b1SDamien Bergamini 	}
21979c6307b1SDamien Bergamini }
21989c6307b1SDamien Bergamini 
21999c6307b1SDamien Bergamini static void
2200b032f27cSSam Leffler rt2661_read_eeprom(struct rt2661_softc *sc, struct ieee80211com *ic)
22019c6307b1SDamien Bergamini {
22029c6307b1SDamien Bergamini 	uint16_t val;
22039c6307b1SDamien Bergamini 	int i;
22049c6307b1SDamien Bergamini 
22059c6307b1SDamien Bergamini 	/* read MAC address */
22069c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
22079c6307b1SDamien Bergamini 	ic->ic_myaddr[0] = val & 0xff;
22089c6307b1SDamien Bergamini 	ic->ic_myaddr[1] = val >> 8;
22099c6307b1SDamien Bergamini 
22109c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
22119c6307b1SDamien Bergamini 	ic->ic_myaddr[2] = val & 0xff;
22129c6307b1SDamien Bergamini 	ic->ic_myaddr[3] = val >> 8;
22139c6307b1SDamien Bergamini 
22149c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
22159c6307b1SDamien Bergamini 	ic->ic_myaddr[4] = val & 0xff;
22169c6307b1SDamien Bergamini 	ic->ic_myaddr[5] = val >> 8;
22179c6307b1SDamien Bergamini 
22189c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
22199c6307b1SDamien Bergamini 	/* XXX: test if different from 0xffff? */
22209c6307b1SDamien Bergamini 	sc->rf_rev   = (val >> 11) & 0x1f;
22219c6307b1SDamien Bergamini 	sc->hw_radio = (val >> 10) & 0x1;
22229c6307b1SDamien Bergamini 	sc->rx_ant   = (val >> 4)  & 0x3;
22239c6307b1SDamien Bergamini 	sc->tx_ant   = (val >> 2)  & 0x3;
22249c6307b1SDamien Bergamini 	sc->nb_ant   = val & 0x3;
22259c6307b1SDamien Bergamini 
2226b032f27cSSam Leffler 	DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
22279c6307b1SDamien Bergamini 
22289c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
22299c6307b1SDamien Bergamini 	sc->ext_5ghz_lna = (val >> 6) & 0x1;
22309c6307b1SDamien Bergamini 	sc->ext_2ghz_lna = (val >> 4) & 0x1;
22319c6307b1SDamien Bergamini 
2232b032f27cSSam Leffler 	DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2233b032f27cSSam Leffler 	    sc->ext_2ghz_lna, sc->ext_5ghz_lna);
22349c6307b1SDamien Bergamini 
22359c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
22369c6307b1SDamien Bergamini 	if ((val & 0xff) != 0xff)
22379c6307b1SDamien Bergamini 		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
22389c6307b1SDamien Bergamini 
223968e8e04eSSam Leffler 	/* Only [-10, 10] is valid */
224068e8e04eSSam Leffler 	if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
224168e8e04eSSam Leffler 		sc->rssi_2ghz_corr = 0;
224268e8e04eSSam Leffler 
22439c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
22449c6307b1SDamien Bergamini 	if ((val & 0xff) != 0xff)
22459c6307b1SDamien Bergamini 		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
22469c6307b1SDamien Bergamini 
224768e8e04eSSam Leffler 	/* Only [-10, 10] is valid */
224868e8e04eSSam Leffler 	if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
224968e8e04eSSam Leffler 		sc->rssi_5ghz_corr = 0;
225068e8e04eSSam Leffler 
22519c6307b1SDamien Bergamini 	/* adjust RSSI correction for external low-noise amplifier */
22529c6307b1SDamien Bergamini 	if (sc->ext_2ghz_lna)
22539c6307b1SDamien Bergamini 		sc->rssi_2ghz_corr -= 14;
22549c6307b1SDamien Bergamini 	if (sc->ext_5ghz_lna)
22559c6307b1SDamien Bergamini 		sc->rssi_5ghz_corr -= 14;
22569c6307b1SDamien Bergamini 
2257b032f27cSSam Leffler 	DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2258b032f27cSSam Leffler 	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
22599c6307b1SDamien Bergamini 
22609c6307b1SDamien Bergamini 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
22619c6307b1SDamien Bergamini 	if ((val >> 8) != 0xff)
22629c6307b1SDamien Bergamini 		sc->rfprog = (val >> 8) & 0x3;
22639c6307b1SDamien Bergamini 	if ((val & 0xff) != 0xff)
22649c6307b1SDamien Bergamini 		sc->rffreq = val & 0xff;
22659c6307b1SDamien Bergamini 
2266b032f27cSSam Leffler 	DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
22679c6307b1SDamien Bergamini 
22689c6307b1SDamien Bergamini 	/* read Tx power for all a/b/g channels */
22699c6307b1SDamien Bergamini 	for (i = 0; i < 19; i++) {
22709c6307b1SDamien Bergamini 		val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
22719c6307b1SDamien Bergamini 		sc->txpow[i * 2] = (int8_t)(val >> 8);		/* signed */
2272b032f27cSSam Leffler 		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2273b032f27cSSam Leffler 		    rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
22749c6307b1SDamien Bergamini 		sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff);	/* signed */
2275b032f27cSSam Leffler 		DPRINTF(sc, "Channel=%d Tx power=%d\n",
2276b032f27cSSam Leffler 		    rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
22779c6307b1SDamien Bergamini 	}
22789c6307b1SDamien Bergamini 
22799c6307b1SDamien Bergamini 	/* read vendor-specific BBP values */
22809c6307b1SDamien Bergamini 	for (i = 0; i < 16; i++) {
22819c6307b1SDamien Bergamini 		val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
22829c6307b1SDamien Bergamini 		if (val == 0 || val == 0xffff)
22839c6307b1SDamien Bergamini 			continue;	/* skip invalid entries */
22849c6307b1SDamien Bergamini 		sc->bbp_prom[i].reg = val >> 8;
22859c6307b1SDamien Bergamini 		sc->bbp_prom[i].val = val & 0xff;
2286b032f27cSSam Leffler 		DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2287b032f27cSSam Leffler 		    sc->bbp_prom[i].val);
22889c6307b1SDamien Bergamini 	}
22899c6307b1SDamien Bergamini }
22909c6307b1SDamien Bergamini 
22919c6307b1SDamien Bergamini static int
22929c6307b1SDamien Bergamini rt2661_bbp_init(struct rt2661_softc *sc)
22939c6307b1SDamien Bergamini {
22949c6307b1SDamien Bergamini #define N(a)	(sizeof (a) / sizeof ((a)[0]))
22959c6307b1SDamien Bergamini 	int i, ntries;
22969c6307b1SDamien Bergamini 	uint8_t val;
22979c6307b1SDamien Bergamini 
22989c6307b1SDamien Bergamini 	/* wait for BBP to be ready */
22999c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 100; ntries++) {
23009c6307b1SDamien Bergamini 		val = rt2661_bbp_read(sc, 0);
23019c6307b1SDamien Bergamini 		if (val != 0 && val != 0xff)
23029c6307b1SDamien Bergamini 			break;
23039c6307b1SDamien Bergamini 		DELAY(100);
23049c6307b1SDamien Bergamini 	}
23059c6307b1SDamien Bergamini 	if (ntries == 100) {
23069c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
23079c6307b1SDamien Bergamini 		return EIO;
23089c6307b1SDamien Bergamini 	}
23099c6307b1SDamien Bergamini 
23109c6307b1SDamien Bergamini 	/* initialize BBP registers to default values */
23119c6307b1SDamien Bergamini 	for (i = 0; i < N(rt2661_def_bbp); i++) {
23129c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
23139c6307b1SDamien Bergamini 		    rt2661_def_bbp[i].val);
23149c6307b1SDamien Bergamini 	}
23159c6307b1SDamien Bergamini 
23169c6307b1SDamien Bergamini 	/* write vendor-specific BBP values (from EEPROM) */
23179c6307b1SDamien Bergamini 	for (i = 0; i < 16; i++) {
23189c6307b1SDamien Bergamini 		if (sc->bbp_prom[i].reg == 0)
23199c6307b1SDamien Bergamini 			continue;
23209c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
23219c6307b1SDamien Bergamini 	}
23229c6307b1SDamien Bergamini 
23239c6307b1SDamien Bergamini 	return 0;
23249c6307b1SDamien Bergamini #undef N
23259c6307b1SDamien Bergamini }
23269c6307b1SDamien Bergamini 
23279c6307b1SDamien Bergamini static void
2328b032f27cSSam Leffler rt2661_init_locked(struct rt2661_softc *sc)
23299c6307b1SDamien Bergamini {
23309c6307b1SDamien Bergamini #define N(a)	(sizeof (a) / sizeof ((a)[0]))
2331b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
2332b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
23339c6307b1SDamien Bergamini 	uint32_t tmp, sta[3];
2334b032f27cSSam Leffler 	int i, error, ntries;
23359c6307b1SDamien Bergamini 
2336b032f27cSSam Leffler 	RAL_LOCK_ASSERT(sc);
2337b032f27cSSam Leffler 
2338b032f27cSSam Leffler 	if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2339b032f27cSSam Leffler 		error = rt2661_load_microcode(sc);
2340b032f27cSSam Leffler 		if (error != 0) {
2341b032f27cSSam Leffler 			if_printf(ifp,
2342b032f27cSSam Leffler 			    "%s: could not load 8051 microcode, error %d\n",
2343b032f27cSSam Leffler 			    __func__, error);
2344b032f27cSSam Leffler 			return;
2345b032f27cSSam Leffler 		}
2346b032f27cSSam Leffler 		sc->sc_flags |= RAL_FW_LOADED;
2347b032f27cSSam Leffler 	}
2348d0934eb1SDamien Bergamini 
234968e8e04eSSam Leffler 	rt2661_stop_locked(sc);
23509c6307b1SDamien Bergamini 
23519c6307b1SDamien Bergamini 	/* initialize Tx rings */
23529c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
23539c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
23549c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
23559c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
23569c6307b1SDamien Bergamini 
23579c6307b1SDamien Bergamini 	/* initialize Mgt ring */
23589c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
23599c6307b1SDamien Bergamini 
23609c6307b1SDamien Bergamini 	/* initialize Rx ring */
23619c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
23629c6307b1SDamien Bergamini 
23639c6307b1SDamien Bergamini 	/* initialize Tx rings sizes */
23649c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TX_RING_CSR0,
23659c6307b1SDamien Bergamini 	    RT2661_TX_RING_COUNT << 24 |
23669c6307b1SDamien Bergamini 	    RT2661_TX_RING_COUNT << 16 |
23679c6307b1SDamien Bergamini 	    RT2661_TX_RING_COUNT <<  8 |
23689c6307b1SDamien Bergamini 	    RT2661_TX_RING_COUNT);
23699c6307b1SDamien Bergamini 
23709c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TX_RING_CSR1,
23719c6307b1SDamien Bergamini 	    RT2661_TX_DESC_WSIZE << 16 |
23729c6307b1SDamien Bergamini 	    RT2661_TX_RING_COUNT <<  8 |	/* XXX: HCCA ring unused */
23739c6307b1SDamien Bergamini 	    RT2661_MGT_RING_COUNT);
23749c6307b1SDamien Bergamini 
23759c6307b1SDamien Bergamini 	/* initialize Rx rings */
23769c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_RX_RING_CSR,
23779c6307b1SDamien Bergamini 	    RT2661_RX_DESC_BACK  << 16 |
23789c6307b1SDamien Bergamini 	    RT2661_RX_DESC_WSIZE <<  8 |
23799c6307b1SDamien Bergamini 	    RT2661_RX_RING_COUNT);
23809c6307b1SDamien Bergamini 
23819c6307b1SDamien Bergamini 	/* XXX: some magic here */
23829c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
23839c6307b1SDamien Bergamini 
23849c6307b1SDamien Bergamini 	/* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
23859c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
23869c6307b1SDamien Bergamini 
23879c6307b1SDamien Bergamini 	/* load base address of Rx ring */
23889c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
23899c6307b1SDamien Bergamini 
23909c6307b1SDamien Bergamini 	/* initialize MAC registers to default values */
23919c6307b1SDamien Bergamini 	for (i = 0; i < N(rt2661_def_mac); i++)
23929c6307b1SDamien Bergamini 		RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
23939c6307b1SDamien Bergamini 
23949c6307b1SDamien Bergamini 	IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
23959c6307b1SDamien Bergamini 	rt2661_set_macaddr(sc, ic->ic_myaddr);
23969c6307b1SDamien Bergamini 
23979c6307b1SDamien Bergamini 	/* set host ready */
23989c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
23999c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
24009c6307b1SDamien Bergamini 
24019c6307b1SDamien Bergamini 	/* wait for BBP/RF to wakeup */
24029c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 1000; ntries++) {
24039c6307b1SDamien Bergamini 		if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
24049c6307b1SDamien Bergamini 			break;
24059c6307b1SDamien Bergamini 		DELAY(1000);
24069c6307b1SDamien Bergamini 	}
24079c6307b1SDamien Bergamini 	if (ntries == 1000) {
24089c6307b1SDamien Bergamini 		printf("timeout waiting for BBP/RF to wakeup\n");
240968e8e04eSSam Leffler 		rt2661_stop_locked(sc);
24109c6307b1SDamien Bergamini 		return;
24119c6307b1SDamien Bergamini 	}
24129c6307b1SDamien Bergamini 
24139c6307b1SDamien Bergamini 	if (rt2661_bbp_init(sc) != 0) {
241468e8e04eSSam Leffler 		rt2661_stop_locked(sc);
24159c6307b1SDamien Bergamini 		return;
24169c6307b1SDamien Bergamini 	}
24179c6307b1SDamien Bergamini 
24189c6307b1SDamien Bergamini 	/* select default channel */
24199c6307b1SDamien Bergamini 	sc->sc_curchan = ic->ic_curchan;
24209c6307b1SDamien Bergamini 	rt2661_select_band(sc, sc->sc_curchan);
24219c6307b1SDamien Bergamini 	rt2661_select_antenna(sc);
24229c6307b1SDamien Bergamini 	rt2661_set_chan(sc, sc->sc_curchan);
24239c6307b1SDamien Bergamini 
24249c6307b1SDamien Bergamini 	/* update Rx filter */
24259c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
24269c6307b1SDamien Bergamini 
24279c6307b1SDamien Bergamini 	tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
24289c6307b1SDamien Bergamini 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
24299c6307b1SDamien Bergamini 		tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
24309c6307b1SDamien Bergamini 		       RT2661_DROP_ACKCTS;
24319c6307b1SDamien Bergamini 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
24329c6307b1SDamien Bergamini 			tmp |= RT2661_DROP_TODS;
24339c6307b1SDamien Bergamini 		if (!(ifp->if_flags & IFF_PROMISC))
24349c6307b1SDamien Bergamini 			tmp |= RT2661_DROP_NOT_TO_ME;
24359c6307b1SDamien Bergamini 	}
24369c6307b1SDamien Bergamini 
24379c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
24389c6307b1SDamien Bergamini 
24399c6307b1SDamien Bergamini 	/* clear STA registers */
24409c6307b1SDamien Bergamini 	RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
24419c6307b1SDamien Bergamini 
24429c6307b1SDamien Bergamini 	/* initialize ASIC */
24439c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
24449c6307b1SDamien Bergamini 
24459c6307b1SDamien Bergamini 	/* clear any pending interrupt */
24469c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
24479c6307b1SDamien Bergamini 
24489c6307b1SDamien Bergamini 	/* enable interrupts */
24499c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
24509c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
24519c6307b1SDamien Bergamini 
24529c6307b1SDamien Bergamini 	/* kick Rx */
24539c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
24549c6307b1SDamien Bergamini 
24559c6307b1SDamien Bergamini 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
24569c6307b1SDamien Bergamini 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
24579c6307b1SDamien Bergamini 
2458b032f27cSSam Leffler 	callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2459d0934eb1SDamien Bergamini #undef N
24609c6307b1SDamien Bergamini }
24619c6307b1SDamien Bergamini 
2462b032f27cSSam Leffler static void
2463b032f27cSSam Leffler rt2661_init(void *priv)
24649c6307b1SDamien Bergamini {
24659c6307b1SDamien Bergamini 	struct rt2661_softc *sc = priv;
2466b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
2467b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
246868e8e04eSSam Leffler 
246968e8e04eSSam Leffler 	RAL_LOCK(sc);
2470b032f27cSSam Leffler 	rt2661_init_locked(sc);
247168e8e04eSSam Leffler 	RAL_UNLOCK(sc);
2472b032f27cSSam Leffler 
2473b032f27cSSam Leffler 	ieee80211_start_all(ic);
247468e8e04eSSam Leffler }
247568e8e04eSSam Leffler 
247668e8e04eSSam Leffler void
247768e8e04eSSam Leffler rt2661_stop_locked(struct rt2661_softc *sc)
247868e8e04eSSam Leffler {
2479b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
24809c6307b1SDamien Bergamini 	uint32_t tmp;
248168e8e04eSSam Leffler 	volatile int *flags = &sc->sc_flags;
24829c6307b1SDamien Bergamini 
2483b032f27cSSam Leffler 	while (*flags & RAL_INPUT_RUNNING)
248468e8e04eSSam Leffler 		msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2485b032f27cSSam Leffler 
2486b032f27cSSam Leffler 	callout_stop(&sc->watchdog_ch);
2487b032f27cSSam Leffler 	sc->sc_tx_timer = 0;
248868e8e04eSSam Leffler 
248968e8e04eSSam Leffler 	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
24909c6307b1SDamien Bergamini 		ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
24919c6307b1SDamien Bergamini 
24929c6307b1SDamien Bergamini 		/* abort Tx (for all 5 Tx rings) */
24939c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
24949c6307b1SDamien Bergamini 
24959c6307b1SDamien Bergamini 		/* disable Rx (value remains after reset!) */
24969c6307b1SDamien Bergamini 		tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
24979c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
24989c6307b1SDamien Bergamini 
24999c6307b1SDamien Bergamini 		/* reset ASIC */
25009c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
25019c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
25029c6307b1SDamien Bergamini 
25039c6307b1SDamien Bergamini 		/* disable interrupts */
2504d0934eb1SDamien Bergamini 		RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
25059c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
25069c6307b1SDamien Bergamini 
2507d0934eb1SDamien Bergamini 		/* clear any pending interrupt */
2508d0934eb1SDamien Bergamini 		RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2509d0934eb1SDamien Bergamini 		RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2510d0934eb1SDamien Bergamini 
25119c6307b1SDamien Bergamini 		/* reset Tx and Rx rings */
25129c6307b1SDamien Bergamini 		rt2661_reset_tx_ring(sc, &sc->txq[0]);
25139c6307b1SDamien Bergamini 		rt2661_reset_tx_ring(sc, &sc->txq[1]);
25149c6307b1SDamien Bergamini 		rt2661_reset_tx_ring(sc, &sc->txq[2]);
25159c6307b1SDamien Bergamini 		rt2661_reset_tx_ring(sc, &sc->txq[3]);
25169c6307b1SDamien Bergamini 		rt2661_reset_tx_ring(sc, &sc->mgtq);
25179c6307b1SDamien Bergamini 		rt2661_reset_rx_ring(sc, &sc->rxq);
25189c6307b1SDamien Bergamini 	}
251968e8e04eSSam Leffler }
25209c6307b1SDamien Bergamini 
2521b032f27cSSam Leffler void
2522b032f27cSSam Leffler rt2661_stop(void *priv)
25239c6307b1SDamien Bergamini {
2524b032f27cSSam Leffler 	struct rt2661_softc *sc = priv;
25259c6307b1SDamien Bergamini 
2526b032f27cSSam Leffler 	RAL_LOCK(sc);
2527b032f27cSSam Leffler 	rt2661_stop_locked(sc);
2528b032f27cSSam Leffler 	RAL_UNLOCK(sc);
2529b032f27cSSam Leffler }
2530b032f27cSSam Leffler 
2531b032f27cSSam Leffler static int
2532b032f27cSSam Leffler rt2661_load_microcode(struct rt2661_softc *sc)
2533b032f27cSSam Leffler {
2534b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
2535b032f27cSSam Leffler 	const struct firmware *fp;
2536b032f27cSSam Leffler 	const char *imagename;
2537b032f27cSSam Leffler 	int ntries, error;
2538b032f27cSSam Leffler 
2539b032f27cSSam Leffler 	RAL_LOCK_ASSERT(sc);
2540b032f27cSSam Leffler 
2541b032f27cSSam Leffler 	switch (sc->sc_id) {
2542b032f27cSSam Leffler 	case 0x0301: imagename = "rt2561sfw"; break;
2543b032f27cSSam Leffler 	case 0x0302: imagename = "rt2561fw"; break;
2544b032f27cSSam Leffler 	case 0x0401: imagename = "rt2661fw"; break;
2545b032f27cSSam Leffler 	default:
2546b032f27cSSam Leffler 		if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2547b032f27cSSam Leffler 		    "don't know how to retrieve firmware\n",
2548b032f27cSSam Leffler 		    __func__, sc->sc_id);
2549b032f27cSSam Leffler 		return EINVAL;
2550b032f27cSSam Leffler 	}
2551b032f27cSSam Leffler 	RAL_UNLOCK(sc);
2552b032f27cSSam Leffler 	fp = firmware_get(imagename);
2553b032f27cSSam Leffler 	RAL_LOCK(sc);
2554b032f27cSSam Leffler 	if (fp == NULL) {
2555b032f27cSSam Leffler 		if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2556b032f27cSSam Leffler 		    __func__, imagename);
2557b032f27cSSam Leffler 		return EINVAL;
2558b032f27cSSam Leffler 	}
2559b032f27cSSam Leffler 
2560b032f27cSSam Leffler 	/*
2561b032f27cSSam Leffler 	 * Load 8051 microcode into NIC.
2562b032f27cSSam Leffler 	 */
25639c6307b1SDamien Bergamini 	/* reset 8051 */
25649c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
25659c6307b1SDamien Bergamini 
25669c6307b1SDamien Bergamini 	/* cancel any pending Host to MCU command */
25679c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
25689c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
25699c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
25709c6307b1SDamien Bergamini 
25719c6307b1SDamien Bergamini 	/* write 8051's microcode */
25729c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2573b032f27cSSam Leffler 	RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
25749c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
25759c6307b1SDamien Bergamini 
25769c6307b1SDamien Bergamini 	/* kick 8051's ass */
25779c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
25789c6307b1SDamien Bergamini 
25799c6307b1SDamien Bergamini 	/* wait for 8051 to initialize */
25809c6307b1SDamien Bergamini 	for (ntries = 0; ntries < 500; ntries++) {
25819c6307b1SDamien Bergamini 		if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
25829c6307b1SDamien Bergamini 			break;
25839c6307b1SDamien Bergamini 		DELAY(100);
25849c6307b1SDamien Bergamini 	}
25859c6307b1SDamien Bergamini 	if (ntries == 500) {
2586b032f27cSSam Leffler 		if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2587b032f27cSSam Leffler 		    __func__);
2588b032f27cSSam Leffler 		error = EIO;
2589b032f27cSSam Leffler 	} else
2590b032f27cSSam Leffler 		error = 0;
2591b032f27cSSam Leffler 
2592b032f27cSSam Leffler 	firmware_put(fp, FIRMWARE_UNLOAD);
2593b032f27cSSam Leffler 	return error;
25949c6307b1SDamien Bergamini }
25959c6307b1SDamien Bergamini 
25969c6307b1SDamien Bergamini #ifdef notyet
25979c6307b1SDamien Bergamini /*
25989c6307b1SDamien Bergamini  * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
25999c6307b1SDamien Bergamini  * false CCA count.  This function is called periodically (every seconds) when
26009c6307b1SDamien Bergamini  * in the RUN state.  Values taken from the reference driver.
26019c6307b1SDamien Bergamini  */
26029c6307b1SDamien Bergamini static void
26039c6307b1SDamien Bergamini rt2661_rx_tune(struct rt2661_softc *sc)
26049c6307b1SDamien Bergamini {
26059c6307b1SDamien Bergamini 	uint8_t bbp17;
26069c6307b1SDamien Bergamini 	uint16_t cca;
26079c6307b1SDamien Bergamini 	int lo, hi, dbm;
26089c6307b1SDamien Bergamini 
26099c6307b1SDamien Bergamini 	/*
26109c6307b1SDamien Bergamini 	 * Tuning range depends on operating band and on the presence of an
26119c6307b1SDamien Bergamini 	 * external low-noise amplifier.
26129c6307b1SDamien Bergamini 	 */
26139c6307b1SDamien Bergamini 	lo = 0x20;
26149c6307b1SDamien Bergamini 	if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
26159c6307b1SDamien Bergamini 		lo += 0x08;
26169c6307b1SDamien Bergamini 	if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
26179c6307b1SDamien Bergamini 	    (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
26189c6307b1SDamien Bergamini 		lo += 0x10;
26199c6307b1SDamien Bergamini 	hi = lo + 0x20;
26209c6307b1SDamien Bergamini 
26219c6307b1SDamien Bergamini 	/* retrieve false CCA count since last call (clear on read) */
26229c6307b1SDamien Bergamini 	cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
26239c6307b1SDamien Bergamini 
26249c6307b1SDamien Bergamini 	if (dbm >= -35) {
26259c6307b1SDamien Bergamini 		bbp17 = 0x60;
26269c6307b1SDamien Bergamini 	} else if (dbm >= -58) {
26279c6307b1SDamien Bergamini 		bbp17 = hi;
26289c6307b1SDamien Bergamini 	} else if (dbm >= -66) {
26299c6307b1SDamien Bergamini 		bbp17 = lo + 0x10;
26309c6307b1SDamien Bergamini 	} else if (dbm >= -74) {
26319c6307b1SDamien Bergamini 		bbp17 = lo + 0x08;
26329c6307b1SDamien Bergamini 	} else {
26339c6307b1SDamien Bergamini 		/* RSSI < -74dBm, tune using false CCA count */
26349c6307b1SDamien Bergamini 
26359c6307b1SDamien Bergamini 		bbp17 = sc->bbp17; /* current value */
26369c6307b1SDamien Bergamini 
26379c6307b1SDamien Bergamini 		hi -= 2 * (-74 - dbm);
26389c6307b1SDamien Bergamini 		if (hi < lo)
26399c6307b1SDamien Bergamini 			hi = lo;
26409c6307b1SDamien Bergamini 
26419c6307b1SDamien Bergamini 		if (bbp17 > hi) {
26429c6307b1SDamien Bergamini 			bbp17 = hi;
26439c6307b1SDamien Bergamini 
26449c6307b1SDamien Bergamini 		} else if (cca > 512) {
26459c6307b1SDamien Bergamini 			if (++bbp17 > hi)
26469c6307b1SDamien Bergamini 				bbp17 = hi;
26479c6307b1SDamien Bergamini 		} else if (cca < 100) {
26489c6307b1SDamien Bergamini 			if (--bbp17 < lo)
26499c6307b1SDamien Bergamini 				bbp17 = lo;
26509c6307b1SDamien Bergamini 		}
26519c6307b1SDamien Bergamini 	}
26529c6307b1SDamien Bergamini 
26539c6307b1SDamien Bergamini 	if (bbp17 != sc->bbp17) {
26549c6307b1SDamien Bergamini 		rt2661_bbp_write(sc, 17, bbp17);
26559c6307b1SDamien Bergamini 		sc->bbp17 = bbp17;
26569c6307b1SDamien Bergamini 	}
26579c6307b1SDamien Bergamini }
26589c6307b1SDamien Bergamini 
26599c6307b1SDamien Bergamini /*
26609c6307b1SDamien Bergamini  * Enter/Leave radar detection mode.
26619c6307b1SDamien Bergamini  * This is for 802.11h additional regulatory domains.
26629c6307b1SDamien Bergamini  */
26639c6307b1SDamien Bergamini static void
26649c6307b1SDamien Bergamini rt2661_radar_start(struct rt2661_softc *sc)
26659c6307b1SDamien Bergamini {
26669c6307b1SDamien Bergamini 	uint32_t tmp;
26679c6307b1SDamien Bergamini 
26689c6307b1SDamien Bergamini 	/* disable Rx */
26699c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
26709c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
26719c6307b1SDamien Bergamini 
26729c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 82, 0x20);
26739c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 83, 0x00);
26749c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 84, 0x40);
26759c6307b1SDamien Bergamini 
26769c6307b1SDamien Bergamini 	/* save current BBP registers values */
26779c6307b1SDamien Bergamini 	sc->bbp18 = rt2661_bbp_read(sc, 18);
26789c6307b1SDamien Bergamini 	sc->bbp21 = rt2661_bbp_read(sc, 21);
26799c6307b1SDamien Bergamini 	sc->bbp22 = rt2661_bbp_read(sc, 22);
26809c6307b1SDamien Bergamini 	sc->bbp16 = rt2661_bbp_read(sc, 16);
26819c6307b1SDamien Bergamini 	sc->bbp17 = rt2661_bbp_read(sc, 17);
26829c6307b1SDamien Bergamini 	sc->bbp64 = rt2661_bbp_read(sc, 64);
26839c6307b1SDamien Bergamini 
26849c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 18, 0xff);
26859c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 21, 0x3f);
26869c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 22, 0x3f);
26879c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 16, 0xbd);
26889c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
26899c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 64, 0x21);
26909c6307b1SDamien Bergamini 
26919c6307b1SDamien Bergamini 	/* restore Rx filter */
26929c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
26939c6307b1SDamien Bergamini }
26949c6307b1SDamien Bergamini 
26959c6307b1SDamien Bergamini static int
26969c6307b1SDamien Bergamini rt2661_radar_stop(struct rt2661_softc *sc)
26979c6307b1SDamien Bergamini {
26989c6307b1SDamien Bergamini 	uint8_t bbp66;
26999c6307b1SDamien Bergamini 
27009c6307b1SDamien Bergamini 	/* read radar detection result */
27019c6307b1SDamien Bergamini 	bbp66 = rt2661_bbp_read(sc, 66);
27029c6307b1SDamien Bergamini 
27039c6307b1SDamien Bergamini 	/* restore BBP registers values */
27049c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 16, sc->bbp16);
27059c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 17, sc->bbp17);
27069c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 18, sc->bbp18);
27079c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 21, sc->bbp21);
27089c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 22, sc->bbp22);
27099c6307b1SDamien Bergamini 	rt2661_bbp_write(sc, 64, sc->bbp64);
27109c6307b1SDamien Bergamini 
27119c6307b1SDamien Bergamini 	return bbp66 == 1;
27129c6307b1SDamien Bergamini }
27139c6307b1SDamien Bergamini #endif
27149c6307b1SDamien Bergamini 
27159c6307b1SDamien Bergamini static int
2716b032f27cSSam Leffler rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
27179c6307b1SDamien Bergamini {
2718b032f27cSSam Leffler 	struct ieee80211com *ic = vap->iv_ic;
27199c6307b1SDamien Bergamini 	struct ieee80211_beacon_offsets bo;
27209c6307b1SDamien Bergamini 	struct rt2661_tx_desc desc;
27219c6307b1SDamien Bergamini 	struct mbuf *m0;
27229c6307b1SDamien Bergamini 	int rate;
27239c6307b1SDamien Bergamini 
2724b032f27cSSam Leffler 	m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
27259c6307b1SDamien Bergamini 	if (m0 == NULL) {
27269c6307b1SDamien Bergamini 		device_printf(sc->sc_dev, "could not allocate beacon frame\n");
27279c6307b1SDamien Bergamini 		return ENOBUFS;
27289c6307b1SDamien Bergamini 	}
27299c6307b1SDamien Bergamini 
27309c6307b1SDamien Bergamini 	/* send beacons at the lowest available rate */
2731b032f27cSSam Leffler 	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
27329c6307b1SDamien Bergamini 
27339c6307b1SDamien Bergamini 	rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
27349c6307b1SDamien Bergamini 	    m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
27359c6307b1SDamien Bergamini 
27369c6307b1SDamien Bergamini 	/* copy the first 24 bytes of Tx descriptor into NIC memory */
27379c6307b1SDamien Bergamini 	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
27389c6307b1SDamien Bergamini 
27399c6307b1SDamien Bergamini 	/* copy beacon header and payload into NIC memory */
27409c6307b1SDamien Bergamini 	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
27419c6307b1SDamien Bergamini 	    mtod(m0, uint8_t *), m0->m_pkthdr.len);
27429c6307b1SDamien Bergamini 
27439c6307b1SDamien Bergamini 	m_freem(m0);
27449c6307b1SDamien Bergamini 
27459c6307b1SDamien Bergamini 	return 0;
27469c6307b1SDamien Bergamini }
27479c6307b1SDamien Bergamini 
27489c6307b1SDamien Bergamini /*
27499c6307b1SDamien Bergamini  * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
27509c6307b1SDamien Bergamini  * and HostAP operating modes.
27519c6307b1SDamien Bergamini  */
27529c6307b1SDamien Bergamini static void
27539c6307b1SDamien Bergamini rt2661_enable_tsf_sync(struct rt2661_softc *sc)
27549c6307b1SDamien Bergamini {
2755b032f27cSSam Leffler 	struct ifnet *ifp = sc->sc_ifp;
2756b032f27cSSam Leffler 	struct ieee80211com *ic = ifp->if_l2com;
2757b032f27cSSam Leffler 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
27589c6307b1SDamien Bergamini 	uint32_t tmp;
27599c6307b1SDamien Bergamini 
2760b032f27cSSam Leffler 	if (vap->iv_opmode != IEEE80211_M_STA) {
27619c6307b1SDamien Bergamini 		/*
27629c6307b1SDamien Bergamini 		 * Change default 16ms TBTT adjustment to 8ms.
27639c6307b1SDamien Bergamini 		 * Must be done before enabling beacon generation.
27649c6307b1SDamien Bergamini 		 */
27659c6307b1SDamien Bergamini 		RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
27669c6307b1SDamien Bergamini 	}
27679c6307b1SDamien Bergamini 
27689c6307b1SDamien Bergamini 	tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
27699c6307b1SDamien Bergamini 
27709c6307b1SDamien Bergamini 	/* set beacon interval (in 1/16ms unit) */
2771b032f27cSSam Leffler 	tmp |= vap->iv_bss->ni_intval * 16;
27729c6307b1SDamien Bergamini 
27739c6307b1SDamien Bergamini 	tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2774b032f27cSSam Leffler 	if (vap->iv_opmode == IEEE80211_M_STA)
27759c6307b1SDamien Bergamini 		tmp |= RT2661_TSF_MODE(1);
27769c6307b1SDamien Bergamini 	else
27779c6307b1SDamien Bergamini 		tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
27789c6307b1SDamien Bergamini 
27799c6307b1SDamien Bergamini 	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
27809c6307b1SDamien Bergamini }
27819c6307b1SDamien Bergamini 
27829c6307b1SDamien Bergamini /*
27839c6307b1SDamien Bergamini  * Retrieve the "Received Signal Strength Indicator" from the raw values
27849c6307b1SDamien Bergamini  * contained in Rx descriptors.  The computation depends on which band the
27859c6307b1SDamien Bergamini  * frame was received.  Correction values taken from the reference driver.
27869c6307b1SDamien Bergamini  */
27879c6307b1SDamien Bergamini static int
27889c6307b1SDamien Bergamini rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
27899c6307b1SDamien Bergamini {
27909c6307b1SDamien Bergamini 	int lna, agc, rssi;
27919c6307b1SDamien Bergamini 
27929c6307b1SDamien Bergamini 	lna = (raw >> 5) & 0x3;
27939c6307b1SDamien Bergamini 	agc = raw & 0x1f;
27949c6307b1SDamien Bergamini 
279568e8e04eSSam Leffler 	if (lna == 0) {
279668e8e04eSSam Leffler 		/*
279768e8e04eSSam Leffler 		 * No mapping available.
279868e8e04eSSam Leffler 		 *
279968e8e04eSSam Leffler 		 * NB: Since RSSI is relative to noise floor, -1 is
280068e8e04eSSam Leffler 		 *     adequate for caller to know error happened.
280168e8e04eSSam Leffler 		 */
280268e8e04eSSam Leffler 		return -1;
280368e8e04eSSam Leffler 	}
280468e8e04eSSam Leffler 
280568e8e04eSSam Leffler 	rssi = (2 * agc) - RT2661_NOISE_FLOOR;
28069c6307b1SDamien Bergamini 
28079c6307b1SDamien Bergamini 	if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
28089c6307b1SDamien Bergamini 		rssi += sc->rssi_2ghz_corr;
28099c6307b1SDamien Bergamini 
28109c6307b1SDamien Bergamini 		if (lna == 1)
28119c6307b1SDamien Bergamini 			rssi -= 64;
28129c6307b1SDamien Bergamini 		else if (lna == 2)
28139c6307b1SDamien Bergamini 			rssi -= 74;
28149c6307b1SDamien Bergamini 		else if (lna == 3)
28159c6307b1SDamien Bergamini 			rssi -= 90;
28169c6307b1SDamien Bergamini 	} else {
28179c6307b1SDamien Bergamini 		rssi += sc->rssi_5ghz_corr;
28189c6307b1SDamien Bergamini 
28199c6307b1SDamien Bergamini 		if (lna == 1)
28209c6307b1SDamien Bergamini 			rssi -= 64;
28219c6307b1SDamien Bergamini 		else if (lna == 2)
28229c6307b1SDamien Bergamini 			rssi -= 86;
28239c6307b1SDamien Bergamini 		else if (lna == 3)
28249c6307b1SDamien Bergamini 			rssi -= 100;
28259c6307b1SDamien Bergamini 	}
28269c6307b1SDamien Bergamini 	return rssi;
28279c6307b1SDamien Bergamini }
282868e8e04eSSam Leffler 
282968e8e04eSSam Leffler static void
283068e8e04eSSam Leffler rt2661_scan_start(struct ieee80211com *ic)
283168e8e04eSSam Leffler {
283268e8e04eSSam Leffler 	struct ifnet *ifp = ic->ic_ifp;
283368e8e04eSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
283468e8e04eSSam Leffler 	uint32_t tmp;
283568e8e04eSSam Leffler 
283668e8e04eSSam Leffler 	/* abort TSF synchronization */
283768e8e04eSSam Leffler 	tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
283868e8e04eSSam Leffler 	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
283968e8e04eSSam Leffler 	rt2661_set_bssid(sc, ifp->if_broadcastaddr);
284068e8e04eSSam Leffler }
284168e8e04eSSam Leffler 
284268e8e04eSSam Leffler static void
284368e8e04eSSam Leffler rt2661_scan_end(struct ieee80211com *ic)
284468e8e04eSSam Leffler {
284568e8e04eSSam Leffler 	struct ifnet *ifp = ic->ic_ifp;
284668e8e04eSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
2847b032f27cSSam Leffler 	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
284868e8e04eSSam Leffler 
284968e8e04eSSam Leffler 	rt2661_enable_tsf_sync(sc);
285068e8e04eSSam Leffler 	/* XXX keep local copy */
2851b032f27cSSam Leffler 	rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
285268e8e04eSSam Leffler }
285368e8e04eSSam Leffler 
285468e8e04eSSam Leffler static void
285568e8e04eSSam Leffler rt2661_set_channel(struct ieee80211com *ic)
285668e8e04eSSam Leffler {
285768e8e04eSSam Leffler 	struct ifnet *ifp = ic->ic_ifp;
285868e8e04eSSam Leffler 	struct rt2661_softc *sc = ifp->if_softc;
285968e8e04eSSam Leffler 
286068e8e04eSSam Leffler 	RAL_LOCK(sc);
286168e8e04eSSam Leffler 	rt2661_set_chan(sc, ic->ic_curchan);
2862b032f27cSSam Leffler 
2863b032f27cSSam Leffler 	sc->sc_txtap.wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
2864b032f27cSSam Leffler 	sc->sc_txtap.wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
2865b032f27cSSam Leffler 	sc->sc_rxtap.wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
2866b032f27cSSam Leffler 	sc->sc_rxtap.wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
286768e8e04eSSam Leffler 	RAL_UNLOCK(sc);
286868e8e04eSSam Leffler 
286968e8e04eSSam Leffler }
2870