1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013-2014 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qls_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 39 #include "qls_os.h" 40 #include "qls_hw.h" 41 #include "qls_def.h" 42 #include "qls_inline.h" 43 #include "qls_ver.h" 44 #include "qls_glbl.h" 45 #include "qls_dbg.h" 46 #include <sys/smp.h> 47 48 /* 49 * Some PCI Configuration Space Related Defines 50 */ 51 52 #ifndef PCI_VENDOR_QLOGIC 53 #define PCI_VENDOR_QLOGIC 0x1077 54 #endif 55 56 #ifndef PCI_DEVICE_QLOGIC_8000 57 #define PCI_DEVICE_QLOGIC_8000 0x8000 58 #endif 59 60 #define PCI_QLOGIC_DEV8000 \ 61 ((PCI_DEVICE_QLOGIC_8000 << 16) | PCI_VENDOR_QLOGIC) 62 63 /* 64 * static functions 65 */ 66 static int qls_alloc_parent_dma_tag(qla_host_t *ha); 67 static void qls_free_parent_dma_tag(qla_host_t *ha); 68 69 static void qls_flush_xmt_bufs(qla_host_t *ha); 70 71 static int qls_alloc_rcv_bufs(qla_host_t *ha); 72 static void qls_free_rcv_bufs(qla_host_t *ha); 73 74 static void qls_init_ifnet(device_t dev, qla_host_t *ha); 75 static void qls_release(qla_host_t *ha); 76 static void qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78 static void qls_stop(qla_host_t *ha); 79 static int qls_send(qla_host_t *ha, struct mbuf **m_headp); 80 static void qls_tx_done(void *context, int pending); 81 82 static int qls_config_lro(qla_host_t *ha); 83 static void qls_free_lro(qla_host_t *ha); 84 85 static void qls_error_recovery(void *context, int pending); 86 87 /* 88 * Hooks to the Operating Systems 89 */ 90 static int qls_pci_probe (device_t); 91 static int qls_pci_attach (device_t); 92 static int qls_pci_detach (device_t); 93 94 static void qls_start(struct ifnet *ifp); 95 static void qls_init(void *arg); 96 static int qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 97 static int qls_media_change(struct ifnet *ifp); 98 static void qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 99 100 static device_method_t qla_pci_methods[] = { 101 /* Device interface */ 102 DEVMETHOD(device_probe, qls_pci_probe), 103 DEVMETHOD(device_attach, qls_pci_attach), 104 DEVMETHOD(device_detach, qls_pci_detach), 105 { 0, 0 } 106 }; 107 108 static driver_t qla_pci_driver = { 109 "ql", qla_pci_methods, sizeof (qla_host_t), 110 }; 111 112 static devclass_t qla8000_devclass; 113 114 DRIVER_MODULE(qla8000, pci, qla_pci_driver, qla8000_devclass, 0, 0); 115 116 MODULE_DEPEND(qla8000, pci, 1, 1, 1); 117 MODULE_DEPEND(qla8000, ether, 1, 1, 1); 118 119 MALLOC_DEFINE(M_QLA8000BUF, "qla8000buf", "Buffers for qla8000 driver"); 120 121 static char dev_str[64]; 122 static char ver_str[64]; 123 124 /* 125 * Name: qls_pci_probe 126 * Function: Validate the PCI device to be a QLA80XX device 127 */ 128 static int 129 qls_pci_probe(device_t dev) 130 { 131 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 132 case PCI_QLOGIC_DEV8000: 133 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 134 "Qlogic ISP 8000 PCI CNA Adapter-Ethernet Function", 135 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 136 QLA_VERSION_BUILD); 137 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 138 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 139 QLA_VERSION_BUILD); 140 device_set_desc(dev, dev_str); 141 break; 142 default: 143 return (ENXIO); 144 } 145 146 if (bootverbose) 147 printf("%s: %s\n ", __func__, dev_str); 148 149 return (BUS_PROBE_DEFAULT); 150 } 151 152 static int 153 qls_sysctl_get_drvr_stats(SYSCTL_HANDLER_ARGS) 154 { 155 int err = 0, ret; 156 qla_host_t *ha; 157 uint32_t i; 158 159 err = sysctl_handle_int(oidp, &ret, 0, req); 160 161 if (err || !req->newptr) 162 return (err); 163 164 if (ret == 1) { 165 166 ha = (qla_host_t *)arg1; 167 168 for (i = 0; i < ha->num_tx_rings; i++) { 169 170 device_printf(ha->pci_dev, 171 "%s: tx_ring[%d].tx_frames= %p\n", 172 __func__, i, 173 (void *)ha->tx_ring[i].tx_frames); 174 175 device_printf(ha->pci_dev, 176 "%s: tx_ring[%d].tx_tso_frames= %p\n", 177 __func__, i, 178 (void *)ha->tx_ring[i].tx_tso_frames); 179 180 device_printf(ha->pci_dev, 181 "%s: tx_ring[%d].tx_vlan_frames= %p\n", 182 __func__, i, 183 (void *)ha->tx_ring[i].tx_vlan_frames); 184 185 device_printf(ha->pci_dev, 186 "%s: tx_ring[%d].txr_free= 0x%08x\n", 187 __func__, i, 188 ha->tx_ring[i].txr_free); 189 190 device_printf(ha->pci_dev, 191 "%s: tx_ring[%d].txr_next= 0x%08x\n", 192 __func__, i, 193 ha->tx_ring[i].txr_next); 194 195 device_printf(ha->pci_dev, 196 "%s: tx_ring[%d].txr_done= 0x%08x\n", 197 __func__, i, 198 ha->tx_ring[i].txr_done); 199 200 device_printf(ha->pci_dev, 201 "%s: tx_ring[%d].txr_cons_idx= 0x%08x\n", 202 __func__, i, 203 *(ha->tx_ring[i].txr_cons_vaddr)); 204 } 205 206 for (i = 0; i < ha->num_rx_rings; i++) { 207 208 device_printf(ha->pci_dev, 209 "%s: rx_ring[%d].rx_int= %p\n", 210 __func__, i, 211 (void *)ha->rx_ring[i].rx_int); 212 213 device_printf(ha->pci_dev, 214 "%s: rx_ring[%d].rss_int= %p\n", 215 __func__, i, 216 (void *)ha->rx_ring[i].rss_int); 217 218 device_printf(ha->pci_dev, 219 "%s: rx_ring[%d].lbq_next= 0x%08x\n", 220 __func__, i, 221 ha->rx_ring[i].lbq_next); 222 223 device_printf(ha->pci_dev, 224 "%s: rx_ring[%d].lbq_free= 0x%08x\n", 225 __func__, i, 226 ha->rx_ring[i].lbq_free); 227 228 device_printf(ha->pci_dev, 229 "%s: rx_ring[%d].lbq_in= 0x%08x\n", 230 __func__, i, 231 ha->rx_ring[i].lbq_in); 232 233 device_printf(ha->pci_dev, 234 "%s: rx_ring[%d].sbq_next= 0x%08x\n", 235 __func__, i, 236 ha->rx_ring[i].sbq_next); 237 238 device_printf(ha->pci_dev, 239 "%s: rx_ring[%d].sbq_free= 0x%08x\n", 240 __func__, i, 241 ha->rx_ring[i].sbq_free); 242 243 device_printf(ha->pci_dev, 244 "%s: rx_ring[%d].sbq_in= 0x%08x\n", 245 __func__, i, 246 ha->rx_ring[i].sbq_in); 247 } 248 249 device_printf(ha->pci_dev, "%s: err_m_getcl = 0x%08x\n", 250 __func__, ha->err_m_getcl); 251 device_printf(ha->pci_dev, "%s: err_m_getjcl = 0x%08x\n", 252 __func__, ha->err_m_getjcl); 253 device_printf(ha->pci_dev, 254 "%s: err_tx_dmamap_create = 0x%08x\n", 255 __func__, ha->err_tx_dmamap_create); 256 device_printf(ha->pci_dev, 257 "%s: err_tx_dmamap_load = 0x%08x\n", 258 __func__, ha->err_tx_dmamap_load); 259 device_printf(ha->pci_dev, 260 "%s: err_tx_defrag = 0x%08x\n", 261 __func__, ha->err_tx_defrag); 262 } 263 return (err); 264 } 265 266 static void 267 qls_add_sysctls(qla_host_t *ha) 268 { 269 device_t dev = ha->pci_dev; 270 271 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 272 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 273 OID_AUTO, "version", CTLFLAG_RD, 274 ver_str, 0, "Driver Version"); 275 276 qls_dbg_level = 0; 277 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 278 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 279 OID_AUTO, "debug", CTLFLAG_RW, 280 &qls_dbg_level, qls_dbg_level, "Debug Level"); 281 282 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 283 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 284 OID_AUTO, "drvr_stats", 285 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, (void *)ha, 0, 286 qls_sysctl_get_drvr_stats, "I", "Driver Maintained Statistics"); 287 288 return; 289 } 290 291 static void 292 qls_watchdog(void *arg) 293 { 294 qla_host_t *ha = arg; 295 struct ifnet *ifp; 296 297 ifp = ha->ifp; 298 299 if (ha->flags.qla_watchdog_exit) { 300 ha->qla_watchdog_exited = 1; 301 return; 302 } 303 ha->qla_watchdog_exited = 0; 304 305 if (!ha->flags.qla_watchdog_pause) { 306 307 if (ha->qla_initiate_recovery) { 308 309 ha->qla_watchdog_paused = 1; 310 ha->qla_initiate_recovery = 0; 311 ha->err_inject = 0; 312 taskqueue_enqueue(ha->err_tq, &ha->err_task); 313 314 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 315 316 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 317 } 318 319 ha->qla_watchdog_paused = 0; 320 } else { 321 ha->qla_watchdog_paused = 1; 322 } 323 324 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 325 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 326 qls_watchdog, ha); 327 328 return; 329 } 330 331 /* 332 * Name: qls_pci_attach 333 * Function: attaches the device to the operating system 334 */ 335 static int 336 qls_pci_attach(device_t dev) 337 { 338 qla_host_t *ha = NULL; 339 int i; 340 341 QL_DPRINT2((dev, "%s: enter\n", __func__)); 342 343 if ((ha = device_get_softc(dev)) == NULL) { 344 device_printf(dev, "cannot get softc\n"); 345 return (ENOMEM); 346 } 347 348 memset(ha, 0, sizeof (qla_host_t)); 349 350 if (pci_get_device(dev) != PCI_DEVICE_QLOGIC_8000) { 351 device_printf(dev, "device is not QLE8000\n"); 352 return (ENXIO); 353 } 354 355 ha->pci_func = pci_get_function(dev); 356 357 ha->pci_dev = dev; 358 359 pci_enable_busmaster(dev); 360 361 ha->reg_rid = PCIR_BAR(1); 362 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 363 RF_ACTIVE); 364 365 if (ha->pci_reg == NULL) { 366 device_printf(dev, "unable to map any ports\n"); 367 goto qls_pci_attach_err; 368 } 369 370 ha->reg_rid1 = PCIR_BAR(3); 371 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 372 &ha->reg_rid1, RF_ACTIVE); 373 374 if (ha->pci_reg1 == NULL) { 375 device_printf(dev, "unable to map any ports\n"); 376 goto qls_pci_attach_err; 377 } 378 379 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 380 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 381 382 qls_add_sysctls(ha); 383 qls_hw_add_sysctls(ha); 384 385 ha->flags.lock_init = 1; 386 387 ha->msix_count = pci_msix_count(dev); 388 389 if (ha->msix_count < qls_get_msix_count(ha)) { 390 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 391 ha->msix_count); 392 goto qls_pci_attach_err; 393 } 394 395 ha->msix_count = qls_get_msix_count(ha); 396 397 device_printf(dev, "\n%s: ha %p pci_func 0x%x msix_count 0x%x" 398 " pci_reg %p pci_reg1 %p\n", __func__, ha, 399 ha->pci_func, ha->msix_count, ha->pci_reg, ha->pci_reg1); 400 401 if (pci_alloc_msix(dev, &ha->msix_count)) { 402 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 403 ha->msix_count); 404 ha->msix_count = 0; 405 goto qls_pci_attach_err; 406 } 407 408 for (i = 0; i < ha->num_rx_rings; i++) { 409 ha->irq_vec[i].cq_idx = i; 410 ha->irq_vec[i].ha = ha; 411 ha->irq_vec[i].irq_rid = 1 + i; 412 413 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 414 &ha->irq_vec[i].irq_rid, 415 (RF_ACTIVE | RF_SHAREABLE)); 416 417 if (ha->irq_vec[i].irq == NULL) { 418 device_printf(dev, "could not allocate interrupt\n"); 419 goto qls_pci_attach_err; 420 } 421 422 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 423 (INTR_TYPE_NET | INTR_MPSAFE), NULL, qls_isr, 424 &ha->irq_vec[i], &ha->irq_vec[i].handle)) { 425 device_printf(dev, 426 "could not setup interrupt\n"); 427 goto qls_pci_attach_err; 428 } 429 } 430 431 qls_rd_nic_params(ha); 432 433 /* allocate parent dma tag */ 434 if (qls_alloc_parent_dma_tag(ha)) { 435 device_printf(dev, "%s: qls_alloc_parent_dma_tag failed\n", 436 __func__); 437 goto qls_pci_attach_err; 438 } 439 440 /* alloc all dma buffers */ 441 if (qls_alloc_dma(ha)) { 442 device_printf(dev, "%s: qls_alloc_dma failed\n", __func__); 443 goto qls_pci_attach_err; 444 } 445 446 /* create the o.s ethernet interface */ 447 qls_init_ifnet(dev, ha); 448 449 ha->flags.qla_watchdog_active = 1; 450 ha->flags.qla_watchdog_pause = 1; 451 452 TASK_INIT(&ha->tx_task, 0, qls_tx_done, ha); 453 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 454 taskqueue_thread_enqueue, &ha->tx_tq); 455 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 456 device_get_nameunit(ha->pci_dev)); 457 458 callout_init(&ha->tx_callout, 1); 459 ha->flags.qla_callout_init = 1; 460 461 /* create ioctl device interface */ 462 if (qls_make_cdev(ha)) { 463 device_printf(dev, "%s: qls_make_cdev failed\n", __func__); 464 goto qls_pci_attach_err; 465 } 466 467 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 468 qls_watchdog, ha); 469 470 TASK_INIT(&ha->err_task, 0, qls_error_recovery, ha); 471 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT, 472 taskqueue_thread_enqueue, &ha->err_tq); 473 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 474 device_get_nameunit(ha->pci_dev)); 475 476 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 477 return (0); 478 479 qls_pci_attach_err: 480 481 qls_release(ha); 482 483 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 484 return (ENXIO); 485 } 486 487 /* 488 * Name: qls_pci_detach 489 * Function: Unhooks the device from the operating system 490 */ 491 static int 492 qls_pci_detach(device_t dev) 493 { 494 qla_host_t *ha = NULL; 495 struct ifnet *ifp; 496 497 QL_DPRINT2((dev, "%s: enter\n", __func__)); 498 499 if ((ha = device_get_softc(dev)) == NULL) { 500 device_printf(dev, "cannot get softc\n"); 501 return (ENOMEM); 502 } 503 504 ifp = ha->ifp; 505 506 (void)QLA_LOCK(ha, __func__, 0); 507 qls_stop(ha); 508 QLA_UNLOCK(ha, __func__); 509 510 qls_release(ha); 511 512 QL_DPRINT2((dev, "%s: exit\n", __func__)); 513 514 return (0); 515 } 516 517 /* 518 * Name: qls_release 519 * Function: Releases the resources allocated for the device 520 */ 521 static void 522 qls_release(qla_host_t *ha) 523 { 524 device_t dev; 525 int i; 526 527 dev = ha->pci_dev; 528 529 if (ha->err_tq) { 530 taskqueue_drain(ha->err_tq, &ha->err_task); 531 taskqueue_free(ha->err_tq); 532 } 533 534 if (ha->tx_tq) { 535 taskqueue_drain(ha->tx_tq, &ha->tx_task); 536 taskqueue_free(ha->tx_tq); 537 } 538 539 qls_del_cdev(ha); 540 541 if (ha->flags.qla_watchdog_active) { 542 ha->flags.qla_watchdog_exit = 1; 543 544 while (ha->qla_watchdog_exited == 0) 545 qls_mdelay(__func__, 1); 546 } 547 548 if (ha->flags.qla_callout_init) 549 callout_stop(&ha->tx_callout); 550 551 if (ha->ifp != NULL) 552 ether_ifdetach(ha->ifp); 553 554 qls_free_dma(ha); 555 qls_free_parent_dma_tag(ha); 556 557 for (i = 0; i < ha->num_rx_rings; i++) { 558 559 if (ha->irq_vec[i].handle) { 560 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 561 ha->irq_vec[i].handle); 562 } 563 564 if (ha->irq_vec[i].irq) { 565 (void)bus_release_resource(dev, SYS_RES_IRQ, 566 ha->irq_vec[i].irq_rid, 567 ha->irq_vec[i].irq); 568 } 569 } 570 571 if (ha->msix_count) 572 pci_release_msi(dev); 573 574 if (ha->flags.lock_init) { 575 mtx_destroy(&ha->tx_lock); 576 mtx_destroy(&ha->hw_lock); 577 } 578 579 if (ha->pci_reg) 580 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 581 ha->pci_reg); 582 583 if (ha->pci_reg1) 584 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 585 ha->pci_reg1); 586 } 587 588 /* 589 * DMA Related Functions 590 */ 591 592 static void 593 qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 594 { 595 *((bus_addr_t *)arg) = 0; 596 597 if (error) { 598 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 599 return; 600 } 601 602 *((bus_addr_t *)arg) = segs[0].ds_addr; 603 604 return; 605 } 606 607 int 608 qls_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 609 { 610 int ret = 0; 611 device_t dev; 612 bus_addr_t b_addr; 613 614 dev = ha->pci_dev; 615 616 QL_DPRINT2((dev, "%s: enter\n", __func__)); 617 618 ret = bus_dma_tag_create( 619 ha->parent_tag,/* parent */ 620 dma_buf->alignment, 621 ((bus_size_t)(1ULL << 32)),/* boundary */ 622 BUS_SPACE_MAXADDR, /* lowaddr */ 623 BUS_SPACE_MAXADDR, /* highaddr */ 624 NULL, NULL, /* filter, filterarg */ 625 dma_buf->size, /* maxsize */ 626 1, /* nsegments */ 627 dma_buf->size, /* maxsegsize */ 628 0, /* flags */ 629 NULL, NULL, /* lockfunc, lockarg */ 630 &dma_buf->dma_tag); 631 632 if (ret) { 633 device_printf(dev, "%s: could not create dma tag\n", __func__); 634 goto qls_alloc_dmabuf_exit; 635 } 636 ret = bus_dmamem_alloc(dma_buf->dma_tag, 637 (void **)&dma_buf->dma_b, 638 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 639 &dma_buf->dma_map); 640 if (ret) { 641 bus_dma_tag_destroy(dma_buf->dma_tag); 642 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 643 goto qls_alloc_dmabuf_exit; 644 } 645 646 ret = bus_dmamap_load(dma_buf->dma_tag, 647 dma_buf->dma_map, 648 dma_buf->dma_b, 649 dma_buf->size, 650 qls_dmamap_callback, 651 &b_addr, BUS_DMA_NOWAIT); 652 653 if (ret || !b_addr) { 654 bus_dma_tag_destroy(dma_buf->dma_tag); 655 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 656 dma_buf->dma_map); 657 ret = -1; 658 goto qls_alloc_dmabuf_exit; 659 } 660 661 dma_buf->dma_addr = b_addr; 662 663 qls_alloc_dmabuf_exit: 664 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 665 __func__, ret, (void *)dma_buf->dma_tag, 666 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 667 dma_buf->size)); 668 669 return ret; 670 } 671 672 void 673 qls_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 674 { 675 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 676 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 677 bus_dma_tag_destroy(dma_buf->dma_tag); 678 } 679 680 static int 681 qls_alloc_parent_dma_tag(qla_host_t *ha) 682 { 683 int ret; 684 device_t dev; 685 686 dev = ha->pci_dev; 687 688 /* 689 * Allocate parent DMA Tag 690 */ 691 ret = bus_dma_tag_create( 692 bus_get_dma_tag(dev), /* parent */ 693 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 694 BUS_SPACE_MAXADDR, /* lowaddr */ 695 BUS_SPACE_MAXADDR, /* highaddr */ 696 NULL, NULL, /* filter, filterarg */ 697 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 698 0, /* nsegments */ 699 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 700 0, /* flags */ 701 NULL, NULL, /* lockfunc, lockarg */ 702 &ha->parent_tag); 703 704 if (ret) { 705 device_printf(dev, "%s: could not create parent dma tag\n", 706 __func__); 707 return (-1); 708 } 709 710 ha->flags.parent_tag = 1; 711 712 return (0); 713 } 714 715 static void 716 qls_free_parent_dma_tag(qla_host_t *ha) 717 { 718 if (ha->flags.parent_tag) { 719 bus_dma_tag_destroy(ha->parent_tag); 720 ha->flags.parent_tag = 0; 721 } 722 } 723 724 /* 725 * Name: qls_init_ifnet 726 * Function: Creates the Network Device Interface and Registers it with the O.S 727 */ 728 729 static void 730 qls_init_ifnet(device_t dev, qla_host_t *ha) 731 { 732 struct ifnet *ifp; 733 734 QL_DPRINT2((dev, "%s: enter\n", __func__)); 735 736 ifp = ha->ifp = if_alloc(IFT_ETHER); 737 738 if (ifp == NULL) 739 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 740 741 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 742 ifp->if_baudrate = IF_Gbps(10); 743 ifp->if_init = qls_init; 744 ifp->if_softc = ha; 745 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 746 ifp->if_ioctl = qls_ioctl; 747 ifp->if_start = qls_start; 748 749 IFQ_SET_MAXLEN(&ifp->if_snd, qls_get_ifq_snd_maxlen(ha)); 750 ifp->if_snd.ifq_drv_maxlen = qls_get_ifq_snd_maxlen(ha); 751 IFQ_SET_READY(&ifp->if_snd); 752 753 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 754 if (ha->max_frame_size <= MCLBYTES) { 755 ha->msize = MCLBYTES; 756 } else if (ha->max_frame_size <= MJUMPAGESIZE) { 757 ha->msize = MJUMPAGESIZE; 758 } else 759 ha->msize = MJUM9BYTES; 760 761 ether_ifattach(ifp, qls_get_mac_addr(ha)); 762 763 ifp->if_capabilities = IFCAP_JUMBO_MTU; 764 765 ifp->if_capabilities |= IFCAP_HWCSUM; 766 ifp->if_capabilities |= IFCAP_VLAN_MTU; 767 768 ifp->if_capabilities |= IFCAP_TSO4; 769 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 770 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 771 ifp->if_capabilities |= IFCAP_LINKSTATE; 772 773 ifp->if_capenable = ifp->if_capabilities; 774 775 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 776 777 ifmedia_init(&ha->media, IFM_IMASK, qls_media_change, qls_media_status); 778 779 ifmedia_add(&ha->media, (IFM_ETHER | qls_get_optics(ha) | IFM_FDX), 0, 780 NULL); 781 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 782 783 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 784 785 QL_DPRINT2((dev, "%s: exit\n", __func__)); 786 787 return; 788 } 789 790 static void 791 qls_init_locked(qla_host_t *ha) 792 { 793 struct ifnet *ifp = ha->ifp; 794 795 qls_stop(ha); 796 797 qls_flush_xmt_bufs(ha); 798 799 if (qls_alloc_rcv_bufs(ha) != 0) 800 return; 801 802 if (qls_config_lro(ha)) 803 return; 804 805 bcopy(IF_LLADDR(ha->ifp), ha->mac_addr, ETHER_ADDR_LEN); 806 807 ifp->if_hwassist = CSUM_IP; 808 ifp->if_hwassist |= CSUM_TCP; 809 ifp->if_hwassist |= CSUM_UDP; 810 ifp->if_hwassist |= CSUM_TSO; 811 812 if (qls_init_hw_if(ha) == 0) { 813 ifp = ha->ifp; 814 ifp->if_drv_flags |= IFF_DRV_RUNNING; 815 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 816 ha->flags.qla_watchdog_pause = 0; 817 } 818 819 return; 820 } 821 822 static void 823 qls_init(void *arg) 824 { 825 qla_host_t *ha; 826 827 ha = (qla_host_t *)arg; 828 829 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 830 831 (void)QLA_LOCK(ha, __func__, 0); 832 qls_init_locked(ha); 833 QLA_UNLOCK(ha, __func__); 834 835 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 836 } 837 838 static u_int 839 qls_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 840 { 841 uint8_t *mta = arg; 842 843 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 844 return (0); 845 846 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 847 848 return (1); 849 } 850 851 static void 852 qls_set_multi(qla_host_t *ha, uint32_t add_multi) 853 { 854 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 855 struct ifnet *ifp = ha->ifp; 856 int mcnt; 857 858 mcnt = if_foreach_llmaddr(ifp, qls_copy_maddr, mta); 859 860 if (QLA_LOCK(ha, __func__, 1) == 0) { 861 qls_hw_set_multi(ha, mta, mcnt, add_multi); 862 QLA_UNLOCK(ha, __func__); 863 } 864 865 return; 866 } 867 868 static int 869 qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 870 { 871 int ret = 0; 872 struct ifreq *ifr = (struct ifreq *)data; 873 struct ifaddr *ifa = (struct ifaddr *)data; 874 qla_host_t *ha; 875 876 ha = (qla_host_t *)ifp->if_softc; 877 878 switch (cmd) { 879 case SIOCSIFADDR: 880 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 881 __func__, cmd)); 882 883 if (ifa->ifa_addr->sa_family == AF_INET) { 884 ifp->if_flags |= IFF_UP; 885 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 886 (void)QLA_LOCK(ha, __func__, 0); 887 qls_init_locked(ha); 888 QLA_UNLOCK(ha, __func__); 889 } 890 QL_DPRINT4((ha->pci_dev, 891 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 892 __func__, cmd, 893 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 894 895 arp_ifinit(ifp, ifa); 896 } else { 897 ether_ioctl(ifp, cmd, data); 898 } 899 break; 900 901 case SIOCSIFMTU: 902 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 903 __func__, cmd)); 904 905 if (ifr->ifr_mtu > QLA_MAX_MTU) { 906 ret = EINVAL; 907 } else { 908 (void) QLA_LOCK(ha, __func__, 0); 909 910 ifp->if_mtu = ifr->ifr_mtu; 911 ha->max_frame_size = 912 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 913 914 QLA_UNLOCK(ha, __func__); 915 916 if (ret) 917 ret = EINVAL; 918 } 919 920 break; 921 922 case SIOCSIFFLAGS: 923 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 924 __func__, cmd)); 925 926 (void)QLA_LOCK(ha, __func__, 0); 927 928 if (ifp->if_flags & IFF_UP) { 929 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 930 if ((ifp->if_flags ^ ha->if_flags) & 931 IFF_PROMISC) { 932 ret = qls_set_promisc(ha); 933 } else if ((ifp->if_flags ^ ha->if_flags) & 934 IFF_ALLMULTI) { 935 ret = qls_set_allmulti(ha); 936 } 937 } else { 938 ha->max_frame_size = ifp->if_mtu + 939 ETHER_HDR_LEN + ETHER_CRC_LEN; 940 qls_init_locked(ha); 941 } 942 } else { 943 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 944 qls_stop(ha); 945 ha->if_flags = ifp->if_flags; 946 } 947 948 QLA_UNLOCK(ha, __func__); 949 break; 950 951 case SIOCADDMULTI: 952 QL_DPRINT4((ha->pci_dev, 953 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 954 955 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 956 qls_set_multi(ha, 1); 957 } 958 break; 959 960 case SIOCDELMULTI: 961 QL_DPRINT4((ha->pci_dev, 962 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 963 964 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 965 qls_set_multi(ha, 0); 966 } 967 break; 968 969 case SIOCSIFMEDIA: 970 case SIOCGIFMEDIA: 971 QL_DPRINT4((ha->pci_dev, 972 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 973 __func__, cmd)); 974 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 975 break; 976 977 case SIOCSIFCAP: 978 { 979 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 980 981 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 982 __func__, cmd)); 983 984 if (mask & IFCAP_HWCSUM) 985 ifp->if_capenable ^= IFCAP_HWCSUM; 986 if (mask & IFCAP_TSO4) 987 ifp->if_capenable ^= IFCAP_TSO4; 988 if (mask & IFCAP_VLAN_HWTAGGING) 989 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 990 if (mask & IFCAP_VLAN_HWTSO) 991 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 992 993 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 994 qls_init(ha); 995 996 VLAN_CAPABILITIES(ifp); 997 break; 998 } 999 1000 default: 1001 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 1002 __func__, cmd)); 1003 ret = ether_ioctl(ifp, cmd, data); 1004 break; 1005 } 1006 1007 return (ret); 1008 } 1009 1010 static int 1011 qls_media_change(struct ifnet *ifp) 1012 { 1013 qla_host_t *ha; 1014 struct ifmedia *ifm; 1015 int ret = 0; 1016 1017 ha = (qla_host_t *)ifp->if_softc; 1018 1019 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1020 1021 ifm = &ha->media; 1022 1023 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1024 ret = EINVAL; 1025 1026 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1027 1028 return (ret); 1029 } 1030 1031 static void 1032 qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1033 { 1034 qla_host_t *ha; 1035 1036 ha = (qla_host_t *)ifp->if_softc; 1037 1038 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1039 1040 ifmr->ifm_status = IFM_AVALID; 1041 ifmr->ifm_active = IFM_ETHER; 1042 1043 qls_update_link_state(ha); 1044 if (ha->link_up) { 1045 ifmr->ifm_status |= IFM_ACTIVE; 1046 ifmr->ifm_active |= (IFM_FDX | qls_get_optics(ha)); 1047 } 1048 1049 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1050 (ha->link_up ? "link_up" : "link_down"))); 1051 1052 return; 1053 } 1054 1055 static void 1056 qls_start(struct ifnet *ifp) 1057 { 1058 int i, ret = 0; 1059 struct mbuf *m_head; 1060 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1061 1062 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1063 1064 if (!mtx_trylock(&ha->tx_lock)) { 1065 QL_DPRINT8((ha->pci_dev, 1066 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1067 return; 1068 } 1069 1070 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == 1071 IFF_DRV_RUNNING) { 1072 1073 for (i = 0; i < ha->num_tx_rings; i++) { 1074 ret |= qls_hw_tx_done(ha, i); 1075 } 1076 1077 if (ret == 0) 1078 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1079 } 1080 1081 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1082 IFF_DRV_RUNNING) { 1083 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1084 QLA_TX_UNLOCK(ha); 1085 return; 1086 } 1087 1088 if (!ha->link_up) { 1089 qls_update_link_state(ha); 1090 if (!ha->link_up) { 1091 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1092 QLA_TX_UNLOCK(ha); 1093 return; 1094 } 1095 } 1096 1097 while (ifp->if_snd.ifq_head != NULL) { 1098 1099 IF_DEQUEUE(&ifp->if_snd, m_head); 1100 1101 if (m_head == NULL) { 1102 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1103 __func__)); 1104 break; 1105 } 1106 1107 if (qls_send(ha, &m_head)) { 1108 if (m_head == NULL) 1109 break; 1110 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1111 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1112 IF_PREPEND(&ifp->if_snd, m_head); 1113 break; 1114 } 1115 /* Send a copy of the frame to the BPF listener */ 1116 ETHER_BPF_MTAP(ifp, m_head); 1117 } 1118 1119 QLA_TX_UNLOCK(ha); 1120 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1121 return; 1122 } 1123 1124 static int 1125 qls_send(qla_host_t *ha, struct mbuf **m_headp) 1126 { 1127 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1128 bus_dmamap_t map; 1129 int nsegs; 1130 int ret = -1; 1131 uint32_t tx_idx; 1132 struct mbuf *m_head = *m_headp; 1133 uint32_t txr_idx = 0; 1134 1135 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1136 1137 /* check if flowid is set */ 1138 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) 1139 txr_idx = m_head->m_pkthdr.flowid & (ha->num_tx_rings - 1); 1140 1141 tx_idx = ha->tx_ring[txr_idx].txr_next; 1142 1143 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1144 1145 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1146 BUS_DMA_NOWAIT); 1147 1148 if (ret == EFBIG) { 1149 1150 struct mbuf *m; 1151 1152 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1153 m_head->m_pkthdr.len)); 1154 1155 m = m_defrag(m_head, M_NOWAIT); 1156 if (m == NULL) { 1157 ha->err_tx_defrag++; 1158 m_freem(m_head); 1159 *m_headp = NULL; 1160 device_printf(ha->pci_dev, 1161 "%s: m_defrag() = NULL [%d]\n", 1162 __func__, ret); 1163 return (ENOBUFS); 1164 } 1165 m_head = m; 1166 *m_headp = m_head; 1167 1168 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1169 segs, &nsegs, BUS_DMA_NOWAIT))) { 1170 1171 ha->err_tx_dmamap_load++; 1172 1173 device_printf(ha->pci_dev, 1174 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1175 __func__, ret, m_head->m_pkthdr.len); 1176 1177 if (ret != ENOMEM) { 1178 m_freem(m_head); 1179 *m_headp = NULL; 1180 } 1181 return (ret); 1182 } 1183 1184 } else if (ret) { 1185 1186 ha->err_tx_dmamap_load++; 1187 1188 device_printf(ha->pci_dev, 1189 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1190 __func__, ret, m_head->m_pkthdr.len); 1191 1192 if (ret != ENOMEM) { 1193 m_freem(m_head); 1194 *m_headp = NULL; 1195 } 1196 return (ret); 1197 } 1198 1199 QL_ASSERT(ha, (nsegs != 0), ("qls_send: empty packet")); 1200 1201 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1202 1203 if (!(ret = qls_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx))) { 1204 1205 ha->tx_ring[txr_idx].count++; 1206 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1207 ha->tx_ring[txr_idx].tx_buf[tx_idx].map = map; 1208 } else { 1209 if (ret == EINVAL) { 1210 if (m_head) 1211 m_freem(m_head); 1212 *m_headp = NULL; 1213 } 1214 } 1215 1216 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1217 return (ret); 1218 } 1219 1220 static void 1221 qls_stop(qla_host_t *ha) 1222 { 1223 struct ifnet *ifp = ha->ifp; 1224 device_t dev; 1225 1226 dev = ha->pci_dev; 1227 1228 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1229 1230 ha->flags.qla_watchdog_pause = 1; 1231 1232 while (!ha->qla_watchdog_paused) 1233 qls_mdelay(__func__, 1); 1234 1235 qls_del_hw_if(ha); 1236 1237 qls_free_lro(ha); 1238 1239 qls_flush_xmt_bufs(ha); 1240 qls_free_rcv_bufs(ha); 1241 1242 return; 1243 } 1244 1245 /* 1246 * Buffer Management Functions for Transmit and Receive Rings 1247 */ 1248 /* 1249 * Release mbuf after it sent on the wire 1250 */ 1251 static void 1252 qls_flush_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1253 { 1254 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1255 1256 if (txb->m_head) { 1257 1258 bus_dmamap_unload(ha->tx_tag, txb->map); 1259 1260 m_freem(txb->m_head); 1261 txb->m_head = NULL; 1262 } 1263 1264 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1265 } 1266 1267 static void 1268 qls_flush_xmt_bufs(qla_host_t *ha) 1269 { 1270 int i, j; 1271 1272 for (j = 0; j < ha->num_tx_rings; j++) { 1273 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1274 qls_flush_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1275 } 1276 1277 return; 1278 } 1279 1280 1281 static int 1282 qls_alloc_rcv_mbufs(qla_host_t *ha, int r) 1283 { 1284 int i, j, ret = 0; 1285 qla_rx_buf_t *rxb; 1286 qla_rx_ring_t *rx_ring; 1287 volatile q81_bq_addr_e_t *sbq_e; 1288 1289 1290 rx_ring = &ha->rx_ring[r]; 1291 1292 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1293 1294 rxb = &rx_ring->rx_buf[i]; 1295 1296 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1297 1298 if (ret) { 1299 device_printf(ha->pci_dev, 1300 "%s: dmamap[%d, %d] failed\n", __func__, r, i); 1301 1302 for (j = 0; j < i; j++) { 1303 rxb = &rx_ring->rx_buf[j]; 1304 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1305 } 1306 goto qls_alloc_rcv_mbufs_err; 1307 } 1308 } 1309 1310 rx_ring = &ha->rx_ring[r]; 1311 1312 sbq_e = rx_ring->sbq_vaddr; 1313 1314 rxb = &rx_ring->rx_buf[0]; 1315 1316 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1317 1318 if (!(ret = qls_get_mbuf(ha, rxb, NULL))) { 1319 1320 /* 1321 * set the physical address in the 1322 * corresponding descriptor entry in the 1323 * receive ring/queue for the hba 1324 */ 1325 1326 sbq_e->addr_lo = rxb->paddr & 0xFFFFFFFF; 1327 sbq_e->addr_hi = (rxb->paddr >> 32) & 0xFFFFFFFF; 1328 1329 } else { 1330 device_printf(ha->pci_dev, 1331 "%s: qls_get_mbuf [%d, %d] failed\n", 1332 __func__, r, i); 1333 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1334 goto qls_alloc_rcv_mbufs_err; 1335 } 1336 1337 rxb++; 1338 sbq_e++; 1339 } 1340 return 0; 1341 1342 qls_alloc_rcv_mbufs_err: 1343 return (-1); 1344 } 1345 1346 static void 1347 qls_free_rcv_bufs(qla_host_t *ha) 1348 { 1349 int i, r; 1350 qla_rx_buf_t *rxb; 1351 qla_rx_ring_t *rxr; 1352 1353 for (r = 0; r < ha->num_rx_rings; r++) { 1354 1355 rxr = &ha->rx_ring[r]; 1356 1357 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1358 1359 rxb = &rxr->rx_buf[i]; 1360 1361 if (rxb->m_head != NULL) { 1362 bus_dmamap_unload(ha->rx_tag, rxb->map); 1363 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1364 m_freem(rxb->m_head); 1365 } 1366 } 1367 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1368 } 1369 return; 1370 } 1371 1372 static int 1373 qls_alloc_rcv_bufs(qla_host_t *ha) 1374 { 1375 int r, ret = 0; 1376 qla_rx_ring_t *rxr; 1377 1378 for (r = 0; r < ha->num_rx_rings; r++) { 1379 rxr = &ha->rx_ring[r]; 1380 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1381 } 1382 1383 for (r = 0; r < ha->num_rx_rings; r++) { 1384 1385 ret = qls_alloc_rcv_mbufs(ha, r); 1386 1387 if (ret) 1388 qls_free_rcv_bufs(ha); 1389 } 1390 1391 return (ret); 1392 } 1393 1394 int 1395 qls_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1396 { 1397 struct mbuf *mp = nmp; 1398 struct ifnet *ifp; 1399 int ret = 0; 1400 uint32_t offset; 1401 bus_dma_segment_t segs[1]; 1402 int nsegs; 1403 1404 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1405 1406 ifp = ha->ifp; 1407 1408 if (mp == NULL) { 1409 1410 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, ha->msize); 1411 1412 if (mp == NULL) { 1413 1414 if (ha->msize == MCLBYTES) 1415 ha->err_m_getcl++; 1416 else 1417 ha->err_m_getjcl++; 1418 1419 ret = ENOBUFS; 1420 device_printf(ha->pci_dev, 1421 "%s: m_getcl failed\n", __func__); 1422 goto exit_qls_get_mbuf; 1423 } 1424 mp->m_len = mp->m_pkthdr.len = ha->msize; 1425 } else { 1426 mp->m_len = mp->m_pkthdr.len = ha->msize; 1427 mp->m_data = mp->m_ext.ext_buf; 1428 mp->m_next = NULL; 1429 } 1430 1431 /* align the receive buffers to 8 byte boundary */ 1432 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1433 if (offset) { 1434 offset = 8 - offset; 1435 m_adj(mp, offset); 1436 } 1437 1438 /* 1439 * Using memory from the mbuf cluster pool, invoke the bus_dma 1440 * machinery to arrange the memory mapping. 1441 */ 1442 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1443 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1444 rxb->paddr = segs[0].ds_addr; 1445 1446 if (ret || !rxb->paddr || (nsegs != 1)) { 1447 m_freem(mp); 1448 rxb->m_head = NULL; 1449 device_printf(ha->pci_dev, 1450 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1451 __func__, ret, (long long unsigned int)rxb->paddr, 1452 nsegs); 1453 ret = -1; 1454 goto exit_qls_get_mbuf; 1455 } 1456 rxb->m_head = mp; 1457 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1458 1459 exit_qls_get_mbuf: 1460 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1461 return (ret); 1462 } 1463 1464 static void 1465 qls_tx_done(void *context, int pending) 1466 { 1467 qla_host_t *ha = context; 1468 struct ifnet *ifp; 1469 1470 ifp = ha->ifp; 1471 1472 if (!ifp) 1473 return; 1474 1475 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1476 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1477 return; 1478 } 1479 1480 qls_start(ha->ifp); 1481 return; 1482 } 1483 1484 static int 1485 qls_config_lro(qla_host_t *ha) 1486 { 1487 int i; 1488 struct lro_ctrl *lro; 1489 1490 for (i = 0; i < ha->num_rx_rings; i++) { 1491 lro = &ha->rx_ring[i].lro; 1492 if (tcp_lro_init(lro)) { 1493 device_printf(ha->pci_dev, "%s: tcp_lro_init failed\n", 1494 __func__); 1495 return (-1); 1496 } 1497 lro->ifp = ha->ifp; 1498 } 1499 ha->flags.lro_init = 1; 1500 1501 QL_DPRINT2((ha->pci_dev, "%s: LRO initialized\n", __func__)); 1502 return (0); 1503 } 1504 1505 static void 1506 qls_free_lro(qla_host_t *ha) 1507 { 1508 int i; 1509 struct lro_ctrl *lro; 1510 1511 if (!ha->flags.lro_init) 1512 return; 1513 1514 for (i = 0; i < ha->num_rx_rings; i++) { 1515 lro = &ha->rx_ring[i].lro; 1516 tcp_lro_free(lro); 1517 } 1518 ha->flags.lro_init = 0; 1519 } 1520 1521 static void 1522 qls_error_recovery(void *context, int pending) 1523 { 1524 qla_host_t *ha = context; 1525 1526 qls_init(ha); 1527 1528 return; 1529 } 1530 1531